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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * udc.c - ChipIdea UDC driver
4 *
5 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
6 *
7 * Author: David Lopo
8 */
9
10#include <linux/delay.h>
11#include <linux/device.h>
12#include <linux/dmapool.h>
13#include <linux/err.h>
14#include <linux/irqreturn.h>
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/pm_runtime.h>
18#include <linux/pinctrl/consumer.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21#include <linux/usb/otg-fsm.h>
22#include <linux/usb/chipidea.h>
23
24#include "ci.h"
25#include "udc.h"
26#include "bits.h"
27#include "otg.h"
28#include "otg_fsm.h"
29#include "trace.h"
30
31/* control endpoint description */
32static const struct usb_endpoint_descriptor
33ctrl_endpt_out_desc = {
34 .bLength = USB_DT_ENDPOINT_SIZE,
35 .bDescriptorType = USB_DT_ENDPOINT,
36
37 .bEndpointAddress = USB_DIR_OUT,
38 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
39 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
40};
41
42static const struct usb_endpoint_descriptor
43ctrl_endpt_in_desc = {
44 .bLength = USB_DT_ENDPOINT_SIZE,
45 .bDescriptorType = USB_DT_ENDPOINT,
46
47 .bEndpointAddress = USB_DIR_IN,
48 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
49 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
50};
51
52static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
53 struct td_node *node);
54/**
55 * hw_ep_bit: calculates the bit number
56 * @num: endpoint number
57 * @dir: endpoint direction
58 *
59 * This function returns bit number
60 */
61static inline int hw_ep_bit(int num, int dir)
62{
63 return num + ((dir == TX) ? 16 : 0);
64}
65
66static inline int ep_to_bit(struct ci_hdrc *ci, int n)
67{
68 int fill = 16 - ci->hw_ep_max / 2;
69
70 if (n >= ci->hw_ep_max / 2)
71 n += fill;
72
73 return n;
74}
75
76/**
77 * hw_device_state: enables/disables interrupts (execute without interruption)
78 * @ci: the controller
79 * @dma: 0 => disable, !0 => enable and set dma engine
80 *
81 * This function returns an error code
82 */
83static int hw_device_state(struct ci_hdrc *ci, u32 dma)
84{
85 if (dma) {
86 hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
87 /* interrupt, error, port change, reset, sleep/suspend */
88 hw_write(ci, OP_USBINTR, ~0,
89 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
90 } else {
91 hw_write(ci, OP_USBINTR, ~0, 0);
92 }
93 return 0;
94}
95
96/**
97 * hw_ep_flush: flush endpoint fifo (execute without interruption)
98 * @ci: the controller
99 * @num: endpoint number
100 * @dir: endpoint direction
101 *
102 * This function returns an error code
103 */
104static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir)
105{
106 int n = hw_ep_bit(num, dir);
107
108 do {
109 /* flush any pending transfer */
110 hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n));
111 while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
112 cpu_relax();
113 } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
114
115 return 0;
116}
117
118/**
119 * hw_ep_disable: disables endpoint (execute without interruption)
120 * @ci: the controller
121 * @num: endpoint number
122 * @dir: endpoint direction
123 *
124 * This function returns an error code
125 */
126static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir)
127{
128 hw_write(ci, OP_ENDPTCTRL + num,
129 (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
130 return 0;
131}
132
133/**
134 * hw_ep_enable: enables endpoint (execute without interruption)
135 * @ci: the controller
136 * @num: endpoint number
137 * @dir: endpoint direction
138 * @type: endpoint type
139 *
140 * This function returns an error code
141 */
142static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type)
143{
144 u32 mask, data;
145
146 if (dir == TX) {
147 mask = ENDPTCTRL_TXT; /* type */
148 data = type << __ffs(mask);
149
150 mask |= ENDPTCTRL_TXS; /* unstall */
151 mask |= ENDPTCTRL_TXR; /* reset data toggle */
152 data |= ENDPTCTRL_TXR;
153 mask |= ENDPTCTRL_TXE; /* enable */
154 data |= ENDPTCTRL_TXE;
155 } else {
156 mask = ENDPTCTRL_RXT; /* type */
157 data = type << __ffs(mask);
158
159 mask |= ENDPTCTRL_RXS; /* unstall */
160 mask |= ENDPTCTRL_RXR; /* reset data toggle */
161 data |= ENDPTCTRL_RXR;
162 mask |= ENDPTCTRL_RXE; /* enable */
163 data |= ENDPTCTRL_RXE;
164 }
165 hw_write(ci, OP_ENDPTCTRL + num, mask, data);
166 return 0;
167}
168
169/**
170 * hw_ep_get_halt: return endpoint halt status
171 * @ci: the controller
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns 1 if endpoint halted
176 */
177static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir)
178{
179 u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180
181 return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
182}
183
184/**
185 * hw_ep_prime: primes endpoint (execute without interruption)
186 * @ci: the controller
187 * @num: endpoint number
188 * @dir: endpoint direction
189 * @is_ctrl: true if control endpoint
190 *
191 * This function returns an error code
192 */
193static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl)
194{
195 int n = hw_ep_bit(num, dir);
196
197 /* Synchronize before ep prime */
198 wmb();
199
200 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
201 return -EAGAIN;
202
203 hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n));
204
205 while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
206 cpu_relax();
207 if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
208 return -EAGAIN;
209
210 /* status shoult be tested according with manual but it doesn't work */
211 return 0;
212}
213
214/**
215 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
216 * without interruption)
217 * @ci: the controller
218 * @num: endpoint number
219 * @dir: endpoint direction
220 * @value: true => stall, false => unstall
221 *
222 * This function returns an error code
223 */
224static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value)
225{
226 if (value != 0 && value != 1)
227 return -EINVAL;
228
229 do {
230 enum ci_hw_regs reg = OP_ENDPTCTRL + num;
231 u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
232 u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
233
234 /* data toggle - reserved for EP0 but it's in ESS */
235 hw_write(ci, reg, mask_xs|mask_xr,
236 value ? mask_xs : mask_xr);
237 } while (value != hw_ep_get_halt(ci, num, dir));
238
239 return 0;
240}
241
242/**
243 * hw_port_is_high_speed: test if port is high speed
244 * @ci: the controller
245 *
246 * This function returns true if high speed port
247 */
248static int hw_port_is_high_speed(struct ci_hdrc *ci)
249{
250 return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
251 hw_read(ci, OP_PORTSC, PORTSC_HSP);
252}
253
254/**
255 * hw_test_and_clear_complete: test & clear complete status (execute without
256 * interruption)
257 * @ci: the controller
258 * @n: endpoint number
259 *
260 * This function returns complete status
261 */
262static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n)
263{
264 n = ep_to_bit(ci, n);
265 return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
266}
267
268/**
269 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
270 * without interruption)
271 * @ci: the controller
272 *
273 * This function returns active interrutps
274 */
275static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci)
276{
277 u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
278
279 hw_write(ci, OP_USBSTS, ~0, reg);
280 return reg;
281}
282
283/**
284 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
285 * interruption)
286 * @ci: the controller
287 *
288 * This function returns guard value
289 */
290static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci)
291{
292 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
293}
294
295/**
296 * hw_test_and_set_setup_guard: test & set setup guard (execute without
297 * interruption)
298 * @ci: the controller
299 *
300 * This function returns guard value
301 */
302static int hw_test_and_set_setup_guard(struct ci_hdrc *ci)
303{
304 return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
305}
306
307/**
308 * hw_usb_set_address: configures USB address (execute without interruption)
309 * @ci: the controller
310 * @value: new USB address
311 *
312 * This function explicitly sets the address, without the "USBADRA" (advance)
313 * feature, which is not supported by older versions of the controller.
314 */
315static void hw_usb_set_address(struct ci_hdrc *ci, u8 value)
316{
317 hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
318 value << __ffs(DEVICEADDR_USBADR));
319}
320
321/**
322 * hw_usb_reset: restart device after a bus reset (execute without
323 * interruption)
324 * @ci: the controller
325 *
326 * This function returns an error code
327 */
328static int hw_usb_reset(struct ci_hdrc *ci)
329{
330 hw_usb_set_address(ci, 0);
331
332 /* ESS flushes only at end?!? */
333 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
334
335 /* clear setup token semaphores */
336 hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
337
338 /* clear complete status */
339 hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
340
341 /* wait until all bits cleared */
342 while (hw_read(ci, OP_ENDPTPRIME, ~0))
343 udelay(10); /* not RTOS friendly */
344
345 /* reset all endpoints ? */
346
347 /* reset internal status and wait for further instructions
348 no need to verify the port reset status (ESS does it) */
349
350 return 0;
351}
352
353/******************************************************************************
354 * UTIL block
355 *****************************************************************************/
356
357static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
358 unsigned int length, struct scatterlist *s)
359{
360 int i;
361 u32 temp;
362 struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node),
363 GFP_ATOMIC);
364
365 if (node == NULL)
366 return -ENOMEM;
367
368 node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma);
369 if (node->ptr == NULL) {
370 kfree(node);
371 return -ENOMEM;
372 }
373
374 node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
375 node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
376 node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
377 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) {
378 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
379
380 if (hwreq->req.length == 0
381 || hwreq->req.length % hwep->ep.maxpacket)
382 mul++;
383 node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO));
384 }
385
386 if (s) {
387 temp = (u32) (sg_dma_address(s) + hwreq->req.actual);
388 node->td_remaining_size = CI_MAX_BUF_SIZE - length;
389 } else {
390 temp = (u32) (hwreq->req.dma + hwreq->req.actual);
391 }
392
393 if (length) {
394 node->ptr->page[0] = cpu_to_le32(temp);
395 for (i = 1; i < TD_PAGE_COUNT; i++) {
396 u32 page = temp + i * CI_HDRC_PAGE_SIZE;
397 page &= ~TD_RESERVED_MASK;
398 node->ptr->page[i] = cpu_to_le32(page);
399 }
400 }
401
402 hwreq->req.actual += length;
403
404 if (!list_empty(&hwreq->tds)) {
405 /* get the last entry */
406 lastnode = list_entry(hwreq->tds.prev,
407 struct td_node, td);
408 lastnode->ptr->next = cpu_to_le32(node->dma);
409 }
410
411 INIT_LIST_HEAD(&node->td);
412 list_add_tail(&node->td, &hwreq->tds);
413
414 return 0;
415}
416
417/**
418 * _usb_addr: calculates endpoint address from direction & number
419 * @ep: endpoint
420 */
421static inline u8 _usb_addr(struct ci_hw_ep *ep)
422{
423 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
424}
425
426static int prepare_td_for_non_sg(struct ci_hw_ep *hwep,
427 struct ci_hw_req *hwreq)
428{
429 unsigned int rest = hwreq->req.length;
430 int pages = TD_PAGE_COUNT;
431 int ret = 0;
432
433 if (rest == 0) {
434 ret = add_td_to_list(hwep, hwreq, 0, NULL);
435 if (ret < 0)
436 return ret;
437 }
438
439 /*
440 * The first buffer could be not page aligned.
441 * In that case we have to span into one extra td.
442 */
443 if (hwreq->req.dma % PAGE_SIZE)
444 pages--;
445
446 while (rest > 0) {
447 unsigned int count = min(hwreq->req.length - hwreq->req.actual,
448 (unsigned int)(pages * CI_HDRC_PAGE_SIZE));
449
450 ret = add_td_to_list(hwep, hwreq, count, NULL);
451 if (ret < 0)
452 return ret;
453
454 rest -= count;
455 }
456
457 if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX
458 && (hwreq->req.length % hwep->ep.maxpacket == 0)) {
459 ret = add_td_to_list(hwep, hwreq, 0, NULL);
460 if (ret < 0)
461 return ret;
462 }
463
464 return ret;
465}
466
467static int prepare_td_per_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq,
468 struct scatterlist *s)
469{
470 unsigned int rest = sg_dma_len(s);
471 int ret = 0;
472
473 hwreq->req.actual = 0;
474 while (rest > 0) {
475 unsigned int count = min_t(unsigned int, rest,
476 CI_MAX_BUF_SIZE);
477
478 ret = add_td_to_list(hwep, hwreq, count, s);
479 if (ret < 0)
480 return ret;
481
482 rest -= count;
483 }
484
485 return ret;
486}
487
488static void ci_add_buffer_entry(struct td_node *node, struct scatterlist *s)
489{
490 int empty_td_slot_index = (CI_MAX_BUF_SIZE - node->td_remaining_size)
491 / CI_HDRC_PAGE_SIZE;
492 int i;
493 u32 token;
494
495 token = le32_to_cpu(node->ptr->token) + (sg_dma_len(s) << __ffs(TD_TOTAL_BYTES));
496 node->ptr->token = cpu_to_le32(token);
497
498 for (i = empty_td_slot_index; i < TD_PAGE_COUNT; i++) {
499 u32 page = (u32) sg_dma_address(s) +
500 (i - empty_td_slot_index) * CI_HDRC_PAGE_SIZE;
501
502 page &= ~TD_RESERVED_MASK;
503 node->ptr->page[i] = cpu_to_le32(page);
504 }
505}
506
507static int prepare_td_for_sg(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
508{
509 struct usb_request *req = &hwreq->req;
510 struct scatterlist *s = req->sg;
511 int ret = 0, i = 0;
512 struct td_node *node = NULL;
513
514 if (!s || req->zero || req->length == 0) {
515 dev_err(hwep->ci->dev, "not supported operation for sg\n");
516 return -EINVAL;
517 }
518
519 while (i++ < req->num_mapped_sgs) {
520 if (sg_dma_address(s) % PAGE_SIZE) {
521 dev_err(hwep->ci->dev, "not page aligned sg buffer\n");
522 return -EINVAL;
523 }
524
525 if (node && (node->td_remaining_size >= sg_dma_len(s))) {
526 ci_add_buffer_entry(node, s);
527 node->td_remaining_size -= sg_dma_len(s);
528 } else {
529 ret = prepare_td_per_sg(hwep, hwreq, s);
530 if (ret)
531 return ret;
532
533 node = list_entry(hwreq->tds.prev,
534 struct td_node, td);
535 }
536
537 s = sg_next(s);
538 }
539
540 return ret;
541}
542
543/**
544 * _hardware_enqueue: configures a request at hardware level
545 * @hwep: endpoint
546 * @hwreq: request
547 *
548 * This function returns an error code
549 */
550static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
551{
552 struct ci_hdrc *ci = hwep->ci;
553 int ret = 0;
554 struct td_node *firstnode, *lastnode;
555
556 /* don't queue twice */
557 if (hwreq->req.status == -EALREADY)
558 return -EALREADY;
559
560 hwreq->req.status = -EALREADY;
561
562 ret = usb_gadget_map_request_by_dev(ci->dev->parent,
563 &hwreq->req, hwep->dir);
564 if (ret)
565 return ret;
566
567 if (hwreq->req.num_mapped_sgs)
568 ret = prepare_td_for_sg(hwep, hwreq);
569 else
570 ret = prepare_td_for_non_sg(hwep, hwreq);
571
572 if (ret)
573 return ret;
574
575 lastnode = list_entry(hwreq->tds.prev,
576 struct td_node, td);
577
578 lastnode->ptr->next = cpu_to_le32(TD_TERMINATE);
579 if (!hwreq->req.no_interrupt)
580 lastnode->ptr->token |= cpu_to_le32(TD_IOC);
581
582 list_for_each_entry_safe(firstnode, lastnode, &hwreq->tds, td)
583 trace_ci_prepare_td(hwep, hwreq, firstnode);
584
585 firstnode = list_first_entry(&hwreq->tds, struct td_node, td);
586
587 wmb();
588
589 hwreq->req.actual = 0;
590 if (!list_empty(&hwep->qh.queue)) {
591 struct ci_hw_req *hwreqprev;
592 int n = hw_ep_bit(hwep->num, hwep->dir);
593 int tmp_stat;
594 struct td_node *prevlastnode;
595 u32 next = firstnode->dma & TD_ADDR_MASK;
596
597 hwreqprev = list_entry(hwep->qh.queue.prev,
598 struct ci_hw_req, queue);
599 prevlastnode = list_entry(hwreqprev->tds.prev,
600 struct td_node, td);
601
602 prevlastnode->ptr->next = cpu_to_le32(next);
603 wmb();
604
605 if (ci->rev == CI_REVISION_22) {
606 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
607 reprime_dtd(ci, hwep, prevlastnode);
608 }
609
610 if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
611 goto done;
612 do {
613 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
614 tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
615 } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
616 hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
617 if (tmp_stat)
618 goto done;
619 }
620
621 /* QH configuration */
622 hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma);
623 hwep->qh.ptr->td.token &=
624 cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
625
626 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) {
627 u32 mul = hwreq->req.length / hwep->ep.maxpacket;
628
629 if (hwreq->req.length == 0
630 || hwreq->req.length % hwep->ep.maxpacket)
631 mul++;
632 hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT));
633 }
634
635 ret = hw_ep_prime(ci, hwep->num, hwep->dir,
636 hwep->type == USB_ENDPOINT_XFER_CONTROL);
637done:
638 return ret;
639}
640
641/**
642 * free_pending_td: remove a pending request for the endpoint
643 * @hwep: endpoint
644 */
645static void free_pending_td(struct ci_hw_ep *hwep)
646{
647 struct td_node *pending = hwep->pending_td;
648
649 dma_pool_free(hwep->td_pool, pending->ptr, pending->dma);
650 hwep->pending_td = NULL;
651 kfree(pending);
652}
653
654static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep,
655 struct td_node *node)
656{
657 hwep->qh.ptr->td.next = cpu_to_le32(node->dma);
658 hwep->qh.ptr->td.token &=
659 cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE));
660
661 return hw_ep_prime(ci, hwep->num, hwep->dir,
662 hwep->type == USB_ENDPOINT_XFER_CONTROL);
663}
664
665/**
666 * _hardware_dequeue: handles a request at hardware level
667 * @hwep: endpoint
668 * @hwreq: request
669 *
670 * This function returns an error code
671 */
672static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq)
673{
674 u32 tmptoken;
675 struct td_node *node, *tmpnode;
676 unsigned remaining_length;
677 unsigned actual = hwreq->req.length;
678 struct ci_hdrc *ci = hwep->ci;
679
680 if (hwreq->req.status != -EALREADY)
681 return -EINVAL;
682
683 hwreq->req.status = 0;
684
685 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
686 tmptoken = le32_to_cpu(node->ptr->token);
687 trace_ci_complete_td(hwep, hwreq, node);
688 if ((TD_STATUS_ACTIVE & tmptoken) != 0) {
689 int n = hw_ep_bit(hwep->num, hwep->dir);
690
691 if (ci->rev == CI_REVISION_24 ||
692 ci->rev == CI_REVISION_22)
693 if (!hw_read(ci, OP_ENDPTSTAT, BIT(n)))
694 reprime_dtd(ci, hwep, node);
695 hwreq->req.status = -EALREADY;
696 return -EBUSY;
697 }
698
699 remaining_length = (tmptoken & TD_TOTAL_BYTES);
700 remaining_length >>= __ffs(TD_TOTAL_BYTES);
701 actual -= remaining_length;
702
703 hwreq->req.status = tmptoken & TD_STATUS;
704 if ((TD_STATUS_HALTED & hwreq->req.status)) {
705 hwreq->req.status = -EPIPE;
706 break;
707 } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) {
708 hwreq->req.status = -EPROTO;
709 break;
710 } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) {
711 hwreq->req.status = -EILSEQ;
712 break;
713 }
714
715 if (remaining_length) {
716 if (hwep->dir == TX) {
717 hwreq->req.status = -EPROTO;
718 break;
719 }
720 }
721 /*
722 * As the hardware could still address the freed td
723 * which will run the udc unusable, the cleanup of the
724 * td has to be delayed by one.
725 */
726 if (hwep->pending_td)
727 free_pending_td(hwep);
728
729 hwep->pending_td = node;
730 list_del_init(&node->td);
731 }
732
733 usb_gadget_unmap_request_by_dev(hwep->ci->dev->parent,
734 &hwreq->req, hwep->dir);
735
736 hwreq->req.actual += actual;
737
738 if (hwreq->req.status)
739 return hwreq->req.status;
740
741 return hwreq->req.actual;
742}
743
744/**
745 * _ep_nuke: dequeues all endpoint requests
746 * @hwep: endpoint
747 *
748 * This function returns an error code
749 * Caller must hold lock
750 */
751static int _ep_nuke(struct ci_hw_ep *hwep)
752__releases(hwep->lock)
753__acquires(hwep->lock)
754{
755 struct td_node *node, *tmpnode;
756 if (hwep == NULL)
757 return -EINVAL;
758
759 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
760
761 while (!list_empty(&hwep->qh.queue)) {
762
763 /* pop oldest request */
764 struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next,
765 struct ci_hw_req, queue);
766
767 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
768 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
769 list_del_init(&node->td);
770 node->ptr = NULL;
771 kfree(node);
772 }
773
774 list_del_init(&hwreq->queue);
775 hwreq->req.status = -ESHUTDOWN;
776
777 if (hwreq->req.complete != NULL) {
778 spin_unlock(hwep->lock);
779 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
780 spin_lock(hwep->lock);
781 }
782 }
783
784 if (hwep->pending_td)
785 free_pending_td(hwep);
786
787 return 0;
788}
789
790static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer)
791{
792 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
793 int direction, retval = 0;
794 unsigned long flags;
795
796 if (ep == NULL || hwep->ep.desc == NULL)
797 return -EINVAL;
798
799 if (usb_endpoint_xfer_isoc(hwep->ep.desc))
800 return -EOPNOTSUPP;
801
802 spin_lock_irqsave(hwep->lock, flags);
803
804 if (value && hwep->dir == TX && check_transfer &&
805 !list_empty(&hwep->qh.queue) &&
806 !usb_endpoint_xfer_control(hwep->ep.desc)) {
807 spin_unlock_irqrestore(hwep->lock, flags);
808 return -EAGAIN;
809 }
810
811 direction = hwep->dir;
812 do {
813 retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value);
814
815 if (!value)
816 hwep->wedge = 0;
817
818 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
819 hwep->dir = (hwep->dir == TX) ? RX : TX;
820
821 } while (hwep->dir != direction);
822
823 spin_unlock_irqrestore(hwep->lock, flags);
824 return retval;
825}
826
827
828/**
829 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
830 * @gadget: gadget
831 *
832 * This function returns an error code
833 */
834static int _gadget_stop_activity(struct usb_gadget *gadget)
835{
836 struct usb_ep *ep;
837 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
838 unsigned long flags;
839
840 /* flush all endpoints */
841 gadget_for_each_ep(ep, gadget) {
842 usb_ep_fifo_flush(ep);
843 }
844 usb_ep_fifo_flush(&ci->ep0out->ep);
845 usb_ep_fifo_flush(&ci->ep0in->ep);
846
847 /* make sure to disable all endpoints */
848 gadget_for_each_ep(ep, gadget) {
849 usb_ep_disable(ep);
850 }
851
852 if (ci->status != NULL) {
853 usb_ep_free_request(&ci->ep0in->ep, ci->status);
854 ci->status = NULL;
855 }
856
857 spin_lock_irqsave(&ci->lock, flags);
858 ci->gadget.speed = USB_SPEED_UNKNOWN;
859 ci->remote_wakeup = 0;
860 ci->suspended = 0;
861 spin_unlock_irqrestore(&ci->lock, flags);
862
863 return 0;
864}
865
866/******************************************************************************
867 * ISR block
868 *****************************************************************************/
869/**
870 * isr_reset_handler: USB reset interrupt handler
871 * @ci: UDC device
872 *
873 * This function resets USB engine after a bus reset occurred
874 */
875static void isr_reset_handler(struct ci_hdrc *ci)
876__releases(ci->lock)
877__acquires(ci->lock)
878{
879 int retval;
880
881 spin_unlock(&ci->lock);
882 if (ci->gadget.speed != USB_SPEED_UNKNOWN)
883 usb_gadget_udc_reset(&ci->gadget, ci->driver);
884
885 retval = _gadget_stop_activity(&ci->gadget);
886 if (retval)
887 goto done;
888
889 retval = hw_usb_reset(ci);
890 if (retval)
891 goto done;
892
893 ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
894 if (ci->status == NULL)
895 retval = -ENOMEM;
896
897done:
898 spin_lock(&ci->lock);
899
900 if (retval)
901 dev_err(ci->dev, "error: %i\n", retval);
902}
903
904/**
905 * isr_get_status_complete: get_status request complete function
906 * @ep: endpoint
907 * @req: request handled
908 *
909 * Caller must release lock
910 */
911static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
912{
913 if (ep == NULL || req == NULL)
914 return;
915
916 kfree(req->buf);
917 usb_ep_free_request(ep, req);
918}
919
920/**
921 * _ep_queue: queues (submits) an I/O request to an endpoint
922 * @ep: endpoint
923 * @req: request
924 * @gfp_flags: GFP flags (not used)
925 *
926 * Caller must hold lock
927 * This function returns an error code
928 */
929static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
930 gfp_t __maybe_unused gfp_flags)
931{
932 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
933 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
934 struct ci_hdrc *ci = hwep->ci;
935 int retval = 0;
936
937 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
938 return -EINVAL;
939
940 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
941 if (req->length)
942 hwep = (ci->ep0_dir == RX) ?
943 ci->ep0out : ci->ep0in;
944 if (!list_empty(&hwep->qh.queue)) {
945 _ep_nuke(hwep);
946 dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n",
947 _usb_addr(hwep));
948 }
949 }
950
951 if (usb_endpoint_xfer_isoc(hwep->ep.desc) &&
952 hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) {
953 dev_err(hwep->ci->dev, "request length too big for isochronous\n");
954 return -EMSGSIZE;
955 }
956
957 /* first nuke then test link, e.g. previous status has not sent */
958 if (!list_empty(&hwreq->queue)) {
959 dev_err(hwep->ci->dev, "request already in queue\n");
960 return -EBUSY;
961 }
962
963 /* push request */
964 hwreq->req.status = -EINPROGRESS;
965 hwreq->req.actual = 0;
966
967 retval = _hardware_enqueue(hwep, hwreq);
968
969 if (retval == -EALREADY)
970 retval = 0;
971 if (!retval)
972 list_add_tail(&hwreq->queue, &hwep->qh.queue);
973
974 return retval;
975}
976
977/**
978 * isr_get_status_response: get_status request response
979 * @ci: ci struct
980 * @setup: setup request packet
981 *
982 * This function returns an error code
983 */
984static int isr_get_status_response(struct ci_hdrc *ci,
985 struct usb_ctrlrequest *setup)
986__releases(hwep->lock)
987__acquires(hwep->lock)
988{
989 struct ci_hw_ep *hwep = ci->ep0in;
990 struct usb_request *req = NULL;
991 gfp_t gfp_flags = GFP_ATOMIC;
992 int dir, num, retval;
993
994 if (hwep == NULL || setup == NULL)
995 return -EINVAL;
996
997 spin_unlock(hwep->lock);
998 req = usb_ep_alloc_request(&hwep->ep, gfp_flags);
999 spin_lock(hwep->lock);
1000 if (req == NULL)
1001 return -ENOMEM;
1002
1003 req->complete = isr_get_status_complete;
1004 req->length = 2;
1005 req->buf = kzalloc(req->length, gfp_flags);
1006 if (req->buf == NULL) {
1007 retval = -ENOMEM;
1008 goto err_free_req;
1009 }
1010
1011 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
1012 *(u16 *)req->buf = (ci->remote_wakeup << 1) |
1013 ci->gadget.is_selfpowered;
1014 } else if ((setup->bRequestType & USB_RECIP_MASK) \
1015 == USB_RECIP_ENDPOINT) {
1016 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
1017 TX : RX;
1018 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
1019 *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
1020 }
1021 /* else do nothing; reserved for future use */
1022
1023 retval = _ep_queue(&hwep->ep, req, gfp_flags);
1024 if (retval)
1025 goto err_free_buf;
1026
1027 return 0;
1028
1029 err_free_buf:
1030 kfree(req->buf);
1031 err_free_req:
1032 spin_unlock(hwep->lock);
1033 usb_ep_free_request(&hwep->ep, req);
1034 spin_lock(hwep->lock);
1035 return retval;
1036}
1037
1038/**
1039 * isr_setup_status_complete: setup_status request complete function
1040 * @ep: endpoint
1041 * @req: request handled
1042 *
1043 * Caller must release lock. Put the port in test mode if test mode
1044 * feature is selected.
1045 */
1046static void
1047isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
1048{
1049 struct ci_hdrc *ci = req->context;
1050 unsigned long flags;
1051
1052 if (req->status < 0)
1053 return;
1054
1055 if (ci->setaddr) {
1056 hw_usb_set_address(ci, ci->address);
1057 ci->setaddr = false;
1058 if (ci->address)
1059 usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS);
1060 }
1061
1062 spin_lock_irqsave(&ci->lock, flags);
1063 if (ci->test_mode)
1064 hw_port_test_set(ci, ci->test_mode);
1065 spin_unlock_irqrestore(&ci->lock, flags);
1066}
1067
1068/**
1069 * isr_setup_status_phase: queues the status phase of a setup transation
1070 * @ci: ci struct
1071 *
1072 * This function returns an error code
1073 */
1074static int isr_setup_status_phase(struct ci_hdrc *ci)
1075{
1076 struct ci_hw_ep *hwep;
1077
1078 /*
1079 * Unexpected USB controller behavior, caused by bad signal integrity
1080 * or ground reference problems, can lead to isr_setup_status_phase
1081 * being called with ci->status equal to NULL.
1082 * If this situation occurs, you should review your USB hardware design.
1083 */
1084 if (WARN_ON_ONCE(!ci->status))
1085 return -EPIPE;
1086
1087 hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
1088 ci->status->context = ci;
1089 ci->status->complete = isr_setup_status_complete;
1090
1091 return _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC);
1092}
1093
1094/**
1095 * isr_tr_complete_low: transaction complete low level handler
1096 * @hwep: endpoint
1097 *
1098 * This function returns an error code
1099 * Caller must hold lock
1100 */
1101static int isr_tr_complete_low(struct ci_hw_ep *hwep)
1102__releases(hwep->lock)
1103__acquires(hwep->lock)
1104{
1105 struct ci_hw_req *hwreq, *hwreqtemp;
1106 struct ci_hw_ep *hweptemp = hwep;
1107 int retval = 0;
1108
1109 list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue,
1110 queue) {
1111 retval = _hardware_dequeue(hwep, hwreq);
1112 if (retval < 0)
1113 break;
1114 list_del_init(&hwreq->queue);
1115 if (hwreq->req.complete != NULL) {
1116 spin_unlock(hwep->lock);
1117 if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) &&
1118 hwreq->req.length)
1119 hweptemp = hwep->ci->ep0in;
1120 usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req);
1121 spin_lock(hwep->lock);
1122 }
1123 }
1124
1125 if (retval == -EBUSY)
1126 retval = 0;
1127
1128 return retval;
1129}
1130
1131static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
1132{
1133 dev_warn(&ci->gadget.dev,
1134 "connect the device to an alternate port if you want HNP\n");
1135 return isr_setup_status_phase(ci);
1136}
1137
1138/**
1139 * isr_setup_packet_handler: setup packet handler
1140 * @ci: UDC descriptor
1141 *
1142 * This function handles setup packet
1143 */
1144static void isr_setup_packet_handler(struct ci_hdrc *ci)
1145__releases(ci->lock)
1146__acquires(ci->lock)
1147{
1148 struct ci_hw_ep *hwep = &ci->ci_hw_ep[0];
1149 struct usb_ctrlrequest req;
1150 int type, num, dir, err = -EINVAL;
1151 u8 tmode = 0;
1152
1153 /*
1154 * Flush data and handshake transactions of previous
1155 * setup packet.
1156 */
1157 _ep_nuke(ci->ep0out);
1158 _ep_nuke(ci->ep0in);
1159
1160 /* read_setup_packet */
1161 do {
1162 hw_test_and_set_setup_guard(ci);
1163 memcpy(&req, &hwep->qh.ptr->setup, sizeof(req));
1164 } while (!hw_test_and_clear_setup_guard(ci));
1165
1166 type = req.bRequestType;
1167
1168 ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
1169
1170 switch (req.bRequest) {
1171 case USB_REQ_CLEAR_FEATURE:
1172 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1173 le16_to_cpu(req.wValue) ==
1174 USB_ENDPOINT_HALT) {
1175 if (req.wLength != 0)
1176 break;
1177 num = le16_to_cpu(req.wIndex);
1178 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1179 num &= USB_ENDPOINT_NUMBER_MASK;
1180 if (dir == TX)
1181 num += ci->hw_ep_max / 2;
1182 if (!ci->ci_hw_ep[num].wedge) {
1183 spin_unlock(&ci->lock);
1184 err = usb_ep_clear_halt(
1185 &ci->ci_hw_ep[num].ep);
1186 spin_lock(&ci->lock);
1187 if (err)
1188 break;
1189 }
1190 err = isr_setup_status_phase(ci);
1191 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
1192 le16_to_cpu(req.wValue) ==
1193 USB_DEVICE_REMOTE_WAKEUP) {
1194 if (req.wLength != 0)
1195 break;
1196 ci->remote_wakeup = 0;
1197 err = isr_setup_status_phase(ci);
1198 } else {
1199 goto delegate;
1200 }
1201 break;
1202 case USB_REQ_GET_STATUS:
1203 if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) ||
1204 le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) &&
1205 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
1206 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
1207 goto delegate;
1208 if (le16_to_cpu(req.wLength) != 2 ||
1209 le16_to_cpu(req.wValue) != 0)
1210 break;
1211 err = isr_get_status_response(ci, &req);
1212 break;
1213 case USB_REQ_SET_ADDRESS:
1214 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
1215 goto delegate;
1216 if (le16_to_cpu(req.wLength) != 0 ||
1217 le16_to_cpu(req.wIndex) != 0)
1218 break;
1219 ci->address = (u8)le16_to_cpu(req.wValue);
1220 ci->setaddr = true;
1221 err = isr_setup_status_phase(ci);
1222 break;
1223 case USB_REQ_SET_FEATURE:
1224 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
1225 le16_to_cpu(req.wValue) ==
1226 USB_ENDPOINT_HALT) {
1227 if (req.wLength != 0)
1228 break;
1229 num = le16_to_cpu(req.wIndex);
1230 dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX;
1231 num &= USB_ENDPOINT_NUMBER_MASK;
1232 if (dir == TX)
1233 num += ci->hw_ep_max / 2;
1234
1235 spin_unlock(&ci->lock);
1236 err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false);
1237 spin_lock(&ci->lock);
1238 if (!err)
1239 isr_setup_status_phase(ci);
1240 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
1241 if (req.wLength != 0)
1242 break;
1243 switch (le16_to_cpu(req.wValue)) {
1244 case USB_DEVICE_REMOTE_WAKEUP:
1245 ci->remote_wakeup = 1;
1246 err = isr_setup_status_phase(ci);
1247 break;
1248 case USB_DEVICE_TEST_MODE:
1249 tmode = le16_to_cpu(req.wIndex) >> 8;
1250 switch (tmode) {
1251 case USB_TEST_J:
1252 case USB_TEST_K:
1253 case USB_TEST_SE0_NAK:
1254 case USB_TEST_PACKET:
1255 case USB_TEST_FORCE_ENABLE:
1256 ci->test_mode = tmode;
1257 err = isr_setup_status_phase(
1258 ci);
1259 break;
1260 default:
1261 break;
1262 }
1263 break;
1264 case USB_DEVICE_B_HNP_ENABLE:
1265 if (ci_otg_is_fsm_mode(ci)) {
1266 ci->gadget.b_hnp_enable = 1;
1267 err = isr_setup_status_phase(
1268 ci);
1269 }
1270 break;
1271 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1272 if (ci_otg_is_fsm_mode(ci))
1273 err = otg_a_alt_hnp_support(ci);
1274 break;
1275 case USB_DEVICE_A_HNP_SUPPORT:
1276 if (ci_otg_is_fsm_mode(ci)) {
1277 ci->gadget.a_hnp_support = 1;
1278 err = isr_setup_status_phase(
1279 ci);
1280 }
1281 break;
1282 default:
1283 goto delegate;
1284 }
1285 } else {
1286 goto delegate;
1287 }
1288 break;
1289 default:
1290delegate:
1291 if (req.wLength == 0) /* no data phase */
1292 ci->ep0_dir = TX;
1293
1294 spin_unlock(&ci->lock);
1295 err = ci->driver->setup(&ci->gadget, &req);
1296 spin_lock(&ci->lock);
1297 break;
1298 }
1299
1300 if (err < 0) {
1301 spin_unlock(&ci->lock);
1302 if (_ep_set_halt(&hwep->ep, 1, false))
1303 dev_err(ci->dev, "error: _ep_set_halt\n");
1304 spin_lock(&ci->lock);
1305 }
1306}
1307
1308/**
1309 * isr_tr_complete_handler: transaction complete interrupt handler
1310 * @ci: UDC descriptor
1311 *
1312 * This function handles traffic events
1313 */
1314static void isr_tr_complete_handler(struct ci_hdrc *ci)
1315__releases(ci->lock)
1316__acquires(ci->lock)
1317{
1318 unsigned i;
1319 int err;
1320
1321 for (i = 0; i < ci->hw_ep_max; i++) {
1322 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1323
1324 if (hwep->ep.desc == NULL)
1325 continue; /* not configured */
1326
1327 if (hw_test_and_clear_complete(ci, i)) {
1328 err = isr_tr_complete_low(hwep);
1329 if (hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1330 if (err > 0) /* needs status phase */
1331 err = isr_setup_status_phase(ci);
1332 if (err < 0) {
1333 spin_unlock(&ci->lock);
1334 if (_ep_set_halt(&hwep->ep, 1, false))
1335 dev_err(ci->dev,
1336 "error: _ep_set_halt\n");
1337 spin_lock(&ci->lock);
1338 }
1339 }
1340 }
1341
1342 /* Only handle setup packet below */
1343 if (i == 0 &&
1344 hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0)))
1345 isr_setup_packet_handler(ci);
1346 }
1347}
1348
1349/******************************************************************************
1350 * ENDPT block
1351 *****************************************************************************/
1352/*
1353 * ep_enable: configure endpoint, making it usable
1354 *
1355 * Check usb_ep_enable() at "usb_gadget.h" for details
1356 */
1357static int ep_enable(struct usb_ep *ep,
1358 const struct usb_endpoint_descriptor *desc)
1359{
1360 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1361 int retval = 0;
1362 unsigned long flags;
1363 u32 cap = 0;
1364
1365 if (ep == NULL || desc == NULL)
1366 return -EINVAL;
1367
1368 spin_lock_irqsave(hwep->lock, flags);
1369
1370 /* only internal SW should enable ctrl endpts */
1371
1372 if (!list_empty(&hwep->qh.queue)) {
1373 dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n");
1374 spin_unlock_irqrestore(hwep->lock, flags);
1375 return -EBUSY;
1376 }
1377
1378 hwep->ep.desc = desc;
1379
1380 hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1381 hwep->num = usb_endpoint_num(desc);
1382 hwep->type = usb_endpoint_type(desc);
1383
1384 hwep->ep.maxpacket = usb_endpoint_maxp(desc);
1385 hwep->ep.mult = usb_endpoint_maxp_mult(desc);
1386
1387 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1388 cap |= QH_IOS;
1389
1390 cap |= QH_ZLT;
1391 cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
1392 /*
1393 * For ISO-TX, we set mult at QH as the largest value, and use
1394 * MultO at TD as real mult value.
1395 */
1396 if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX)
1397 cap |= 3 << __ffs(QH_MULT);
1398
1399 hwep->qh.ptr->cap = cpu_to_le32(cap);
1400
1401 hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
1402
1403 if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) {
1404 dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n");
1405 retval = -EINVAL;
1406 }
1407
1408 /*
1409 * Enable endpoints in the HW other than ep0 as ep0
1410 * is always enabled
1411 */
1412 if (hwep->num)
1413 retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir,
1414 hwep->type);
1415
1416 spin_unlock_irqrestore(hwep->lock, flags);
1417 return retval;
1418}
1419
1420/*
1421 * ep_disable: endpoint is no longer usable
1422 *
1423 * Check usb_ep_disable() at "usb_gadget.h" for details
1424 */
1425static int ep_disable(struct usb_ep *ep)
1426{
1427 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1428 int direction, retval = 0;
1429 unsigned long flags;
1430
1431 if (ep == NULL)
1432 return -EINVAL;
1433 else if (hwep->ep.desc == NULL)
1434 return -EBUSY;
1435
1436 spin_lock_irqsave(hwep->lock, flags);
1437 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1438 spin_unlock_irqrestore(hwep->lock, flags);
1439 return 0;
1440 }
1441
1442 /* only internal SW should disable ctrl endpts */
1443
1444 direction = hwep->dir;
1445 do {
1446 retval |= _ep_nuke(hwep);
1447 retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir);
1448
1449 if (hwep->type == USB_ENDPOINT_XFER_CONTROL)
1450 hwep->dir = (hwep->dir == TX) ? RX : TX;
1451
1452 } while (hwep->dir != direction);
1453
1454 hwep->ep.desc = NULL;
1455
1456 spin_unlock_irqrestore(hwep->lock, flags);
1457 return retval;
1458}
1459
1460/*
1461 * ep_alloc_request: allocate a request object to use with this endpoint
1462 *
1463 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1464 */
1465static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1466{
1467 struct ci_hw_req *hwreq;
1468
1469 if (ep == NULL)
1470 return NULL;
1471
1472 hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags);
1473 if (hwreq != NULL) {
1474 INIT_LIST_HEAD(&hwreq->queue);
1475 INIT_LIST_HEAD(&hwreq->tds);
1476 }
1477
1478 return (hwreq == NULL) ? NULL : &hwreq->req;
1479}
1480
1481/*
1482 * ep_free_request: frees a request object
1483 *
1484 * Check usb_ep_free_request() at "usb_gadget.h" for details
1485 */
1486static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1487{
1488 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1489 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1490 struct td_node *node, *tmpnode;
1491 unsigned long flags;
1492
1493 if (ep == NULL || req == NULL) {
1494 return;
1495 } else if (!list_empty(&hwreq->queue)) {
1496 dev_err(hwep->ci->dev, "freeing queued request\n");
1497 return;
1498 }
1499
1500 spin_lock_irqsave(hwep->lock, flags);
1501
1502 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1503 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1504 list_del_init(&node->td);
1505 node->ptr = NULL;
1506 kfree(node);
1507 }
1508
1509 kfree(hwreq);
1510
1511 spin_unlock_irqrestore(hwep->lock, flags);
1512}
1513
1514/*
1515 * ep_queue: queues (submits) an I/O request to an endpoint
1516 *
1517 * Check usb_ep_queue()* at usb_gadget.h" for details
1518 */
1519static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1520 gfp_t __maybe_unused gfp_flags)
1521{
1522 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1523 int retval = 0;
1524 unsigned long flags;
1525
1526 if (ep == NULL || req == NULL || hwep->ep.desc == NULL)
1527 return -EINVAL;
1528
1529 spin_lock_irqsave(hwep->lock, flags);
1530 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1531 spin_unlock_irqrestore(hwep->lock, flags);
1532 return 0;
1533 }
1534 retval = _ep_queue(ep, req, gfp_flags);
1535 spin_unlock_irqrestore(hwep->lock, flags);
1536 return retval;
1537}
1538
1539/*
1540 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1541 *
1542 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1543 */
1544static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1545{
1546 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1547 struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req);
1548 unsigned long flags;
1549 struct td_node *node, *tmpnode;
1550
1551 if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY ||
1552 hwep->ep.desc == NULL || list_empty(&hwreq->queue) ||
1553 list_empty(&hwep->qh.queue))
1554 return -EINVAL;
1555
1556 spin_lock_irqsave(hwep->lock, flags);
1557 if (hwep->ci->gadget.speed != USB_SPEED_UNKNOWN)
1558 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1559
1560 list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) {
1561 dma_pool_free(hwep->td_pool, node->ptr, node->dma);
1562 list_del(&node->td);
1563 kfree(node);
1564 }
1565
1566 /* pop request */
1567 list_del_init(&hwreq->queue);
1568
1569 usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir);
1570
1571 req->status = -ECONNRESET;
1572
1573 if (hwreq->req.complete != NULL) {
1574 spin_unlock(hwep->lock);
1575 usb_gadget_giveback_request(&hwep->ep, &hwreq->req);
1576 spin_lock(hwep->lock);
1577 }
1578
1579 spin_unlock_irqrestore(hwep->lock, flags);
1580 return 0;
1581}
1582
1583/*
1584 * ep_set_halt: sets the endpoint halt feature
1585 *
1586 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1587 */
1588static int ep_set_halt(struct usb_ep *ep, int value)
1589{
1590 return _ep_set_halt(ep, value, true);
1591}
1592
1593/*
1594 * ep_set_wedge: sets the halt feature and ignores clear requests
1595 *
1596 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1597 */
1598static int ep_set_wedge(struct usb_ep *ep)
1599{
1600 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1601 unsigned long flags;
1602
1603 if (ep == NULL || hwep->ep.desc == NULL)
1604 return -EINVAL;
1605
1606 spin_lock_irqsave(hwep->lock, flags);
1607 hwep->wedge = 1;
1608 spin_unlock_irqrestore(hwep->lock, flags);
1609
1610 return usb_ep_set_halt(ep);
1611}
1612
1613/*
1614 * ep_fifo_flush: flushes contents of a fifo
1615 *
1616 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1617 */
1618static void ep_fifo_flush(struct usb_ep *ep)
1619{
1620 struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep);
1621 unsigned long flags;
1622
1623 if (ep == NULL) {
1624 dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep));
1625 return;
1626 }
1627
1628 spin_lock_irqsave(hwep->lock, flags);
1629 if (hwep->ci->gadget.speed == USB_SPEED_UNKNOWN) {
1630 spin_unlock_irqrestore(hwep->lock, flags);
1631 return;
1632 }
1633
1634 hw_ep_flush(hwep->ci, hwep->num, hwep->dir);
1635
1636 spin_unlock_irqrestore(hwep->lock, flags);
1637}
1638
1639/*
1640 * Endpoint-specific part of the API to the USB controller hardware
1641 * Check "usb_gadget.h" for details
1642 */
1643static const struct usb_ep_ops usb_ep_ops = {
1644 .enable = ep_enable,
1645 .disable = ep_disable,
1646 .alloc_request = ep_alloc_request,
1647 .free_request = ep_free_request,
1648 .queue = ep_queue,
1649 .dequeue = ep_dequeue,
1650 .set_halt = ep_set_halt,
1651 .set_wedge = ep_set_wedge,
1652 .fifo_flush = ep_fifo_flush,
1653};
1654
1655/******************************************************************************
1656 * GADGET block
1657 *****************************************************************************/
1658
1659static int ci_udc_get_frame(struct usb_gadget *_gadget)
1660{
1661 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1662 unsigned long flags;
1663 int ret;
1664
1665 spin_lock_irqsave(&ci->lock, flags);
1666 ret = hw_read(ci, OP_FRINDEX, 0x3fff);
1667 spin_unlock_irqrestore(&ci->lock, flags);
1668 return ret >> 3;
1669}
1670
1671/*
1672 * ci_hdrc_gadget_connect: caller makes sure gadget driver is binded
1673 */
1674static void ci_hdrc_gadget_connect(struct usb_gadget *_gadget, int is_active)
1675{
1676 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1677
1678 if (is_active) {
1679 pm_runtime_get_sync(ci->dev);
1680 hw_device_reset(ci);
1681 spin_lock_irq(&ci->lock);
1682 if (ci->driver) {
1683 hw_device_state(ci, ci->ep0out->qh.dma);
1684 usb_gadget_set_state(_gadget, USB_STATE_POWERED);
1685 spin_unlock_irq(&ci->lock);
1686 usb_udc_vbus_handler(_gadget, true);
1687 } else {
1688 spin_unlock_irq(&ci->lock);
1689 }
1690 } else {
1691 usb_udc_vbus_handler(_gadget, false);
1692 if (ci->driver)
1693 ci->driver->disconnect(&ci->gadget);
1694 hw_device_state(ci, 0);
1695 if (ci->platdata->notify_event)
1696 ci->platdata->notify_event(ci,
1697 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1698 _gadget_stop_activity(&ci->gadget);
1699 pm_runtime_put_sync(ci->dev);
1700 usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED);
1701 }
1702}
1703
1704static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active)
1705{
1706 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1707 unsigned long flags;
1708 int ret = 0;
1709
1710 spin_lock_irqsave(&ci->lock, flags);
1711 ci->vbus_active = is_active;
1712 spin_unlock_irqrestore(&ci->lock, flags);
1713
1714 if (ci->usb_phy)
1715 usb_phy_set_charger_state(ci->usb_phy, is_active ?
1716 USB_CHARGER_PRESENT : USB_CHARGER_ABSENT);
1717
1718 if (ci->platdata->notify_event)
1719 ret = ci->platdata->notify_event(ci,
1720 CI_HDRC_CONTROLLER_VBUS_EVENT);
1721
1722 if (ci->usb_phy) {
1723 if (is_active)
1724 usb_phy_set_event(ci->usb_phy, USB_EVENT_VBUS);
1725 else
1726 usb_phy_set_event(ci->usb_phy, USB_EVENT_NONE);
1727 }
1728
1729 if (ci->driver)
1730 ci_hdrc_gadget_connect(_gadget, is_active);
1731
1732 return ret;
1733}
1734
1735static int ci_udc_wakeup(struct usb_gadget *_gadget)
1736{
1737 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1738 unsigned long flags;
1739 int ret = 0;
1740
1741 spin_lock_irqsave(&ci->lock, flags);
1742 if (ci->gadget.speed == USB_SPEED_UNKNOWN) {
1743 spin_unlock_irqrestore(&ci->lock, flags);
1744 return 0;
1745 }
1746 if (!ci->remote_wakeup) {
1747 ret = -EOPNOTSUPP;
1748 goto out;
1749 }
1750 if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
1751 ret = -EINVAL;
1752 goto out;
1753 }
1754 hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1755out:
1756 spin_unlock_irqrestore(&ci->lock, flags);
1757 return ret;
1758}
1759
1760static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma)
1761{
1762 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1763
1764 if (ci->usb_phy)
1765 return usb_phy_set_power(ci->usb_phy, ma);
1766 return -ENOTSUPP;
1767}
1768
1769static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on)
1770{
1771 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1772 struct ci_hw_ep *hwep = ci->ep0in;
1773 unsigned long flags;
1774
1775 spin_lock_irqsave(hwep->lock, flags);
1776 _gadget->is_selfpowered = (is_on != 0);
1777 spin_unlock_irqrestore(hwep->lock, flags);
1778
1779 return 0;
1780}
1781
1782/* Change Data+ pullup status
1783 * this func is used by usb_gadget_connect/disconnect
1784 */
1785static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on)
1786{
1787 struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget);
1788
1789 /*
1790 * Data+ pullup controlled by OTG state machine in OTG fsm mode;
1791 * and don't touch Data+ in host mode for dual role config.
1792 */
1793 if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST)
1794 return 0;
1795
1796 pm_runtime_get_sync(ci->dev);
1797 if (is_on)
1798 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1799 else
1800 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1801 pm_runtime_put_sync(ci->dev);
1802
1803 return 0;
1804}
1805
1806static int ci_udc_start(struct usb_gadget *gadget,
1807 struct usb_gadget_driver *driver);
1808static int ci_udc_stop(struct usb_gadget *gadget);
1809
1810/* Match ISOC IN from the highest endpoint */
1811static struct usb_ep *ci_udc_match_ep(struct usb_gadget *gadget,
1812 struct usb_endpoint_descriptor *desc,
1813 struct usb_ss_ep_comp_descriptor *comp_desc)
1814{
1815 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1816 struct usb_ep *ep;
1817
1818 if (usb_endpoint_xfer_isoc(desc) && usb_endpoint_dir_in(desc)) {
1819 list_for_each_entry_reverse(ep, &ci->gadget.ep_list, ep_list) {
1820 if (ep->caps.dir_in && !ep->claimed)
1821 return ep;
1822 }
1823 }
1824
1825 return NULL;
1826}
1827
1828/*
1829 * Device operations part of the API to the USB controller hardware,
1830 * which don't involve endpoints (or i/o)
1831 * Check "usb_gadget.h" for details
1832 */
1833static const struct usb_gadget_ops usb_gadget_ops = {
1834 .get_frame = ci_udc_get_frame,
1835 .vbus_session = ci_udc_vbus_session,
1836 .wakeup = ci_udc_wakeup,
1837 .set_selfpowered = ci_udc_selfpowered,
1838 .pullup = ci_udc_pullup,
1839 .vbus_draw = ci_udc_vbus_draw,
1840 .udc_start = ci_udc_start,
1841 .udc_stop = ci_udc_stop,
1842 .match_ep = ci_udc_match_ep,
1843};
1844
1845static int init_eps(struct ci_hdrc *ci)
1846{
1847 int retval = 0, i, j;
1848
1849 for (i = 0; i < ci->hw_ep_max/2; i++)
1850 for (j = RX; j <= TX; j++) {
1851 int k = i + j * ci->hw_ep_max/2;
1852 struct ci_hw_ep *hwep = &ci->ci_hw_ep[k];
1853
1854 scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i,
1855 (j == TX) ? "in" : "out");
1856
1857 hwep->ci = ci;
1858 hwep->lock = &ci->lock;
1859 hwep->td_pool = ci->td_pool;
1860
1861 hwep->ep.name = hwep->name;
1862 hwep->ep.ops = &usb_ep_ops;
1863
1864 if (i == 0) {
1865 hwep->ep.caps.type_control = true;
1866 } else {
1867 hwep->ep.caps.type_iso = true;
1868 hwep->ep.caps.type_bulk = true;
1869 hwep->ep.caps.type_int = true;
1870 }
1871
1872 if (j == TX)
1873 hwep->ep.caps.dir_in = true;
1874 else
1875 hwep->ep.caps.dir_out = true;
1876
1877 /*
1878 * for ep0: maxP defined in desc, for other
1879 * eps, maxP is set by epautoconfig() called
1880 * by gadget layer
1881 */
1882 usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0);
1883
1884 INIT_LIST_HEAD(&hwep->qh.queue);
1885 hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL,
1886 &hwep->qh.dma);
1887 if (hwep->qh.ptr == NULL)
1888 retval = -ENOMEM;
1889
1890 /*
1891 * set up shorthands for ep0 out and in endpoints,
1892 * don't add to gadget's ep_list
1893 */
1894 if (i == 0) {
1895 if (j == RX)
1896 ci->ep0out = hwep;
1897 else
1898 ci->ep0in = hwep;
1899
1900 usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX);
1901 continue;
1902 }
1903
1904 list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list);
1905 }
1906
1907 return retval;
1908}
1909
1910static void destroy_eps(struct ci_hdrc *ci)
1911{
1912 int i;
1913
1914 for (i = 0; i < ci->hw_ep_max; i++) {
1915 struct ci_hw_ep *hwep = &ci->ci_hw_ep[i];
1916
1917 if (hwep->pending_td)
1918 free_pending_td(hwep);
1919 dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma);
1920 }
1921}
1922
1923/**
1924 * ci_udc_start: register a gadget driver
1925 * @gadget: our gadget
1926 * @driver: the driver being registered
1927 *
1928 * Interrupts are enabled here.
1929 */
1930static int ci_udc_start(struct usb_gadget *gadget,
1931 struct usb_gadget_driver *driver)
1932{
1933 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1934 int retval;
1935
1936 if (driver->disconnect == NULL)
1937 return -EINVAL;
1938
1939 ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
1940 retval = usb_ep_enable(&ci->ep0out->ep);
1941 if (retval)
1942 return retval;
1943
1944 ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
1945 retval = usb_ep_enable(&ci->ep0in->ep);
1946 if (retval)
1947 return retval;
1948
1949 ci->driver = driver;
1950
1951 /* Start otg fsm for B-device */
1952 if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) {
1953 ci_hdrc_otg_fsm_start(ci);
1954 return retval;
1955 }
1956
1957 if (ci->vbus_active)
1958 ci_hdrc_gadget_connect(gadget, 1);
1959 else
1960 usb_udc_vbus_handler(&ci->gadget, false);
1961
1962 return retval;
1963}
1964
1965static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci)
1966{
1967 if (!ci_otg_is_fsm_mode(ci))
1968 return;
1969
1970 mutex_lock(&ci->fsm.lock);
1971 if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) {
1972 ci->fsm.a_bidl_adis_tmout = 1;
1973 ci_hdrc_otg_fsm_start(ci);
1974 } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) {
1975 ci->fsm.protocol = PROTO_UNDEF;
1976 ci->fsm.otg->state = OTG_STATE_UNDEFINED;
1977 }
1978 mutex_unlock(&ci->fsm.lock);
1979}
1980
1981/*
1982 * ci_udc_stop: unregister a gadget driver
1983 */
1984static int ci_udc_stop(struct usb_gadget *gadget)
1985{
1986 struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget);
1987 unsigned long flags;
1988
1989 spin_lock_irqsave(&ci->lock, flags);
1990 ci->driver = NULL;
1991
1992 if (ci->vbus_active) {
1993 hw_device_state(ci, 0);
1994 spin_unlock_irqrestore(&ci->lock, flags);
1995 if (ci->platdata->notify_event)
1996 ci->platdata->notify_event(ci,
1997 CI_HDRC_CONTROLLER_STOPPED_EVENT);
1998 _gadget_stop_activity(&ci->gadget);
1999 spin_lock_irqsave(&ci->lock, flags);
2000 pm_runtime_put(ci->dev);
2001 }
2002
2003 spin_unlock_irqrestore(&ci->lock, flags);
2004
2005 ci_udc_stop_for_otg_fsm(ci);
2006 return 0;
2007}
2008
2009/******************************************************************************
2010 * BUS block
2011 *****************************************************************************/
2012/*
2013 * udc_irq: ci interrupt handler
2014 *
2015 * This function returns IRQ_HANDLED if the IRQ has been handled
2016 * It locks access to registers
2017 */
2018static irqreturn_t udc_irq(struct ci_hdrc *ci)
2019{
2020 irqreturn_t retval;
2021 u32 intr;
2022
2023 if (ci == NULL)
2024 return IRQ_HANDLED;
2025
2026 spin_lock(&ci->lock);
2027
2028 if (ci->platdata->flags & CI_HDRC_REGS_SHARED) {
2029 if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
2030 USBMODE_CM_DC) {
2031 spin_unlock(&ci->lock);
2032 return IRQ_NONE;
2033 }
2034 }
2035 intr = hw_test_and_clear_intr_active(ci);
2036
2037 if (intr) {
2038 /* order defines priority - do NOT change it */
2039 if (USBi_URI & intr)
2040 isr_reset_handler(ci);
2041
2042 if (USBi_PCI & intr) {
2043 ci->gadget.speed = hw_port_is_high_speed(ci) ?
2044 USB_SPEED_HIGH : USB_SPEED_FULL;
2045 if (ci->usb_phy)
2046 usb_phy_set_event(ci->usb_phy,
2047 USB_EVENT_ENUMERATED);
2048 if (ci->suspended) {
2049 if (ci->driver->resume) {
2050 spin_unlock(&ci->lock);
2051 ci->driver->resume(&ci->gadget);
2052 spin_lock(&ci->lock);
2053 }
2054 ci->suspended = 0;
2055 usb_gadget_set_state(&ci->gadget,
2056 ci->resume_state);
2057 }
2058 }
2059
2060 if (USBi_UI & intr)
2061 isr_tr_complete_handler(ci);
2062
2063 if ((USBi_SLI & intr) && !(ci->suspended)) {
2064 ci->suspended = 1;
2065 ci->resume_state = ci->gadget.state;
2066 if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
2067 ci->driver->suspend) {
2068 spin_unlock(&ci->lock);
2069 ci->driver->suspend(&ci->gadget);
2070 spin_lock(&ci->lock);
2071 }
2072 usb_gadget_set_state(&ci->gadget,
2073 USB_STATE_SUSPENDED);
2074 }
2075 retval = IRQ_HANDLED;
2076 } else {
2077 retval = IRQ_NONE;
2078 }
2079 spin_unlock(&ci->lock);
2080
2081 return retval;
2082}
2083
2084/**
2085 * udc_start: initialize gadget role
2086 * @ci: chipidea controller
2087 */
2088static int udc_start(struct ci_hdrc *ci)
2089{
2090 struct device *dev = ci->dev;
2091 struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps;
2092 int retval = 0;
2093
2094 ci->gadget.ops = &usb_gadget_ops;
2095 ci->gadget.speed = USB_SPEED_UNKNOWN;
2096 ci->gadget.max_speed = USB_SPEED_HIGH;
2097 ci->gadget.name = ci->platdata->name;
2098 ci->gadget.otg_caps = otg_caps;
2099 ci->gadget.sg_supported = 1;
2100 ci->gadget.irq = ci->irq;
2101
2102 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA)
2103 ci->gadget.quirk_avoids_skb_reserve = 1;
2104
2105 if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support ||
2106 otg_caps->adp_support))
2107 ci->gadget.is_otg = 1;
2108
2109 INIT_LIST_HEAD(&ci->gadget.ep_list);
2110
2111 /* alloc resources */
2112 ci->qh_pool = dma_pool_create("ci_hw_qh", dev->parent,
2113 sizeof(struct ci_hw_qh),
2114 64, CI_HDRC_PAGE_SIZE);
2115 if (ci->qh_pool == NULL)
2116 return -ENOMEM;
2117
2118 ci->td_pool = dma_pool_create("ci_hw_td", dev->parent,
2119 sizeof(struct ci_hw_td),
2120 64, CI_HDRC_PAGE_SIZE);
2121 if (ci->td_pool == NULL) {
2122 retval = -ENOMEM;
2123 goto free_qh_pool;
2124 }
2125
2126 retval = init_eps(ci);
2127 if (retval)
2128 goto free_pools;
2129
2130 ci->gadget.ep0 = &ci->ep0in->ep;
2131
2132 retval = usb_add_gadget_udc(dev, &ci->gadget);
2133 if (retval)
2134 goto destroy_eps;
2135
2136 return retval;
2137
2138destroy_eps:
2139 destroy_eps(ci);
2140free_pools:
2141 dma_pool_destroy(ci->td_pool);
2142free_qh_pool:
2143 dma_pool_destroy(ci->qh_pool);
2144 return retval;
2145}
2146
2147/*
2148 * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC
2149 *
2150 * No interrupts active, the IRQ has been released
2151 */
2152void ci_hdrc_gadget_destroy(struct ci_hdrc *ci)
2153{
2154 if (!ci->roles[CI_ROLE_GADGET])
2155 return;
2156
2157 usb_del_gadget_udc(&ci->gadget);
2158
2159 destroy_eps(ci);
2160
2161 dma_pool_destroy(ci->td_pool);
2162 dma_pool_destroy(ci->qh_pool);
2163}
2164
2165static int udc_id_switch_for_device(struct ci_hdrc *ci)
2166{
2167 if (ci->platdata->pins_device)
2168 pinctrl_select_state(ci->platdata->pctl,
2169 ci->platdata->pins_device);
2170
2171 if (ci->is_otg)
2172 /* Clear and enable BSV irq */
2173 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2174 OTGSC_BSVIS | OTGSC_BSVIE);
2175
2176 return 0;
2177}
2178
2179static void udc_id_switch_for_host(struct ci_hdrc *ci)
2180{
2181 /*
2182 * host doesn't care B_SESSION_VALID event
2183 * so clear and disable BSV irq
2184 */
2185 if (ci->is_otg)
2186 hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS);
2187
2188 ci->vbus_active = 0;
2189
2190 if (ci->platdata->pins_device && ci->platdata->pins_default)
2191 pinctrl_select_state(ci->platdata->pctl,
2192 ci->platdata->pins_default);
2193}
2194
2195#ifdef CONFIG_PM_SLEEP
2196static void udc_suspend(struct ci_hdrc *ci)
2197{
2198 /*
2199 * Set OP_ENDPTLISTADDR to be non-zero for
2200 * checking if controller resume from power lost
2201 * in non-host mode.
2202 */
2203 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0)
2204 hw_write(ci, OP_ENDPTLISTADDR, ~0, ~0);
2205}
2206
2207static void udc_resume(struct ci_hdrc *ci, bool power_lost)
2208{
2209 if (power_lost) {
2210 if (ci->is_otg)
2211 hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE,
2212 OTGSC_BSVIS | OTGSC_BSVIE);
2213 if (ci->vbus_active)
2214 usb_gadget_vbus_disconnect(&ci->gadget);
2215 }
2216
2217 /* Restore value 0 if it was set for power lost check */
2218 if (hw_read(ci, OP_ENDPTLISTADDR, ~0) == 0xFFFFFFFF)
2219 hw_write(ci, OP_ENDPTLISTADDR, ~0, 0);
2220}
2221#endif
2222
2223/**
2224 * ci_hdrc_gadget_init - initialize device related bits
2225 * @ci: the controller
2226 *
2227 * This function initializes the gadget, if the device is "device capable".
2228 */
2229int ci_hdrc_gadget_init(struct ci_hdrc *ci)
2230{
2231 struct ci_role_driver *rdrv;
2232 int ret;
2233
2234 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
2235 return -ENXIO;
2236
2237 rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL);
2238 if (!rdrv)
2239 return -ENOMEM;
2240
2241 rdrv->start = udc_id_switch_for_device;
2242 rdrv->stop = udc_id_switch_for_host;
2243#ifdef CONFIG_PM_SLEEP
2244 rdrv->suspend = udc_suspend;
2245 rdrv->resume = udc_resume;
2246#endif
2247 rdrv->irq = udc_irq;
2248 rdrv->name = "gadget";
2249
2250 ret = udc_start(ci);
2251 if (!ret)
2252 ci->roles[CI_ROLE_GADGET] = rdrv;
2253
2254 return ret;
2255}
1/*
2 * udc.c - ChipIdea UDC driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/delay.h>
14#include <linux/device.h>
15#include <linux/dmapool.h>
16#include <linux/dma-mapping.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/module.h>
20#include <linux/interrupt.h>
21#include <linux/io.h>
22#include <linux/irq.h>
23#include <linux/kernel.h>
24#include <linux/slab.h>
25#include <linux/pm_runtime.h>
26#include <linux/usb/ch9.h>
27#include <linux/usb/gadget.h>
28#include <linux/usb/otg.h>
29#include <linux/usb/chipidea.h>
30
31#include "ci.h"
32#include "udc.h"
33#include "bits.h"
34#include "debug.h"
35
36/* control endpoint description */
37static const struct usb_endpoint_descriptor
38ctrl_endpt_out_desc = {
39 .bLength = USB_DT_ENDPOINT_SIZE,
40 .bDescriptorType = USB_DT_ENDPOINT,
41
42 .bEndpointAddress = USB_DIR_OUT,
43 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
44 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
45};
46
47static const struct usb_endpoint_descriptor
48ctrl_endpt_in_desc = {
49 .bLength = USB_DT_ENDPOINT_SIZE,
50 .bDescriptorType = USB_DT_ENDPOINT,
51
52 .bEndpointAddress = USB_DIR_IN,
53 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
54 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
55};
56
57/**
58 * hw_ep_bit: calculates the bit number
59 * @num: endpoint number
60 * @dir: endpoint direction
61 *
62 * This function returns bit number
63 */
64static inline int hw_ep_bit(int num, int dir)
65{
66 return num + (dir ? 16 : 0);
67}
68
69static inline int ep_to_bit(struct ci13xxx *udc, int n)
70{
71 int fill = 16 - udc->hw_ep_max / 2;
72
73 if (n >= udc->hw_ep_max / 2)
74 n += fill;
75
76 return n;
77}
78
79/**
80 * hw_device_state: enables/disables interrupts (execute without interruption)
81 * @dma: 0 => disable, !0 => enable and set dma engine
82 *
83 * This function returns an error code
84 */
85static int hw_device_state(struct ci13xxx *udc, u32 dma)
86{
87 if (dma) {
88 hw_write(udc, OP_ENDPTLISTADDR, ~0, dma);
89 /* interrupt, error, port change, reset, sleep/suspend */
90 hw_write(udc, OP_USBINTR, ~0,
91 USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
92 hw_write(udc, OP_USBCMD, USBCMD_RS, USBCMD_RS);
93 } else {
94 hw_write(udc, OP_USBINTR, ~0, 0);
95 }
96 return 0;
97}
98
99/**
100 * hw_ep_flush: flush endpoint fifo (execute without interruption)
101 * @num: endpoint number
102 * @dir: endpoint direction
103 *
104 * This function returns an error code
105 */
106static int hw_ep_flush(struct ci13xxx *udc, int num, int dir)
107{
108 int n = hw_ep_bit(num, dir);
109
110 do {
111 /* flush any pending transfer */
112 hw_write(udc, OP_ENDPTFLUSH, BIT(n), BIT(n));
113 while (hw_read(udc, OP_ENDPTFLUSH, BIT(n)))
114 cpu_relax();
115 } while (hw_read(udc, OP_ENDPTSTAT, BIT(n)));
116
117 return 0;
118}
119
120/**
121 * hw_ep_disable: disables endpoint (execute without interruption)
122 * @num: endpoint number
123 * @dir: endpoint direction
124 *
125 * This function returns an error code
126 */
127static int hw_ep_disable(struct ci13xxx *udc, int num, int dir)
128{
129 hw_ep_flush(udc, num, dir);
130 hw_write(udc, OP_ENDPTCTRL + num,
131 dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
132 return 0;
133}
134
135/**
136 * hw_ep_enable: enables endpoint (execute without interruption)
137 * @num: endpoint number
138 * @dir: endpoint direction
139 * @type: endpoint type
140 *
141 * This function returns an error code
142 */
143static int hw_ep_enable(struct ci13xxx *udc, int num, int dir, int type)
144{
145 u32 mask, data;
146
147 if (dir) {
148 mask = ENDPTCTRL_TXT; /* type */
149 data = type << ffs_nr(mask);
150
151 mask |= ENDPTCTRL_TXS; /* unstall */
152 mask |= ENDPTCTRL_TXR; /* reset data toggle */
153 data |= ENDPTCTRL_TXR;
154 mask |= ENDPTCTRL_TXE; /* enable */
155 data |= ENDPTCTRL_TXE;
156 } else {
157 mask = ENDPTCTRL_RXT; /* type */
158 data = type << ffs_nr(mask);
159
160 mask |= ENDPTCTRL_RXS; /* unstall */
161 mask |= ENDPTCTRL_RXR; /* reset data toggle */
162 data |= ENDPTCTRL_RXR;
163 mask |= ENDPTCTRL_RXE; /* enable */
164 data |= ENDPTCTRL_RXE;
165 }
166 hw_write(udc, OP_ENDPTCTRL + num, mask, data);
167 return 0;
168}
169
170/**
171 * hw_ep_get_halt: return endpoint halt status
172 * @num: endpoint number
173 * @dir: endpoint direction
174 *
175 * This function returns 1 if endpoint halted
176 */
177static int hw_ep_get_halt(struct ci13xxx *udc, int num, int dir)
178{
179 u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
180
181 return hw_read(udc, OP_ENDPTCTRL + num, mask) ? 1 : 0;
182}
183
184/**
185 * hw_test_and_clear_setup_status: test & clear setup status (execute without
186 * interruption)
187 * @n: endpoint number
188 *
189 * This function returns setup status
190 */
191static int hw_test_and_clear_setup_status(struct ci13xxx *udc, int n)
192{
193 n = ep_to_bit(udc, n);
194 return hw_test_and_clear(udc, OP_ENDPTSETUPSTAT, BIT(n));
195}
196
197/**
198 * hw_ep_prime: primes endpoint (execute without interruption)
199 * @num: endpoint number
200 * @dir: endpoint direction
201 * @is_ctrl: true if control endpoint
202 *
203 * This function returns an error code
204 */
205static int hw_ep_prime(struct ci13xxx *udc, int num, int dir, int is_ctrl)
206{
207 int n = hw_ep_bit(num, dir);
208
209 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
210 return -EAGAIN;
211
212 hw_write(udc, OP_ENDPTPRIME, BIT(n), BIT(n));
213
214 while (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
215 cpu_relax();
216 if (is_ctrl && dir == RX && hw_read(udc, OP_ENDPTSETUPSTAT, BIT(num)))
217 return -EAGAIN;
218
219 /* status shoult be tested according with manual but it doesn't work */
220 return 0;
221}
222
223/**
224 * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
225 * without interruption)
226 * @num: endpoint number
227 * @dir: endpoint direction
228 * @value: true => stall, false => unstall
229 *
230 * This function returns an error code
231 */
232static int hw_ep_set_halt(struct ci13xxx *udc, int num, int dir, int value)
233{
234 if (value != 0 && value != 1)
235 return -EINVAL;
236
237 do {
238 enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
239 u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
240 u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
241
242 /* data toggle - reserved for EP0 but it's in ESS */
243 hw_write(udc, reg, mask_xs|mask_xr,
244 value ? mask_xs : mask_xr);
245 } while (value != hw_ep_get_halt(udc, num, dir));
246
247 return 0;
248}
249
250/**
251 * hw_is_port_high_speed: test if port is high speed
252 *
253 * This function returns true if high speed port
254 */
255static int hw_port_is_high_speed(struct ci13xxx *udc)
256{
257 return udc->hw_bank.lpm ? hw_read(udc, OP_DEVLC, DEVLC_PSPD) :
258 hw_read(udc, OP_PORTSC, PORTSC_HSP);
259}
260
261/**
262 * hw_read_intr_enable: returns interrupt enable register
263 *
264 * This function returns register data
265 */
266static u32 hw_read_intr_enable(struct ci13xxx *udc)
267{
268 return hw_read(udc, OP_USBINTR, ~0);
269}
270
271/**
272 * hw_read_intr_status: returns interrupt status register
273 *
274 * This function returns register data
275 */
276static u32 hw_read_intr_status(struct ci13xxx *udc)
277{
278 return hw_read(udc, OP_USBSTS, ~0);
279}
280
281/**
282 * hw_test_and_clear_complete: test & clear complete status (execute without
283 * interruption)
284 * @n: endpoint number
285 *
286 * This function returns complete status
287 */
288static int hw_test_and_clear_complete(struct ci13xxx *udc, int n)
289{
290 n = ep_to_bit(udc, n);
291 return hw_test_and_clear(udc, OP_ENDPTCOMPLETE, BIT(n));
292}
293
294/**
295 * hw_test_and_clear_intr_active: test & clear active interrupts (execute
296 * without interruption)
297 *
298 * This function returns active interrutps
299 */
300static u32 hw_test_and_clear_intr_active(struct ci13xxx *udc)
301{
302 u32 reg = hw_read_intr_status(udc) & hw_read_intr_enable(udc);
303
304 hw_write(udc, OP_USBSTS, ~0, reg);
305 return reg;
306}
307
308/**
309 * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
310 * interruption)
311 *
312 * This function returns guard value
313 */
314static int hw_test_and_clear_setup_guard(struct ci13xxx *udc)
315{
316 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, 0);
317}
318
319/**
320 * hw_test_and_set_setup_guard: test & set setup guard (execute without
321 * interruption)
322 *
323 * This function returns guard value
324 */
325static int hw_test_and_set_setup_guard(struct ci13xxx *udc)
326{
327 return hw_test_and_write(udc, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
328}
329
330/**
331 * hw_usb_set_address: configures USB address (execute without interruption)
332 * @value: new USB address
333 *
334 * This function explicitly sets the address, without the "USBADRA" (advance)
335 * feature, which is not supported by older versions of the controller.
336 */
337static void hw_usb_set_address(struct ci13xxx *udc, u8 value)
338{
339 hw_write(udc, OP_DEVICEADDR, DEVICEADDR_USBADR,
340 value << ffs_nr(DEVICEADDR_USBADR));
341}
342
343/**
344 * hw_usb_reset: restart device after a bus reset (execute without
345 * interruption)
346 *
347 * This function returns an error code
348 */
349static int hw_usb_reset(struct ci13xxx *udc)
350{
351 hw_usb_set_address(udc, 0);
352
353 /* ESS flushes only at end?!? */
354 hw_write(udc, OP_ENDPTFLUSH, ~0, ~0);
355
356 /* clear setup token semaphores */
357 hw_write(udc, OP_ENDPTSETUPSTAT, 0, 0);
358
359 /* clear complete status */
360 hw_write(udc, OP_ENDPTCOMPLETE, 0, 0);
361
362 /* wait until all bits cleared */
363 while (hw_read(udc, OP_ENDPTPRIME, ~0))
364 udelay(10); /* not RTOS friendly */
365
366 /* reset all endpoints ? */
367
368 /* reset internal status and wait for further instructions
369 no need to verify the port reset status (ESS does it) */
370
371 return 0;
372}
373
374/******************************************************************************
375 * UTIL block
376 *****************************************************************************/
377/**
378 * _usb_addr: calculates endpoint address from direction & number
379 * @ep: endpoint
380 */
381static inline u8 _usb_addr(struct ci13xxx_ep *ep)
382{
383 return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
384}
385
386/**
387 * _hardware_queue: configures a request at hardware level
388 * @gadget: gadget
389 * @mEp: endpoint
390 *
391 * This function returns an error code
392 */
393static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
394{
395 struct ci13xxx *udc = mEp->udc;
396 unsigned i;
397 int ret = 0;
398 unsigned length = mReq->req.length;
399
400 /* don't queue twice */
401 if (mReq->req.status == -EALREADY)
402 return -EALREADY;
403
404 mReq->req.status = -EALREADY;
405
406 if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
407 mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
408 &mReq->zdma);
409 if (mReq->zptr == NULL)
410 return -ENOMEM;
411
412 memset(mReq->zptr, 0, sizeof(*mReq->zptr));
413 mReq->zptr->next = TD_TERMINATE;
414 mReq->zptr->token = TD_STATUS_ACTIVE;
415 if (!mReq->req.no_interrupt)
416 mReq->zptr->token |= TD_IOC;
417 }
418 ret = usb_gadget_map_request(&udc->gadget, &mReq->req, mEp->dir);
419 if (ret)
420 return ret;
421
422 /*
423 * TD configuration
424 * TODO - handle requests which spawns into several TDs
425 */
426 memset(mReq->ptr, 0, sizeof(*mReq->ptr));
427 mReq->ptr->token = length << ffs_nr(TD_TOTAL_BYTES);
428 mReq->ptr->token &= TD_TOTAL_BYTES;
429 mReq->ptr->token |= TD_STATUS_ACTIVE;
430 if (mReq->zptr) {
431 mReq->ptr->next = mReq->zdma;
432 } else {
433 mReq->ptr->next = TD_TERMINATE;
434 if (!mReq->req.no_interrupt)
435 mReq->ptr->token |= TD_IOC;
436 }
437 mReq->ptr->page[0] = mReq->req.dma;
438 for (i = 1; i < 5; i++)
439 mReq->ptr->page[i] =
440 (mReq->req.dma + i * CI13XXX_PAGE_SIZE) & ~TD_RESERVED_MASK;
441
442 if (!list_empty(&mEp->qh.queue)) {
443 struct ci13xxx_req *mReqPrev;
444 int n = hw_ep_bit(mEp->num, mEp->dir);
445 int tmp_stat;
446
447 mReqPrev = list_entry(mEp->qh.queue.prev,
448 struct ci13xxx_req, queue);
449 if (mReqPrev->zptr)
450 mReqPrev->zptr->next = mReq->dma & TD_ADDR_MASK;
451 else
452 mReqPrev->ptr->next = mReq->dma & TD_ADDR_MASK;
453 wmb();
454 if (hw_read(udc, OP_ENDPTPRIME, BIT(n)))
455 goto done;
456 do {
457 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
458 tmp_stat = hw_read(udc, OP_ENDPTSTAT, BIT(n));
459 } while (!hw_read(udc, OP_USBCMD, USBCMD_ATDTW));
460 hw_write(udc, OP_USBCMD, USBCMD_ATDTW, 0);
461 if (tmp_stat)
462 goto done;
463 }
464
465 /* QH configuration */
466 mEp->qh.ptr->td.next = mReq->dma; /* TERMINATE = 0 */
467 mEp->qh.ptr->td.token &= ~TD_STATUS; /* clear status */
468 mEp->qh.ptr->cap |= QH_ZLT;
469
470 wmb(); /* synchronize before ep prime */
471
472 ret = hw_ep_prime(udc, mEp->num, mEp->dir,
473 mEp->type == USB_ENDPOINT_XFER_CONTROL);
474done:
475 return ret;
476}
477
478/**
479 * _hardware_dequeue: handles a request at hardware level
480 * @gadget: gadget
481 * @mEp: endpoint
482 *
483 * This function returns an error code
484 */
485static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
486{
487 if (mReq->req.status != -EALREADY)
488 return -EINVAL;
489
490 if ((TD_STATUS_ACTIVE & mReq->ptr->token) != 0)
491 return -EBUSY;
492
493 if (mReq->zptr) {
494 if ((TD_STATUS_ACTIVE & mReq->zptr->token) != 0)
495 return -EBUSY;
496 dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
497 mReq->zptr = NULL;
498 }
499
500 mReq->req.status = 0;
501
502 usb_gadget_unmap_request(&mEp->udc->gadget, &mReq->req, mEp->dir);
503
504 mReq->req.status = mReq->ptr->token & TD_STATUS;
505 if ((TD_STATUS_HALTED & mReq->req.status) != 0)
506 mReq->req.status = -1;
507 else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
508 mReq->req.status = -1;
509 else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
510 mReq->req.status = -1;
511
512 mReq->req.actual = mReq->ptr->token & TD_TOTAL_BYTES;
513 mReq->req.actual >>= ffs_nr(TD_TOTAL_BYTES);
514 mReq->req.actual = mReq->req.length - mReq->req.actual;
515 mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
516
517 return mReq->req.actual;
518}
519
520/**
521 * _ep_nuke: dequeues all endpoint requests
522 * @mEp: endpoint
523 *
524 * This function returns an error code
525 * Caller must hold lock
526 */
527static int _ep_nuke(struct ci13xxx_ep *mEp)
528__releases(mEp->lock)
529__acquires(mEp->lock)
530{
531 if (mEp == NULL)
532 return -EINVAL;
533
534 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
535
536 while (!list_empty(&mEp->qh.queue)) {
537
538 /* pop oldest request */
539 struct ci13xxx_req *mReq = \
540 list_entry(mEp->qh.queue.next,
541 struct ci13xxx_req, queue);
542 list_del_init(&mReq->queue);
543 mReq->req.status = -ESHUTDOWN;
544
545 if (mReq->req.complete != NULL) {
546 spin_unlock(mEp->lock);
547 mReq->req.complete(&mEp->ep, &mReq->req);
548 spin_lock(mEp->lock);
549 }
550 }
551 return 0;
552}
553
554/**
555 * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
556 * @gadget: gadget
557 *
558 * This function returns an error code
559 */
560static int _gadget_stop_activity(struct usb_gadget *gadget)
561{
562 struct usb_ep *ep;
563 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
564 unsigned long flags;
565
566 spin_lock_irqsave(&udc->lock, flags);
567 udc->gadget.speed = USB_SPEED_UNKNOWN;
568 udc->remote_wakeup = 0;
569 udc->suspended = 0;
570 spin_unlock_irqrestore(&udc->lock, flags);
571
572 /* flush all endpoints */
573 gadget_for_each_ep(ep, gadget) {
574 usb_ep_fifo_flush(ep);
575 }
576 usb_ep_fifo_flush(&udc->ep0out->ep);
577 usb_ep_fifo_flush(&udc->ep0in->ep);
578
579 if (udc->driver)
580 udc->driver->disconnect(gadget);
581
582 /* make sure to disable all endpoints */
583 gadget_for_each_ep(ep, gadget) {
584 usb_ep_disable(ep);
585 }
586
587 if (udc->status != NULL) {
588 usb_ep_free_request(&udc->ep0in->ep, udc->status);
589 udc->status = NULL;
590 }
591
592 return 0;
593}
594
595/******************************************************************************
596 * ISR block
597 *****************************************************************************/
598/**
599 * isr_reset_handler: USB reset interrupt handler
600 * @udc: UDC device
601 *
602 * This function resets USB engine after a bus reset occurred
603 */
604static void isr_reset_handler(struct ci13xxx *udc)
605__releases(udc->lock)
606__acquires(udc->lock)
607{
608 int retval;
609
610 dbg_event(0xFF, "BUS RST", 0);
611
612 spin_unlock(&udc->lock);
613 retval = _gadget_stop_activity(&udc->gadget);
614 if (retval)
615 goto done;
616
617 retval = hw_usb_reset(udc);
618 if (retval)
619 goto done;
620
621 udc->status = usb_ep_alloc_request(&udc->ep0in->ep, GFP_ATOMIC);
622 if (udc->status == NULL)
623 retval = -ENOMEM;
624
625done:
626 spin_lock(&udc->lock);
627
628 if (retval)
629 dev_err(udc->dev, "error: %i\n", retval);
630}
631
632/**
633 * isr_get_status_complete: get_status request complete function
634 * @ep: endpoint
635 * @req: request handled
636 *
637 * Caller must release lock
638 */
639static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
640{
641 if (ep == NULL || req == NULL)
642 return;
643
644 kfree(req->buf);
645 usb_ep_free_request(ep, req);
646}
647
648/**
649 * isr_get_status_response: get_status request response
650 * @udc: udc struct
651 * @setup: setup request packet
652 *
653 * This function returns an error code
654 */
655static int isr_get_status_response(struct ci13xxx *udc,
656 struct usb_ctrlrequest *setup)
657__releases(mEp->lock)
658__acquires(mEp->lock)
659{
660 struct ci13xxx_ep *mEp = udc->ep0in;
661 struct usb_request *req = NULL;
662 gfp_t gfp_flags = GFP_ATOMIC;
663 int dir, num, retval;
664
665 if (mEp == NULL || setup == NULL)
666 return -EINVAL;
667
668 spin_unlock(mEp->lock);
669 req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
670 spin_lock(mEp->lock);
671 if (req == NULL)
672 return -ENOMEM;
673
674 req->complete = isr_get_status_complete;
675 req->length = 2;
676 req->buf = kzalloc(req->length, gfp_flags);
677 if (req->buf == NULL) {
678 retval = -ENOMEM;
679 goto err_free_req;
680 }
681
682 if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
683 /* Assume that device is bus powered for now. */
684 *(u16 *)req->buf = udc->remote_wakeup << 1;
685 retval = 0;
686 } else if ((setup->bRequestType & USB_RECIP_MASK) \
687 == USB_RECIP_ENDPOINT) {
688 dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
689 TX : RX;
690 num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
691 *(u16 *)req->buf = hw_ep_get_halt(udc, num, dir);
692 }
693 /* else do nothing; reserved for future use */
694
695 spin_unlock(mEp->lock);
696 retval = usb_ep_queue(&mEp->ep, req, gfp_flags);
697 spin_lock(mEp->lock);
698 if (retval)
699 goto err_free_buf;
700
701 return 0;
702
703 err_free_buf:
704 kfree(req->buf);
705 err_free_req:
706 spin_unlock(mEp->lock);
707 usb_ep_free_request(&mEp->ep, req);
708 spin_lock(mEp->lock);
709 return retval;
710}
711
712/**
713 * isr_setup_status_complete: setup_status request complete function
714 * @ep: endpoint
715 * @req: request handled
716 *
717 * Caller must release lock. Put the port in test mode if test mode
718 * feature is selected.
719 */
720static void
721isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
722{
723 struct ci13xxx *udc = req->context;
724 unsigned long flags;
725
726 if (udc->setaddr) {
727 hw_usb_set_address(udc, udc->address);
728 udc->setaddr = false;
729 }
730
731 spin_lock_irqsave(&udc->lock, flags);
732 if (udc->test_mode)
733 hw_port_test_set(udc, udc->test_mode);
734 spin_unlock_irqrestore(&udc->lock, flags);
735}
736
737/**
738 * isr_setup_status_phase: queues the status phase of a setup transation
739 * @udc: udc struct
740 *
741 * This function returns an error code
742 */
743static int isr_setup_status_phase(struct ci13xxx *udc)
744__releases(mEp->lock)
745__acquires(mEp->lock)
746{
747 int retval;
748 struct ci13xxx_ep *mEp;
749
750 mEp = (udc->ep0_dir == TX) ? udc->ep0out : udc->ep0in;
751 udc->status->context = udc;
752 udc->status->complete = isr_setup_status_complete;
753
754 spin_unlock(mEp->lock);
755 retval = usb_ep_queue(&mEp->ep, udc->status, GFP_ATOMIC);
756 spin_lock(mEp->lock);
757
758 return retval;
759}
760
761/**
762 * isr_tr_complete_low: transaction complete low level handler
763 * @mEp: endpoint
764 *
765 * This function returns an error code
766 * Caller must hold lock
767 */
768static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
769__releases(mEp->lock)
770__acquires(mEp->lock)
771{
772 struct ci13xxx_req *mReq, *mReqTemp;
773 struct ci13xxx_ep *mEpTemp = mEp;
774 int retval = 0;
775
776 list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
777 queue) {
778 retval = _hardware_dequeue(mEp, mReq);
779 if (retval < 0)
780 break;
781 list_del_init(&mReq->queue);
782 dbg_done(_usb_addr(mEp), mReq->ptr->token, retval);
783 if (mReq->req.complete != NULL) {
784 spin_unlock(mEp->lock);
785 if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
786 mReq->req.length)
787 mEpTemp = mEp->udc->ep0in;
788 mReq->req.complete(&mEpTemp->ep, &mReq->req);
789 spin_lock(mEp->lock);
790 }
791 }
792
793 if (retval == -EBUSY)
794 retval = 0;
795 if (retval < 0)
796 dbg_event(_usb_addr(mEp), "DONE", retval);
797
798 return retval;
799}
800
801/**
802 * isr_tr_complete_handler: transaction complete interrupt handler
803 * @udc: UDC descriptor
804 *
805 * This function handles traffic events
806 */
807static void isr_tr_complete_handler(struct ci13xxx *udc)
808__releases(udc->lock)
809__acquires(udc->lock)
810{
811 unsigned i;
812 u8 tmode = 0;
813
814 for (i = 0; i < udc->hw_ep_max; i++) {
815 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
816 int type, num, dir, err = -EINVAL;
817 struct usb_ctrlrequest req;
818
819 if (mEp->ep.desc == NULL)
820 continue; /* not configured */
821
822 if (hw_test_and_clear_complete(udc, i)) {
823 err = isr_tr_complete_low(mEp);
824 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
825 if (err > 0) /* needs status phase */
826 err = isr_setup_status_phase(udc);
827 if (err < 0) {
828 dbg_event(_usb_addr(mEp),
829 "ERROR", err);
830 spin_unlock(&udc->lock);
831 if (usb_ep_set_halt(&mEp->ep))
832 dev_err(udc->dev,
833 "error: ep_set_halt\n");
834 spin_lock(&udc->lock);
835 }
836 }
837 }
838
839 if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
840 !hw_test_and_clear_setup_status(udc, i))
841 continue;
842
843 if (i != 0) {
844 dev_warn(udc->dev, "ctrl traffic at endpoint %d\n", i);
845 continue;
846 }
847
848 /*
849 * Flush data and handshake transactions of previous
850 * setup packet.
851 */
852 _ep_nuke(udc->ep0out);
853 _ep_nuke(udc->ep0in);
854
855 /* read_setup_packet */
856 do {
857 hw_test_and_set_setup_guard(udc);
858 memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
859 } while (!hw_test_and_clear_setup_guard(udc));
860
861 type = req.bRequestType;
862
863 udc->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
864
865 dbg_setup(_usb_addr(mEp), &req);
866
867 switch (req.bRequest) {
868 case USB_REQ_CLEAR_FEATURE:
869 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
870 le16_to_cpu(req.wValue) ==
871 USB_ENDPOINT_HALT) {
872 if (req.wLength != 0)
873 break;
874 num = le16_to_cpu(req.wIndex);
875 dir = num & USB_ENDPOINT_DIR_MASK;
876 num &= USB_ENDPOINT_NUMBER_MASK;
877 if (dir) /* TX */
878 num += udc->hw_ep_max/2;
879 if (!udc->ci13xxx_ep[num].wedge) {
880 spin_unlock(&udc->lock);
881 err = usb_ep_clear_halt(
882 &udc->ci13xxx_ep[num].ep);
883 spin_lock(&udc->lock);
884 if (err)
885 break;
886 }
887 err = isr_setup_status_phase(udc);
888 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
889 le16_to_cpu(req.wValue) ==
890 USB_DEVICE_REMOTE_WAKEUP) {
891 if (req.wLength != 0)
892 break;
893 udc->remote_wakeup = 0;
894 err = isr_setup_status_phase(udc);
895 } else {
896 goto delegate;
897 }
898 break;
899 case USB_REQ_GET_STATUS:
900 if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
901 type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
902 type != (USB_DIR_IN|USB_RECIP_INTERFACE))
903 goto delegate;
904 if (le16_to_cpu(req.wLength) != 2 ||
905 le16_to_cpu(req.wValue) != 0)
906 break;
907 err = isr_get_status_response(udc, &req);
908 break;
909 case USB_REQ_SET_ADDRESS:
910 if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
911 goto delegate;
912 if (le16_to_cpu(req.wLength) != 0 ||
913 le16_to_cpu(req.wIndex) != 0)
914 break;
915 udc->address = (u8)le16_to_cpu(req.wValue);
916 udc->setaddr = true;
917 err = isr_setup_status_phase(udc);
918 break;
919 case USB_REQ_SET_FEATURE:
920 if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
921 le16_to_cpu(req.wValue) ==
922 USB_ENDPOINT_HALT) {
923 if (req.wLength != 0)
924 break;
925 num = le16_to_cpu(req.wIndex);
926 dir = num & USB_ENDPOINT_DIR_MASK;
927 num &= USB_ENDPOINT_NUMBER_MASK;
928 if (dir) /* TX */
929 num += udc->hw_ep_max/2;
930
931 spin_unlock(&udc->lock);
932 err = usb_ep_set_halt(&udc->ci13xxx_ep[num].ep);
933 spin_lock(&udc->lock);
934 if (!err)
935 isr_setup_status_phase(udc);
936 } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
937 if (req.wLength != 0)
938 break;
939 switch (le16_to_cpu(req.wValue)) {
940 case USB_DEVICE_REMOTE_WAKEUP:
941 udc->remote_wakeup = 1;
942 err = isr_setup_status_phase(udc);
943 break;
944 case USB_DEVICE_TEST_MODE:
945 tmode = le16_to_cpu(req.wIndex) >> 8;
946 switch (tmode) {
947 case TEST_J:
948 case TEST_K:
949 case TEST_SE0_NAK:
950 case TEST_PACKET:
951 case TEST_FORCE_EN:
952 udc->test_mode = tmode;
953 err = isr_setup_status_phase(
954 udc);
955 break;
956 default:
957 break;
958 }
959 default:
960 goto delegate;
961 }
962 } else {
963 goto delegate;
964 }
965 break;
966 default:
967delegate:
968 if (req.wLength == 0) /* no data phase */
969 udc->ep0_dir = TX;
970
971 spin_unlock(&udc->lock);
972 err = udc->driver->setup(&udc->gadget, &req);
973 spin_lock(&udc->lock);
974 break;
975 }
976
977 if (err < 0) {
978 dbg_event(_usb_addr(mEp), "ERROR", err);
979
980 spin_unlock(&udc->lock);
981 if (usb_ep_set_halt(&mEp->ep))
982 dev_err(udc->dev, "error: ep_set_halt\n");
983 spin_lock(&udc->lock);
984 }
985 }
986}
987
988/******************************************************************************
989 * ENDPT block
990 *****************************************************************************/
991/**
992 * ep_enable: configure endpoint, making it usable
993 *
994 * Check usb_ep_enable() at "usb_gadget.h" for details
995 */
996static int ep_enable(struct usb_ep *ep,
997 const struct usb_endpoint_descriptor *desc)
998{
999 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1000 int retval = 0;
1001 unsigned long flags;
1002
1003 if (ep == NULL || desc == NULL)
1004 return -EINVAL;
1005
1006 spin_lock_irqsave(mEp->lock, flags);
1007
1008 /* only internal SW should enable ctrl endpts */
1009
1010 mEp->ep.desc = desc;
1011
1012 if (!list_empty(&mEp->qh.queue))
1013 dev_warn(mEp->udc->dev, "enabling a non-empty endpoint!\n");
1014
1015 mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
1016 mEp->num = usb_endpoint_num(desc);
1017 mEp->type = usb_endpoint_type(desc);
1018
1019 mEp->ep.maxpacket = usb_endpoint_maxp(desc);
1020
1021 dbg_event(_usb_addr(mEp), "ENABLE", 0);
1022
1023 mEp->qh.ptr->cap = 0;
1024
1025 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1026 mEp->qh.ptr->cap |= QH_IOS;
1027 else if (mEp->type == USB_ENDPOINT_XFER_ISOC)
1028 mEp->qh.ptr->cap &= ~QH_MULT;
1029 else
1030 mEp->qh.ptr->cap &= ~QH_ZLT;
1031
1032 mEp->qh.ptr->cap |=
1033 (mEp->ep.maxpacket << ffs_nr(QH_MAX_PKT)) & QH_MAX_PKT;
1034 mEp->qh.ptr->td.next |= TD_TERMINATE; /* needed? */
1035
1036 /*
1037 * Enable endpoints in the HW other than ep0 as ep0
1038 * is always enabled
1039 */
1040 if (mEp->num)
1041 retval |= hw_ep_enable(mEp->udc, mEp->num, mEp->dir, mEp->type);
1042
1043 spin_unlock_irqrestore(mEp->lock, flags);
1044 return retval;
1045}
1046
1047/**
1048 * ep_disable: endpoint is no longer usable
1049 *
1050 * Check usb_ep_disable() at "usb_gadget.h" for details
1051 */
1052static int ep_disable(struct usb_ep *ep)
1053{
1054 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1055 int direction, retval = 0;
1056 unsigned long flags;
1057
1058 if (ep == NULL)
1059 return -EINVAL;
1060 else if (mEp->ep.desc == NULL)
1061 return -EBUSY;
1062
1063 spin_lock_irqsave(mEp->lock, flags);
1064
1065 /* only internal SW should disable ctrl endpts */
1066
1067 direction = mEp->dir;
1068 do {
1069 dbg_event(_usb_addr(mEp), "DISABLE", 0);
1070
1071 retval |= _ep_nuke(mEp);
1072 retval |= hw_ep_disable(mEp->udc, mEp->num, mEp->dir);
1073
1074 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1075 mEp->dir = (mEp->dir == TX) ? RX : TX;
1076
1077 } while (mEp->dir != direction);
1078
1079 mEp->ep.desc = NULL;
1080
1081 spin_unlock_irqrestore(mEp->lock, flags);
1082 return retval;
1083}
1084
1085/**
1086 * ep_alloc_request: allocate a request object to use with this endpoint
1087 *
1088 * Check usb_ep_alloc_request() at "usb_gadget.h" for details
1089 */
1090static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
1091{
1092 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1093 struct ci13xxx_req *mReq = NULL;
1094
1095 if (ep == NULL)
1096 return NULL;
1097
1098 mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
1099 if (mReq != NULL) {
1100 INIT_LIST_HEAD(&mReq->queue);
1101
1102 mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
1103 &mReq->dma);
1104 if (mReq->ptr == NULL) {
1105 kfree(mReq);
1106 mReq = NULL;
1107 }
1108 }
1109
1110 dbg_event(_usb_addr(mEp), "ALLOC", mReq == NULL);
1111
1112 return (mReq == NULL) ? NULL : &mReq->req;
1113}
1114
1115/**
1116 * ep_free_request: frees a request object
1117 *
1118 * Check usb_ep_free_request() at "usb_gadget.h" for details
1119 */
1120static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
1121{
1122 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1123 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1124 unsigned long flags;
1125
1126 if (ep == NULL || req == NULL) {
1127 return;
1128 } else if (!list_empty(&mReq->queue)) {
1129 dev_err(mEp->udc->dev, "freeing queued request\n");
1130 return;
1131 }
1132
1133 spin_lock_irqsave(mEp->lock, flags);
1134
1135 if (mReq->ptr)
1136 dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
1137 kfree(mReq);
1138
1139 dbg_event(_usb_addr(mEp), "FREE", 0);
1140
1141 spin_unlock_irqrestore(mEp->lock, flags);
1142}
1143
1144/**
1145 * ep_queue: queues (submits) an I/O request to an endpoint
1146 *
1147 * Check usb_ep_queue()* at usb_gadget.h" for details
1148 */
1149static int ep_queue(struct usb_ep *ep, struct usb_request *req,
1150 gfp_t __maybe_unused gfp_flags)
1151{
1152 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1153 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1154 struct ci13xxx *udc = mEp->udc;
1155 int retval = 0;
1156 unsigned long flags;
1157
1158 if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
1159 return -EINVAL;
1160
1161 spin_lock_irqsave(mEp->lock, flags);
1162
1163 if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
1164 if (req->length)
1165 mEp = (udc->ep0_dir == RX) ?
1166 udc->ep0out : udc->ep0in;
1167 if (!list_empty(&mEp->qh.queue)) {
1168 _ep_nuke(mEp);
1169 retval = -EOVERFLOW;
1170 dev_warn(mEp->udc->dev, "endpoint ctrl %X nuked\n",
1171 _usb_addr(mEp));
1172 }
1173 }
1174
1175 /* first nuke then test link, e.g. previous status has not sent */
1176 if (!list_empty(&mReq->queue)) {
1177 retval = -EBUSY;
1178 dev_err(mEp->udc->dev, "request already in queue\n");
1179 goto done;
1180 }
1181
1182 if (req->length > 4 * CI13XXX_PAGE_SIZE) {
1183 req->length = 4 * CI13XXX_PAGE_SIZE;
1184 retval = -EMSGSIZE;
1185 dev_warn(mEp->udc->dev, "request length truncated\n");
1186 }
1187
1188 dbg_queue(_usb_addr(mEp), req, retval);
1189
1190 /* push request */
1191 mReq->req.status = -EINPROGRESS;
1192 mReq->req.actual = 0;
1193
1194 retval = _hardware_enqueue(mEp, mReq);
1195
1196 if (retval == -EALREADY) {
1197 dbg_event(_usb_addr(mEp), "QUEUE", retval);
1198 retval = 0;
1199 }
1200 if (!retval)
1201 list_add_tail(&mReq->queue, &mEp->qh.queue);
1202
1203 done:
1204 spin_unlock_irqrestore(mEp->lock, flags);
1205 return retval;
1206}
1207
1208/**
1209 * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
1210 *
1211 * Check usb_ep_dequeue() at "usb_gadget.h" for details
1212 */
1213static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
1214{
1215 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1216 struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
1217 unsigned long flags;
1218
1219 if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
1220 mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
1221 list_empty(&mEp->qh.queue))
1222 return -EINVAL;
1223
1224 spin_lock_irqsave(mEp->lock, flags);
1225
1226 dbg_event(_usb_addr(mEp), "DEQUEUE", 0);
1227
1228 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1229
1230 /* pop request */
1231 list_del_init(&mReq->queue);
1232
1233 usb_gadget_unmap_request(&mEp->udc->gadget, req, mEp->dir);
1234
1235 req->status = -ECONNRESET;
1236
1237 if (mReq->req.complete != NULL) {
1238 spin_unlock(mEp->lock);
1239 mReq->req.complete(&mEp->ep, &mReq->req);
1240 spin_lock(mEp->lock);
1241 }
1242
1243 spin_unlock_irqrestore(mEp->lock, flags);
1244 return 0;
1245}
1246
1247/**
1248 * ep_set_halt: sets the endpoint halt feature
1249 *
1250 * Check usb_ep_set_halt() at "usb_gadget.h" for details
1251 */
1252static int ep_set_halt(struct usb_ep *ep, int value)
1253{
1254 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1255 int direction, retval = 0;
1256 unsigned long flags;
1257
1258 if (ep == NULL || mEp->ep.desc == NULL)
1259 return -EINVAL;
1260
1261 spin_lock_irqsave(mEp->lock, flags);
1262
1263#ifndef STALL_IN
1264 /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
1265 if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
1266 !list_empty(&mEp->qh.queue)) {
1267 spin_unlock_irqrestore(mEp->lock, flags);
1268 return -EAGAIN;
1269 }
1270#endif
1271
1272 direction = mEp->dir;
1273 do {
1274 dbg_event(_usb_addr(mEp), "HALT", value);
1275 retval |= hw_ep_set_halt(mEp->udc, mEp->num, mEp->dir, value);
1276
1277 if (!value)
1278 mEp->wedge = 0;
1279
1280 if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
1281 mEp->dir = (mEp->dir == TX) ? RX : TX;
1282
1283 } while (mEp->dir != direction);
1284
1285 spin_unlock_irqrestore(mEp->lock, flags);
1286 return retval;
1287}
1288
1289/**
1290 * ep_set_wedge: sets the halt feature and ignores clear requests
1291 *
1292 * Check usb_ep_set_wedge() at "usb_gadget.h" for details
1293 */
1294static int ep_set_wedge(struct usb_ep *ep)
1295{
1296 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1297 unsigned long flags;
1298
1299 if (ep == NULL || mEp->ep.desc == NULL)
1300 return -EINVAL;
1301
1302 spin_lock_irqsave(mEp->lock, flags);
1303
1304 dbg_event(_usb_addr(mEp), "WEDGE", 0);
1305 mEp->wedge = 1;
1306
1307 spin_unlock_irqrestore(mEp->lock, flags);
1308
1309 return usb_ep_set_halt(ep);
1310}
1311
1312/**
1313 * ep_fifo_flush: flushes contents of a fifo
1314 *
1315 * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
1316 */
1317static void ep_fifo_flush(struct usb_ep *ep)
1318{
1319 struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
1320 unsigned long flags;
1321
1322 if (ep == NULL) {
1323 dev_err(mEp->udc->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
1324 return;
1325 }
1326
1327 spin_lock_irqsave(mEp->lock, flags);
1328
1329 dbg_event(_usb_addr(mEp), "FFLUSH", 0);
1330 hw_ep_flush(mEp->udc, mEp->num, mEp->dir);
1331
1332 spin_unlock_irqrestore(mEp->lock, flags);
1333}
1334
1335/**
1336 * Endpoint-specific part of the API to the USB controller hardware
1337 * Check "usb_gadget.h" for details
1338 */
1339static const struct usb_ep_ops usb_ep_ops = {
1340 .enable = ep_enable,
1341 .disable = ep_disable,
1342 .alloc_request = ep_alloc_request,
1343 .free_request = ep_free_request,
1344 .queue = ep_queue,
1345 .dequeue = ep_dequeue,
1346 .set_halt = ep_set_halt,
1347 .set_wedge = ep_set_wedge,
1348 .fifo_flush = ep_fifo_flush,
1349};
1350
1351/******************************************************************************
1352 * GADGET block
1353 *****************************************************************************/
1354static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
1355{
1356 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1357 unsigned long flags;
1358 int gadget_ready = 0;
1359
1360 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS))
1361 return -EOPNOTSUPP;
1362
1363 spin_lock_irqsave(&udc->lock, flags);
1364 udc->vbus_active = is_active;
1365 if (udc->driver)
1366 gadget_ready = 1;
1367 spin_unlock_irqrestore(&udc->lock, flags);
1368
1369 if (gadget_ready) {
1370 if (is_active) {
1371 pm_runtime_get_sync(&_gadget->dev);
1372 hw_device_reset(udc, USBMODE_CM_DC);
1373 hw_device_state(udc, udc->ep0out->qh.dma);
1374 } else {
1375 hw_device_state(udc, 0);
1376 if (udc->udc_driver->notify_event)
1377 udc->udc_driver->notify_event(udc,
1378 CI13XXX_CONTROLLER_STOPPED_EVENT);
1379 _gadget_stop_activity(&udc->gadget);
1380 pm_runtime_put_sync(&_gadget->dev);
1381 }
1382 }
1383
1384 return 0;
1385}
1386
1387static int ci13xxx_wakeup(struct usb_gadget *_gadget)
1388{
1389 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1390 unsigned long flags;
1391 int ret = 0;
1392
1393 spin_lock_irqsave(&udc->lock, flags);
1394 if (!udc->remote_wakeup) {
1395 ret = -EOPNOTSUPP;
1396 goto out;
1397 }
1398 if (!hw_read(udc, OP_PORTSC, PORTSC_SUSP)) {
1399 ret = -EINVAL;
1400 goto out;
1401 }
1402 hw_write(udc, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
1403out:
1404 spin_unlock_irqrestore(&udc->lock, flags);
1405 return ret;
1406}
1407
1408static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1409{
1410 struct ci13xxx *udc = container_of(_gadget, struct ci13xxx, gadget);
1411
1412 if (udc->transceiver)
1413 return usb_phy_set_power(udc->transceiver, mA);
1414 return -ENOTSUPP;
1415}
1416
1417/* Change Data+ pullup status
1418 * this func is used by usb_gadget_connect/disconnet
1419 */
1420static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_on)
1421{
1422 struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
1423
1424 if (is_on)
1425 hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
1426 else
1427 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
1428
1429 return 0;
1430}
1431
1432static int ci13xxx_start(struct usb_gadget *gadget,
1433 struct usb_gadget_driver *driver);
1434static int ci13xxx_stop(struct usb_gadget *gadget,
1435 struct usb_gadget_driver *driver);
1436/**
1437 * Device operations part of the API to the USB controller hardware,
1438 * which don't involve endpoints (or i/o)
1439 * Check "usb_gadget.h" for details
1440 */
1441static const struct usb_gadget_ops usb_gadget_ops = {
1442 .vbus_session = ci13xxx_vbus_session,
1443 .wakeup = ci13xxx_wakeup,
1444 .pullup = ci13xxx_pullup,
1445 .vbus_draw = ci13xxx_vbus_draw,
1446 .udc_start = ci13xxx_start,
1447 .udc_stop = ci13xxx_stop,
1448};
1449
1450static int init_eps(struct ci13xxx *udc)
1451{
1452 int retval = 0, i, j;
1453
1454 for (i = 0; i < udc->hw_ep_max/2; i++)
1455 for (j = RX; j <= TX; j++) {
1456 int k = i + j * udc->hw_ep_max/2;
1457 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[k];
1458
1459 scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
1460 (j == TX) ? "in" : "out");
1461
1462 mEp->udc = udc;
1463 mEp->lock = &udc->lock;
1464 mEp->td_pool = udc->td_pool;
1465
1466 mEp->ep.name = mEp->name;
1467 mEp->ep.ops = &usb_ep_ops;
1468 /*
1469 * for ep0: maxP defined in desc, for other
1470 * eps, maxP is set by epautoconfig() called
1471 * by gadget layer
1472 */
1473 mEp->ep.maxpacket = (unsigned short)~0;
1474
1475 INIT_LIST_HEAD(&mEp->qh.queue);
1476 mEp->qh.ptr = dma_pool_alloc(udc->qh_pool, GFP_KERNEL,
1477 &mEp->qh.dma);
1478 if (mEp->qh.ptr == NULL)
1479 retval = -ENOMEM;
1480 else
1481 memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
1482
1483 /*
1484 * set up shorthands for ep0 out and in endpoints,
1485 * don't add to gadget's ep_list
1486 */
1487 if (i == 0) {
1488 if (j == RX)
1489 udc->ep0out = mEp;
1490 else
1491 udc->ep0in = mEp;
1492
1493 mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
1494 continue;
1495 }
1496
1497 list_add_tail(&mEp->ep.ep_list, &udc->gadget.ep_list);
1498 }
1499
1500 return retval;
1501}
1502
1503static void destroy_eps(struct ci13xxx *udc)
1504{
1505 int i;
1506
1507 for (i = 0; i < udc->hw_ep_max; i++) {
1508 struct ci13xxx_ep *mEp = &udc->ci13xxx_ep[i];
1509
1510 dma_pool_free(udc->qh_pool, mEp->qh.ptr, mEp->qh.dma);
1511 }
1512}
1513
1514/**
1515 * ci13xxx_start: register a gadget driver
1516 * @gadget: our gadget
1517 * @driver: the driver being registered
1518 *
1519 * Interrupts are enabled here.
1520 */
1521static int ci13xxx_start(struct usb_gadget *gadget,
1522 struct usb_gadget_driver *driver)
1523{
1524 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1525 unsigned long flags;
1526 int retval = -ENOMEM;
1527
1528 if (driver->disconnect == NULL)
1529 return -EINVAL;
1530
1531
1532 udc->ep0out->ep.desc = &ctrl_endpt_out_desc;
1533 retval = usb_ep_enable(&udc->ep0out->ep);
1534 if (retval)
1535 return retval;
1536
1537 udc->ep0in->ep.desc = &ctrl_endpt_in_desc;
1538 retval = usb_ep_enable(&udc->ep0in->ep);
1539 if (retval)
1540 return retval;
1541 spin_lock_irqsave(&udc->lock, flags);
1542
1543 udc->driver = driver;
1544 pm_runtime_get_sync(&udc->gadget.dev);
1545 if (udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) {
1546 if (udc->vbus_active) {
1547 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED)
1548 hw_device_reset(udc, USBMODE_CM_DC);
1549 } else {
1550 pm_runtime_put_sync(&udc->gadget.dev);
1551 goto done;
1552 }
1553 }
1554
1555 retval = hw_device_state(udc, udc->ep0out->qh.dma);
1556 if (retval)
1557 pm_runtime_put_sync(&udc->gadget.dev);
1558
1559 done:
1560 spin_unlock_irqrestore(&udc->lock, flags);
1561 return retval;
1562}
1563
1564/**
1565 * ci13xxx_stop: unregister a gadget driver
1566 */
1567static int ci13xxx_stop(struct usb_gadget *gadget,
1568 struct usb_gadget_driver *driver)
1569{
1570 struct ci13xxx *udc = container_of(gadget, struct ci13xxx, gadget);
1571 unsigned long flags;
1572
1573 spin_lock_irqsave(&udc->lock, flags);
1574
1575 if (!(udc->udc_driver->flags & CI13XXX_PULLUP_ON_VBUS) ||
1576 udc->vbus_active) {
1577 hw_device_state(udc, 0);
1578 if (udc->udc_driver->notify_event)
1579 udc->udc_driver->notify_event(udc,
1580 CI13XXX_CONTROLLER_STOPPED_EVENT);
1581 udc->driver = NULL;
1582 spin_unlock_irqrestore(&udc->lock, flags);
1583 _gadget_stop_activity(&udc->gadget);
1584 spin_lock_irqsave(&udc->lock, flags);
1585 pm_runtime_put(&udc->gadget.dev);
1586 }
1587
1588 spin_unlock_irqrestore(&udc->lock, flags);
1589
1590 return 0;
1591}
1592
1593/******************************************************************************
1594 * BUS block
1595 *****************************************************************************/
1596/**
1597 * udc_irq: udc interrupt handler
1598 *
1599 * This function returns IRQ_HANDLED if the IRQ has been handled
1600 * It locks access to registers
1601 */
1602static irqreturn_t udc_irq(struct ci13xxx *udc)
1603{
1604 irqreturn_t retval;
1605 u32 intr;
1606
1607 if (udc == NULL)
1608 return IRQ_HANDLED;
1609
1610 spin_lock(&udc->lock);
1611
1612 if (udc->udc_driver->flags & CI13XXX_REGS_SHARED) {
1613 if (hw_read(udc, OP_USBMODE, USBMODE_CM) !=
1614 USBMODE_CM_DC) {
1615 spin_unlock(&udc->lock);
1616 return IRQ_NONE;
1617 }
1618 }
1619 intr = hw_test_and_clear_intr_active(udc);
1620 dbg_interrupt(intr);
1621
1622 if (intr) {
1623 /* order defines priority - do NOT change it */
1624 if (USBi_URI & intr)
1625 isr_reset_handler(udc);
1626
1627 if (USBi_PCI & intr) {
1628 udc->gadget.speed = hw_port_is_high_speed(udc) ?
1629 USB_SPEED_HIGH : USB_SPEED_FULL;
1630 if (udc->suspended && udc->driver->resume) {
1631 spin_unlock(&udc->lock);
1632 udc->driver->resume(&udc->gadget);
1633 spin_lock(&udc->lock);
1634 udc->suspended = 0;
1635 }
1636 }
1637
1638 if (USBi_UI & intr)
1639 isr_tr_complete_handler(udc);
1640
1641 if (USBi_SLI & intr) {
1642 if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
1643 udc->driver->suspend) {
1644 udc->suspended = 1;
1645 spin_unlock(&udc->lock);
1646 udc->driver->suspend(&udc->gadget);
1647 spin_lock(&udc->lock);
1648 }
1649 }
1650 retval = IRQ_HANDLED;
1651 } else {
1652 retval = IRQ_NONE;
1653 }
1654 spin_unlock(&udc->lock);
1655
1656 return retval;
1657}
1658
1659/**
1660 * udc_release: driver release function
1661 * @dev: device
1662 *
1663 * Currently does nothing
1664 */
1665static void udc_release(struct device *dev)
1666{
1667}
1668
1669/**
1670 * udc_start: initialize gadget role
1671 * @udc: chipidea controller
1672 */
1673static int udc_start(struct ci13xxx *udc)
1674{
1675 struct device *dev = udc->dev;
1676 int retval = 0;
1677
1678 if (!udc)
1679 return -EINVAL;
1680
1681 spin_lock_init(&udc->lock);
1682
1683 udc->gadget.ops = &usb_gadget_ops;
1684 udc->gadget.speed = USB_SPEED_UNKNOWN;
1685 udc->gadget.max_speed = USB_SPEED_HIGH;
1686 udc->gadget.is_otg = 0;
1687 udc->gadget.name = udc->udc_driver->name;
1688
1689 INIT_LIST_HEAD(&udc->gadget.ep_list);
1690
1691 dev_set_name(&udc->gadget.dev, "gadget");
1692 udc->gadget.dev.dma_mask = dev->dma_mask;
1693 udc->gadget.dev.coherent_dma_mask = dev->coherent_dma_mask;
1694 udc->gadget.dev.parent = dev;
1695 udc->gadget.dev.release = udc_release;
1696
1697 /* alloc resources */
1698 udc->qh_pool = dma_pool_create("ci13xxx_qh", dev,
1699 sizeof(struct ci13xxx_qh),
1700 64, CI13XXX_PAGE_SIZE);
1701 if (udc->qh_pool == NULL)
1702 return -ENOMEM;
1703
1704 udc->td_pool = dma_pool_create("ci13xxx_td", dev,
1705 sizeof(struct ci13xxx_td),
1706 64, CI13XXX_PAGE_SIZE);
1707 if (udc->td_pool == NULL) {
1708 retval = -ENOMEM;
1709 goto free_qh_pool;
1710 }
1711
1712 retval = init_eps(udc);
1713 if (retval)
1714 goto free_pools;
1715
1716 udc->gadget.ep0 = &udc->ep0in->ep;
1717
1718 udc->transceiver = usb_get_transceiver();
1719
1720 if (udc->udc_driver->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
1721 if (udc->transceiver == NULL) {
1722 retval = -ENODEV;
1723 goto destroy_eps;
1724 }
1725 }
1726
1727 if (!(udc->udc_driver->flags & CI13XXX_REGS_SHARED)) {
1728 retval = hw_device_reset(udc, USBMODE_CM_DC);
1729 if (retval)
1730 goto put_transceiver;
1731 }
1732
1733 retval = device_register(&udc->gadget.dev);
1734 if (retval) {
1735 put_device(&udc->gadget.dev);
1736 goto put_transceiver;
1737 }
1738
1739 retval = dbg_create_files(&udc->gadget.dev);
1740 if (retval)
1741 goto unreg_device;
1742
1743 if (udc->transceiver) {
1744 retval = otg_set_peripheral(udc->transceiver->otg,
1745 &udc->gadget);
1746 if (retval)
1747 goto remove_dbg;
1748 }
1749
1750 retval = usb_add_gadget_udc(dev, &udc->gadget);
1751 if (retval)
1752 goto remove_trans;
1753
1754 pm_runtime_no_callbacks(&udc->gadget.dev);
1755 pm_runtime_enable(&udc->gadget.dev);
1756
1757 return retval;
1758
1759remove_trans:
1760 if (udc->transceiver) {
1761 otg_set_peripheral(udc->transceiver->otg, NULL);
1762 usb_put_transceiver(udc->transceiver);
1763 }
1764
1765 dev_err(dev, "error = %i\n", retval);
1766remove_dbg:
1767 dbg_remove_files(&udc->gadget.dev);
1768unreg_device:
1769 device_unregister(&udc->gadget.dev);
1770put_transceiver:
1771 if (udc->transceiver)
1772 usb_put_transceiver(udc->transceiver);
1773destroy_eps:
1774 destroy_eps(udc);
1775free_pools:
1776 dma_pool_destroy(udc->td_pool);
1777free_qh_pool:
1778 dma_pool_destroy(udc->qh_pool);
1779 return retval;
1780}
1781
1782/**
1783 * udc_remove: parent remove must call this to remove UDC
1784 *
1785 * No interrupts active, the IRQ has been released
1786 */
1787static void udc_stop(struct ci13xxx *udc)
1788{
1789 if (udc == NULL)
1790 return;
1791
1792 usb_del_gadget_udc(&udc->gadget);
1793
1794 destroy_eps(udc);
1795
1796 dma_pool_destroy(udc->td_pool);
1797 dma_pool_destroy(udc->qh_pool);
1798
1799 if (udc->transceiver) {
1800 otg_set_peripheral(udc->transceiver->otg, NULL);
1801 usb_put_transceiver(udc->transceiver);
1802 }
1803 dbg_remove_files(&udc->gadget.dev);
1804 device_unregister(&udc->gadget.dev);
1805 /* my kobject is dynamic, I swear! */
1806 memset(&udc->gadget, 0, sizeof(udc->gadget));
1807}
1808
1809/**
1810 * ci_hdrc_gadget_init - initialize device related bits
1811 * ci: the controller
1812 *
1813 * This function enables the gadget role, if the device is "device capable".
1814 */
1815int ci_hdrc_gadget_init(struct ci13xxx *ci)
1816{
1817 struct ci_role_driver *rdrv;
1818
1819 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
1820 return -ENXIO;
1821
1822 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
1823 if (!rdrv)
1824 return -ENOMEM;
1825
1826 rdrv->start = udc_start;
1827 rdrv->stop = udc_stop;
1828 rdrv->irq = udc_irq;
1829 rdrv->name = "gadget";
1830 ci->roles[CI_ROLE_GADGET] = rdrv;
1831
1832 return 0;
1833}