1/*
  2 *  Copyright (C) 2002 Intersil Americas Inc.
  3 *  Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
  4 *  Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
  5 *  Copyright (C) 2003 Aurelien Alleaume <slts@free.fr>
  6 *
  7 *  This program is free software; you can redistribute it and/or modify
  8 *  it under the terms of the GNU General Public License as published by
  9 *  the Free Software Foundation; either version 2 of the License
 10 *
 11 *  This program is distributed in the hope that it will be useful,
 12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14 *  GNU General Public License for more details.
 15 *
 16 *  You should have received a copy of the GNU General Public License
 17 *  along with this program; if not, write to the Free Software
 18 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 19 *
 20 */
 21
 22#ifndef _ISLPCI_DEV_H
 23#define _ISLPCI_DEV_H
 24
 25#include <linux/irqreturn.h>
 26#include <linux/netdevice.h>
 27#include <linux/wireless.h>
 28#include <net/iw_handler.h>
 29#include <linux/list.h>
 30#include <linux/mutex.h>
 31
 32#include "isl_38xx.h"
 33#include "isl_oid.h"
 34#include "islpci_mgt.h"
 35
 36/* some states might not be superflous and may be removed when
 37   design is finalized (hvr) */
 38typedef enum {
 39	PRV_STATE_OFF = 0,	/* this means hw_unavailable is != 0 */
 40	PRV_STATE_PREBOOT,	/* we are in a pre-boot state (empty RAM) */
 41	PRV_STATE_BOOT,		/* boot state (fw upload, run fw) */
 42	PRV_STATE_POSTBOOT,	/* after boot state, need reset now */
 43	PRV_STATE_PREINIT,	/* pre-init state */
 44	PRV_STATE_INIT,		/* init state (restore MIB backup to device) */
 45	PRV_STATE_READY,	/* driver&device are in operational state */
 46	PRV_STATE_SLEEP		/* device in sleep mode */
 47} islpci_state_t;
 48
 49/* ACL using MAC address */
 50struct mac_entry {
 51   struct list_head _list;
 52   char addr[ETH_ALEN];
 53};
 54
 55struct islpci_acl {
 56   enum { MAC_POLICY_OPEN=0, MAC_POLICY_ACCEPT=1, MAC_POLICY_REJECT=2 } policy;
 57   struct list_head mac_list;  /* a list of mac_entry */
 58   int size;   /* size of queue */
 59   struct mutex lock;   /* accessed in ioctls and trap_work */
 60};
 61
 62struct islpci_membuf {
 63	int size;                   /* size of memory */
 64	void *mem;                  /* address of memory as seen by CPU */
 65	dma_addr_t pci_addr;        /* address of memory as seen by device */
 66};
 67
 68#define MAX_BSS_WPA_IE_COUNT 64
 69#define MAX_WPA_IE_LEN 64
 70struct islpci_bss_wpa_ie {
 71	struct list_head list;
 72	unsigned long last_update;
 73	u8 bssid[ETH_ALEN];
 74	u8 wpa_ie[MAX_WPA_IE_LEN];
 75	size_t wpa_ie_len;
 76
 77};
 78
 79typedef struct {
 80	spinlock_t slock;	/* generic spinlock; */
 81
 82	u32 priv_oid;
 83
 84	/* our mib cache */
 85	u32 iw_mode;
 86        struct rw_semaphore mib_sem;
 87	void **mib;
 88	char nickname[IW_ESSID_MAX_SIZE+1];
 89
 90	/* Take care of the wireless stats */
 91	struct work_struct stats_work;
 92	struct mutex stats_lock;
 93	/* remember when we last updated the stats */
 94	unsigned long stats_timestamp;
 95	/* The first is accessed under semaphore locking.
 96	 * The second is the clean one we return to iwconfig.
 97	 */
 98	struct iw_statistics local_iwstatistics;
 99	struct iw_statistics iwstatistics;
100
101	struct iw_spy_data spy_data; /* iwspy support */
102
103	struct iw_public_data wireless_data;
104
105	int monitor_type; /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_PRISM */
106
107	struct islpci_acl acl;
108
109	/* PCI bus allocation & configuration members */
110	struct pci_dev *pdev;	/* PCI structure information */
111	char firmware[33];
112
113	void __iomem *device_base;	/* ioremapped device base address */
114
115	/* consistent DMA region */
116	void *driver_mem_address;	/* base DMA address */
117	dma_addr_t device_host_address;	/* base DMA address (bus address) */
118	dma_addr_t device_psm_buffer;	/* host memory for PSM buffering (bus address) */
119
120	/* our network_device structure  */
121	struct net_device *ndev;
122
123	/* device queue interface members */
124	struct isl38xx_cb *control_block;	/* device control block
125							   (== driver_mem_address!) */
126
127	/* Each queue has three indexes:
128	 *   free/index_mgmt/data_rx/tx (called index, see below),
129	 *   driver_curr_frag, and device_curr_frag (in the control block)
130	 * All indexes are ever-increasing, but interpreted modulo the
131	 * device queue size when used.
132	 *   index <= device_curr_frag <= driver_curr_frag  at all times
133	 * For rx queues, [index, device_curr_frag) contains fragments
134	 * that the interrupt processing needs to handle (owned by driver).
135	 * [device_curr_frag, driver_curr_frag) is the free space in the
136	 * rx queue, waiting for data (owned by device).  The driver
137	 * increments driver_curr_frag to indicate to the device that more
138	 * buffers are available.
139	 * If device_curr_frag == driver_curr_frag, no more rx buffers are
140	 * available, and the rx DMA engine of the device is halted.
141	 * For tx queues, [index, device_curr_frag) contains fragments
142	 * where tx is done; they need to be freed (owned by driver).
143	 * [device_curr_frag, driver_curr_frag) contains the frames
144	 * that are being transferred (owned by device).  The driver
145	 * increments driver_curr_frag to indicate that more tx work
146	 * needs to be done.
147	 */
148	u32 index_mgmt_rx;              /* real index mgmt rx queue */
149	u32 index_mgmt_tx;              /* read index mgmt tx queue */
150	u32 free_data_rx;	/* free pointer data rx queue */
151	u32 free_data_tx;	/* free pointer data tx queue */
152	u32 data_low_tx_full;	/* full detected flag */
153
154	/* frame memory buffers for the device queues */
155	struct islpci_membuf mgmt_tx[ISL38XX_CB_MGMT_QSIZE];
156	struct islpci_membuf mgmt_rx[ISL38XX_CB_MGMT_QSIZE];
157	struct sk_buff *data_low_tx[ISL38XX_CB_TX_QSIZE];
158	struct sk_buff *data_low_rx[ISL38XX_CB_RX_QSIZE];
159	dma_addr_t pci_map_tx_address[ISL38XX_CB_TX_QSIZE];
160	dma_addr_t pci_map_rx_address[ISL38XX_CB_RX_QSIZE];
161
162	/* wait for a reset interrupt */
163	wait_queue_head_t reset_done;
164
165	/* used by islpci_mgt_transaction */
166	struct mutex mgmt_lock; /* serialize access to mailbox and wqueue */
167	struct islpci_mgmtframe *mgmt_received;	  /* mbox for incoming frame */
168	wait_queue_head_t mgmt_wqueue;            /* waitqueue for mbox */
169
170	/* state machine */
171	islpci_state_t state;
172	int state_off;		/* enumeration of off-state, if 0 then
173				 * we're not in any off-state */
174
175	/* WPA stuff */
176	int wpa; /* WPA mode enabled */
177	struct list_head bss_wpa_list;
178	int num_bss_wpa;
179	struct mutex wpa_lock;
180	u8 wpa_ie[MAX_WPA_IE_LEN];
181	size_t wpa_ie_len;
182
183	struct work_struct reset_task;
184	int reset_task_pending;
185} islpci_private;
186
187static inline islpci_state_t
188islpci_get_state(islpci_private *priv)
189{
190	/* lock */
191	return priv->state;
192	/* unlock */
193}
194
195islpci_state_t islpci_set_state(islpci_private *priv, islpci_state_t new_state);
196
197#define ISLPCI_TX_TIMEOUT               (2*HZ)
198
199irqreturn_t islpci_interrupt(int, void *);
200
201int prism54_post_setup(islpci_private *, int);
202int islpci_reset(islpci_private *, int);
203
204static inline void
205islpci_trigger(islpci_private *priv)
206{
207	isl38xx_trigger_device(islpci_get_state(priv) == PRV_STATE_SLEEP,
208			       priv->device_base);
209}
210
211int islpci_free_memory(islpci_private *);
212struct net_device *islpci_setup(struct pci_dev *);
213
214#define DRV_NAME	"prism54"
215#define DRV_VERSION	"1.2"
216
217#endif				/* _ISLPCI_DEV_H */