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1// SPDX-License-Identifier: GPL-2.0-or-later
2 /***************************************************************************
3 *
4 * Copyright (C) 2007-2010 SMSC
5 *
6 *****************************************************************************/
7
8#include <linux/module.h>
9#include <linux/kmod.h>
10#include <linux/netdevice.h>
11#include <linux/etherdevice.h>
12#include <linux/ethtool.h>
13#include <linux/mii.h>
14#include <linux/usb.h>
15#include <linux/bitrev.h>
16#include <linux/crc16.h>
17#include <linux/crc32.h>
18#include <linux/usb/usbnet.h>
19#include <linux/slab.h>
20#include <linux/of_net.h>
21#include "smsc75xx.h"
22
23#define SMSC_CHIPNAME "smsc75xx"
24#define SMSC_DRIVER_VERSION "1.0.0"
25#define HS_USB_PKT_SIZE (512)
26#define FS_USB_PKT_SIZE (64)
27#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
28#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
29#define DEFAULT_BULK_IN_DELAY (0x00002000)
30#define MAX_SINGLE_PACKET_SIZE (9000)
31#define LAN75XX_EEPROM_MAGIC (0x7500)
32#define EEPROM_MAC_OFFSET (0x01)
33#define DEFAULT_TX_CSUM_ENABLE (true)
34#define DEFAULT_RX_CSUM_ENABLE (true)
35#define SMSC75XX_INTERNAL_PHY_ID (1)
36#define SMSC75XX_TX_OVERHEAD (8)
37#define MAX_RX_FIFO_SIZE (20 * 1024)
38#define MAX_TX_FIFO_SIZE (12 * 1024)
39#define USB_VENDOR_ID_SMSC (0x0424)
40#define USB_PRODUCT_ID_LAN7500 (0x7500)
41#define USB_PRODUCT_ID_LAN7505 (0x7505)
42#define RXW_PADDING 2
43#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
44 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
45
46#define SUSPEND_SUSPEND0 (0x01)
47#define SUSPEND_SUSPEND1 (0x02)
48#define SUSPEND_SUSPEND2 (0x04)
49#define SUSPEND_SUSPEND3 (0x08)
50#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
51 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
52
53struct smsc75xx_priv {
54 struct usbnet *dev;
55 u32 rfe_ctl;
56 u32 wolopts;
57 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
58 struct mutex dataport_mutex;
59 spinlock_t rfe_ctl_lock;
60 struct work_struct set_multicast;
61 u8 suspend_flags;
62};
63
64struct usb_context {
65 struct usb_ctrlrequest req;
66 struct usbnet *dev;
67};
68
69static bool turbo_mode = true;
70module_param(turbo_mode, bool, 0644);
71MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
72
73static int smsc75xx_link_ok_nopm(struct usbnet *dev);
74static int smsc75xx_phy_gig_workaround(struct usbnet *dev);
75
76static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index,
77 u32 *data, int in_pm)
78{
79 u32 buf;
80 int ret;
81 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
82
83 BUG_ON(!dev);
84
85 if (!in_pm)
86 fn = usbnet_read_cmd;
87 else
88 fn = usbnet_read_cmd_nopm;
89
90 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
91 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
92 0, index, &buf, 4);
93 if (unlikely(ret < 4)) {
94 ret = ret < 0 ? ret : -ENODATA;
95
96 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
97 index, ret);
98 return ret;
99 }
100
101 le32_to_cpus(&buf);
102 *data = buf;
103
104 return ret;
105}
106
107static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index,
108 u32 data, int in_pm)
109{
110 u32 buf;
111 int ret;
112 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
113
114 BUG_ON(!dev);
115
116 if (!in_pm)
117 fn = usbnet_write_cmd;
118 else
119 fn = usbnet_write_cmd_nopm;
120
121 buf = data;
122 cpu_to_le32s(&buf);
123
124 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
125 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
126 0, index, &buf, 4);
127 if (unlikely(ret < 0))
128 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
129 index, ret);
130
131 return ret;
132}
133
134static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index,
135 u32 *data)
136{
137 return __smsc75xx_read_reg(dev, index, data, 1);
138}
139
140static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index,
141 u32 data)
142{
143 return __smsc75xx_write_reg(dev, index, data, 1);
144}
145
146static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
147 u32 *data)
148{
149 return __smsc75xx_read_reg(dev, index, data, 0);
150}
151
152static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
153 u32 data)
154{
155 return __smsc75xx_write_reg(dev, index, data, 0);
156}
157
158/* Loop until the read is completed with timeout
159 * called with phy_mutex held */
160static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev,
161 int in_pm)
162{
163 unsigned long start_time = jiffies;
164 u32 val;
165 int ret;
166
167 do {
168 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm);
169 if (ret < 0) {
170 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
171 return ret;
172 }
173
174 if (!(val & MII_ACCESS_BUSY))
175 return 0;
176 } while (!time_after(jiffies, start_time + HZ));
177
178 return -EIO;
179}
180
181static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
182 int in_pm)
183{
184 struct usbnet *dev = netdev_priv(netdev);
185 u32 val, addr;
186 int ret;
187
188 mutex_lock(&dev->phy_mutex);
189
190 /* confirm MII not busy */
191 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
192 if (ret < 0) {
193 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n");
194 goto done;
195 }
196
197 /* set the address, index & direction (read from PHY) */
198 phy_id &= dev->mii.phy_id_mask;
199 idx &= dev->mii.reg_num_mask;
200 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
201 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
202 | MII_ACCESS_READ | MII_ACCESS_BUSY;
203 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
204 if (ret < 0) {
205 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
206 goto done;
207 }
208
209 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
210 if (ret < 0) {
211 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
212 goto done;
213 }
214
215 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm);
216 if (ret < 0) {
217 netdev_warn(dev->net, "Error reading MII_DATA\n");
218 goto done;
219 }
220
221 ret = (u16)(val & 0xFFFF);
222
223done:
224 mutex_unlock(&dev->phy_mutex);
225 return ret;
226}
227
228static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id,
229 int idx, int regval, int in_pm)
230{
231 struct usbnet *dev = netdev_priv(netdev);
232 u32 val, addr;
233 int ret;
234
235 mutex_lock(&dev->phy_mutex);
236
237 /* confirm MII not busy */
238 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
239 if (ret < 0) {
240 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n");
241 goto done;
242 }
243
244 val = regval;
245 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm);
246 if (ret < 0) {
247 netdev_warn(dev->net, "Error writing MII_DATA\n");
248 goto done;
249 }
250
251 /* set the address, index & direction (write to PHY) */
252 phy_id &= dev->mii.phy_id_mask;
253 idx &= dev->mii.reg_num_mask;
254 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
255 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
256 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
257 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
258 if (ret < 0) {
259 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
260 goto done;
261 }
262
263 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
264 if (ret < 0) {
265 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
266 goto done;
267 }
268
269done:
270 mutex_unlock(&dev->phy_mutex);
271}
272
273static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
274 int idx)
275{
276 return __smsc75xx_mdio_read(netdev, phy_id, idx, 1);
277}
278
279static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
280 int idx, int regval)
281{
282 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1);
283}
284
285static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
286{
287 return __smsc75xx_mdio_read(netdev, phy_id, idx, 0);
288}
289
290static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
291 int regval)
292{
293 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0);
294}
295
296static int smsc75xx_wait_eeprom(struct usbnet *dev)
297{
298 unsigned long start_time = jiffies;
299 u32 val;
300 int ret;
301
302 do {
303 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
304 if (ret < 0) {
305 netdev_warn(dev->net, "Error reading E2P_CMD\n");
306 return ret;
307 }
308
309 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
310 break;
311 udelay(40);
312 } while (!time_after(jiffies, start_time + HZ));
313
314 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
315 netdev_warn(dev->net, "EEPROM read operation timeout\n");
316 return -EIO;
317 }
318
319 return 0;
320}
321
322static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
323{
324 unsigned long start_time = jiffies;
325 u32 val;
326 int ret;
327
328 do {
329 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
330 if (ret < 0) {
331 netdev_warn(dev->net, "Error reading E2P_CMD\n");
332 return ret;
333 }
334
335 if (!(val & E2P_CMD_BUSY))
336 return 0;
337
338 udelay(40);
339 } while (!time_after(jiffies, start_time + HZ));
340
341 netdev_warn(dev->net, "EEPROM is busy\n");
342 return -EIO;
343}
344
345static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
346 u8 *data)
347{
348 u32 val;
349 int i, ret;
350
351 BUG_ON(!dev);
352 BUG_ON(!data);
353
354 ret = smsc75xx_eeprom_confirm_not_busy(dev);
355 if (ret)
356 return ret;
357
358 for (i = 0; i < length; i++) {
359 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
360 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
361 if (ret < 0) {
362 netdev_warn(dev->net, "Error writing E2P_CMD\n");
363 return ret;
364 }
365
366 ret = smsc75xx_wait_eeprom(dev);
367 if (ret < 0)
368 return ret;
369
370 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
371 if (ret < 0) {
372 netdev_warn(dev->net, "Error reading E2P_DATA\n");
373 return ret;
374 }
375
376 data[i] = val & 0xFF;
377 offset++;
378 }
379
380 return 0;
381}
382
383static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
384 u8 *data)
385{
386 u32 val;
387 int i, ret;
388
389 BUG_ON(!dev);
390 BUG_ON(!data);
391
392 ret = smsc75xx_eeprom_confirm_not_busy(dev);
393 if (ret)
394 return ret;
395
396 /* Issue write/erase enable command */
397 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
398 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
399 if (ret < 0) {
400 netdev_warn(dev->net, "Error writing E2P_CMD\n");
401 return ret;
402 }
403
404 ret = smsc75xx_wait_eeprom(dev);
405 if (ret < 0)
406 return ret;
407
408 for (i = 0; i < length; i++) {
409
410 /* Fill data register */
411 val = data[i];
412 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
413 if (ret < 0) {
414 netdev_warn(dev->net, "Error writing E2P_DATA\n");
415 return ret;
416 }
417
418 /* Send "write" command */
419 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
420 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
421 if (ret < 0) {
422 netdev_warn(dev->net, "Error writing E2P_CMD\n");
423 return ret;
424 }
425
426 ret = smsc75xx_wait_eeprom(dev);
427 if (ret < 0)
428 return ret;
429
430 offset++;
431 }
432
433 return 0;
434}
435
436static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
437{
438 int i, ret;
439
440 for (i = 0; i < 100; i++) {
441 u32 dp_sel;
442 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
443 if (ret < 0) {
444 netdev_warn(dev->net, "Error reading DP_SEL\n");
445 return ret;
446 }
447
448 if (dp_sel & DP_SEL_DPRDY)
449 return 0;
450
451 udelay(40);
452 }
453
454 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n");
455
456 return -EIO;
457}
458
459static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
460 u32 length, u32 *buf)
461{
462 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
463 u32 dp_sel;
464 int i, ret;
465
466 mutex_lock(&pdata->dataport_mutex);
467
468 ret = smsc75xx_dataport_wait_not_busy(dev);
469 if (ret < 0) {
470 netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n");
471 goto done;
472 }
473
474 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
475 if (ret < 0) {
476 netdev_warn(dev->net, "Error reading DP_SEL\n");
477 goto done;
478 }
479
480 dp_sel &= ~DP_SEL_RSEL;
481 dp_sel |= ram_select;
482 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
483 if (ret < 0) {
484 netdev_warn(dev->net, "Error writing DP_SEL\n");
485 goto done;
486 }
487
488 for (i = 0; i < length; i++) {
489 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
490 if (ret < 0) {
491 netdev_warn(dev->net, "Error writing DP_ADDR\n");
492 goto done;
493 }
494
495 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
496 if (ret < 0) {
497 netdev_warn(dev->net, "Error writing DP_DATA\n");
498 goto done;
499 }
500
501 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
502 if (ret < 0) {
503 netdev_warn(dev->net, "Error writing DP_CMD\n");
504 goto done;
505 }
506
507 ret = smsc75xx_dataport_wait_not_busy(dev);
508 if (ret < 0) {
509 netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n");
510 goto done;
511 }
512 }
513
514done:
515 mutex_unlock(&pdata->dataport_mutex);
516 return ret;
517}
518
519/* returns hash bit number for given MAC address */
520static u32 smsc75xx_hash(char addr[ETH_ALEN])
521{
522 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
523}
524
525static void smsc75xx_deferred_multicast_write(struct work_struct *param)
526{
527 struct smsc75xx_priv *pdata =
528 container_of(param, struct smsc75xx_priv, set_multicast);
529 struct usbnet *dev = pdata->dev;
530 int ret;
531
532 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
533 pdata->rfe_ctl);
534
535 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
536 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
537
538 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
539 if (ret < 0)
540 netdev_warn(dev->net, "Error writing RFE_CRL\n");
541}
542
543static void smsc75xx_set_multicast(struct net_device *netdev)
544{
545 struct usbnet *dev = netdev_priv(netdev);
546 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
547 unsigned long flags;
548 int i;
549
550 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
551
552 pdata->rfe_ctl &=
553 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
554 pdata->rfe_ctl |= RFE_CTL_AB;
555
556 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
557 pdata->multicast_hash_table[i] = 0;
558
559 if (dev->net->flags & IFF_PROMISC) {
560 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
561 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
562 } else if (dev->net->flags & IFF_ALLMULTI) {
563 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
564 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
565 } else if (!netdev_mc_empty(dev->net)) {
566 struct netdev_hw_addr *ha;
567
568 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n");
569
570 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
571
572 netdev_for_each_mc_addr(ha, netdev) {
573 u32 bitnum = smsc75xx_hash(ha->addr);
574 pdata->multicast_hash_table[bitnum / 32] |=
575 (1 << (bitnum % 32));
576 }
577 } else {
578 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
579 pdata->rfe_ctl |= RFE_CTL_DPF;
580 }
581
582 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
583
584 /* defer register writes to a sleepable context */
585 schedule_work(&pdata->set_multicast);
586}
587
588static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
589 u16 lcladv, u16 rmtadv)
590{
591 u32 flow = 0, fct_flow = 0;
592 int ret;
593
594 if (duplex == DUPLEX_FULL) {
595 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
596
597 if (cap & FLOW_CTRL_TX) {
598 flow = (FLOW_TX_FCEN | 0xFFFF);
599 /* set fct_flow thresholds to 20% and 80% */
600 fct_flow = (8 << 8) | 32;
601 }
602
603 if (cap & FLOW_CTRL_RX)
604 flow |= FLOW_RX_FCEN;
605
606 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
607 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
608 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
609 } else {
610 netif_dbg(dev, link, dev->net, "half duplex\n");
611 }
612
613 ret = smsc75xx_write_reg(dev, FLOW, flow);
614 if (ret < 0) {
615 netdev_warn(dev->net, "Error writing FLOW\n");
616 return ret;
617 }
618
619 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
620 if (ret < 0) {
621 netdev_warn(dev->net, "Error writing FCT_FLOW\n");
622 return ret;
623 }
624
625 return 0;
626}
627
628static int smsc75xx_link_reset(struct usbnet *dev)
629{
630 struct mii_if_info *mii = &dev->mii;
631 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
632 u16 lcladv, rmtadv;
633 int ret;
634
635 /* write to clear phy interrupt status */
636 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
637 PHY_INT_SRC_CLEAR_ALL);
638
639 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
640 if (ret < 0) {
641 netdev_warn(dev->net, "Error writing INT_STS\n");
642 return ret;
643 }
644
645 mii_check_media(mii, 1, 1);
646 mii_ethtool_gset(&dev->mii, &ecmd);
647 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
648 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
649
650 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
651 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
652
653 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
654}
655
656static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
657{
658 u32 intdata;
659
660 if (urb->actual_length != 4) {
661 netdev_warn(dev->net, "unexpected urb length %d\n",
662 urb->actual_length);
663 return;
664 }
665
666 intdata = get_unaligned_le32(urb->transfer_buffer);
667
668 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
669
670 if (intdata & INT_ENP_PHY_INT)
671 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
672 else
673 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
674 intdata);
675}
676
677static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
678{
679 return MAX_EEPROM_SIZE;
680}
681
682static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
683 struct ethtool_eeprom *ee, u8 *data)
684{
685 struct usbnet *dev = netdev_priv(netdev);
686
687 ee->magic = LAN75XX_EEPROM_MAGIC;
688
689 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
690}
691
692static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
693 struct ethtool_eeprom *ee, u8 *data)
694{
695 struct usbnet *dev = netdev_priv(netdev);
696
697 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
698 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n",
699 ee->magic);
700 return -EINVAL;
701 }
702
703 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
704}
705
706static void smsc75xx_ethtool_get_wol(struct net_device *net,
707 struct ethtool_wolinfo *wolinfo)
708{
709 struct usbnet *dev = netdev_priv(net);
710 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
711
712 wolinfo->supported = SUPPORTED_WAKE;
713 wolinfo->wolopts = pdata->wolopts;
714}
715
716static int smsc75xx_ethtool_set_wol(struct net_device *net,
717 struct ethtool_wolinfo *wolinfo)
718{
719 struct usbnet *dev = netdev_priv(net);
720 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
721 int ret;
722
723 if (wolinfo->wolopts & ~SUPPORTED_WAKE)
724 return -EINVAL;
725
726 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
727
728 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
729 if (ret < 0)
730 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
731
732 return ret;
733}
734
735static const struct ethtool_ops smsc75xx_ethtool_ops = {
736 .get_link = usbnet_get_link,
737 .nway_reset = usbnet_nway_reset,
738 .get_drvinfo = usbnet_get_drvinfo,
739 .get_msglevel = usbnet_get_msglevel,
740 .set_msglevel = usbnet_set_msglevel,
741 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
742 .get_eeprom = smsc75xx_ethtool_get_eeprom,
743 .set_eeprom = smsc75xx_ethtool_set_eeprom,
744 .get_wol = smsc75xx_ethtool_get_wol,
745 .set_wol = smsc75xx_ethtool_set_wol,
746 .get_link_ksettings = usbnet_get_link_ksettings_mii,
747 .set_link_ksettings = usbnet_set_link_ksettings_mii,
748};
749
750static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
751{
752 struct usbnet *dev = netdev_priv(netdev);
753
754 if (!netif_running(netdev))
755 return -EINVAL;
756
757 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
758}
759
760static void smsc75xx_init_mac_address(struct usbnet *dev)
761{
762 u8 addr[ETH_ALEN];
763
764 /* maybe the boot loader passed the MAC address in devicetree */
765 if (!platform_get_ethdev_address(&dev->udev->dev, dev->net)) {
766 if (is_valid_ether_addr(dev->net->dev_addr)) {
767 /* device tree values are valid so use them */
768 netif_dbg(dev, ifup, dev->net, "MAC address read from the device tree\n");
769 return;
770 }
771 }
772
773 /* try reading mac address from EEPROM */
774 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, addr) == 0) {
775 eth_hw_addr_set(dev->net, addr);
776 if (is_valid_ether_addr(dev->net->dev_addr)) {
777 /* eeprom values are valid so use them */
778 netif_dbg(dev, ifup, dev->net,
779 "MAC address read from EEPROM\n");
780 return;
781 }
782 }
783
784 /* no useful static MAC address found. generate a random one */
785 eth_hw_addr_random(dev->net);
786 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
787}
788
789static int smsc75xx_set_mac_address(struct usbnet *dev)
790{
791 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
792 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
793 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
794
795 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
796 if (ret < 0) {
797 netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret);
798 return ret;
799 }
800
801 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
802 if (ret < 0) {
803 netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret);
804 return ret;
805 }
806
807 addr_hi |= ADDR_FILTX_FB_VALID;
808 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
809 if (ret < 0) {
810 netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret);
811 return ret;
812 }
813
814 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
815 if (ret < 0)
816 netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret);
817
818 return ret;
819}
820
821static int smsc75xx_phy_initialize(struct usbnet *dev)
822{
823 int bmcr, ret, timeout = 0;
824
825 /* Initialize MII structure */
826 dev->mii.dev = dev->net;
827 dev->mii.mdio_read = smsc75xx_mdio_read;
828 dev->mii.mdio_write = smsc75xx_mdio_write;
829 dev->mii.phy_id_mask = 0x1f;
830 dev->mii.reg_num_mask = 0x1f;
831 dev->mii.supports_gmii = 1;
832 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
833
834 /* reset phy and wait for reset to complete */
835 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
836
837 do {
838 msleep(10);
839 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
840 if (bmcr < 0) {
841 netdev_warn(dev->net, "Error reading MII_BMCR\n");
842 return bmcr;
843 }
844 timeout++;
845 } while ((bmcr & BMCR_RESET) && (timeout < 100));
846
847 if (timeout >= 100) {
848 netdev_warn(dev->net, "timeout on PHY Reset\n");
849 return -EIO;
850 }
851
852 /* phy workaround for gig link */
853 smsc75xx_phy_gig_workaround(dev);
854
855 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
856 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
857 ADVERTISE_PAUSE_ASYM);
858 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
859 ADVERTISE_1000FULL);
860
861 /* read and write to clear phy interrupt status */
862 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
863 if (ret < 0) {
864 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
865 return ret;
866 }
867
868 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
869
870 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
871 PHY_INT_MASK_DEFAULT);
872 mii_nway_restart(&dev->mii);
873
874 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
875 return 0;
876}
877
878static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
879{
880 int ret = 0;
881 u32 buf;
882 bool rxenabled;
883
884 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
885 if (ret < 0) {
886 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
887 return ret;
888 }
889
890 rxenabled = ((buf & MAC_RX_RXEN) != 0);
891
892 if (rxenabled) {
893 buf &= ~MAC_RX_RXEN;
894 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
895 if (ret < 0) {
896 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
897 return ret;
898 }
899 }
900
901 /* add 4 to size for FCS */
902 buf &= ~MAC_RX_MAX_SIZE;
903 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
904
905 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
906 if (ret < 0) {
907 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
908 return ret;
909 }
910
911 if (rxenabled) {
912 buf |= MAC_RX_RXEN;
913 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
914 if (ret < 0) {
915 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
916 return ret;
917 }
918 }
919
920 return 0;
921}
922
923static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
924{
925 struct usbnet *dev = netdev_priv(netdev);
926 int ret;
927
928 ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
929 if (ret < 0) {
930 netdev_warn(dev->net, "Failed to set mac rx frame length\n");
931 return ret;
932 }
933
934 return usbnet_change_mtu(netdev, new_mtu);
935}
936
937/* Enable or disable Rx checksum offload engine */
938static int smsc75xx_set_features(struct net_device *netdev,
939 netdev_features_t features)
940{
941 struct usbnet *dev = netdev_priv(netdev);
942 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
943 unsigned long flags;
944 int ret;
945
946 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
947
948 if (features & NETIF_F_RXCSUM)
949 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
950 else
951 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
952
953 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
954 /* it's racing here! */
955
956 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
957 if (ret < 0) {
958 netdev_warn(dev->net, "Error writing RFE_CTL\n");
959 return ret;
960 }
961 return 0;
962}
963
964static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)
965{
966 int timeout = 0;
967
968 do {
969 u32 buf;
970 int ret;
971
972 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm);
973
974 if (ret < 0) {
975 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
976 return ret;
977 }
978
979 if (buf & PMT_CTL_DEV_RDY)
980 return 0;
981
982 msleep(10);
983 timeout++;
984 } while (timeout < 100);
985
986 netdev_warn(dev->net, "timeout waiting for device ready\n");
987 return -EIO;
988}
989
990static int smsc75xx_phy_gig_workaround(struct usbnet *dev)
991{
992 struct mii_if_info *mii = &dev->mii;
993 int ret = 0, timeout = 0;
994 u32 buf, link_up = 0;
995
996 /* Set the phy in Gig loopback */
997 smsc75xx_mdio_write(dev->net, mii->phy_id, MII_BMCR, 0x4040);
998
999 /* Wait for the link up */
1000 do {
1001 link_up = smsc75xx_link_ok_nopm(dev);
1002 usleep_range(10000, 20000);
1003 timeout++;
1004 } while ((!link_up) && (timeout < 1000));
1005
1006 if (timeout >= 1000) {
1007 netdev_warn(dev->net, "Timeout waiting for PHY link up\n");
1008 return -EIO;
1009 }
1010
1011 /* phy reset */
1012 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1013 if (ret < 0) {
1014 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1015 return ret;
1016 }
1017
1018 buf |= PMT_CTL_PHY_RST;
1019
1020 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
1021 if (ret < 0) {
1022 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1023 return ret;
1024 }
1025
1026 timeout = 0;
1027 do {
1028 usleep_range(10000, 20000);
1029 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1030 if (ret < 0) {
1031 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n",
1032 ret);
1033 return ret;
1034 }
1035 timeout++;
1036 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1037
1038 if (timeout >= 100) {
1039 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
1040 return -EIO;
1041 }
1042
1043 return 0;
1044}
1045
1046static int smsc75xx_reset(struct usbnet *dev)
1047{
1048 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1049 u32 buf;
1050 int ret = 0, timeout;
1051
1052 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n");
1053
1054 ret = smsc75xx_wait_ready(dev, 0);
1055 if (ret < 0) {
1056 netdev_warn(dev->net, "device not ready in smsc75xx_reset\n");
1057 return ret;
1058 }
1059
1060 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1061 if (ret < 0) {
1062 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1063 return ret;
1064 }
1065
1066 buf |= HW_CFG_LRST;
1067
1068 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1069 if (ret < 0) {
1070 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1071 return ret;
1072 }
1073
1074 timeout = 0;
1075 do {
1076 msleep(10);
1077 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1078 if (ret < 0) {
1079 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1080 return ret;
1081 }
1082 timeout++;
1083 } while ((buf & HW_CFG_LRST) && (timeout < 100));
1084
1085 if (timeout >= 100) {
1086 netdev_warn(dev->net, "timeout on completion of Lite Reset\n");
1087 return -EIO;
1088 }
1089
1090 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n");
1091
1092 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1093 if (ret < 0) {
1094 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1095 return ret;
1096 }
1097
1098 buf |= PMT_CTL_PHY_RST;
1099
1100 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
1101 if (ret < 0) {
1102 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1103 return ret;
1104 }
1105
1106 timeout = 0;
1107 do {
1108 msleep(10);
1109 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1110 if (ret < 0) {
1111 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1112 return ret;
1113 }
1114 timeout++;
1115 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1116
1117 if (timeout >= 100) {
1118 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
1119 return -EIO;
1120 }
1121
1122 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n");
1123
1124 ret = smsc75xx_set_mac_address(dev);
1125 if (ret < 0) {
1126 netdev_warn(dev->net, "Failed to set mac address\n");
1127 return ret;
1128 }
1129
1130 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1131 dev->net->dev_addr);
1132
1133 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1134 if (ret < 0) {
1135 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1136 return ret;
1137 }
1138
1139 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1140 buf);
1141
1142 buf |= HW_CFG_BIR;
1143
1144 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1145 if (ret < 0) {
1146 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1147 return ret;
1148 }
1149
1150 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1151 if (ret < 0) {
1152 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1153 return ret;
1154 }
1155
1156 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n",
1157 buf);
1158
1159 if (!turbo_mode) {
1160 buf = 0;
1161 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
1162 } else if (dev->udev->speed == USB_SPEED_HIGH) {
1163 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
1164 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
1165 } else {
1166 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
1167 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
1168 }
1169
1170 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1171 (ulong)dev->rx_urb_size);
1172
1173 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
1174 if (ret < 0) {
1175 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
1176 return ret;
1177 }
1178
1179 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
1180 if (ret < 0) {
1181 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
1182 return ret;
1183 }
1184
1185 netif_dbg(dev, ifup, dev->net,
1186 "Read Value from BURST_CAP after writing: 0x%08x\n", buf);
1187
1188 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
1189 if (ret < 0) {
1190 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret);
1191 return ret;
1192 }
1193
1194 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
1195 if (ret < 0) {
1196 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
1197 return ret;
1198 }
1199
1200 netif_dbg(dev, ifup, dev->net,
1201 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf);
1202
1203 if (turbo_mode) {
1204 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1205 if (ret < 0) {
1206 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1207 return ret;
1208 }
1209
1210 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1211
1212 buf |= (HW_CFG_MEF | HW_CFG_BCE);
1213
1214 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1215 if (ret < 0) {
1216 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1217 return ret;
1218 }
1219
1220 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1221 if (ret < 0) {
1222 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1223 return ret;
1224 }
1225
1226 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1227 }
1228
1229 /* set FIFO sizes */
1230 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
1231 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
1232 if (ret < 0) {
1233 netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret);
1234 return ret;
1235 }
1236
1237 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf);
1238
1239 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
1240 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
1241 if (ret < 0) {
1242 netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret);
1243 return ret;
1244 }
1245
1246 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf);
1247
1248 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
1249 if (ret < 0) {
1250 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret);
1251 return ret;
1252 }
1253
1254 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
1255 if (ret < 0) {
1256 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
1257 return ret;
1258 }
1259
1260 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf);
1261
1262 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
1263 if (ret < 0) {
1264 netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret);
1265 return ret;
1266 }
1267
1268 /* only set default GPIO/LED settings if no EEPROM is detected */
1269 if (!(buf & E2P_CMD_LOADED)) {
1270 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
1271 if (ret < 0) {
1272 netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret);
1273 return ret;
1274 }
1275
1276 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
1277 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
1278
1279 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
1280 if (ret < 0) {
1281 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret);
1282 return ret;
1283 }
1284 }
1285
1286 ret = smsc75xx_write_reg(dev, FLOW, 0);
1287 if (ret < 0) {
1288 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
1289 return ret;
1290 }
1291
1292 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
1293 if (ret < 0) {
1294 netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret);
1295 return ret;
1296 }
1297
1298 /* Don't need rfe_ctl_lock during initialisation */
1299 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1300 if (ret < 0) {
1301 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1302 return ret;
1303 }
1304
1305 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
1306
1307 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1308 if (ret < 0) {
1309 netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret);
1310 return ret;
1311 }
1312
1313 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1314 if (ret < 0) {
1315 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1316 return ret;
1317 }
1318
1319 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n",
1320 pdata->rfe_ctl);
1321
1322 /* Enable or disable checksum offload engines */
1323 smsc75xx_set_features(dev->net, dev->net->features);
1324
1325 smsc75xx_set_multicast(dev->net);
1326
1327 ret = smsc75xx_phy_initialize(dev);
1328 if (ret < 0) {
1329 netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret);
1330 return ret;
1331 }
1332
1333 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
1334 if (ret < 0) {
1335 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
1336 return ret;
1337 }
1338
1339 /* enable PHY interrupts */
1340 buf |= INT_ENP_PHY_INT;
1341
1342 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
1343 if (ret < 0) {
1344 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1345 return ret;
1346 }
1347
1348 /* allow mac to detect speed and duplex from phy */
1349 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
1350 if (ret < 0) {
1351 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
1352 return ret;
1353 }
1354
1355 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1356 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
1357 if (ret < 0) {
1358 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret);
1359 return ret;
1360 }
1361
1362 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
1363 if (ret < 0) {
1364 netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret);
1365 return ret;
1366 }
1367
1368 buf |= MAC_TX_TXEN;
1369
1370 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
1371 if (ret < 0) {
1372 netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret);
1373 return ret;
1374 }
1375
1376 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf);
1377
1378 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
1379 if (ret < 0) {
1380 netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret);
1381 return ret;
1382 }
1383
1384 buf |= FCT_TX_CTL_EN;
1385
1386 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
1387 if (ret < 0) {
1388 netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret);
1389 return ret;
1390 }
1391
1392 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf);
1393
1394 ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
1395 if (ret < 0) {
1396 netdev_warn(dev->net, "Failed to set max rx frame length\n");
1397 return ret;
1398 }
1399
1400 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
1401 if (ret < 0) {
1402 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
1403 return ret;
1404 }
1405
1406 buf |= MAC_RX_RXEN;
1407
1408 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
1409 if (ret < 0) {
1410 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
1411 return ret;
1412 }
1413
1414 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf);
1415
1416 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
1417 if (ret < 0) {
1418 netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret);
1419 return ret;
1420 }
1421
1422 buf |= FCT_RX_CTL_EN;
1423
1424 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1425 if (ret < 0) {
1426 netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret);
1427 return ret;
1428 }
1429
1430 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf);
1431
1432 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n");
1433 return 0;
1434}
1435
1436static const struct net_device_ops smsc75xx_netdev_ops = {
1437 .ndo_open = usbnet_open,
1438 .ndo_stop = usbnet_stop,
1439 .ndo_start_xmit = usbnet_start_xmit,
1440 .ndo_tx_timeout = usbnet_tx_timeout,
1441 .ndo_get_stats64 = dev_get_tstats64,
1442 .ndo_change_mtu = smsc75xx_change_mtu,
1443 .ndo_set_mac_address = eth_mac_addr,
1444 .ndo_validate_addr = eth_validate_addr,
1445 .ndo_eth_ioctl = smsc75xx_ioctl,
1446 .ndo_set_rx_mode = smsc75xx_set_multicast,
1447 .ndo_set_features = smsc75xx_set_features,
1448};
1449
1450static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1451{
1452 struct smsc75xx_priv *pdata = NULL;
1453 int ret;
1454
1455 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1456
1457 ret = usbnet_get_endpoints(dev, intf);
1458 if (ret < 0) {
1459 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1460 return ret;
1461 }
1462
1463 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1464 GFP_KERNEL);
1465
1466 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1467 if (!pdata)
1468 return -ENOMEM;
1469
1470 pdata->dev = dev;
1471
1472 spin_lock_init(&pdata->rfe_ctl_lock);
1473 mutex_init(&pdata->dataport_mutex);
1474
1475 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1476
1477 if (DEFAULT_TX_CSUM_ENABLE)
1478 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1479
1480 if (DEFAULT_RX_CSUM_ENABLE)
1481 dev->net->features |= NETIF_F_RXCSUM;
1482
1483 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1484 NETIF_F_RXCSUM;
1485
1486 ret = smsc75xx_wait_ready(dev, 0);
1487 if (ret < 0) {
1488 netdev_warn(dev->net, "device not ready in smsc75xx_bind\n");
1489 goto free_pdata;
1490 }
1491
1492 smsc75xx_init_mac_address(dev);
1493
1494 /* Init all registers */
1495 ret = smsc75xx_reset(dev);
1496 if (ret < 0) {
1497 netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret);
1498 goto cancel_work;
1499 }
1500
1501 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1502 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1503 dev->net->flags |= IFF_MULTICAST;
1504 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1505 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1506 dev->net->max_mtu = MAX_SINGLE_PACKET_SIZE;
1507 return 0;
1508
1509cancel_work:
1510 cancel_work_sync(&pdata->set_multicast);
1511free_pdata:
1512 kfree(pdata);
1513 dev->data[0] = 0;
1514 return ret;
1515}
1516
1517static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1518{
1519 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1520 if (pdata) {
1521 cancel_work_sync(&pdata->set_multicast);
1522 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1523 kfree(pdata);
1524 dev->data[0] = 0;
1525 }
1526}
1527
1528static u16 smsc_crc(const u8 *buffer, size_t len)
1529{
1530 return bitrev16(crc16(0xFFFF, buffer, len));
1531}
1532
1533static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg,
1534 u32 wuf_mask1)
1535{
1536 int cfg_base = WUF_CFGX + filter * 4;
1537 int mask_base = WUF_MASKX + filter * 16;
1538 int ret;
1539
1540 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg);
1541 if (ret < 0) {
1542 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1543 return ret;
1544 }
1545
1546 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1);
1547 if (ret < 0) {
1548 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1549 return ret;
1550 }
1551
1552 ret = smsc75xx_write_reg(dev, mask_base + 4, 0);
1553 if (ret < 0) {
1554 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1555 return ret;
1556 }
1557
1558 ret = smsc75xx_write_reg(dev, mask_base + 8, 0);
1559 if (ret < 0) {
1560 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1561 return ret;
1562 }
1563
1564 ret = smsc75xx_write_reg(dev, mask_base + 12, 0);
1565 if (ret < 0) {
1566 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1567 return ret;
1568 }
1569
1570 return 0;
1571}
1572
1573static int smsc75xx_enter_suspend0(struct usbnet *dev)
1574{
1575 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1576 u32 val;
1577 int ret;
1578
1579 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1580 if (ret < 0) {
1581 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1582 return ret;
1583 }
1584
1585 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST));
1586 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS;
1587
1588 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1589 if (ret < 0) {
1590 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1591 return ret;
1592 }
1593
1594 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1595
1596 return 0;
1597}
1598
1599static int smsc75xx_enter_suspend1(struct usbnet *dev)
1600{
1601 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1602 u32 val;
1603 int ret;
1604
1605 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1606 if (ret < 0) {
1607 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1608 return ret;
1609 }
1610
1611 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1612 val |= PMT_CTL_SUS_MODE_1;
1613
1614 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1615 if (ret < 0) {
1616 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1617 return ret;
1618 }
1619
1620 /* clear wol status, enable energy detection */
1621 val &= ~PMT_CTL_WUPS;
1622 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1623
1624 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1625 if (ret < 0) {
1626 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1627 return ret;
1628 }
1629
1630 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1631
1632 return 0;
1633}
1634
1635static int smsc75xx_enter_suspend2(struct usbnet *dev)
1636{
1637 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1638 u32 val;
1639 int ret;
1640
1641 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1642 if (ret < 0) {
1643 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1644 return ret;
1645 }
1646
1647 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1648 val |= PMT_CTL_SUS_MODE_2;
1649
1650 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1651 if (ret < 0) {
1652 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1653 return ret;
1654 }
1655
1656 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1657
1658 return 0;
1659}
1660
1661static int smsc75xx_enter_suspend3(struct usbnet *dev)
1662{
1663 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1664 u32 val;
1665 int ret;
1666
1667 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val);
1668 if (ret < 0) {
1669 netdev_warn(dev->net, "Error reading FCT_RX_CTL\n");
1670 return ret;
1671 }
1672
1673 if (val & FCT_RX_CTL_RXUSED) {
1674 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n");
1675 return -EBUSY;
1676 }
1677
1678 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1679 if (ret < 0) {
1680 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1681 return ret;
1682 }
1683
1684 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1685 val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN;
1686
1687 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1688 if (ret < 0) {
1689 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1690 return ret;
1691 }
1692
1693 /* clear wol status */
1694 val &= ~PMT_CTL_WUPS;
1695 val |= PMT_CTL_WUPS_WOL;
1696
1697 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1698 if (ret < 0) {
1699 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1700 return ret;
1701 }
1702
1703 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1704
1705 return 0;
1706}
1707
1708static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1709{
1710 struct mii_if_info *mii = &dev->mii;
1711 int ret;
1712
1713 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
1714
1715 /* read to clear */
1716 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
1717 if (ret < 0) {
1718 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
1719 return ret;
1720 }
1721
1722 /* enable interrupt source */
1723 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
1724 if (ret < 0) {
1725 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n");
1726 return ret;
1727 }
1728
1729 ret |= mask;
1730
1731 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1732
1733 return 0;
1734}
1735
1736static int smsc75xx_link_ok_nopm(struct usbnet *dev)
1737{
1738 struct mii_if_info *mii = &dev->mii;
1739 int ret;
1740
1741 /* first, a dummy read, needed to latch some MII phys */
1742 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1743 if (ret < 0) {
1744 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1745 return ret;
1746 }
1747
1748 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1749 if (ret < 0) {
1750 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1751 return ret;
1752 }
1753
1754 return !!(ret & BMSR_LSTATUS);
1755}
1756
1757static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up)
1758{
1759 int ret;
1760
1761 if (!netif_running(dev->net)) {
1762 /* interface is ifconfig down so fully power down hw */
1763 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1764 return smsc75xx_enter_suspend2(dev);
1765 }
1766
1767 if (!link_up) {
1768 /* link is down so enter EDPD mode */
1769 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1770
1771 /* enable PHY wakeup events for if cable is attached */
1772 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1773 PHY_INT_MASK_ANEG_COMP);
1774 if (ret < 0) {
1775 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1776 return ret;
1777 }
1778
1779 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1780 return smsc75xx_enter_suspend1(dev);
1781 }
1782
1783 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1784 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1785 PHY_INT_MASK_LINK_DOWN);
1786 if (ret < 0) {
1787 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1788 return ret;
1789 }
1790
1791 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1792 return smsc75xx_enter_suspend3(dev);
1793}
1794
1795static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1796{
1797 struct usbnet *dev = usb_get_intfdata(intf);
1798 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1799 u32 val, link_up;
1800 int ret;
1801
1802 ret = usbnet_suspend(intf, message);
1803 if (ret < 0) {
1804 netdev_warn(dev->net, "usbnet_suspend error\n");
1805 return ret;
1806 }
1807
1808 if (pdata->suspend_flags) {
1809 netdev_warn(dev->net, "error during last resume\n");
1810 pdata->suspend_flags = 0;
1811 }
1812
1813 /* determine if link is up using only _nopm functions */
1814 link_up = smsc75xx_link_ok_nopm(dev);
1815
1816 if (message.event == PM_EVENT_AUTO_SUSPEND) {
1817 ret = smsc75xx_autosuspend(dev, link_up);
1818 goto done;
1819 }
1820
1821 /* if we get this far we're not autosuspending */
1822 /* if no wol options set, or if link is down and we're not waking on
1823 * PHY activity, enter lowest power SUSPEND2 mode
1824 */
1825 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1826 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1827 netdev_info(dev->net, "entering SUSPEND2 mode\n");
1828
1829 /* disable energy detect (link up) & wake up events */
1830 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1831 if (ret < 0) {
1832 netdev_warn(dev->net, "Error reading WUCSR\n");
1833 goto done;
1834 }
1835
1836 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1837
1838 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1839 if (ret < 0) {
1840 netdev_warn(dev->net, "Error writing WUCSR\n");
1841 goto done;
1842 }
1843
1844 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1845 if (ret < 0) {
1846 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1847 goto done;
1848 }
1849
1850 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1851
1852 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1853 if (ret < 0) {
1854 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1855 goto done;
1856 }
1857
1858 ret = smsc75xx_enter_suspend2(dev);
1859 goto done;
1860 }
1861
1862 if (pdata->wolopts & WAKE_PHY) {
1863 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1864 (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN));
1865 if (ret < 0) {
1866 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1867 goto done;
1868 }
1869
1870 /* if link is down then configure EDPD and enter SUSPEND1,
1871 * otherwise enter SUSPEND0 below
1872 */
1873 if (!link_up) {
1874 struct mii_if_info *mii = &dev->mii;
1875 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1876
1877 /* enable energy detect power-down mode */
1878 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id,
1879 PHY_MODE_CTRL_STS);
1880 if (ret < 0) {
1881 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n");
1882 goto done;
1883 }
1884
1885 ret |= MODE_CTRL_STS_EDPWRDOWN;
1886
1887 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id,
1888 PHY_MODE_CTRL_STS, ret);
1889
1890 /* enter SUSPEND1 mode */
1891 ret = smsc75xx_enter_suspend1(dev);
1892 goto done;
1893 }
1894 }
1895
1896 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) {
1897 int i, filter = 0;
1898
1899 /* disable all filters */
1900 for (i = 0; i < WUF_NUM; i++) {
1901 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0);
1902 if (ret < 0) {
1903 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1904 goto done;
1905 }
1906 }
1907
1908 if (pdata->wolopts & WAKE_MCAST) {
1909 const u8 mcast[] = {0x01, 0x00, 0x5E};
1910 netdev_info(dev->net, "enabling multicast detection\n");
1911
1912 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST
1913 | smsc_crc(mcast, 3);
1914 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007);
1915 if (ret < 0) {
1916 netdev_warn(dev->net, "Error writing wakeup filter\n");
1917 goto done;
1918 }
1919 }
1920
1921 if (pdata->wolopts & WAKE_ARP) {
1922 const u8 arp[] = {0x08, 0x06};
1923 netdev_info(dev->net, "enabling ARP detection\n");
1924
1925 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16)
1926 | smsc_crc(arp, 2);
1927 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003);
1928 if (ret < 0) {
1929 netdev_warn(dev->net, "Error writing wakeup filter\n");
1930 goto done;
1931 }
1932 }
1933
1934 /* clear any pending pattern match packet status */
1935 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1936 if (ret < 0) {
1937 netdev_warn(dev->net, "Error reading WUCSR\n");
1938 goto done;
1939 }
1940
1941 val |= WUCSR_WUFR;
1942
1943 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1944 if (ret < 0) {
1945 netdev_warn(dev->net, "Error writing WUCSR\n");
1946 goto done;
1947 }
1948
1949 netdev_info(dev->net, "enabling packet match detection\n");
1950 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1951 if (ret < 0) {
1952 netdev_warn(dev->net, "Error reading WUCSR\n");
1953 goto done;
1954 }
1955
1956 val |= WUCSR_WUEN;
1957
1958 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1959 if (ret < 0) {
1960 netdev_warn(dev->net, "Error writing WUCSR\n");
1961 goto done;
1962 }
1963 } else {
1964 netdev_info(dev->net, "disabling packet match detection\n");
1965 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1966 if (ret < 0) {
1967 netdev_warn(dev->net, "Error reading WUCSR\n");
1968 goto done;
1969 }
1970
1971 val &= ~WUCSR_WUEN;
1972
1973 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1974 if (ret < 0) {
1975 netdev_warn(dev->net, "Error writing WUCSR\n");
1976 goto done;
1977 }
1978 }
1979
1980 /* disable magic, bcast & unicast wakeup sources */
1981 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1982 if (ret < 0) {
1983 netdev_warn(dev->net, "Error reading WUCSR\n");
1984 goto done;
1985 }
1986
1987 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN);
1988
1989 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1990 if (ret < 0) {
1991 netdev_warn(dev->net, "Error writing WUCSR\n");
1992 goto done;
1993 }
1994
1995 if (pdata->wolopts & WAKE_PHY) {
1996 netdev_info(dev->net, "enabling PHY wakeup\n");
1997
1998 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1999 if (ret < 0) {
2000 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2001 goto done;
2002 }
2003
2004 /* clear wol status, enable energy detection */
2005 val &= ~PMT_CTL_WUPS;
2006 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
2007
2008 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2009 if (ret < 0) {
2010 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2011 goto done;
2012 }
2013 }
2014
2015 if (pdata->wolopts & WAKE_MAGIC) {
2016 netdev_info(dev->net, "enabling magic packet wakeup\n");
2017 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2018 if (ret < 0) {
2019 netdev_warn(dev->net, "Error reading WUCSR\n");
2020 goto done;
2021 }
2022
2023 /* clear any pending magic packet status */
2024 val |= WUCSR_MPR | WUCSR_MPEN;
2025
2026 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2027 if (ret < 0) {
2028 netdev_warn(dev->net, "Error writing WUCSR\n");
2029 goto done;
2030 }
2031 }
2032
2033 if (pdata->wolopts & WAKE_BCAST) {
2034 netdev_info(dev->net, "enabling broadcast detection\n");
2035 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2036 if (ret < 0) {
2037 netdev_warn(dev->net, "Error reading WUCSR\n");
2038 goto done;
2039 }
2040
2041 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN;
2042
2043 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2044 if (ret < 0) {
2045 netdev_warn(dev->net, "Error writing WUCSR\n");
2046 goto done;
2047 }
2048 }
2049
2050 if (pdata->wolopts & WAKE_UCAST) {
2051 netdev_info(dev->net, "enabling unicast detection\n");
2052 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2053 if (ret < 0) {
2054 netdev_warn(dev->net, "Error reading WUCSR\n");
2055 goto done;
2056 }
2057
2058 val |= WUCSR_WUFR | WUCSR_PFDA_EN;
2059
2060 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2061 if (ret < 0) {
2062 netdev_warn(dev->net, "Error writing WUCSR\n");
2063 goto done;
2064 }
2065 }
2066
2067 /* enable receiver to enable frame reception */
2068 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val);
2069 if (ret < 0) {
2070 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
2071 goto done;
2072 }
2073
2074 val |= MAC_RX_RXEN;
2075
2076 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val);
2077 if (ret < 0) {
2078 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
2079 goto done;
2080 }
2081
2082 /* some wol options are enabled, so enter SUSPEND0 */
2083 netdev_info(dev->net, "entering SUSPEND0 mode\n");
2084 ret = smsc75xx_enter_suspend0(dev);
2085
2086done:
2087 /*
2088 * TODO: resume() might need to handle the suspend failure
2089 * in system sleep
2090 */
2091 if (ret && PMSG_IS_AUTO(message))
2092 usbnet_resume(intf);
2093 return ret;
2094}
2095
2096static int smsc75xx_resume(struct usb_interface *intf)
2097{
2098 struct usbnet *dev = usb_get_intfdata(intf);
2099 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
2100 u8 suspend_flags = pdata->suspend_flags;
2101 int ret;
2102 u32 val;
2103
2104 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
2105
2106 /* do this first to ensure it's cleared even in error case */
2107 pdata->suspend_flags = 0;
2108
2109 if (suspend_flags & SUSPEND_ALLMODES) {
2110 /* Disable wakeup sources */
2111 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2112 if (ret < 0) {
2113 netdev_warn(dev->net, "Error reading WUCSR\n");
2114 return ret;
2115 }
2116
2117 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN
2118 | WUCSR_BCST_EN);
2119
2120 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2121 if (ret < 0) {
2122 netdev_warn(dev->net, "Error writing WUCSR\n");
2123 return ret;
2124 }
2125
2126 /* clear wake-up status */
2127 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2128 if (ret < 0) {
2129 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2130 return ret;
2131 }
2132
2133 val &= ~PMT_CTL_WOL_EN;
2134 val |= PMT_CTL_WUPS;
2135
2136 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2137 if (ret < 0) {
2138 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2139 return ret;
2140 }
2141 }
2142
2143 if (suspend_flags & SUSPEND_SUSPEND2) {
2144 netdev_info(dev->net, "resuming from SUSPEND2\n");
2145
2146 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2147 if (ret < 0) {
2148 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2149 return ret;
2150 }
2151
2152 val |= PMT_CTL_PHY_PWRUP;
2153
2154 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2155 if (ret < 0) {
2156 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2157 return ret;
2158 }
2159 }
2160
2161 ret = smsc75xx_wait_ready(dev, 1);
2162 if (ret < 0) {
2163 netdev_warn(dev->net, "device not ready in smsc75xx_resume\n");
2164 return ret;
2165 }
2166
2167 return usbnet_resume(intf);
2168}
2169
2170static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
2171 u32 rx_cmd_a, u32 rx_cmd_b)
2172{
2173 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2174 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
2175 skb->ip_summed = CHECKSUM_NONE;
2176 } else {
2177 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
2178 skb->ip_summed = CHECKSUM_COMPLETE;
2179 }
2180}
2181
2182static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
2183{
2184 /* This check is no longer done by usbnet */
2185 if (skb->len < dev->net->hard_header_len)
2186 return 0;
2187
2188 while (skb->len > 0) {
2189 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2190 struct sk_buff *ax_skb;
2191 unsigned char *packet;
2192
2193 rx_cmd_a = get_unaligned_le32(skb->data);
2194 skb_pull(skb, 4);
2195
2196 rx_cmd_b = get_unaligned_le32(skb->data);
2197 skb_pull(skb, 4 + RXW_PADDING);
2198
2199 packet = skb->data;
2200
2201 /* get the packet length */
2202 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
2203 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2204
2205 if (unlikely(size > skb->len)) {
2206 netif_dbg(dev, rx_err, dev->net,
2207 "size err rx_cmd_a=0x%08x\n",
2208 rx_cmd_a);
2209 return 0;
2210 }
2211
2212 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
2213 netif_dbg(dev, rx_err, dev->net,
2214 "Error rx_cmd_a=0x%08x\n", rx_cmd_a);
2215 dev->net->stats.rx_errors++;
2216 dev->net->stats.rx_dropped++;
2217
2218 if (rx_cmd_a & RX_CMD_A_FCS)
2219 dev->net->stats.rx_crc_errors++;
2220 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
2221 dev->net->stats.rx_frame_errors++;
2222 } else {
2223 /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */
2224 if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) {
2225 netif_dbg(dev, rx_err, dev->net,
2226 "size err rx_cmd_a=0x%08x\n",
2227 rx_cmd_a);
2228 return 0;
2229 }
2230
2231 /* last frame in this batch */
2232 if (skb->len == size) {
2233 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
2234 rx_cmd_b);
2235
2236 skb_trim(skb, skb->len - 4); /* remove fcs */
2237 skb->truesize = size + sizeof(struct sk_buff);
2238
2239 return 1;
2240 }
2241
2242 ax_skb = skb_clone(skb, GFP_ATOMIC);
2243 if (unlikely(!ax_skb)) {
2244 netdev_warn(dev->net, "Error allocating skb\n");
2245 return 0;
2246 }
2247
2248 ax_skb->len = size;
2249 ax_skb->data = packet;
2250 skb_set_tail_pointer(ax_skb, size);
2251
2252 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
2253 rx_cmd_b);
2254
2255 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2256 ax_skb->truesize = size + sizeof(struct sk_buff);
2257
2258 usbnet_skb_return(dev, ax_skb);
2259 }
2260
2261 skb_pull(skb, size);
2262
2263 /* padding bytes before the next frame starts */
2264 if (skb->len)
2265 skb_pull(skb, align_count);
2266 }
2267
2268 return 1;
2269}
2270
2271static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
2272 struct sk_buff *skb, gfp_t flags)
2273{
2274 u32 tx_cmd_a, tx_cmd_b;
2275 void *ptr;
2276
2277 if (skb_cow_head(skb, SMSC75XX_TX_OVERHEAD)) {
2278 dev_kfree_skb_any(skb);
2279 return NULL;
2280 }
2281
2282 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
2283
2284 if (skb->ip_summed == CHECKSUM_PARTIAL)
2285 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
2286
2287 if (skb_is_gso(skb)) {
2288 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
2289 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
2290
2291 tx_cmd_a |= TX_CMD_A_LSO;
2292 } else {
2293 tx_cmd_b = 0;
2294 }
2295
2296 ptr = skb_push(skb, 8);
2297 put_unaligned_le32(tx_cmd_a, ptr);
2298 put_unaligned_le32(tx_cmd_b, ptr + 4);
2299
2300 return skb;
2301}
2302
2303static int smsc75xx_manage_power(struct usbnet *dev, int on)
2304{
2305 dev->intf->needs_remote_wakeup = on;
2306 return 0;
2307}
2308
2309static const struct driver_info smsc75xx_info = {
2310 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
2311 .bind = smsc75xx_bind,
2312 .unbind = smsc75xx_unbind,
2313 .link_reset = smsc75xx_link_reset,
2314 .reset = smsc75xx_reset,
2315 .rx_fixup = smsc75xx_rx_fixup,
2316 .tx_fixup = smsc75xx_tx_fixup,
2317 .status = smsc75xx_status,
2318 .manage_power = smsc75xx_manage_power,
2319 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2320};
2321
2322static const struct usb_device_id products[] = {
2323 {
2324 /* SMSC7500 USB Gigabit Ethernet Device */
2325 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
2326 .driver_info = (unsigned long) &smsc75xx_info,
2327 },
2328 {
2329 /* SMSC7500 USB Gigabit Ethernet Device */
2330 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
2331 .driver_info = (unsigned long) &smsc75xx_info,
2332 },
2333 { }, /* END */
2334};
2335MODULE_DEVICE_TABLE(usb, products);
2336
2337static struct usb_driver smsc75xx_driver = {
2338 .name = SMSC_CHIPNAME,
2339 .id_table = products,
2340 .probe = usbnet_probe,
2341 .suspend = smsc75xx_suspend,
2342 .resume = smsc75xx_resume,
2343 .reset_resume = smsc75xx_resume,
2344 .disconnect = usbnet_disconnect,
2345 .disable_hub_initiated_lpm = 1,
2346 .supports_autosuspend = 1,
2347};
2348
2349module_usb_driver(smsc75xx_driver);
2350
2351MODULE_AUTHOR("Nancy Lin");
2352MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2353MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
2354MODULE_LICENSE("GPL");
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
31#include <linux/slab.h>
32#include "smsc75xx.h"
33
34#define SMSC_CHIPNAME "smsc75xx"
35#define SMSC_DRIVER_VERSION "1.0.0"
36#define HS_USB_PKT_SIZE (512)
37#define FS_USB_PKT_SIZE (64)
38#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40#define DEFAULT_BULK_IN_DELAY (0x00002000)
41#define MAX_SINGLE_PACKET_SIZE (9000)
42#define LAN75XX_EEPROM_MAGIC (0x7500)
43#define EEPROM_MAC_OFFSET (0x01)
44#define DEFAULT_TX_CSUM_ENABLE (true)
45#define DEFAULT_RX_CSUM_ENABLE (true)
46#define DEFAULT_TSO_ENABLE (true)
47#define SMSC75XX_INTERNAL_PHY_ID (1)
48#define SMSC75XX_TX_OVERHEAD (8)
49#define MAX_RX_FIFO_SIZE (20 * 1024)
50#define MAX_TX_FIFO_SIZE (12 * 1024)
51#define USB_VENDOR_ID_SMSC (0x0424)
52#define USB_PRODUCT_ID_LAN7500 (0x7500)
53#define USB_PRODUCT_ID_LAN7505 (0x7505)
54#define RXW_PADDING 2
55
56#define check_warn(ret, fmt, args...) \
57 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
58
59#define check_warn_return(ret, fmt, args...) \
60 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
61
62#define check_warn_goto_done(ret, fmt, args...) \
63 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
64
65struct smsc75xx_priv {
66 struct usbnet *dev;
67 u32 rfe_ctl;
68 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
69 struct mutex dataport_mutex;
70 spinlock_t rfe_ctl_lock;
71 struct work_struct set_multicast;
72};
73
74struct usb_context {
75 struct usb_ctrlrequest req;
76 struct usbnet *dev;
77};
78
79static bool turbo_mode = true;
80module_param(turbo_mode, bool, 0644);
81MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
82
83static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
84 u32 *data)
85{
86 u32 *buf = kmalloc(4, GFP_KERNEL);
87 int ret;
88
89 BUG_ON(!dev);
90
91 if (!buf)
92 return -ENOMEM;
93
94 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
95 USB_VENDOR_REQUEST_READ_REGISTER,
96 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
97 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
98
99 if (unlikely(ret < 0))
100 netdev_warn(dev->net,
101 "Failed to read reg index 0x%08x: %d", index, ret);
102
103 le32_to_cpus(buf);
104 *data = *buf;
105 kfree(buf);
106
107 return ret;
108}
109
110static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
111 u32 data)
112{
113 u32 *buf = kmalloc(4, GFP_KERNEL);
114 int ret;
115
116 BUG_ON(!dev);
117
118 if (!buf)
119 return -ENOMEM;
120
121 *buf = data;
122 cpu_to_le32s(buf);
123
124 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
125 USB_VENDOR_REQUEST_WRITE_REGISTER,
126 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
127 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
128
129 if (unlikely(ret < 0))
130 netdev_warn(dev->net,
131 "Failed to write reg index 0x%08x: %d", index, ret);
132
133 kfree(buf);
134
135 return ret;
136}
137
138/* Loop until the read is completed with timeout
139 * called with phy_mutex held */
140static int smsc75xx_phy_wait_not_busy(struct usbnet *dev)
141{
142 unsigned long start_time = jiffies;
143 u32 val;
144 int ret;
145
146 do {
147 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val);
148 check_warn_return(ret, "Error reading MII_ACCESS");
149
150 if (!(val & MII_ACCESS_BUSY))
151 return 0;
152 } while (!time_after(jiffies, start_time + HZ));
153
154 return -EIO;
155}
156
157static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
158{
159 struct usbnet *dev = netdev_priv(netdev);
160 u32 val, addr;
161 int ret;
162
163 mutex_lock(&dev->phy_mutex);
164
165 /* confirm MII not busy */
166 ret = smsc75xx_phy_wait_not_busy(dev);
167 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read");
168
169 /* set the address, index & direction (read from PHY) */
170 phy_id &= dev->mii.phy_id_mask;
171 idx &= dev->mii.reg_num_mask;
172 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
173 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
174 | MII_ACCESS_READ | MII_ACCESS_BUSY;
175 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
176 check_warn_goto_done(ret, "Error writing MII_ACCESS");
177
178 ret = smsc75xx_phy_wait_not_busy(dev);
179 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
180
181 ret = smsc75xx_read_reg(dev, MII_DATA, &val);
182 check_warn_goto_done(ret, "Error reading MII_DATA");
183
184 ret = (u16)(val & 0xFFFF);
185
186done:
187 mutex_unlock(&dev->phy_mutex);
188 return ret;
189}
190
191static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
192 int regval)
193{
194 struct usbnet *dev = netdev_priv(netdev);
195 u32 val, addr;
196 int ret;
197
198 mutex_lock(&dev->phy_mutex);
199
200 /* confirm MII not busy */
201 ret = smsc75xx_phy_wait_not_busy(dev);
202 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write");
203
204 val = regval;
205 ret = smsc75xx_write_reg(dev, MII_DATA, val);
206 check_warn_goto_done(ret, "Error writing MII_DATA");
207
208 /* set the address, index & direction (write to PHY) */
209 phy_id &= dev->mii.phy_id_mask;
210 idx &= dev->mii.reg_num_mask;
211 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
212 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
213 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
214 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
215 check_warn_goto_done(ret, "Error writing MII_ACCESS");
216
217 ret = smsc75xx_phy_wait_not_busy(dev);
218 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
219
220done:
221 mutex_unlock(&dev->phy_mutex);
222}
223
224static int smsc75xx_wait_eeprom(struct usbnet *dev)
225{
226 unsigned long start_time = jiffies;
227 u32 val;
228 int ret;
229
230 do {
231 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
232 check_warn_return(ret, "Error reading E2P_CMD");
233
234 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
235 break;
236 udelay(40);
237 } while (!time_after(jiffies, start_time + HZ));
238
239 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
240 netdev_warn(dev->net, "EEPROM read operation timeout");
241 return -EIO;
242 }
243
244 return 0;
245}
246
247static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
248{
249 unsigned long start_time = jiffies;
250 u32 val;
251 int ret;
252
253 do {
254 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
255 check_warn_return(ret, "Error reading E2P_CMD");
256
257 if (!(val & E2P_CMD_BUSY))
258 return 0;
259
260 udelay(40);
261 } while (!time_after(jiffies, start_time + HZ));
262
263 netdev_warn(dev->net, "EEPROM is busy");
264 return -EIO;
265}
266
267static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
268 u8 *data)
269{
270 u32 val;
271 int i, ret;
272
273 BUG_ON(!dev);
274 BUG_ON(!data);
275
276 ret = smsc75xx_eeprom_confirm_not_busy(dev);
277 if (ret)
278 return ret;
279
280 for (i = 0; i < length; i++) {
281 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
282 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
283 check_warn_return(ret, "Error writing E2P_CMD");
284
285 ret = smsc75xx_wait_eeprom(dev);
286 if (ret < 0)
287 return ret;
288
289 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
290 check_warn_return(ret, "Error reading E2P_DATA");
291
292 data[i] = val & 0xFF;
293 offset++;
294 }
295
296 return 0;
297}
298
299static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
300 u8 *data)
301{
302 u32 val;
303 int i, ret;
304
305 BUG_ON(!dev);
306 BUG_ON(!data);
307
308 ret = smsc75xx_eeprom_confirm_not_busy(dev);
309 if (ret)
310 return ret;
311
312 /* Issue write/erase enable command */
313 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
314 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
315 check_warn_return(ret, "Error writing E2P_CMD");
316
317 ret = smsc75xx_wait_eeprom(dev);
318 if (ret < 0)
319 return ret;
320
321 for (i = 0; i < length; i++) {
322
323 /* Fill data register */
324 val = data[i];
325 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
326 check_warn_return(ret, "Error writing E2P_DATA");
327
328 /* Send "write" command */
329 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
330 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
331 check_warn_return(ret, "Error writing E2P_CMD");
332
333 ret = smsc75xx_wait_eeprom(dev);
334 if (ret < 0)
335 return ret;
336
337 offset++;
338 }
339
340 return 0;
341}
342
343static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
344{
345 int i, ret;
346
347 for (i = 0; i < 100; i++) {
348 u32 dp_sel;
349 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
350 check_warn_return(ret, "Error reading DP_SEL");
351
352 if (dp_sel & DP_SEL_DPRDY)
353 return 0;
354
355 udelay(40);
356 }
357
358 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out");
359
360 return -EIO;
361}
362
363static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
364 u32 length, u32 *buf)
365{
366 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
367 u32 dp_sel;
368 int i, ret;
369
370 mutex_lock(&pdata->dataport_mutex);
371
372 ret = smsc75xx_dataport_wait_not_busy(dev);
373 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry");
374
375 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
376 check_warn_goto_done(ret, "Error reading DP_SEL");
377
378 dp_sel &= ~DP_SEL_RSEL;
379 dp_sel |= ram_select;
380 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
381 check_warn_goto_done(ret, "Error writing DP_SEL");
382
383 for (i = 0; i < length; i++) {
384 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
385 check_warn_goto_done(ret, "Error writing DP_ADDR");
386
387 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
388 check_warn_goto_done(ret, "Error writing DP_DATA");
389
390 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
391 check_warn_goto_done(ret, "Error writing DP_CMD");
392
393 ret = smsc75xx_dataport_wait_not_busy(dev);
394 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout");
395 }
396
397done:
398 mutex_unlock(&pdata->dataport_mutex);
399 return ret;
400}
401
402/* returns hash bit number for given MAC address */
403static u32 smsc75xx_hash(char addr[ETH_ALEN])
404{
405 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
406}
407
408static void smsc75xx_deferred_multicast_write(struct work_struct *param)
409{
410 struct smsc75xx_priv *pdata =
411 container_of(param, struct smsc75xx_priv, set_multicast);
412 struct usbnet *dev = pdata->dev;
413 int ret;
414
415 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x",
416 pdata->rfe_ctl);
417
418 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
419 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
420
421 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
422 check_warn(ret, "Error writing RFE_CRL");
423}
424
425static void smsc75xx_set_multicast(struct net_device *netdev)
426{
427 struct usbnet *dev = netdev_priv(netdev);
428 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
429 unsigned long flags;
430 int i;
431
432 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
433
434 pdata->rfe_ctl &=
435 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
436 pdata->rfe_ctl |= RFE_CTL_AB;
437
438 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
439 pdata->multicast_hash_table[i] = 0;
440
441 if (dev->net->flags & IFF_PROMISC) {
442 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
443 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
444 } else if (dev->net->flags & IFF_ALLMULTI) {
445 netif_dbg(dev, drv, dev->net, "receive all multicast enabled");
446 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
447 } else if (!netdev_mc_empty(dev->net)) {
448 struct netdev_hw_addr *ha;
449
450 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
451
452 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
453
454 netdev_for_each_mc_addr(ha, netdev) {
455 u32 bitnum = smsc75xx_hash(ha->addr);
456 pdata->multicast_hash_table[bitnum / 32] |=
457 (1 << (bitnum % 32));
458 }
459 } else {
460 netif_dbg(dev, drv, dev->net, "receive own packets only");
461 pdata->rfe_ctl |= RFE_CTL_DPF;
462 }
463
464 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
465
466 /* defer register writes to a sleepable context */
467 schedule_work(&pdata->set_multicast);
468}
469
470static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
471 u16 lcladv, u16 rmtadv)
472{
473 u32 flow = 0, fct_flow = 0;
474 int ret;
475
476 if (duplex == DUPLEX_FULL) {
477 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
478
479 if (cap & FLOW_CTRL_TX) {
480 flow = (FLOW_TX_FCEN | 0xFFFF);
481 /* set fct_flow thresholds to 20% and 80% */
482 fct_flow = (8 << 8) | 32;
483 }
484
485 if (cap & FLOW_CTRL_RX)
486 flow |= FLOW_RX_FCEN;
487
488 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
489 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
490 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
491 } else {
492 netif_dbg(dev, link, dev->net, "half duplex");
493 }
494
495 ret = smsc75xx_write_reg(dev, FLOW, flow);
496 check_warn_return(ret, "Error writing FLOW");
497
498 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
499 check_warn_return(ret, "Error writing FCT_FLOW");
500
501 return 0;
502}
503
504static int smsc75xx_link_reset(struct usbnet *dev)
505{
506 struct mii_if_info *mii = &dev->mii;
507 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
508 u16 lcladv, rmtadv;
509 int ret;
510
511 /* write to clear phy interrupt status */
512 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
513 PHY_INT_SRC_CLEAR_ALL);
514
515 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
516 check_warn_return(ret, "Error writing INT_STS");
517
518 mii_check_media(mii, 1, 1);
519 mii_ethtool_gset(&dev->mii, &ecmd);
520 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
521 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
522
523 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x"
524 " rmtadv: %04x", ethtool_cmd_speed(&ecmd),
525 ecmd.duplex, lcladv, rmtadv);
526
527 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
528}
529
530static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
531{
532 u32 intdata;
533
534 if (urb->actual_length != 4) {
535 netdev_warn(dev->net,
536 "unexpected urb length %d", urb->actual_length);
537 return;
538 }
539
540 memcpy(&intdata, urb->transfer_buffer, 4);
541 le32_to_cpus(&intdata);
542
543 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata);
544
545 if (intdata & INT_ENP_PHY_INT)
546 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
547 else
548 netdev_warn(dev->net,
549 "unexpected interrupt, intdata=0x%08X", intdata);
550}
551
552static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
553{
554 return MAX_EEPROM_SIZE;
555}
556
557static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
558 struct ethtool_eeprom *ee, u8 *data)
559{
560 struct usbnet *dev = netdev_priv(netdev);
561
562 ee->magic = LAN75XX_EEPROM_MAGIC;
563
564 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
565}
566
567static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
568 struct ethtool_eeprom *ee, u8 *data)
569{
570 struct usbnet *dev = netdev_priv(netdev);
571
572 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
573 netdev_warn(dev->net,
574 "EEPROM: magic value mismatch: 0x%x", ee->magic);
575 return -EINVAL;
576 }
577
578 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
579}
580
581static const struct ethtool_ops smsc75xx_ethtool_ops = {
582 .get_link = usbnet_get_link,
583 .nway_reset = usbnet_nway_reset,
584 .get_drvinfo = usbnet_get_drvinfo,
585 .get_msglevel = usbnet_get_msglevel,
586 .set_msglevel = usbnet_set_msglevel,
587 .get_settings = usbnet_get_settings,
588 .set_settings = usbnet_set_settings,
589 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
590 .get_eeprom = smsc75xx_ethtool_get_eeprom,
591 .set_eeprom = smsc75xx_ethtool_set_eeprom,
592};
593
594static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
595{
596 struct usbnet *dev = netdev_priv(netdev);
597
598 if (!netif_running(netdev))
599 return -EINVAL;
600
601 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
602}
603
604static void smsc75xx_init_mac_address(struct usbnet *dev)
605{
606 /* try reading mac address from EEPROM */
607 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
608 dev->net->dev_addr) == 0) {
609 if (is_valid_ether_addr(dev->net->dev_addr)) {
610 /* eeprom values are valid so use them */
611 netif_dbg(dev, ifup, dev->net,
612 "MAC address read from EEPROM");
613 return;
614 }
615 }
616
617 /* no eeprom, or eeprom values are invalid. generate random MAC */
618 eth_hw_addr_random(dev->net);
619 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr");
620}
621
622static int smsc75xx_set_mac_address(struct usbnet *dev)
623{
624 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
625 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
626 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
627
628 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
629 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret);
630
631 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
632 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret);
633
634 addr_hi |= ADDR_FILTX_FB_VALID;
635 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
636 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret);
637
638 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
639 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret);
640
641 return 0;
642}
643
644static int smsc75xx_phy_initialize(struct usbnet *dev)
645{
646 int bmcr, ret, timeout = 0;
647
648 /* Initialize MII structure */
649 dev->mii.dev = dev->net;
650 dev->mii.mdio_read = smsc75xx_mdio_read;
651 dev->mii.mdio_write = smsc75xx_mdio_write;
652 dev->mii.phy_id_mask = 0x1f;
653 dev->mii.reg_num_mask = 0x1f;
654 dev->mii.supports_gmii = 1;
655 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
656
657 /* reset phy and wait for reset to complete */
658 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
659
660 do {
661 msleep(10);
662 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
663 check_warn_return(bmcr, "Error reading MII_BMCR");
664 timeout++;
665 } while ((bmcr & BMCR_RESET) && (timeout < 100));
666
667 if (timeout >= 100) {
668 netdev_warn(dev->net, "timeout on PHY Reset");
669 return -EIO;
670 }
671
672 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
673 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
674 ADVERTISE_PAUSE_ASYM);
675 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
676 ADVERTISE_1000FULL);
677
678 /* read and write to clear phy interrupt status */
679 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
680 check_warn_return(ret, "Error reading PHY_INT_SRC");
681 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
682
683 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
684 PHY_INT_MASK_DEFAULT);
685 mii_nway_restart(&dev->mii);
686
687 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
688 return 0;
689}
690
691static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
692{
693 int ret = 0;
694 u32 buf;
695 bool rxenabled;
696
697 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
698 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
699
700 rxenabled = ((buf & MAC_RX_RXEN) != 0);
701
702 if (rxenabled) {
703 buf &= ~MAC_RX_RXEN;
704 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
705 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
706 }
707
708 /* add 4 to size for FCS */
709 buf &= ~MAC_RX_MAX_SIZE;
710 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
711
712 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
713 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
714
715 if (rxenabled) {
716 buf |= MAC_RX_RXEN;
717 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
718 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
719 }
720
721 return 0;
722}
723
724static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
725{
726 struct usbnet *dev = netdev_priv(netdev);
727
728 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
729 check_warn_return(ret, "Failed to set mac rx frame length");
730
731 return usbnet_change_mtu(netdev, new_mtu);
732}
733
734/* Enable or disable Rx checksum offload engine */
735static int smsc75xx_set_features(struct net_device *netdev,
736 netdev_features_t features)
737{
738 struct usbnet *dev = netdev_priv(netdev);
739 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
740 unsigned long flags;
741 int ret;
742
743 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
744
745 if (features & NETIF_F_RXCSUM)
746 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
747 else
748 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
749
750 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
751 /* it's racing here! */
752
753 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
754 check_warn_return(ret, "Error writing RFE_CTL");
755
756 return 0;
757}
758
759static int smsc75xx_reset(struct usbnet *dev)
760{
761 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
762 u32 buf;
763 int ret = 0, timeout;
764
765 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset");
766
767 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
768 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
769
770 buf |= HW_CFG_LRST;
771
772 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
773 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
774
775 timeout = 0;
776 do {
777 msleep(10);
778 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
779 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
780 timeout++;
781 } while ((buf & HW_CFG_LRST) && (timeout < 100));
782
783 if (timeout >= 100) {
784 netdev_warn(dev->net, "timeout on completion of Lite Reset");
785 return -EIO;
786 }
787
788 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY");
789
790 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
791 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
792
793 buf |= PMT_CTL_PHY_RST;
794
795 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
796 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret);
797
798 timeout = 0;
799 do {
800 msleep(10);
801 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
802 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
803 timeout++;
804 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
805
806 if (timeout >= 100) {
807 netdev_warn(dev->net, "timeout waiting for PHY Reset");
808 return -EIO;
809 }
810
811 netif_dbg(dev, ifup, dev->net, "PHY reset complete");
812
813 smsc75xx_init_mac_address(dev);
814
815 ret = smsc75xx_set_mac_address(dev);
816 check_warn_return(ret, "Failed to set mac address");
817
818 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr);
819
820 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
821 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
822
823 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf);
824
825 buf |= HW_CFG_BIR;
826
827 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
828 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
829
830 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
831 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
832
833 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after "
834 "writing HW_CFG_BIR: 0x%08x", buf);
835
836 if (!turbo_mode) {
837 buf = 0;
838 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
839 } else if (dev->udev->speed == USB_SPEED_HIGH) {
840 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
841 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
842 } else {
843 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
844 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
845 }
846
847 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld",
848 (ulong)dev->rx_urb_size);
849
850 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
851 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret);
852
853 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
854 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret);
855
856 netif_dbg(dev, ifup, dev->net,
857 "Read Value from BURST_CAP after writing: 0x%08x", buf);
858
859 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
860 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret);
861
862 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
863 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret);
864
865 netif_dbg(dev, ifup, dev->net,
866 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf);
867
868 if (turbo_mode) {
869 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
870 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
871
872 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
873
874 buf |= (HW_CFG_MEF | HW_CFG_BCE);
875
876 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
877 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
878
879 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
880 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
881
882 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
883 }
884
885 /* set FIFO sizes */
886 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
887 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
888 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret);
889
890 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf);
891
892 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
893 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
894 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret);
895
896 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf);
897
898 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
899 check_warn_return(ret, "Failed to write INT_STS: %d", ret);
900
901 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
902 check_warn_return(ret, "Failed to read ID_REV: %d", ret);
903
904 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf);
905
906 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
907 check_warn_return(ret, "Failed to read E2P_CMD: %d", ret);
908
909 /* only set default GPIO/LED settings if no EEPROM is detected */
910 if (!(buf & E2P_CMD_LOADED)) {
911 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
912 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);
913
914 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
915 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
916
917 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
918 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);
919 }
920
921 ret = smsc75xx_write_reg(dev, FLOW, 0);
922 check_warn_return(ret, "Failed to write FLOW: %d", ret);
923
924 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
925 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret);
926
927 /* Don't need rfe_ctl_lock during initialisation */
928 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
929 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
930
931 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
932
933 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
934 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret);
935
936 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
937 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
938
939 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl);
940
941 /* Enable or disable checksum offload engines */
942 smsc75xx_set_features(dev->net, dev->net->features);
943
944 smsc75xx_set_multicast(dev->net);
945
946 ret = smsc75xx_phy_initialize(dev);
947 check_warn_return(ret, "Failed to initialize PHY: %d", ret);
948
949 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
950 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret);
951
952 /* enable PHY interrupts */
953 buf |= INT_ENP_PHY_INT;
954
955 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
956 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);
957
958 /* allow mac to detect speed and duplex from phy */
959 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
960 check_warn_return(ret, "Failed to read MAC_CR: %d", ret);
961
962 buf |= (MAC_CR_ADD | MAC_CR_ASD);
963 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
964 check_warn_return(ret, "Failed to write MAC_CR: %d", ret);
965
966 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
967 check_warn_return(ret, "Failed to read MAC_TX: %d", ret);
968
969 buf |= MAC_TX_TXEN;
970
971 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
972 check_warn_return(ret, "Failed to write MAC_TX: %d", ret);
973
974 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf);
975
976 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
977 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret);
978
979 buf |= FCT_TX_CTL_EN;
980
981 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
982 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret);
983
984 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf);
985
986 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
987 check_warn_return(ret, "Failed to set max rx frame length");
988
989 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
990 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
991
992 buf |= MAC_RX_RXEN;
993
994 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
995 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
996
997 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf);
998
999 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
1000 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret);
1001
1002 buf |= FCT_RX_CTL_EN;
1003
1004 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1005 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret);
1006
1007 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf);
1008
1009 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0");
1010 return 0;
1011}
1012
1013static const struct net_device_ops smsc75xx_netdev_ops = {
1014 .ndo_open = usbnet_open,
1015 .ndo_stop = usbnet_stop,
1016 .ndo_start_xmit = usbnet_start_xmit,
1017 .ndo_tx_timeout = usbnet_tx_timeout,
1018 .ndo_change_mtu = smsc75xx_change_mtu,
1019 .ndo_set_mac_address = eth_mac_addr,
1020 .ndo_validate_addr = eth_validate_addr,
1021 .ndo_do_ioctl = smsc75xx_ioctl,
1022 .ndo_set_rx_mode = smsc75xx_set_multicast,
1023 .ndo_set_features = smsc75xx_set_features,
1024};
1025
1026static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1027{
1028 struct smsc75xx_priv *pdata = NULL;
1029 int ret;
1030
1031 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1032
1033 ret = usbnet_get_endpoints(dev, intf);
1034 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret);
1035
1036 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1037 GFP_KERNEL);
1038
1039 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1040 if (!pdata) {
1041 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv");
1042 return -ENOMEM;
1043 }
1044
1045 pdata->dev = dev;
1046
1047 spin_lock_init(&pdata->rfe_ctl_lock);
1048 mutex_init(&pdata->dataport_mutex);
1049
1050 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1051
1052 if (DEFAULT_TX_CSUM_ENABLE) {
1053 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1054 if (DEFAULT_TSO_ENABLE)
1055 dev->net->features |= NETIF_F_SG |
1056 NETIF_F_TSO | NETIF_F_TSO6;
1057 }
1058 if (DEFAULT_RX_CSUM_ENABLE)
1059 dev->net->features |= NETIF_F_RXCSUM;
1060
1061 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1062 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
1063
1064 /* Init all registers */
1065 ret = smsc75xx_reset(dev);
1066
1067 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1068 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1069 dev->net->flags |= IFF_MULTICAST;
1070 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1071 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1072 return 0;
1073}
1074
1075static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1076{
1077 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1078 if (pdata) {
1079 netif_dbg(dev, ifdown, dev->net, "free pdata");
1080 kfree(pdata);
1081 pdata = NULL;
1082 dev->data[0] = 0;
1083 }
1084}
1085
1086static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1087 u32 rx_cmd_a, u32 rx_cmd_b)
1088{
1089 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1090 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
1091 skb->ip_summed = CHECKSUM_NONE;
1092 } else {
1093 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1094 skb->ip_summed = CHECKSUM_COMPLETE;
1095 }
1096}
1097
1098static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1099{
1100 while (skb->len > 0) {
1101 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1102 struct sk_buff *ax_skb;
1103 unsigned char *packet;
1104
1105 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1106 le32_to_cpus(&rx_cmd_a);
1107 skb_pull(skb, 4);
1108
1109 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1110 le32_to_cpus(&rx_cmd_b);
1111 skb_pull(skb, 4 + RXW_PADDING);
1112
1113 packet = skb->data;
1114
1115 /* get the packet length */
1116 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
1117 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
1118
1119 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1120 netif_dbg(dev, rx_err, dev->net,
1121 "Error rx_cmd_a=0x%08x", rx_cmd_a);
1122 dev->net->stats.rx_errors++;
1123 dev->net->stats.rx_dropped++;
1124
1125 if (rx_cmd_a & RX_CMD_A_FCS)
1126 dev->net->stats.rx_crc_errors++;
1127 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1128 dev->net->stats.rx_frame_errors++;
1129 } else {
1130 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1131 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1132 netif_dbg(dev, rx_err, dev->net,
1133 "size err rx_cmd_a=0x%08x", rx_cmd_a);
1134 return 0;
1135 }
1136
1137 /* last frame in this batch */
1138 if (skb->len == size) {
1139 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1140 rx_cmd_b);
1141
1142 skb_trim(skb, skb->len - 4); /* remove fcs */
1143 skb->truesize = size + sizeof(struct sk_buff);
1144
1145 return 1;
1146 }
1147
1148 ax_skb = skb_clone(skb, GFP_ATOMIC);
1149 if (unlikely(!ax_skb)) {
1150 netdev_warn(dev->net, "Error allocating skb");
1151 return 0;
1152 }
1153
1154 ax_skb->len = size;
1155 ax_skb->data = packet;
1156 skb_set_tail_pointer(ax_skb, size);
1157
1158 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1159 rx_cmd_b);
1160
1161 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1162 ax_skb->truesize = size + sizeof(struct sk_buff);
1163
1164 usbnet_skb_return(dev, ax_skb);
1165 }
1166
1167 skb_pull(skb, size);
1168
1169 /* padding bytes before the next frame starts */
1170 if (skb->len)
1171 skb_pull(skb, align_count);
1172 }
1173
1174 if (unlikely(skb->len < 0)) {
1175 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len);
1176 return 0;
1177 }
1178
1179 return 1;
1180}
1181
1182static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1183 struct sk_buff *skb, gfp_t flags)
1184{
1185 u32 tx_cmd_a, tx_cmd_b;
1186
1187 skb_linearize(skb);
1188
1189 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1190 struct sk_buff *skb2 =
1191 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1192 dev_kfree_skb_any(skb);
1193 skb = skb2;
1194 if (!skb)
1195 return NULL;
1196 }
1197
1198 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1199
1200 if (skb->ip_summed == CHECKSUM_PARTIAL)
1201 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1202
1203 if (skb_is_gso(skb)) {
1204 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1205 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1206
1207 tx_cmd_a |= TX_CMD_A_LSO;
1208 } else {
1209 tx_cmd_b = 0;
1210 }
1211
1212 skb_push(skb, 4);
1213 cpu_to_le32s(&tx_cmd_b);
1214 memcpy(skb->data, &tx_cmd_b, 4);
1215
1216 skb_push(skb, 4);
1217 cpu_to_le32s(&tx_cmd_a);
1218 memcpy(skb->data, &tx_cmd_a, 4);
1219
1220 return skb;
1221}
1222
1223static const struct driver_info smsc75xx_info = {
1224 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1225 .bind = smsc75xx_bind,
1226 .unbind = smsc75xx_unbind,
1227 .link_reset = smsc75xx_link_reset,
1228 .reset = smsc75xx_reset,
1229 .rx_fixup = smsc75xx_rx_fixup,
1230 .tx_fixup = smsc75xx_tx_fixup,
1231 .status = smsc75xx_status,
1232 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
1233};
1234
1235static const struct usb_device_id products[] = {
1236 {
1237 /* SMSC7500 USB Gigabit Ethernet Device */
1238 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1239 .driver_info = (unsigned long) &smsc75xx_info,
1240 },
1241 {
1242 /* SMSC7500 USB Gigabit Ethernet Device */
1243 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1244 .driver_info = (unsigned long) &smsc75xx_info,
1245 },
1246 { }, /* END */
1247};
1248MODULE_DEVICE_TABLE(usb, products);
1249
1250static struct usb_driver smsc75xx_driver = {
1251 .name = SMSC_CHIPNAME,
1252 .id_table = products,
1253 .probe = usbnet_probe,
1254 .suspend = usbnet_suspend,
1255 .resume = usbnet_resume,
1256 .disconnect = usbnet_disconnect,
1257 .disable_hub_initiated_lpm = 1,
1258};
1259
1260module_usb_driver(smsc75xx_driver);
1261
1262MODULE_AUTHOR("Nancy Lin");
1263MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1264MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1265MODULE_LICENSE("GPL");