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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*******************************************************************************
3 MMC Header file
4
5 Copyright (C) 2011 STMicroelectronics Ltd
6
7
8 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
9*******************************************************************************/
10
11#ifndef __MMC_H__
12#define __MMC_H__
13
14/* MMC control register */
15/* When set, all counter are reset */
16#define MMC_CNTRL_COUNTER_RESET 0x1
17/* When set, do not roll over zero after reaching the max value*/
18#define MMC_CNTRL_COUNTER_STOP_ROLLOVER 0x2
19#define MMC_CNTRL_RESET_ON_READ 0x4 /* Reset after reading */
20#define MMC_CNTRL_COUNTER_FREEZER 0x8 /* Freeze counter values to the
21 * current value.*/
22#define MMC_CNTRL_PRESET 0x10
23#define MMC_CNTRL_FULL_HALF_PRESET 0x20
24
25#define MMC_GMAC4_OFFSET 0x700
26#define MMC_GMAC3_X_OFFSET 0x100
27#define MMC_XGMAC_OFFSET 0x800
28
29struct stmmac_counters {
30 unsigned int mmc_tx_octetcount_gb;
31 unsigned int mmc_tx_framecount_gb;
32 unsigned int mmc_tx_broadcastframe_g;
33 unsigned int mmc_tx_multicastframe_g;
34 unsigned int mmc_tx_64_octets_gb;
35 unsigned int mmc_tx_65_to_127_octets_gb;
36 unsigned int mmc_tx_128_to_255_octets_gb;
37 unsigned int mmc_tx_256_to_511_octets_gb;
38 unsigned int mmc_tx_512_to_1023_octets_gb;
39 unsigned int mmc_tx_1024_to_max_octets_gb;
40 unsigned int mmc_tx_unicast_gb;
41 unsigned int mmc_tx_multicast_gb;
42 unsigned int mmc_tx_broadcast_gb;
43 unsigned int mmc_tx_underflow_error;
44 unsigned int mmc_tx_singlecol_g;
45 unsigned int mmc_tx_multicol_g;
46 unsigned int mmc_tx_deferred;
47 unsigned int mmc_tx_latecol;
48 unsigned int mmc_tx_exesscol;
49 unsigned int mmc_tx_carrier_error;
50 unsigned int mmc_tx_octetcount_g;
51 unsigned int mmc_tx_framecount_g;
52 unsigned int mmc_tx_excessdef;
53 unsigned int mmc_tx_pause_frame;
54 unsigned int mmc_tx_vlan_frame_g;
55 unsigned int mmc_tx_lpi_usec;
56 unsigned int mmc_tx_lpi_tran;
57
58 /* MMC RX counter registers */
59 unsigned int mmc_rx_framecount_gb;
60 unsigned int mmc_rx_octetcount_gb;
61 unsigned int mmc_rx_octetcount_g;
62 unsigned int mmc_rx_broadcastframe_g;
63 unsigned int mmc_rx_multicastframe_g;
64 unsigned int mmc_rx_crc_error;
65 unsigned int mmc_rx_align_error;
66 unsigned int mmc_rx_run_error;
67 unsigned int mmc_rx_jabber_error;
68 unsigned int mmc_rx_undersize_g;
69 unsigned int mmc_rx_oversize_g;
70 unsigned int mmc_rx_64_octets_gb;
71 unsigned int mmc_rx_65_to_127_octets_gb;
72 unsigned int mmc_rx_128_to_255_octets_gb;
73 unsigned int mmc_rx_256_to_511_octets_gb;
74 unsigned int mmc_rx_512_to_1023_octets_gb;
75 unsigned int mmc_rx_1024_to_max_octets_gb;
76 unsigned int mmc_rx_unicast_g;
77 unsigned int mmc_rx_length_error;
78 unsigned int mmc_rx_autofrangetype;
79 unsigned int mmc_rx_pause_frames;
80 unsigned int mmc_rx_fifo_overflow;
81 unsigned int mmc_rx_vlan_frames_gb;
82 unsigned int mmc_rx_watchdog_error;
83 unsigned int mmc_rx_lpi_usec;
84 unsigned int mmc_rx_lpi_tran;
85 unsigned int mmc_rx_discard_frames_gb;
86 unsigned int mmc_rx_discard_octets_gb;
87 unsigned int mmc_rx_align_err_frames;
88
89 /* IPC */
90 unsigned int mmc_rx_ipc_intr_mask;
91 unsigned int mmc_rx_ipc_intr;
92
93 /* IPv4 */
94 unsigned int mmc_rx_ipv4_gd;
95 unsigned int mmc_rx_ipv4_hderr;
96 unsigned int mmc_rx_ipv4_nopay;
97 unsigned int mmc_rx_ipv4_frag;
98 unsigned int mmc_rx_ipv4_udsbl;
99
100 unsigned int mmc_rx_ipv4_gd_octets;
101 unsigned int mmc_rx_ipv4_hderr_octets;
102 unsigned int mmc_rx_ipv4_nopay_octets;
103 unsigned int mmc_rx_ipv4_frag_octets;
104 unsigned int mmc_rx_ipv4_udsbl_octets;
105
106 /* IPV6 */
107 unsigned int mmc_rx_ipv6_gd_octets;
108 unsigned int mmc_rx_ipv6_hderr_octets;
109 unsigned int mmc_rx_ipv6_nopay_octets;
110
111 unsigned int mmc_rx_ipv6_gd;
112 unsigned int mmc_rx_ipv6_hderr;
113 unsigned int mmc_rx_ipv6_nopay;
114
115 /* Protocols */
116 unsigned int mmc_rx_udp_gd;
117 unsigned int mmc_rx_udp_err;
118 unsigned int mmc_rx_tcp_gd;
119 unsigned int mmc_rx_tcp_err;
120 unsigned int mmc_rx_icmp_gd;
121 unsigned int mmc_rx_icmp_err;
122
123 unsigned int mmc_rx_udp_gd_octets;
124 unsigned int mmc_rx_udp_err_octets;
125 unsigned int mmc_rx_tcp_gd_octets;
126 unsigned int mmc_rx_tcp_err_octets;
127 unsigned int mmc_rx_icmp_gd_octets;
128 unsigned int mmc_rx_icmp_err_octets;
129
130 /* Stream-Gate Filter */
131 unsigned int mmc_sgf_pass_fragment_cntr;
132 unsigned int mmc_sgf_fail_fragment_cntr;
133
134 /* FPE */
135 unsigned int mmc_tx_fpe_fragment_cntr;
136 unsigned int mmc_tx_hold_req_cntr;
137 unsigned int mmc_tx_gate_overrun_cntr;
138 unsigned int mmc_rx_packet_assembly_err_cntr;
139 unsigned int mmc_rx_packet_smd_err_cntr;
140 unsigned int mmc_rx_packet_assembly_ok_cntr;
141 unsigned int mmc_rx_fpe_fragment_cntr;
142};
143
144#endif /* __MMC_H__ */
1/*******************************************************************************
2 MMC Header file
3
4 Copyright (C) 2011 STMicroelectronics Ltd
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/
24
25/* MMC control register */
26/* When set, all counter are reset */
27#define MMC_CNTRL_COUNTER_RESET 0x1
28/* When set, do not roll over zero
29 * after reaching the max value*/
30#define MMC_CNTRL_COUNTER_STOP_ROLLOVER 0x2
31#define MMC_CNTRL_RESET_ON_READ 0x4 /* Reset after reading */
32#define MMC_CNTRL_COUNTER_FREEZER 0x8 /* Freeze counter values to the
33 * current value.*/
34#define MMC_CNTRL_PRESET 0x10
35#define MMC_CNTRL_FULL_HALF_PRESET 0x20
36struct stmmac_counters {
37 unsigned int mmc_tx_octetcount_gb;
38 unsigned int mmc_tx_framecount_gb;
39 unsigned int mmc_tx_broadcastframe_g;
40 unsigned int mmc_tx_multicastframe_g;
41 unsigned int mmc_tx_64_octets_gb;
42 unsigned int mmc_tx_65_to_127_octets_gb;
43 unsigned int mmc_tx_128_to_255_octets_gb;
44 unsigned int mmc_tx_256_to_511_octets_gb;
45 unsigned int mmc_tx_512_to_1023_octets_gb;
46 unsigned int mmc_tx_1024_to_max_octets_gb;
47 unsigned int mmc_tx_unicast_gb;
48 unsigned int mmc_tx_multicast_gb;
49 unsigned int mmc_tx_broadcast_gb;
50 unsigned int mmc_tx_underflow_error;
51 unsigned int mmc_tx_singlecol_g;
52 unsigned int mmc_tx_multicol_g;
53 unsigned int mmc_tx_deferred;
54 unsigned int mmc_tx_latecol;
55 unsigned int mmc_tx_exesscol;
56 unsigned int mmc_tx_carrier_error;
57 unsigned int mmc_tx_octetcount_g;
58 unsigned int mmc_tx_framecount_g;
59 unsigned int mmc_tx_excessdef;
60 unsigned int mmc_tx_pause_frame;
61 unsigned int mmc_tx_vlan_frame_g;
62
63 /* MMC RX counter registers */
64 unsigned int mmc_rx_framecount_gb;
65 unsigned int mmc_rx_octetcount_gb;
66 unsigned int mmc_rx_octetcount_g;
67 unsigned int mmc_rx_broadcastframe_g;
68 unsigned int mmc_rx_multicastframe_g;
69 unsigned int mmc_rx_crc_errror;
70 unsigned int mmc_rx_align_error;
71 unsigned int mmc_rx_run_error;
72 unsigned int mmc_rx_jabber_error;
73 unsigned int mmc_rx_undersize_g;
74 unsigned int mmc_rx_oversize_g;
75 unsigned int mmc_rx_64_octets_gb;
76 unsigned int mmc_rx_65_to_127_octets_gb;
77 unsigned int mmc_rx_128_to_255_octets_gb;
78 unsigned int mmc_rx_256_to_511_octets_gb;
79 unsigned int mmc_rx_512_to_1023_octets_gb;
80 unsigned int mmc_rx_1024_to_max_octets_gb;
81 unsigned int mmc_rx_unicast_g;
82 unsigned int mmc_rx_length_error;
83 unsigned int mmc_rx_autofrangetype;
84 unsigned int mmc_rx_pause_frames;
85 unsigned int mmc_rx_fifo_overflow;
86 unsigned int mmc_rx_vlan_frames_gb;
87 unsigned int mmc_rx_watchdog_error;
88 /* IPC */
89 unsigned int mmc_rx_ipc_intr_mask;
90 unsigned int mmc_rx_ipc_intr;
91 /* IPv4 */
92 unsigned int mmc_rx_ipv4_gd;
93 unsigned int mmc_rx_ipv4_hderr;
94 unsigned int mmc_rx_ipv4_nopay;
95 unsigned int mmc_rx_ipv4_frag;
96 unsigned int mmc_rx_ipv4_udsbl;
97
98 unsigned int mmc_rx_ipv4_gd_octets;
99 unsigned int mmc_rx_ipv4_hderr_octets;
100 unsigned int mmc_rx_ipv4_nopay_octets;
101 unsigned int mmc_rx_ipv4_frag_octets;
102 unsigned int mmc_rx_ipv4_udsbl_octets;
103
104 /* IPV6 */
105 unsigned int mmc_rx_ipv6_gd_octets;
106 unsigned int mmc_rx_ipv6_hderr_octets;
107 unsigned int mmc_rx_ipv6_nopay_octets;
108
109 unsigned int mmc_rx_ipv6_gd;
110 unsigned int mmc_rx_ipv6_hderr;
111 unsigned int mmc_rx_ipv6_nopay;
112
113 /* Protocols */
114 unsigned int mmc_rx_udp_gd;
115 unsigned int mmc_rx_udp_err;
116 unsigned int mmc_rx_tcp_gd;
117 unsigned int mmc_rx_tcp_err;
118 unsigned int mmc_rx_icmp_gd;
119 unsigned int mmc_rx_icmp_err;
120
121 unsigned int mmc_rx_udp_gd_octets;
122 unsigned int mmc_rx_udp_err_octets;
123 unsigned int mmc_rx_tcp_gd_octets;
124 unsigned int mmc_rx_tcp_err_octets;
125 unsigned int mmc_rx_icmp_gd_octets;
126 unsigned int mmc_rx_icmp_err_octets;
127};
128
129extern void dwmac_mmc_ctrl(void __iomem *ioaddr, unsigned int mode);
130extern void dwmac_mmc_intr_all_mask(void __iomem *ioaddr);
131extern void dwmac_mmc_read(void __iomem *ioaddr, struct stmmac_counters *mmc);