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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
4 * and audio CODEC devices
5 *
6 * Copyright (C) 2005-2006 Texas Instruments, Inc.
7 *
8 * Modifications to defer interrupt handling to a kernel thread:
9 * Copyright (C) 2006 MontaVista Software, Inc.
10 *
11 * Based on tlv320aic23.c:
12 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
13 *
14 * Code cleanup and modifications to IRQ handler.
15 * by syed khasim <x0khasim@ti.com>
16 */
17
18#include <linux/init.h>
19#include <linux/mutex.h>
20#include <linux/platform_device.h>
21#include <linux/regmap.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/device.h>
25#include <linux/of.h>
26#include <linux/of_irq.h>
27#include <linux/of_platform.h>
28#include <linux/irq.h>
29#include <linux/irqdomain.h>
30
31#include <linux/regulator/machine.h>
32
33#include <linux/i2c.h>
34
35#include <linux/mfd/core.h>
36#include <linux/mfd/twl.h>
37
38/* Register descriptions for audio */
39#include <linux/mfd/twl4030-audio.h>
40
41#include "twl-core.h"
42
43/*
44 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
45 * Management and System Companion Device" chips originally designed for
46 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
47 * often at around 3 Mbit/sec, including for interrupt handling.
48 *
49 * This driver core provides genirq support for the interrupts emitted,
50 * by the various modules, and exports register access primitives.
51 *
52 * FIXME this driver currently requires use of the first interrupt line
53 * (and associated registers).
54 */
55
56#define DRIVER_NAME "twl"
57
58/* Triton Core internal information (BEGIN) */
59
60/* Base Address defns for twl4030_map[] */
61
62/* subchip/slave 0 - USB ID */
63#define TWL4030_BASEADD_USB 0x0000
64
65/* subchip/slave 1 - AUD ID */
66#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
67#define TWL4030_BASEADD_GPIO 0x0098
68#define TWL4030_BASEADD_INTBR 0x0085
69#define TWL4030_BASEADD_PIH 0x0080
70#define TWL4030_BASEADD_TEST 0x004C
71
72/* subchip/slave 2 - AUX ID */
73#define TWL4030_BASEADD_INTERRUPTS 0x00B9
74#define TWL4030_BASEADD_LED 0x00EE
75#define TWL4030_BASEADD_MADC 0x0000
76#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
77#define TWL4030_BASEADD_PRECHARGE 0x00AA
78#define TWL4030_BASEADD_PWM 0x00F8
79#define TWL4030_BASEADD_KEYPAD 0x00D2
80
81#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
82#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
83 one */
84
85/* subchip/slave 3 - POWER ID */
86#define TWL4030_BASEADD_BACKUP 0x0014
87#define TWL4030_BASEADD_INT 0x002E
88#define TWL4030_BASEADD_PM_MASTER 0x0036
89
90#define TWL4030_BASEADD_PM_RECEIVER 0x005B
91#define TWL4030_DCDC_GLOBAL_CFG 0x06
92#define SMARTREFLEX_ENABLE BIT(3)
93
94#define TWL4030_BASEADD_RTC 0x001C
95#define TWL4030_BASEADD_SECURED_REG 0x0000
96
97/* Triton Core internal information (END) */
98
99
100/* subchip/slave 0 0x48 - POWER */
101#define TWL6030_BASEADD_RTC 0x0000
102#define TWL6030_BASEADD_SECURED_REG 0x0017
103#define TWL6030_BASEADD_PM_MASTER 0x001F
104#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
105#define TWL6030_BASEADD_PM_MISC 0x00E2
106#define TWL6030_BASEADD_PM_PUPD 0x00F0
107
108/* subchip/slave 1 0x49 - FEATURE */
109#define TWL6030_BASEADD_USB 0x0000
110#define TWL6030_BASEADD_GPADC_CTRL 0x002E
111#define TWL6030_BASEADD_AUX 0x0090
112#define TWL6030_BASEADD_PWM 0x00BA
113#define TWL6030_BASEADD_GASGAUGE 0x00C0
114#define TWL6030_BASEADD_PIH 0x00D0
115#define TWL6032_BASEADD_CHARGER 0x00DA
116#define TWL6030_BASEADD_CHARGER 0x00E0
117#define TWL6030_BASEADD_LED 0x00F4
118
119/* subchip/slave 2 0x4A - DFT */
120#define TWL6030_BASEADD_DIEID 0x00C0
121
122/* subchip/slave 3 0x4B - AUDIO */
123#define TWL6030_BASEADD_AUDIO 0x0000
124#define TWL6030_BASEADD_RSV 0x0000
125#define TWL6030_BASEADD_ZERO 0x0000
126
127/* Few power values */
128#define R_CFG_BOOT 0x05
129
130/* some fields in R_CFG_BOOT */
131#define HFCLK_FREQ_19p2_MHZ (1 << 0)
132#define HFCLK_FREQ_26_MHZ (2 << 0)
133#define HFCLK_FREQ_38p4_MHZ (3 << 0)
134#define HIGH_PERF_SQ (1 << 3)
135#define CK32K_LOWPWR_EN (1 << 7)
136
137/*----------------------------------------------------------------------*/
138
139/* Structure for each TWL4030/TWL6030 Slave */
140struct twl_client {
141 struct i2c_client *client;
142 struct regmap *regmap;
143};
144
145/* mapping the module id to slave id and base address */
146struct twl_mapping {
147 unsigned char sid; /* Slave ID */
148 unsigned char base; /* base address */
149};
150
151struct twl_private {
152 bool ready; /* The core driver is ready to be used */
153 u32 twl_idcode; /* TWL IDCODE Register value */
154 unsigned int twl_id;
155
156 struct twl_mapping *twl_map;
157 struct twl_client *twl_modules;
158};
159
160static struct twl_private *twl_priv;
161
162static struct twl_mapping twl4030_map[] = {
163 /*
164 * NOTE: don't change this table without updating the
165 * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
166 * so they continue to match the order in this table.
167 */
168
169 /* Common IPs */
170 { 0, TWL4030_BASEADD_USB },
171 { 1, TWL4030_BASEADD_PIH },
172 { 2, TWL4030_BASEADD_MAIN_CHARGE },
173 { 3, TWL4030_BASEADD_PM_MASTER },
174 { 3, TWL4030_BASEADD_PM_RECEIVER },
175
176 { 3, TWL4030_BASEADD_RTC },
177 { 2, TWL4030_BASEADD_PWM },
178 { 2, TWL4030_BASEADD_LED },
179 { 3, TWL4030_BASEADD_SECURED_REG },
180
181 /* TWL4030 specific IPs */
182 { 1, TWL4030_BASEADD_AUDIO_VOICE },
183 { 1, TWL4030_BASEADD_GPIO },
184 { 1, TWL4030_BASEADD_INTBR },
185 { 1, TWL4030_BASEADD_TEST },
186 { 2, TWL4030_BASEADD_KEYPAD },
187
188 { 2, TWL4030_BASEADD_MADC },
189 { 2, TWL4030_BASEADD_INTERRUPTS },
190 { 2, TWL4030_BASEADD_PRECHARGE },
191 { 3, TWL4030_BASEADD_BACKUP },
192 { 3, TWL4030_BASEADD_INT },
193
194 { 2, TWL5031_BASEADD_ACCESSORY },
195 { 2, TWL5031_BASEADD_INTERRUPTS },
196};
197
198static const struct reg_default twl4030_49_defaults[] = {
199 /* Audio Registers */
200 { 0x01, 0x00}, /* CODEC_MODE */
201 { 0x02, 0x00}, /* OPTION */
202 /* 0x03 Unused */
203 { 0x04, 0x00}, /* MICBIAS_CTL */
204 { 0x05, 0x00}, /* ANAMICL */
205 { 0x06, 0x00}, /* ANAMICR */
206 { 0x07, 0x00}, /* AVADC_CTL */
207 { 0x08, 0x00}, /* ADCMICSEL */
208 { 0x09, 0x00}, /* DIGMIXING */
209 { 0x0a, 0x0f}, /* ATXL1PGA */
210 { 0x0b, 0x0f}, /* ATXR1PGA */
211 { 0x0c, 0x0f}, /* AVTXL2PGA */
212 { 0x0d, 0x0f}, /* AVTXR2PGA */
213 { 0x0e, 0x00}, /* AUDIO_IF */
214 { 0x0f, 0x00}, /* VOICE_IF */
215 { 0x10, 0x3f}, /* ARXR1PGA */
216 { 0x11, 0x3f}, /* ARXL1PGA */
217 { 0x12, 0x3f}, /* ARXR2PGA */
218 { 0x13, 0x3f}, /* ARXL2PGA */
219 { 0x14, 0x25}, /* VRXPGA */
220 { 0x15, 0x00}, /* VSTPGA */
221 { 0x16, 0x00}, /* VRX2ARXPGA */
222 { 0x17, 0x00}, /* AVDAC_CTL */
223 { 0x18, 0x00}, /* ARX2VTXPGA */
224 { 0x19, 0x32}, /* ARXL1_APGA_CTL*/
225 { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/
226 { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/
227 { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/
228 { 0x1d, 0x00}, /* ATX2ARXPGA */
229 { 0x1e, 0x00}, /* BT_IF */
230 { 0x1f, 0x55}, /* BTPGA */
231 { 0x20, 0x00}, /* BTSTPGA */
232 { 0x21, 0x00}, /* EAR_CTL */
233 { 0x22, 0x00}, /* HS_SEL */
234 { 0x23, 0x00}, /* HS_GAIN_SET */
235 { 0x24, 0x00}, /* HS_POPN_SET */
236 { 0x25, 0x00}, /* PREDL_CTL */
237 { 0x26, 0x00}, /* PREDR_CTL */
238 { 0x27, 0x00}, /* PRECKL_CTL */
239 { 0x28, 0x00}, /* PRECKR_CTL */
240 { 0x29, 0x00}, /* HFL_CTL */
241 { 0x2a, 0x00}, /* HFR_CTL */
242 { 0x2b, 0x05}, /* ALC_CTL */
243 { 0x2c, 0x00}, /* ALC_SET1 */
244 { 0x2d, 0x00}, /* ALC_SET2 */
245 { 0x2e, 0x00}, /* BOOST_CTL */
246 { 0x2f, 0x00}, /* SOFTVOL_CTL */
247 { 0x30, 0x13}, /* DTMF_FREQSEL */
248 { 0x31, 0x00}, /* DTMF_TONEXT1H */
249 { 0x32, 0x00}, /* DTMF_TONEXT1L */
250 { 0x33, 0x00}, /* DTMF_TONEXT2H */
251 { 0x34, 0x00}, /* DTMF_TONEXT2L */
252 { 0x35, 0x79}, /* DTMF_TONOFF */
253 { 0x36, 0x11}, /* DTMF_WANONOFF */
254 { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */
255 { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */
256 { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */
257 { 0x3a, 0x06}, /* APLL_CTL */
258 { 0x3b, 0x00}, /* DTMF_CTL */
259 { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */
260 { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */
261 { 0x3e, 0x00}, /* MISC_SET_1 */
262 { 0x3f, 0x00}, /* PCMBTMUX */
263 /* 0x40 - 0x42 Unused */
264 { 0x43, 0x00}, /* RX_PATH_SEL */
265 { 0x44, 0x32}, /* VDL_APGA_CTL */
266 { 0x45, 0x00}, /* VIBRA_CTL */
267 { 0x46, 0x00}, /* VIBRA_SET */
268 { 0x47, 0x00}, /* VIBRA_PWM_SET */
269 { 0x48, 0x00}, /* ANAMIC_GAIN */
270 { 0x49, 0x00}, /* MISC_SET_2 */
271 /* End of Audio Registers */
272};
273
274static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
275{
276 switch (reg) {
277 case 0x00:
278 case 0x03:
279 case 0x40:
280 case 0x41:
281 case 0x42:
282 return false;
283 default:
284 return true;
285 }
286}
287
288static const struct regmap_range twl4030_49_volatile_ranges[] = {
289 regmap_reg_range(TWL4030_BASEADD_TEST, 0xff),
290};
291
292static const struct regmap_access_table twl4030_49_volatile_table = {
293 .yes_ranges = twl4030_49_volatile_ranges,
294 .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges),
295};
296
297static const struct regmap_config twl4030_regmap_config[4] = {
298 {
299 /* Address 0x48 */
300 .reg_bits = 8,
301 .val_bits = 8,
302 .max_register = 0xff,
303 },
304 {
305 /* Address 0x49 */
306 .reg_bits = 8,
307 .val_bits = 8,
308 .max_register = 0xff,
309
310 .readable_reg = twl4030_49_nop_reg,
311 .writeable_reg = twl4030_49_nop_reg,
312
313 .volatile_table = &twl4030_49_volatile_table,
314
315 .reg_defaults = twl4030_49_defaults,
316 .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults),
317 .cache_type = REGCACHE_MAPLE,
318 },
319 {
320 /* Address 0x4a */
321 .reg_bits = 8,
322 .val_bits = 8,
323 .max_register = 0xff,
324 },
325 {
326 /* Address 0x4b */
327 .reg_bits = 8,
328 .val_bits = 8,
329 .max_register = 0xff,
330 },
331};
332
333static struct twl_mapping twl6030_map[] = {
334 /*
335 * NOTE: don't change this table without updating the
336 * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
337 * so they continue to match the order in this table.
338 */
339
340 /* Common IPs */
341 { 1, TWL6030_BASEADD_USB },
342 { 1, TWL6030_BASEADD_PIH },
343 { 1, TWL6030_BASEADD_CHARGER },
344 { 0, TWL6030_BASEADD_PM_MASTER },
345 { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
346
347 { 0, TWL6030_BASEADD_RTC },
348 { 1, TWL6030_BASEADD_PWM },
349 { 1, TWL6030_BASEADD_LED },
350 { 0, TWL6030_BASEADD_SECURED_REG },
351
352 /* TWL6030 specific IPs */
353 { 0, TWL6030_BASEADD_ZERO },
354 { 1, TWL6030_BASEADD_ZERO },
355 { 2, TWL6030_BASEADD_ZERO },
356 { 1, TWL6030_BASEADD_GPADC_CTRL },
357 { 1, TWL6030_BASEADD_GASGAUGE },
358
359 /* TWL6032 specific charger registers */
360 { 1, TWL6032_BASEADD_CHARGER },
361};
362
363static const struct regmap_config twl6030_regmap_config[3] = {
364 {
365 /* Address 0x48 */
366 .reg_bits = 8,
367 .val_bits = 8,
368 .max_register = 0xff,
369 },
370 {
371 /* Address 0x49 */
372 .reg_bits = 8,
373 .val_bits = 8,
374 .max_register = 0xff,
375 },
376 {
377 /* Address 0x4a */
378 .reg_bits = 8,
379 .val_bits = 8,
380 .max_register = 0xff,
381 },
382};
383
384/*----------------------------------------------------------------------*/
385
386static inline int twl_get_num_slaves(void)
387{
388 if (twl_class_is_4030())
389 return 4; /* TWL4030 class have four slave address */
390 else
391 return 3; /* TWL6030 class have three slave address */
392}
393
394static inline int twl_get_last_module(void)
395{
396 if (twl_class_is_4030())
397 return TWL4030_MODULE_LAST;
398 else
399 return TWL6030_MODULE_LAST;
400}
401
402/* Exported Functions */
403
404unsigned int twl_rev(void)
405{
406 return twl_priv ? twl_priv->twl_id : 0;
407}
408EXPORT_SYMBOL(twl_rev);
409
410/**
411 * twl_get_regmap - Get the regmap associated with the given module
412 * @mod_no: module number
413 *
414 * Returns the regmap pointer or NULL in case of failure.
415 */
416static struct regmap *twl_get_regmap(u8 mod_no)
417{
418 int sid;
419 struct twl_client *twl;
420
421 if (unlikely(!twl_priv || !twl_priv->ready)) {
422 pr_err("%s: not initialized\n", DRIVER_NAME);
423 return NULL;
424 }
425 if (unlikely(mod_no >= twl_get_last_module())) {
426 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
427 return NULL;
428 }
429
430 sid = twl_priv->twl_map[mod_no].sid;
431 twl = &twl_priv->twl_modules[sid];
432
433 return twl->regmap;
434}
435
436/**
437 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
438 * @mod_no: module number
439 * @value: an array of num_bytes+1 containing data to write
440 * @reg: register address (just offset will do)
441 * @num_bytes: number of bytes to transfer
442 *
443 * Returns 0 on success or else a negative error code.
444 */
445int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
446{
447 struct regmap *regmap = twl_get_regmap(mod_no);
448 int ret;
449
450 if (!regmap)
451 return -EPERM;
452
453 ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
454 value, num_bytes);
455
456 if (ret)
457 pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
458 DRIVER_NAME, mod_no, reg, num_bytes);
459
460 return ret;
461}
462EXPORT_SYMBOL(twl_i2c_write);
463
464/**
465 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
466 * @mod_no: module number
467 * @value: an array of num_bytes containing data to be read
468 * @reg: register address (just offset will do)
469 * @num_bytes: number of bytes to transfer
470 *
471 * Returns 0 on success or else a negative error code.
472 */
473int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
474{
475 struct regmap *regmap = twl_get_regmap(mod_no);
476 int ret;
477
478 if (!regmap)
479 return -EPERM;
480
481 ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
482 value, num_bytes);
483
484 if (ret)
485 pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
486 DRIVER_NAME, mod_no, reg, num_bytes);
487
488 return ret;
489}
490EXPORT_SYMBOL(twl_i2c_read);
491
492/**
493 * twl_set_regcache_bypass - Configure the regcache bypass for the regmap associated
494 * with the module
495 * @mod_no: module number
496 * @enable: Regcache bypass state
497 *
498 * Returns 0 else failure.
499 */
500int twl_set_regcache_bypass(u8 mod_no, bool enable)
501{
502 struct regmap *regmap = twl_get_regmap(mod_no);
503
504 if (!regmap)
505 return -EPERM;
506
507 regcache_cache_bypass(regmap, enable);
508
509 return 0;
510}
511EXPORT_SYMBOL(twl_set_regcache_bypass);
512
513/*----------------------------------------------------------------------*/
514
515/**
516 * twl_read_idcode_register - API to read the IDCODE register.
517 *
518 * Unlocks the IDCODE register and read the 32 bit value.
519 */
520static int twl_read_idcode_register(void)
521{
522 int err;
523
524 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
525 REG_UNLOCK_TEST_REG);
526 if (err) {
527 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
528 goto fail;
529 }
530
531 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
532 REG_IDCODE_7_0, 4);
533 if (err) {
534 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
535 goto fail;
536 }
537
538 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
539 if (err)
540 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
541fail:
542 return err;
543}
544
545/**
546 * twl_get_type - API to get TWL Si type.
547 *
548 * Api to get the TWL Si type from IDCODE value.
549 */
550int twl_get_type(void)
551{
552 return TWL_SIL_TYPE(twl_priv->twl_idcode);
553}
554EXPORT_SYMBOL_GPL(twl_get_type);
555
556/**
557 * twl_get_version - API to get TWL Si version.
558 *
559 * Api to get the TWL Si version from IDCODE value.
560 */
561int twl_get_version(void)
562{
563 return TWL_SIL_REV(twl_priv->twl_idcode);
564}
565EXPORT_SYMBOL_GPL(twl_get_version);
566
567/**
568 * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
569 *
570 * Api to get the TWL HFCLK rate based on BOOT_CFG register.
571 */
572int twl_get_hfclk_rate(void)
573{
574 u8 ctrl;
575 int rate;
576
577 twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
578
579 switch (ctrl & 0x3) {
580 case HFCLK_FREQ_19p2_MHZ:
581 rate = 19200000;
582 break;
583 case HFCLK_FREQ_26_MHZ:
584 rate = 26000000;
585 break;
586 case HFCLK_FREQ_38p4_MHZ:
587 rate = 38400000;
588 break;
589 default:
590 pr_err("TWL4030: HFCLK is not configured\n");
591 rate = -EINVAL;
592 break;
593 }
594
595 return rate;
596}
597EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
598
599/*----------------------------------------------------------------------*/
600
601/*
602 * These three functions initialize the on-chip clock framework,
603 * letting it generate the right frequencies for USB, MADC, and
604 * other purposes.
605 */
606static inline int protect_pm_master(void)
607{
608 int e = 0;
609
610 e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
611 TWL4030_PM_MASTER_PROTECT_KEY);
612 return e;
613}
614
615static inline int unprotect_pm_master(void)
616{
617 int e = 0;
618
619 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
620 TWL4030_PM_MASTER_PROTECT_KEY);
621 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
622 TWL4030_PM_MASTER_PROTECT_KEY);
623
624 return e;
625}
626
627static void clocks_init(struct device *dev)
628{
629 int e = 0;
630 struct clk *osc;
631 u32 rate;
632 u8 ctrl = HFCLK_FREQ_26_MHZ;
633
634 osc = clk_get(dev, "fck");
635 if (IS_ERR(osc)) {
636 printk(KERN_WARNING "Skipping twl internal clock init and "
637 "using bootloader value (unknown osc rate)\n");
638 return;
639 }
640
641 rate = clk_get_rate(osc);
642 clk_put(osc);
643
644 switch (rate) {
645 case 19200000:
646 ctrl = HFCLK_FREQ_19p2_MHZ;
647 break;
648 case 26000000:
649 ctrl = HFCLK_FREQ_26_MHZ;
650 break;
651 case 38400000:
652 ctrl = HFCLK_FREQ_38p4_MHZ;
653 break;
654 }
655
656 ctrl |= HIGH_PERF_SQ;
657
658 e |= unprotect_pm_master();
659 /* effect->MADC+USB ck en */
660 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
661 e |= protect_pm_master();
662
663 if (e < 0)
664 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
665}
666
667/*----------------------------------------------------------------------*/
668
669
670static void twl_remove(struct i2c_client *client)
671{
672 unsigned i, num_slaves;
673
674 if (twl_class_is_4030())
675 twl4030_exit_irq();
676 else
677 twl6030_exit_irq();
678
679 num_slaves = twl_get_num_slaves();
680 for (i = 0; i < num_slaves; i++) {
681 struct twl_client *twl = &twl_priv->twl_modules[i];
682
683 if (twl->client && twl->client != client)
684 i2c_unregister_device(twl->client);
685 twl->client = NULL;
686 }
687 twl_priv->ready = false;
688}
689
690static struct of_dev_auxdata twl_auxdata_lookup[] = {
691 OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL),
692 { /* sentinel */ },
693};
694
695static const struct mfd_cell twl6032_cells[] = {
696 { .name = "twl6032-clk" },
697};
698
699/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
700static int
701twl_probe(struct i2c_client *client)
702{
703 const struct i2c_device_id *id = i2c_client_get_device_id(client);
704 struct device_node *node = client->dev.of_node;
705 struct platform_device *pdev;
706 const struct regmap_config *twl_regmap_config;
707 int irq_base = 0;
708 int status;
709 unsigned i, num_slaves;
710
711 if (!node) {
712 dev_err(&client->dev, "no platform data\n");
713 return -EINVAL;
714 }
715
716 if (twl_priv) {
717 dev_dbg(&client->dev, "only one instance of %s allowed\n",
718 DRIVER_NAME);
719 return -EBUSY;
720 }
721
722 pdev = platform_device_alloc(DRIVER_NAME, -1);
723 if (!pdev) {
724 dev_err(&client->dev, "can't alloc pdev\n");
725 return -ENOMEM;
726 }
727
728 status = platform_device_add(pdev);
729 if (status) {
730 platform_device_put(pdev);
731 return status;
732 }
733
734 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
735 dev_dbg(&client->dev, "can't talk I2C?\n");
736 status = -EIO;
737 goto free;
738 }
739
740 twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
741 GFP_KERNEL);
742 if (!twl_priv) {
743 status = -ENOMEM;
744 goto free;
745 }
746
747 if ((id->driver_data) & TWL6030_CLASS) {
748 twl_priv->twl_id = TWL6030_CLASS_ID;
749 twl_priv->twl_map = &twl6030_map[0];
750 twl_regmap_config = twl6030_regmap_config;
751 } else {
752 twl_priv->twl_id = TWL4030_CLASS_ID;
753 twl_priv->twl_map = &twl4030_map[0];
754 twl_regmap_config = twl4030_regmap_config;
755 }
756
757 num_slaves = twl_get_num_slaves();
758 twl_priv->twl_modules = devm_kcalloc(&client->dev,
759 num_slaves,
760 sizeof(struct twl_client),
761 GFP_KERNEL);
762 if (!twl_priv->twl_modules) {
763 status = -ENOMEM;
764 goto free;
765 }
766
767 for (i = 0; i < num_slaves; i++) {
768 struct twl_client *twl = &twl_priv->twl_modules[i];
769
770 if (i == 0) {
771 twl->client = client;
772 } else {
773 twl->client = i2c_new_dummy_device(client->adapter,
774 client->addr + i);
775 if (IS_ERR(twl->client)) {
776 dev_err(&client->dev,
777 "can't attach client %d\n", i);
778 status = PTR_ERR(twl->client);
779 goto fail;
780 }
781 }
782
783 twl->regmap = devm_regmap_init_i2c(twl->client,
784 &twl_regmap_config[i]);
785 if (IS_ERR(twl->regmap)) {
786 status = PTR_ERR(twl->regmap);
787 dev_err(&client->dev,
788 "Failed to allocate regmap %d, err: %d\n", i,
789 status);
790 goto fail;
791 }
792 }
793
794 twl_priv->ready = true;
795
796 /* setup clock framework */
797 clocks_init(&client->dev);
798
799 /* read TWL IDCODE Register */
800 if (twl_class_is_4030()) {
801 status = twl_read_idcode_register();
802 WARN(status < 0, "Error: reading twl_idcode register value\n");
803 }
804
805 /* Maybe init the T2 Interrupt subsystem */
806 if (client->irq) {
807 if (twl_class_is_4030()) {
808 twl4030_init_chip_irq(id->name);
809 irq_base = twl4030_init_irq(&client->dev, client->irq);
810 } else {
811 irq_base = twl6030_init_irq(&client->dev, client->irq);
812 }
813
814 if (irq_base < 0) {
815 status = irq_base;
816 goto fail;
817 }
818 }
819
820 /*
821 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
822 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
823 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
824 *
825 * Also, always enable SmartReflex bit as that's needed for omaps to
826 * do anything over I2C4 for voltage scaling even if SmartReflex
827 * is disabled. Without the SmartReflex bit omap sys_clkreq idle
828 * signal will never trigger for retention idle.
829 */
830 if (twl_class_is_4030()) {
831 u8 temp;
832
833 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
834 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
835 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
836 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
837
838 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
839 TWL4030_DCDC_GLOBAL_CFG);
840 temp |= SMARTREFLEX_ENABLE;
841 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
842 TWL4030_DCDC_GLOBAL_CFG);
843 }
844
845 if (id->driver_data == (TWL6030_CLASS | TWL6032_SUBCLASS)) {
846 status = devm_mfd_add_devices(&client->dev,
847 PLATFORM_DEVID_NONE,
848 twl6032_cells,
849 ARRAY_SIZE(twl6032_cells),
850 NULL, 0, NULL);
851 if (status < 0)
852 goto free;
853 }
854
855 status = of_platform_populate(node, NULL, twl_auxdata_lookup,
856 &client->dev);
857
858fail:
859 if (status < 0)
860 twl_remove(client);
861free:
862 if (status < 0)
863 platform_device_unregister(pdev);
864
865 return status;
866}
867
868static int __maybe_unused twl_suspend(struct device *dev)
869{
870 struct i2c_client *client = to_i2c_client(dev);
871
872 if (client->irq)
873 disable_irq(client->irq);
874
875 return 0;
876}
877
878static int __maybe_unused twl_resume(struct device *dev)
879{
880 struct i2c_client *client = to_i2c_client(dev);
881
882 if (client->irq)
883 enable_irq(client->irq);
884
885 return 0;
886}
887
888static SIMPLE_DEV_PM_OPS(twl_dev_pm_ops, twl_suspend, twl_resume);
889
890static const struct i2c_device_id twl_ids[] = {
891 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
892 { "twl5030", 0 }, /* T2 updated */
893 { "twl5031", TWL5031 }, /* TWL5030 updated */
894 { "tps65950", 0 }, /* catalog version of twl5030 */
895 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
896 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
897 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
898 and vibrator. Charger in USB module*/
899 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
900 { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
901 { /* end of list */ },
902};
903
904/* One Client Driver , 4 Clients */
905static struct i2c_driver twl_driver = {
906 .driver.name = DRIVER_NAME,
907 .driver.pm = &twl_dev_pm_ops,
908 .id_table = twl_ids,
909 .probe = twl_probe,
910 .remove = twl_remove,
911};
912builtin_i2c_driver(twl_driver);
1/*
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
31#include <linux/init.h>
32#include <linux/mutex.h>
33#include <linux/module.h>
34#include <linux/platform_device.h>
35#include <linux/clk.h>
36#include <linux/err.h>
37#include <linux/device.h>
38#include <linux/of.h>
39#include <linux/of_irq.h>
40#include <linux/of_platform.h>
41#include <linux/irq.h>
42#include <linux/irqdomain.h>
43
44#include <linux/regulator/machine.h>
45
46#include <linux/i2c.h>
47#include <linux/i2c/twl.h>
48
49#include "twl-core.h"
50
51/*
52 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
53 * Management and System Companion Device" chips originally designed for
54 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
55 * often at around 3 Mbit/sec, including for interrupt handling.
56 *
57 * This driver core provides genirq support for the interrupts emitted,
58 * by the various modules, and exports register access primitives.
59 *
60 * FIXME this driver currently requires use of the first interrupt line
61 * (and associated registers).
62 */
63
64#define DRIVER_NAME "twl"
65
66#if defined(CONFIG_KEYBOARD_TWL4030) || defined(CONFIG_KEYBOARD_TWL4030_MODULE)
67#define twl_has_keypad() true
68#else
69#define twl_has_keypad() false
70#endif
71
72#if defined(CONFIG_GPIO_TWL4030) || defined(CONFIG_GPIO_TWL4030_MODULE)
73#define twl_has_gpio() true
74#else
75#define twl_has_gpio() false
76#endif
77
78#if defined(CONFIG_REGULATOR_TWL4030) \
79 || defined(CONFIG_REGULATOR_TWL4030_MODULE)
80#define twl_has_regulator() true
81#else
82#define twl_has_regulator() false
83#endif
84
85#if defined(CONFIG_TWL4030_MADC) || defined(CONFIG_TWL4030_MADC_MODULE)
86#define twl_has_madc() true
87#else
88#define twl_has_madc() false
89#endif
90
91#ifdef CONFIG_TWL4030_POWER
92#define twl_has_power() true
93#else
94#define twl_has_power() false
95#endif
96
97#if defined(CONFIG_RTC_DRV_TWL4030) || defined(CONFIG_RTC_DRV_TWL4030_MODULE)
98#define twl_has_rtc() true
99#else
100#define twl_has_rtc() false
101#endif
102
103#if defined(CONFIG_TWL4030_USB) || defined(CONFIG_TWL4030_USB_MODULE) ||\
104 defined(CONFIG_TWL6030_USB) || defined(CONFIG_TWL6030_USB_MODULE)
105#define twl_has_usb() true
106#else
107#define twl_has_usb() false
108#endif
109
110#if defined(CONFIG_TWL4030_WATCHDOG) || \
111 defined(CONFIG_TWL4030_WATCHDOG_MODULE)
112#define twl_has_watchdog() true
113#else
114#define twl_has_watchdog() false
115#endif
116
117#if defined(CONFIG_MFD_TWL4030_AUDIO) || \
118 defined(CONFIG_MFD_TWL4030_AUDIO_MODULE)
119#define twl_has_codec() true
120#else
121#define twl_has_codec() false
122#endif
123
124#if defined(CONFIG_CHARGER_TWL4030) || defined(CONFIG_CHARGER_TWL4030_MODULE)
125#define twl_has_bci() true
126#else
127#define twl_has_bci() false
128#endif
129
130/* Triton Core internal information (BEGIN) */
131
132/* Last - for index max*/
133#define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG
134
135#define TWL_NUM_SLAVES 4
136
137#if defined(CONFIG_INPUT_TWL4030_PWRBUTTON) \
138 || defined(CONFIG_INPUT_TWL4030_PWRBUTTON_MODULE)
139#define twl_has_pwrbutton() true
140#else
141#define twl_has_pwrbutton() false
142#endif
143
144#define SUB_CHIP_ID0 0
145#define SUB_CHIP_ID1 1
146#define SUB_CHIP_ID2 2
147#define SUB_CHIP_ID3 3
148#define SUB_CHIP_ID_INVAL 0xff
149
150#define TWL_MODULE_LAST TWL4030_MODULE_LAST
151
152/* Base Address defns for twl4030_map[] */
153
154/* subchip/slave 0 - USB ID */
155#define TWL4030_BASEADD_USB 0x0000
156
157/* subchip/slave 1 - AUD ID */
158#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
159#define TWL4030_BASEADD_GPIO 0x0098
160#define TWL4030_BASEADD_INTBR 0x0085
161#define TWL4030_BASEADD_PIH 0x0080
162#define TWL4030_BASEADD_TEST 0x004C
163
164/* subchip/slave 2 - AUX ID */
165#define TWL4030_BASEADD_INTERRUPTS 0x00B9
166#define TWL4030_BASEADD_LED 0x00EE
167#define TWL4030_BASEADD_MADC 0x0000
168#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
169#define TWL4030_BASEADD_PRECHARGE 0x00AA
170#define TWL4030_BASEADD_PWM0 0x00F8
171#define TWL4030_BASEADD_PWM1 0x00FB
172#define TWL4030_BASEADD_PWMA 0x00EF
173#define TWL4030_BASEADD_PWMB 0x00F1
174#define TWL4030_BASEADD_KEYPAD 0x00D2
175
176#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
177#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
178 one */
179
180/* subchip/slave 3 - POWER ID */
181#define TWL4030_BASEADD_BACKUP 0x0014
182#define TWL4030_BASEADD_INT 0x002E
183#define TWL4030_BASEADD_PM_MASTER 0x0036
184#define TWL4030_BASEADD_PM_RECEIVER 0x005B
185#define TWL4030_BASEADD_RTC 0x001C
186#define TWL4030_BASEADD_SECURED_REG 0x0000
187
188/* Triton Core internal information (END) */
189
190
191/* subchip/slave 0 0x48 - POWER */
192#define TWL6030_BASEADD_RTC 0x0000
193#define TWL6030_BASEADD_MEM 0x0017
194#define TWL6030_BASEADD_PM_MASTER 0x001F
195#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
196#define TWL6030_BASEADD_PM_MISC 0x00E2
197#define TWL6030_BASEADD_PM_PUPD 0x00F0
198
199/* subchip/slave 1 0x49 - FEATURE */
200#define TWL6030_BASEADD_USB 0x0000
201#define TWL6030_BASEADD_GPADC_CTRL 0x002E
202#define TWL6030_BASEADD_AUX 0x0090
203#define TWL6030_BASEADD_PWM 0x00BA
204#define TWL6030_BASEADD_GASGAUGE 0x00C0
205#define TWL6030_BASEADD_PIH 0x00D0
206#define TWL6030_BASEADD_CHARGER 0x00E0
207#define TWL6025_BASEADD_CHARGER 0x00DA
208
209/* subchip/slave 2 0x4A - DFT */
210#define TWL6030_BASEADD_DIEID 0x00C0
211
212/* subchip/slave 3 0x4B - AUDIO */
213#define TWL6030_BASEADD_AUDIO 0x0000
214#define TWL6030_BASEADD_RSV 0x0000
215#define TWL6030_BASEADD_ZERO 0x0000
216
217/* Few power values */
218#define R_CFG_BOOT 0x05
219
220/* some fields in R_CFG_BOOT */
221#define HFCLK_FREQ_19p2_MHZ (1 << 0)
222#define HFCLK_FREQ_26_MHZ (2 << 0)
223#define HFCLK_FREQ_38p4_MHZ (3 << 0)
224#define HIGH_PERF_SQ (1 << 3)
225#define CK32K_LOWPWR_EN (1 << 7)
226
227/*----------------------------------------------------------------------*/
228
229/* is driver active, bound to a chip? */
230static bool inuse;
231
232/* TWL IDCODE Register value */
233static u32 twl_idcode;
234
235static unsigned int twl_id;
236unsigned int twl_rev(void)
237{
238 return twl_id;
239}
240EXPORT_SYMBOL(twl_rev);
241
242/* Structure for each TWL4030/TWL6030 Slave */
243struct twl_client {
244 struct i2c_client *client;
245 u8 address;
246
247 /* max numb of i2c_msg required is for read =2 */
248 struct i2c_msg xfer_msg[2];
249
250 /* To lock access to xfer_msg */
251 struct mutex xfer_lock;
252};
253
254static struct twl_client twl_modules[TWL_NUM_SLAVES];
255
256/* mapping the module id to slave id and base address */
257struct twl_mapping {
258 unsigned char sid; /* Slave ID */
259 unsigned char base; /* base address */
260};
261static struct twl_mapping *twl_map;
262
263static struct twl_mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
264 /*
265 * NOTE: don't change this table without updating the
266 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
267 * so they continue to match the order in this table.
268 */
269
270 { 0, TWL4030_BASEADD_USB },
271
272 { 1, TWL4030_BASEADD_AUDIO_VOICE },
273 { 1, TWL4030_BASEADD_GPIO },
274 { 1, TWL4030_BASEADD_INTBR },
275 { 1, TWL4030_BASEADD_PIH },
276 { 1, TWL4030_BASEADD_TEST },
277
278 { 2, TWL4030_BASEADD_KEYPAD },
279 { 2, TWL4030_BASEADD_MADC },
280 { 2, TWL4030_BASEADD_INTERRUPTS },
281 { 2, TWL4030_BASEADD_LED },
282 { 2, TWL4030_BASEADD_MAIN_CHARGE },
283 { 2, TWL4030_BASEADD_PRECHARGE },
284 { 2, TWL4030_BASEADD_PWM0 },
285 { 2, TWL4030_BASEADD_PWM1 },
286 { 2, TWL4030_BASEADD_PWMA },
287 { 2, TWL4030_BASEADD_PWMB },
288 { 2, TWL5031_BASEADD_ACCESSORY },
289 { 2, TWL5031_BASEADD_INTERRUPTS },
290
291 { 3, TWL4030_BASEADD_BACKUP },
292 { 3, TWL4030_BASEADD_INT },
293 { 3, TWL4030_BASEADD_PM_MASTER },
294 { 3, TWL4030_BASEADD_PM_RECEIVER },
295 { 3, TWL4030_BASEADD_RTC },
296 { 3, TWL4030_BASEADD_SECURED_REG },
297};
298
299static struct twl_mapping twl6030_map[] = {
300 /*
301 * NOTE: don't change this table without updating the
302 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
303 * so they continue to match the order in this table.
304 */
305 { SUB_CHIP_ID1, TWL6030_BASEADD_USB },
306 { SUB_CHIP_ID_INVAL, TWL6030_BASEADD_AUDIO },
307 { SUB_CHIP_ID2, TWL6030_BASEADD_DIEID },
308 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
309 { SUB_CHIP_ID1, TWL6030_BASEADD_PIH },
310
311 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
312 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
313 { SUB_CHIP_ID1, TWL6030_BASEADD_GPADC_CTRL },
314 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
315 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
316
317 { SUB_CHIP_ID1, TWL6030_BASEADD_CHARGER },
318 { SUB_CHIP_ID1, TWL6030_BASEADD_GASGAUGE },
319 { SUB_CHIP_ID1, TWL6030_BASEADD_PWM },
320 { SUB_CHIP_ID0, TWL6030_BASEADD_ZERO },
321 { SUB_CHIP_ID1, TWL6030_BASEADD_ZERO },
322
323 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
324 { SUB_CHIP_ID2, TWL6030_BASEADD_ZERO },
325 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
326 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
327 { SUB_CHIP_ID2, TWL6030_BASEADD_RSV },
328 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_MASTER },
329 { SUB_CHIP_ID0, TWL6030_BASEADD_PM_SLAVE_MISC },
330
331 { SUB_CHIP_ID0, TWL6030_BASEADD_RTC },
332 { SUB_CHIP_ID0, TWL6030_BASEADD_MEM },
333 { SUB_CHIP_ID1, TWL6025_BASEADD_CHARGER },
334};
335
336/*----------------------------------------------------------------------*/
337
338/* Exported Functions */
339
340/**
341 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
342 * @mod_no: module number
343 * @value: an array of num_bytes+1 containing data to write
344 * @reg: register address (just offset will do)
345 * @num_bytes: number of bytes to transfer
346 *
347 * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and
348 * valid data starts at Offset 1.
349 *
350 * Returns the result of operation - 0 is success
351 */
352int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
353{
354 int ret;
355 int sid;
356 struct twl_client *twl;
357 struct i2c_msg *msg;
358
359 if (unlikely(mod_no > TWL_MODULE_LAST)) {
360 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
361 return -EPERM;
362 }
363 if (unlikely(!inuse)) {
364 pr_err("%s: not initialized\n", DRIVER_NAME);
365 return -EPERM;
366 }
367 sid = twl_map[mod_no].sid;
368 if (unlikely(sid == SUB_CHIP_ID_INVAL)) {
369 pr_err("%s: module %d is not part of the pmic\n",
370 DRIVER_NAME, mod_no);
371 return -EINVAL;
372 }
373 twl = &twl_modules[sid];
374
375 mutex_lock(&twl->xfer_lock);
376 /*
377 * [MSG1]: fill the register address data
378 * fill the data Tx buffer
379 */
380 msg = &twl->xfer_msg[0];
381 msg->addr = twl->address;
382 msg->len = num_bytes + 1;
383 msg->flags = 0;
384 msg->buf = value;
385 /* over write the first byte of buffer with the register address */
386 *value = twl_map[mod_no].base + reg;
387 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1);
388 mutex_unlock(&twl->xfer_lock);
389
390 /* i2c_transfer returns number of messages transferred */
391 if (ret != 1) {
392 pr_err("%s: i2c_write failed to transfer all messages\n",
393 DRIVER_NAME);
394 if (ret < 0)
395 return ret;
396 else
397 return -EIO;
398 } else {
399 return 0;
400 }
401}
402EXPORT_SYMBOL(twl_i2c_write);
403
404/**
405 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
406 * @mod_no: module number
407 * @value: an array of num_bytes containing data to be read
408 * @reg: register address (just offset will do)
409 * @num_bytes: number of bytes to transfer
410 *
411 * Returns result of operation - num_bytes is success else failure.
412 */
413int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
414{
415 int ret;
416 u8 val;
417 int sid;
418 struct twl_client *twl;
419 struct i2c_msg *msg;
420
421 if (unlikely(mod_no > TWL_MODULE_LAST)) {
422 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
423 return -EPERM;
424 }
425 if (unlikely(!inuse)) {
426 pr_err("%s: not initialized\n", DRIVER_NAME);
427 return -EPERM;
428 }
429 sid = twl_map[mod_no].sid;
430 if (unlikely(sid == SUB_CHIP_ID_INVAL)) {
431 pr_err("%s: module %d is not part of the pmic\n",
432 DRIVER_NAME, mod_no);
433 return -EINVAL;
434 }
435 twl = &twl_modules[sid];
436
437 mutex_lock(&twl->xfer_lock);
438 /* [MSG1] fill the register address data */
439 msg = &twl->xfer_msg[0];
440 msg->addr = twl->address;
441 msg->len = 1;
442 msg->flags = 0; /* Read the register value */
443 val = twl_map[mod_no].base + reg;
444 msg->buf = &val;
445 /* [MSG2] fill the data rx buffer */
446 msg = &twl->xfer_msg[1];
447 msg->addr = twl->address;
448 msg->flags = I2C_M_RD; /* Read the register value */
449 msg->len = num_bytes; /* only n bytes */
450 msg->buf = value;
451 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2);
452 mutex_unlock(&twl->xfer_lock);
453
454 /* i2c_transfer returns number of messages transferred */
455 if (ret != 2) {
456 pr_err("%s: i2c_read failed to transfer all messages\n",
457 DRIVER_NAME);
458 if (ret < 0)
459 return ret;
460 else
461 return -EIO;
462 } else {
463 return 0;
464 }
465}
466EXPORT_SYMBOL(twl_i2c_read);
467
468/**
469 * twl_i2c_write_u8 - Writes a 8 bit register in TWL4030/TWL5030/TWL60X0
470 * @mod_no: module number
471 * @value: the value to be written 8 bit
472 * @reg: register address (just offset will do)
473 *
474 * Returns result of operation - 0 is success
475 */
476int twl_i2c_write_u8(u8 mod_no, u8 value, u8 reg)
477{
478
479 /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */
480 u8 temp_buffer[2] = { 0 };
481 /* offset 1 contains the data */
482 temp_buffer[1] = value;
483 return twl_i2c_write(mod_no, temp_buffer, reg, 1);
484}
485EXPORT_SYMBOL(twl_i2c_write_u8);
486
487/**
488 * twl_i2c_read_u8 - Reads a 8 bit register from TWL4030/TWL5030/TWL60X0
489 * @mod_no: module number
490 * @value: the value read 8 bit
491 * @reg: register address (just offset will do)
492 *
493 * Returns result of operation - 0 is success
494 */
495int twl_i2c_read_u8(u8 mod_no, u8 *value, u8 reg)
496{
497 return twl_i2c_read(mod_no, value, reg, 1);
498}
499EXPORT_SYMBOL(twl_i2c_read_u8);
500
501/*----------------------------------------------------------------------*/
502
503/**
504 * twl_read_idcode_register - API to read the IDCODE register.
505 *
506 * Unlocks the IDCODE register and read the 32 bit value.
507 */
508static int twl_read_idcode_register(void)
509{
510 int err;
511
512 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
513 REG_UNLOCK_TEST_REG);
514 if (err) {
515 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
516 goto fail;
517 }
518
519 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_idcode),
520 REG_IDCODE_7_0, 4);
521 if (err) {
522 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
523 goto fail;
524 }
525
526 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
527 if (err)
528 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
529fail:
530 return err;
531}
532
533/**
534 * twl_get_type - API to get TWL Si type.
535 *
536 * Api to get the TWL Si type from IDCODE value.
537 */
538int twl_get_type(void)
539{
540 return TWL_SIL_TYPE(twl_idcode);
541}
542EXPORT_SYMBOL_GPL(twl_get_type);
543
544/**
545 * twl_get_version - API to get TWL Si version.
546 *
547 * Api to get the TWL Si version from IDCODE value.
548 */
549int twl_get_version(void)
550{
551 return TWL_SIL_REV(twl_idcode);
552}
553EXPORT_SYMBOL_GPL(twl_get_version);
554
555static struct device *
556add_numbered_child(unsigned chip, const char *name, int num,
557 void *pdata, unsigned pdata_len,
558 bool can_wakeup, int irq0, int irq1)
559{
560 struct platform_device *pdev;
561 struct twl_client *twl = &twl_modules[chip];
562 int status;
563
564 pdev = platform_device_alloc(name, num);
565 if (!pdev) {
566 dev_dbg(&twl->client->dev, "can't alloc dev\n");
567 status = -ENOMEM;
568 goto err;
569 }
570
571 device_init_wakeup(&pdev->dev, can_wakeup);
572 pdev->dev.parent = &twl->client->dev;
573
574 if (pdata) {
575 status = platform_device_add_data(pdev, pdata, pdata_len);
576 if (status < 0) {
577 dev_dbg(&pdev->dev, "can't add platform_data\n");
578 goto err;
579 }
580 }
581
582 if (irq0) {
583 struct resource r[2] = {
584 { .start = irq0, .flags = IORESOURCE_IRQ, },
585 { .start = irq1, .flags = IORESOURCE_IRQ, },
586 };
587
588 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
589 if (status < 0) {
590 dev_dbg(&pdev->dev, "can't add irqs\n");
591 goto err;
592 }
593 }
594
595 status = platform_device_add(pdev);
596
597err:
598 if (status < 0) {
599 platform_device_put(pdev);
600 dev_err(&twl->client->dev, "can't add %s dev\n", name);
601 return ERR_PTR(status);
602 }
603 return &pdev->dev;
604}
605
606static inline struct device *add_child(unsigned chip, const char *name,
607 void *pdata, unsigned pdata_len,
608 bool can_wakeup, int irq0, int irq1)
609{
610 return add_numbered_child(chip, name, -1, pdata, pdata_len,
611 can_wakeup, irq0, irq1);
612}
613
614static struct device *
615add_regulator_linked(int num, struct regulator_init_data *pdata,
616 struct regulator_consumer_supply *consumers,
617 unsigned num_consumers, unsigned long features)
618{
619 unsigned sub_chip_id;
620 struct twl_regulator_driver_data drv_data;
621
622 /* regulator framework demands init_data ... */
623 if (!pdata)
624 return NULL;
625
626 if (consumers) {
627 pdata->consumer_supplies = consumers;
628 pdata->num_consumer_supplies = num_consumers;
629 }
630
631 if (pdata->driver_data) {
632 /* If we have existing drv_data, just add the flags */
633 struct twl_regulator_driver_data *tmp;
634 tmp = pdata->driver_data;
635 tmp->features |= features;
636 } else {
637 /* add new driver data struct, used only during init */
638 drv_data.features = features;
639 drv_data.set_voltage = NULL;
640 drv_data.get_voltage = NULL;
641 drv_data.data = NULL;
642 pdata->driver_data = &drv_data;
643 }
644
645 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
646 sub_chip_id = twl_map[TWL_MODULE_PM_MASTER].sid;
647 return add_numbered_child(sub_chip_id, "twl_reg", num,
648 pdata, sizeof(*pdata), false, 0, 0);
649}
650
651static struct device *
652add_regulator(int num, struct regulator_init_data *pdata,
653 unsigned long features)
654{
655 return add_regulator_linked(num, pdata, NULL, 0, features);
656}
657
658/*
659 * NOTE: We know the first 8 IRQs after pdata->base_irq are
660 * for the PIH, and the next are for the PWR_INT SIH, since
661 * that's how twl_init_irq() sets things up.
662 */
663
664static int
665add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
666 unsigned long features)
667{
668 struct device *child;
669 unsigned sub_chip_id;
670
671 if (twl_has_gpio() && pdata->gpio) {
672 child = add_child(SUB_CHIP_ID1, "twl4030_gpio",
673 pdata->gpio, sizeof(*pdata->gpio),
674 false, irq_base + GPIO_INTR_OFFSET, 0);
675 if (IS_ERR(child))
676 return PTR_ERR(child);
677 }
678
679 if (twl_has_keypad() && pdata->keypad) {
680 child = add_child(SUB_CHIP_ID2, "twl4030_keypad",
681 pdata->keypad, sizeof(*pdata->keypad),
682 true, irq_base + KEYPAD_INTR_OFFSET, 0);
683 if (IS_ERR(child))
684 return PTR_ERR(child);
685 }
686
687 if (twl_has_madc() && pdata->madc) {
688 child = add_child(2, "twl4030_madc",
689 pdata->madc, sizeof(*pdata->madc),
690 true, irq_base + MADC_INTR_OFFSET, 0);
691 if (IS_ERR(child))
692 return PTR_ERR(child);
693 }
694
695 if (twl_has_rtc()) {
696 /*
697 * REVISIT platform_data here currently might expose the
698 * "msecure" line ... but for now we just expect board
699 * setup to tell the chip "it's always ok to SET_TIME".
700 * Eventually, Linux might become more aware of such
701 * HW security concerns, and "least privilege".
702 */
703 sub_chip_id = twl_map[TWL_MODULE_RTC].sid;
704 child = add_child(sub_chip_id, "twl_rtc",
705 NULL, 0,
706 true, irq_base + RTC_INTR_OFFSET, 0);
707 if (IS_ERR(child))
708 return PTR_ERR(child);
709 }
710
711 if (twl_has_usb() && pdata->usb && twl_class_is_4030()) {
712
713 static struct regulator_consumer_supply usb1v5 = {
714 .supply = "usb1v5",
715 };
716 static struct regulator_consumer_supply usb1v8 = {
717 .supply = "usb1v8",
718 };
719 static struct regulator_consumer_supply usb3v1 = {
720 .supply = "usb3v1",
721 };
722
723 /* First add the regulators so that they can be used by transceiver */
724 if (twl_has_regulator()) {
725 /* this is a template that gets copied */
726 struct regulator_init_data usb_fixed = {
727 .constraints.valid_modes_mask =
728 REGULATOR_MODE_NORMAL
729 | REGULATOR_MODE_STANDBY,
730 .constraints.valid_ops_mask =
731 REGULATOR_CHANGE_MODE
732 | REGULATOR_CHANGE_STATUS,
733 };
734
735 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
736 &usb_fixed, &usb1v5, 1,
737 features);
738 if (IS_ERR(child))
739 return PTR_ERR(child);
740
741 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
742 &usb_fixed, &usb1v8, 1,
743 features);
744 if (IS_ERR(child))
745 return PTR_ERR(child);
746
747 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
748 &usb_fixed, &usb3v1, 1,
749 features);
750 if (IS_ERR(child))
751 return PTR_ERR(child);
752
753 }
754
755 child = add_child(0, "twl4030_usb",
756 pdata->usb, sizeof(*pdata->usb),
757 true,
758 /* irq0 = USB_PRES, irq1 = USB */
759 irq_base + USB_PRES_INTR_OFFSET,
760 irq_base + USB_INTR_OFFSET);
761
762 if (IS_ERR(child))
763 return PTR_ERR(child);
764
765 /* we need to connect regulators to this transceiver */
766 if (twl_has_regulator() && child) {
767 usb1v5.dev_name = dev_name(child);
768 usb1v8.dev_name = dev_name(child);
769 usb3v1.dev_name = dev_name(child);
770 }
771 }
772 if (twl_has_usb() && pdata->usb && twl_class_is_6030()) {
773
774 static struct regulator_consumer_supply usb3v3;
775 int regulator;
776
777 if (twl_has_regulator()) {
778 /* this is a template that gets copied */
779 struct regulator_init_data usb_fixed = {
780 .constraints.valid_modes_mask =
781 REGULATOR_MODE_NORMAL
782 | REGULATOR_MODE_STANDBY,
783 .constraints.valid_ops_mask =
784 REGULATOR_CHANGE_MODE
785 | REGULATOR_CHANGE_STATUS,
786 };
787
788 if (features & TWL6025_SUBCLASS) {
789 usb3v3.supply = "ldousb";
790 regulator = TWL6025_REG_LDOUSB;
791 } else {
792 usb3v3.supply = "vusb";
793 regulator = TWL6030_REG_VUSB;
794 }
795 child = add_regulator_linked(regulator, &usb_fixed,
796 &usb3v3, 1,
797 features);
798 if (IS_ERR(child))
799 return PTR_ERR(child);
800 }
801
802 pdata->usb->features = features;
803
804 child = add_child(0, "twl6030_usb",
805 pdata->usb, sizeof(*pdata->usb),
806 true,
807 /* irq1 = VBUS_PRES, irq0 = USB ID */
808 irq_base + USBOTG_INTR_OFFSET,
809 irq_base + USB_PRES_INTR_OFFSET);
810
811 if (IS_ERR(child))
812 return PTR_ERR(child);
813 /* we need to connect regulators to this transceiver */
814 if (twl_has_regulator() && child)
815 usb3v3.dev_name = dev_name(child);
816 } else if (twl_has_regulator() && twl_class_is_6030()) {
817 if (features & TWL6025_SUBCLASS)
818 child = add_regulator(TWL6025_REG_LDOUSB,
819 pdata->ldousb, features);
820 else
821 child = add_regulator(TWL6030_REG_VUSB,
822 pdata->vusb, features);
823
824 if (IS_ERR(child))
825 return PTR_ERR(child);
826 }
827
828 if (twl_has_watchdog() && twl_class_is_4030()) {
829 child = add_child(0, "twl4030_wdt", NULL, 0, false, 0, 0);
830 if (IS_ERR(child))
831 return PTR_ERR(child);
832 }
833
834 if (twl_has_pwrbutton() && twl_class_is_4030()) {
835 child = add_child(1, "twl4030_pwrbutton",
836 NULL, 0, true, irq_base + 8 + 0, 0);
837 if (IS_ERR(child))
838 return PTR_ERR(child);
839 }
840
841 if (twl_has_codec() && pdata->audio && twl_class_is_4030()) {
842 sub_chip_id = twl_map[TWL_MODULE_AUDIO_VOICE].sid;
843 child = add_child(sub_chip_id, "twl4030-audio",
844 pdata->audio, sizeof(*pdata->audio),
845 false, 0, 0);
846 if (IS_ERR(child))
847 return PTR_ERR(child);
848 }
849
850 /* twl4030 regulators */
851 if (twl_has_regulator() && twl_class_is_4030()) {
852 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
853 features);
854 if (IS_ERR(child))
855 return PTR_ERR(child);
856
857 child = add_regulator(TWL4030_REG_VIO, pdata->vio,
858 features);
859 if (IS_ERR(child))
860 return PTR_ERR(child);
861
862 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
863 features);
864 if (IS_ERR(child))
865 return PTR_ERR(child);
866
867 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
868 features);
869 if (IS_ERR(child))
870 return PTR_ERR(child);
871
872 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
873 features);
874 if (IS_ERR(child))
875 return PTR_ERR(child);
876
877 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
878 features);
879 if (IS_ERR(child))
880 return PTR_ERR(child);
881
882 child = add_regulator((features & TWL4030_VAUX2)
883 ? TWL4030_REG_VAUX2_4030
884 : TWL4030_REG_VAUX2,
885 pdata->vaux2, features);
886 if (IS_ERR(child))
887 return PTR_ERR(child);
888
889 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
890 features);
891 if (IS_ERR(child))
892 return PTR_ERR(child);
893
894 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
895 features);
896 if (IS_ERR(child))
897 return PTR_ERR(child);
898
899 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
900 features);
901 if (IS_ERR(child))
902 return PTR_ERR(child);
903 }
904
905 /* maybe add LDOs that are omitted on cost-reduced parts */
906 if (twl_has_regulator() && !(features & TPS_SUBSET)
907 && twl_class_is_4030()) {
908 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
909 features);
910 if (IS_ERR(child))
911 return PTR_ERR(child);
912
913 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
914 features);
915 if (IS_ERR(child))
916 return PTR_ERR(child);
917
918 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
919 features);
920 if (IS_ERR(child))
921 return PTR_ERR(child);
922
923 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
924 features);
925 if (IS_ERR(child))
926 return PTR_ERR(child);
927
928 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
929 features);
930 if (IS_ERR(child))
931 return PTR_ERR(child);
932
933 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
934 features);
935 if (IS_ERR(child))
936 return PTR_ERR(child);
937 }
938
939 /* twl6030 regulators */
940 if (twl_has_regulator() && twl_class_is_6030() &&
941 !(features & TWL6025_SUBCLASS)) {
942 child = add_regulator(TWL6030_REG_VDD1, pdata->vdd1,
943 features);
944 if (IS_ERR(child))
945 return PTR_ERR(child);
946
947 child = add_regulator(TWL6030_REG_VDD2, pdata->vdd2,
948 features);
949 if (IS_ERR(child))
950 return PTR_ERR(child);
951
952 child = add_regulator(TWL6030_REG_VDD3, pdata->vdd3,
953 features);
954 if (IS_ERR(child))
955 return PTR_ERR(child);
956
957 child = add_regulator(TWL6030_REG_V1V8, pdata->v1v8,
958 features);
959 if (IS_ERR(child))
960 return PTR_ERR(child);
961
962 child = add_regulator(TWL6030_REG_V2V1, pdata->v2v1,
963 features);
964 if (IS_ERR(child))
965 return PTR_ERR(child);
966
967 child = add_regulator(TWL6030_REG_VMMC, pdata->vmmc,
968 features);
969 if (IS_ERR(child))
970 return PTR_ERR(child);
971
972 child = add_regulator(TWL6030_REG_VPP, pdata->vpp,
973 features);
974 if (IS_ERR(child))
975 return PTR_ERR(child);
976
977 child = add_regulator(TWL6030_REG_VUSIM, pdata->vusim,
978 features);
979 if (IS_ERR(child))
980 return PTR_ERR(child);
981
982 child = add_regulator(TWL6030_REG_VCXIO, pdata->vcxio,
983 features);
984 if (IS_ERR(child))
985 return PTR_ERR(child);
986
987 child = add_regulator(TWL6030_REG_VDAC, pdata->vdac,
988 features);
989 if (IS_ERR(child))
990 return PTR_ERR(child);
991
992 child = add_regulator(TWL6030_REG_VAUX1_6030, pdata->vaux1,
993 features);
994 if (IS_ERR(child))
995 return PTR_ERR(child);
996
997 child = add_regulator(TWL6030_REG_VAUX2_6030, pdata->vaux2,
998 features);
999 if (IS_ERR(child))
1000 return PTR_ERR(child);
1001
1002 child = add_regulator(TWL6030_REG_VAUX3_6030, pdata->vaux3,
1003 features);
1004 if (IS_ERR(child))
1005 return PTR_ERR(child);
1006
1007 child = add_regulator(TWL6030_REG_CLK32KG, pdata->clk32kg,
1008 features);
1009 if (IS_ERR(child))
1010 return PTR_ERR(child);
1011 }
1012
1013 /* 6030 and 6025 share this regulator */
1014 if (twl_has_regulator() && twl_class_is_6030()) {
1015 child = add_regulator(TWL6030_REG_VANA, pdata->vana,
1016 features);
1017 if (IS_ERR(child))
1018 return PTR_ERR(child);
1019 }
1020
1021 /* twl6025 regulators */
1022 if (twl_has_regulator() && twl_class_is_6030() &&
1023 (features & TWL6025_SUBCLASS)) {
1024 child = add_regulator(TWL6025_REG_LDO5, pdata->ldo5,
1025 features);
1026 if (IS_ERR(child))
1027 return PTR_ERR(child);
1028
1029 child = add_regulator(TWL6025_REG_LDO1, pdata->ldo1,
1030 features);
1031 if (IS_ERR(child))
1032 return PTR_ERR(child);
1033
1034 child = add_regulator(TWL6025_REG_LDO7, pdata->ldo7,
1035 features);
1036 if (IS_ERR(child))
1037 return PTR_ERR(child);
1038
1039 child = add_regulator(TWL6025_REG_LDO6, pdata->ldo6,
1040 features);
1041 if (IS_ERR(child))
1042 return PTR_ERR(child);
1043
1044 child = add_regulator(TWL6025_REG_LDOLN, pdata->ldoln,
1045 features);
1046 if (IS_ERR(child))
1047 return PTR_ERR(child);
1048
1049 child = add_regulator(TWL6025_REG_LDO2, pdata->ldo2,
1050 features);
1051 if (IS_ERR(child))
1052 return PTR_ERR(child);
1053
1054 child = add_regulator(TWL6025_REG_LDO4, pdata->ldo4,
1055 features);
1056 if (IS_ERR(child))
1057 return PTR_ERR(child);
1058
1059 child = add_regulator(TWL6025_REG_LDO3, pdata->ldo3,
1060 features);
1061 if (IS_ERR(child))
1062 return PTR_ERR(child);
1063
1064 child = add_regulator(TWL6025_REG_SMPS3, pdata->smps3,
1065 features);
1066 if (IS_ERR(child))
1067 return PTR_ERR(child);
1068
1069 child = add_regulator(TWL6025_REG_SMPS4, pdata->smps4,
1070 features);
1071 if (IS_ERR(child))
1072 return PTR_ERR(child);
1073
1074 child = add_regulator(TWL6025_REG_VIO, pdata->vio6025,
1075 features);
1076 if (IS_ERR(child))
1077 return PTR_ERR(child);
1078
1079 }
1080
1081 if (twl_has_bci() && pdata->bci &&
1082 !(features & (TPS_SUBSET | TWL5031))) {
1083 child = add_child(3, "twl4030_bci",
1084 pdata->bci, sizeof(*pdata->bci), false,
1085 /* irq0 = CHG_PRES, irq1 = BCI */
1086 irq_base + BCI_PRES_INTR_OFFSET,
1087 irq_base + BCI_INTR_OFFSET);
1088 if (IS_ERR(child))
1089 return PTR_ERR(child);
1090 }
1091
1092 return 0;
1093}
1094
1095/*----------------------------------------------------------------------*/
1096
1097/*
1098 * These three functions initialize the on-chip clock framework,
1099 * letting it generate the right frequencies for USB, MADC, and
1100 * other purposes.
1101 */
1102static inline int __init protect_pm_master(void)
1103{
1104 int e = 0;
1105
1106 e = twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0,
1107 TWL4030_PM_MASTER_PROTECT_KEY);
1108 return e;
1109}
1110
1111static inline int __init unprotect_pm_master(void)
1112{
1113 int e = 0;
1114
1115 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
1116 TWL4030_PM_MASTER_KEY_CFG1,
1117 TWL4030_PM_MASTER_PROTECT_KEY);
1118 e |= twl_i2c_write_u8(TWL4030_MODULE_PM_MASTER,
1119 TWL4030_PM_MASTER_KEY_CFG2,
1120 TWL4030_PM_MASTER_PROTECT_KEY);
1121
1122 return e;
1123}
1124
1125static void clocks_init(struct device *dev,
1126 struct twl4030_clock_init_data *clock)
1127{
1128 int e = 0;
1129 struct clk *osc;
1130 u32 rate;
1131 u8 ctrl = HFCLK_FREQ_26_MHZ;
1132
1133#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
1134 if (cpu_is_omap2430())
1135 osc = clk_get(dev, "osc_ck");
1136 else
1137 osc = clk_get(dev, "osc_sys_ck");
1138
1139 if (IS_ERR(osc)) {
1140 printk(KERN_WARNING "Skipping twl internal clock init and "
1141 "using bootloader value (unknown osc rate)\n");
1142 return;
1143 }
1144
1145 rate = clk_get_rate(osc);
1146 clk_put(osc);
1147
1148#else
1149 /* REVISIT for non-OMAP systems, pass the clock rate from
1150 * board init code, using platform_data.
1151 */
1152 osc = ERR_PTR(-EIO);
1153
1154 printk(KERN_WARNING "Skipping twl internal clock init and "
1155 "using bootloader value (unknown osc rate)\n");
1156
1157 return;
1158#endif
1159
1160 switch (rate) {
1161 case 19200000:
1162 ctrl = HFCLK_FREQ_19p2_MHZ;
1163 break;
1164 case 26000000:
1165 ctrl = HFCLK_FREQ_26_MHZ;
1166 break;
1167 case 38400000:
1168 ctrl = HFCLK_FREQ_38p4_MHZ;
1169 break;
1170 }
1171
1172 ctrl |= HIGH_PERF_SQ;
1173 if (clock && clock->ck32k_lowpwr_enable)
1174 ctrl |= CK32K_LOWPWR_EN;
1175
1176 e |= unprotect_pm_master();
1177 /* effect->MADC+USB ck en */
1178 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
1179 e |= protect_pm_master();
1180
1181 if (e < 0)
1182 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
1183}
1184
1185/*----------------------------------------------------------------------*/
1186
1187
1188static int twl_remove(struct i2c_client *client)
1189{
1190 unsigned i, num_slaves;
1191 int status;
1192
1193 if (twl_class_is_4030()) {
1194 status = twl4030_exit_irq();
1195 num_slaves = TWL_NUM_SLAVES;
1196 } else {
1197 status = twl6030_exit_irq();
1198 num_slaves = TWL_NUM_SLAVES - 1;
1199 }
1200
1201 if (status < 0)
1202 return status;
1203
1204 for (i = 0; i < num_slaves; i++) {
1205 struct twl_client *twl = &twl_modules[i];
1206
1207 if (twl->client && twl->client != client)
1208 i2c_unregister_device(twl->client);
1209 twl_modules[i].client = NULL;
1210 }
1211 inuse = false;
1212 return 0;
1213}
1214
1215/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
1216static int __devinit
1217twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
1218{
1219 struct twl4030_platform_data *pdata = client->dev.platform_data;
1220 struct device_node *node = client->dev.of_node;
1221 int irq_base = 0;
1222 int status;
1223 unsigned i, num_slaves;
1224
1225 if (node && !pdata) {
1226 /*
1227 * XXX: Temporary pdata until the information is correctly
1228 * retrieved by every TWL modules from DT.
1229 */
1230 pdata = devm_kzalloc(&client->dev,
1231 sizeof(struct twl4030_platform_data),
1232 GFP_KERNEL);
1233 if (!pdata)
1234 return -ENOMEM;
1235 }
1236
1237 if (!pdata) {
1238 dev_dbg(&client->dev, "no platform data?\n");
1239 return -EINVAL;
1240 }
1241
1242 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1243 dev_dbg(&client->dev, "can't talk I2C?\n");
1244 return -EIO;
1245 }
1246
1247 if (inuse) {
1248 dev_dbg(&client->dev, "driver is already in use\n");
1249 return -EBUSY;
1250 }
1251
1252 if ((id->driver_data) & TWL6030_CLASS) {
1253 twl_id = TWL6030_CLASS_ID;
1254 twl_map = &twl6030_map[0];
1255 num_slaves = TWL_NUM_SLAVES - 1;
1256 } else {
1257 twl_id = TWL4030_CLASS_ID;
1258 twl_map = &twl4030_map[0];
1259 num_slaves = TWL_NUM_SLAVES;
1260 }
1261
1262 for (i = 0; i < num_slaves; i++) {
1263 struct twl_client *twl = &twl_modules[i];
1264
1265 twl->address = client->addr + i;
1266 if (i == 0) {
1267 twl->client = client;
1268 } else {
1269 twl->client = i2c_new_dummy(client->adapter,
1270 twl->address);
1271 if (!twl->client) {
1272 dev_err(&client->dev,
1273 "can't attach client %d\n", i);
1274 status = -ENOMEM;
1275 goto fail;
1276 }
1277 }
1278 mutex_init(&twl->xfer_lock);
1279 }
1280
1281 inuse = true;
1282
1283 /* setup clock framework */
1284 clocks_init(&client->dev, pdata->clock);
1285
1286 /* read TWL IDCODE Register */
1287 if (twl_id == TWL4030_CLASS_ID) {
1288 status = twl_read_idcode_register();
1289 WARN(status < 0, "Error: reading twl_idcode register value\n");
1290 }
1291
1292 /* load power event scripts */
1293 if (twl_has_power() && pdata->power)
1294 twl4030_power_init(pdata->power);
1295
1296 /* Maybe init the T2 Interrupt subsystem */
1297 if (client->irq) {
1298 if (twl_class_is_4030()) {
1299 twl4030_init_chip_irq(id->name);
1300 irq_base = twl4030_init_irq(&client->dev, client->irq);
1301 } else {
1302 irq_base = twl6030_init_irq(&client->dev, client->irq);
1303 }
1304
1305 if (irq_base < 0) {
1306 status = irq_base;
1307 goto fail;
1308 }
1309 }
1310
1311 /*
1312 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
1313 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1314 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1315 */
1316 if (twl_class_is_4030()) {
1317 u8 temp;
1318
1319 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1320 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
1321 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
1322 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1323 }
1324
1325 status = -ENODEV;
1326 if (node)
1327 status = of_platform_populate(node, NULL, NULL, &client->dev);
1328 if (status)
1329 status = add_children(pdata, irq_base, id->driver_data);
1330
1331fail:
1332 if (status < 0)
1333 twl_remove(client);
1334
1335 return status;
1336}
1337
1338static const struct i2c_device_id twl_ids[] = {
1339 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1340 { "twl5030", 0 }, /* T2 updated */
1341 { "twl5031", TWL5031 }, /* TWL5030 updated */
1342 { "tps65950", 0 }, /* catalog version of twl5030 */
1343 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1344 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
1345 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1346 and vibrator. Charger in USB module*/
1347 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
1348 { "twl6025", TWL6030_CLASS | TWL6025_SUBCLASS }, /* "Phoenix lite" */
1349 { /* end of list */ },
1350};
1351MODULE_DEVICE_TABLE(i2c, twl_ids);
1352
1353/* One Client Driver , 4 Clients */
1354static struct i2c_driver twl_driver = {
1355 .driver.name = DRIVER_NAME,
1356 .id_table = twl_ids,
1357 .probe = twl_probe,
1358 .remove = twl_remove,
1359};
1360
1361static int __init twl_init(void)
1362{
1363 return i2c_add_driver(&twl_driver);
1364}
1365subsys_initcall(twl_init);
1366
1367static void __exit twl_exit(void)
1368{
1369 i2c_del_driver(&twl_driver);
1370}
1371module_exit(twl_exit);
1372
1373MODULE_AUTHOR("Texas Instruments, Inc.");
1374MODULE_DESCRIPTION("I2C Core interface for TWL");
1375MODULE_LICENSE("GPL");