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1/*
2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright (c) 2007-2008 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 */
25#ifndef __INTEL_DRV_H__
26#define __INTEL_DRV_H__
27
28#include <linux/i2c.h>
29#include "i915_drm.h"
30#include "i915_drv.h"
31#include "drm_crtc.h"
32#include "drm_crtc_helper.h"
33#include "drm_fb_helper.h"
34
35#define _wait_for(COND, MS, W) ({ \
36 unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \
37 int ret__ = 0; \
38 while (!(COND)) { \
39 if (time_after(jiffies, timeout__)) { \
40 ret__ = -ETIMEDOUT; \
41 break; \
42 } \
43 if (W && drm_can_sleep()) msleep(W); \
44 } \
45 ret__; \
46})
47
48#define wait_for_atomic_us(COND, US) ({ \
49 int i, ret__ = -ETIMEDOUT; \
50 for (i = 0; i < (US); i++) { \
51 if ((COND)) { \
52 ret__ = 0; \
53 break; \
54 } \
55 udelay(1); \
56 } \
57 ret__; \
58})
59
60#define wait_for(COND, MS) _wait_for(COND, MS, 1)
61#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
62
63#define KHz(x) (1000*x)
64#define MHz(x) KHz(1000*x)
65
66/*
67 * Display related stuff
68 */
69
70/* store information about an Ixxx DVO */
71/* The i830->i865 use multiple DVOs with multiple i2cs */
72/* the i915, i945 have a single sDVO i2c bus - which is different */
73#define MAX_OUTPUTS 6
74/* maximum connectors per crtcs in the mode set */
75#define INTELFB_CONN_LIMIT 4
76
77#define INTEL_I2C_BUS_DVO 1
78#define INTEL_I2C_BUS_SDVO 2
79
80/* these are outputs from the chip - integrated only
81 external chips are via DVO or SDVO output */
82#define INTEL_OUTPUT_UNUSED 0
83#define INTEL_OUTPUT_ANALOG 1
84#define INTEL_OUTPUT_DVO 2
85#define INTEL_OUTPUT_SDVO 3
86#define INTEL_OUTPUT_LVDS 4
87#define INTEL_OUTPUT_TVOUT 5
88#define INTEL_OUTPUT_HDMI 6
89#define INTEL_OUTPUT_DISPLAYPORT 7
90#define INTEL_OUTPUT_EDP 8
91
92/* Intel Pipe Clone Bit */
93#define INTEL_HDMIB_CLONE_BIT 1
94#define INTEL_HDMIC_CLONE_BIT 2
95#define INTEL_HDMID_CLONE_BIT 3
96#define INTEL_HDMIE_CLONE_BIT 4
97#define INTEL_HDMIF_CLONE_BIT 5
98#define INTEL_SDVO_NON_TV_CLONE_BIT 6
99#define INTEL_SDVO_TV_CLONE_BIT 7
100#define INTEL_SDVO_LVDS_CLONE_BIT 8
101#define INTEL_ANALOG_CLONE_BIT 9
102#define INTEL_TV_CLONE_BIT 10
103#define INTEL_DP_B_CLONE_BIT 11
104#define INTEL_DP_C_CLONE_BIT 12
105#define INTEL_DP_D_CLONE_BIT 13
106#define INTEL_LVDS_CLONE_BIT 14
107#define INTEL_DVO_TMDS_CLONE_BIT 15
108#define INTEL_DVO_LVDS_CLONE_BIT 16
109#define INTEL_EDP_CLONE_BIT 17
110
111#define INTEL_DVO_CHIP_NONE 0
112#define INTEL_DVO_CHIP_LVDS 1
113#define INTEL_DVO_CHIP_TMDS 2
114#define INTEL_DVO_CHIP_TVOUT 4
115
116/* drm_display_mode->private_flags */
117#define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
118#define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
119#define INTEL_MODE_DP_FORCE_6BPC (0x10)
120/* This flag must be set by the encoder's mode_fixup if it changes the crtc
121 * timings in the mode to prevent the crtc fixup from overwriting them.
122 * Currently only lvds needs that. */
123#define INTEL_MODE_CRTC_TIMINGS_SET (0x20)
124
125static inline void
126intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
127 int multiplier)
128{
129 mode->clock *= multiplier;
130 mode->private_flags |= multiplier;
131}
132
133static inline int
134intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
135{
136 return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
137}
138
139struct intel_framebuffer {
140 struct drm_framebuffer base;
141 struct drm_i915_gem_object *obj;
142};
143
144struct intel_fbdev {
145 struct drm_fb_helper helper;
146 struct intel_framebuffer ifb;
147 struct list_head fbdev_list;
148 struct drm_display_mode *our_mode;
149};
150
151struct intel_encoder {
152 struct drm_encoder base;
153 int type;
154 bool needs_tv_clock;
155 void (*hot_plug)(struct intel_encoder *);
156 int crtc_mask;
157 int clone_mask;
158};
159
160struct intel_connector {
161 struct drm_connector base;
162 struct intel_encoder *encoder;
163};
164
165struct intel_crtc {
166 struct drm_crtc base;
167 enum pipe pipe;
168 enum plane plane;
169 u8 lut_r[256], lut_g[256], lut_b[256];
170 int dpms_mode;
171 bool active; /* is the crtc on? independent of the dpms mode */
172 bool busy; /* is scanout buffer being updated frequently? */
173 struct timer_list idle_timer;
174 bool lowfreq_avail;
175 struct intel_overlay *overlay;
176 struct intel_unpin_work *unpin_work;
177 int fdi_lanes;
178
179 struct drm_i915_gem_object *cursor_bo;
180 uint32_t cursor_addr;
181 int16_t cursor_x, cursor_y;
182 int16_t cursor_width, cursor_height;
183 bool cursor_visible;
184 unsigned int bpp;
185
186 /* We can share PLLs across outputs if the timings match */
187 struct intel_pch_pll *pch_pll;
188};
189
190struct intel_plane {
191 struct drm_plane base;
192 enum pipe pipe;
193 struct drm_i915_gem_object *obj;
194 bool primary_disabled;
195 int max_downscale;
196 u32 lut_r[1024], lut_g[1024], lut_b[1024];
197 void (*update_plane)(struct drm_plane *plane,
198 struct drm_framebuffer *fb,
199 struct drm_i915_gem_object *obj,
200 int crtc_x, int crtc_y,
201 unsigned int crtc_w, unsigned int crtc_h,
202 uint32_t x, uint32_t y,
203 uint32_t src_w, uint32_t src_h);
204 void (*disable_plane)(struct drm_plane *plane);
205 int (*update_colorkey)(struct drm_plane *plane,
206 struct drm_intel_sprite_colorkey *key);
207 void (*get_colorkey)(struct drm_plane *plane,
208 struct drm_intel_sprite_colorkey *key);
209};
210
211struct intel_watermark_params {
212 unsigned long fifo_size;
213 unsigned long max_wm;
214 unsigned long default_wm;
215 unsigned long guard_size;
216 unsigned long cacheline_size;
217};
218
219struct cxsr_latency {
220 int is_desktop;
221 int is_ddr3;
222 unsigned long fsb_freq;
223 unsigned long mem_freq;
224 unsigned long display_sr;
225 unsigned long display_hpll_disable;
226 unsigned long cursor_sr;
227 unsigned long cursor_hpll_disable;
228};
229
230#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
231#define to_intel_connector(x) container_of(x, struct intel_connector, base)
232#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
233#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
234#define to_intel_plane(x) container_of(x, struct intel_plane, base)
235
236#define DIP_HEADER_SIZE 5
237
238#define DIP_TYPE_AVI 0x82
239#define DIP_VERSION_AVI 0x2
240#define DIP_LEN_AVI 13
241#define DIP_AVI_PR_1 0
242#define DIP_AVI_PR_2 1
243
244#define DIP_TYPE_SPD 0x83
245#define DIP_VERSION_SPD 0x1
246#define DIP_LEN_SPD 25
247#define DIP_SPD_UNKNOWN 0
248#define DIP_SPD_DSTB 0x1
249#define DIP_SPD_DVDP 0x2
250#define DIP_SPD_DVHS 0x3
251#define DIP_SPD_HDDVR 0x4
252#define DIP_SPD_DVC 0x5
253#define DIP_SPD_DSC 0x6
254#define DIP_SPD_VCD 0x7
255#define DIP_SPD_GAME 0x8
256#define DIP_SPD_PC 0x9
257#define DIP_SPD_BD 0xa
258#define DIP_SPD_SCD 0xb
259
260struct dip_infoframe {
261 uint8_t type; /* HB0 */
262 uint8_t ver; /* HB1 */
263 uint8_t len; /* HB2 - body len, not including checksum */
264 uint8_t ecc; /* Header ECC */
265 uint8_t checksum; /* PB0 */
266 union {
267 struct {
268 /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
269 uint8_t Y_A_B_S;
270 /* PB2 - C 7:6, M 5:4, R 3:0 */
271 uint8_t C_M_R;
272 /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
273 uint8_t ITC_EC_Q_SC;
274 /* PB4 - VIC 6:0 */
275 uint8_t VIC;
276 /* PB5 - YQ 7:6, CN 5:4, PR 3:0 */
277 uint8_t YQ_CN_PR;
278 /* PB6 to PB13 */
279 uint16_t top_bar_end;
280 uint16_t bottom_bar_start;
281 uint16_t left_bar_end;
282 uint16_t right_bar_start;
283 } __attribute__ ((packed)) avi;
284 struct {
285 uint8_t vn[8];
286 uint8_t pd[16];
287 uint8_t sdi;
288 } __attribute__ ((packed)) spd;
289 uint8_t payload[27];
290 } __attribute__ ((packed)) body;
291} __attribute__((packed));
292
293struct intel_hdmi {
294 struct intel_encoder base;
295 u32 sdvox_reg;
296 int ddc_bus;
297 int ddi_port;
298 uint32_t color_range;
299 bool has_hdmi_sink;
300 bool has_audio;
301 enum hdmi_force_audio force_audio;
302 void (*write_infoframe)(struct drm_encoder *encoder,
303 struct dip_infoframe *frame);
304};
305
306static inline struct drm_crtc *
307intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
308{
309 struct drm_i915_private *dev_priv = dev->dev_private;
310 return dev_priv->pipe_to_crtc_mapping[pipe];
311}
312
313static inline struct drm_crtc *
314intel_get_crtc_for_plane(struct drm_device *dev, int plane)
315{
316 struct drm_i915_private *dev_priv = dev->dev_private;
317 return dev_priv->plane_to_crtc_mapping[plane];
318}
319
320struct intel_unpin_work {
321 struct work_struct work;
322 struct drm_device *dev;
323 struct drm_i915_gem_object *old_fb_obj;
324 struct drm_i915_gem_object *pending_flip_obj;
325 struct drm_pending_vblank_event *event;
326 int pending;
327 bool enable_stall_check;
328};
329
330struct intel_fbc_work {
331 struct delayed_work work;
332 struct drm_crtc *crtc;
333 struct drm_framebuffer *fb;
334 int interval;
335};
336
337int intel_connector_update_modes(struct drm_connector *connector,
338 struct edid *edid);
339int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
340extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
341
342extern void intel_attach_force_audio_property(struct drm_connector *connector);
343extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
344
345extern void intel_crt_init(struct drm_device *dev);
346extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
347extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
348extern void intel_hdmi_set_avi_infoframe(struct drm_encoder *encoder,
349 struct drm_display_mode *adjusted_mode);
350extern void intel_hdmi_set_spd_infoframe(struct drm_encoder *encoder);
351extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
352extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
353 bool is_sdvob);
354extern void intel_dvo_init(struct drm_device *dev);
355extern void intel_tv_init(struct drm_device *dev);
356extern void intel_mark_busy(struct drm_device *dev,
357 struct drm_i915_gem_object *obj);
358extern bool intel_lvds_init(struct drm_device *dev);
359extern void intel_dp_init(struct drm_device *dev, int dp_reg);
360void
361intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
362 struct drm_display_mode *adjusted_mode);
363extern bool intel_dpd_is_edp(struct drm_device *dev);
364extern void intel_edp_link_config(struct intel_encoder *, int *, int *);
365extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
366extern int intel_plane_init(struct drm_device *dev, enum pipe pipe);
367extern void intel_flush_display_plane(struct drm_i915_private *dev_priv,
368 enum plane plane);
369
370void intel_sanitize_pm(struct drm_device *dev);
371
372/* intel_panel.c */
373extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
374 struct drm_display_mode *adjusted_mode);
375extern void intel_pch_panel_fitting(struct drm_device *dev,
376 int fitting_mode,
377 struct drm_display_mode *mode,
378 struct drm_display_mode *adjusted_mode);
379extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
380extern u32 intel_panel_get_backlight(struct drm_device *dev);
381extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
382extern int intel_panel_setup_backlight(struct drm_device *dev);
383extern void intel_panel_enable_backlight(struct drm_device *dev);
384extern void intel_panel_disable_backlight(struct drm_device *dev);
385extern void intel_panel_destroy_backlight(struct drm_device *dev);
386extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
387
388extern void intel_crtc_load_lut(struct drm_crtc *crtc);
389extern void intel_encoder_prepare(struct drm_encoder *encoder);
390extern void intel_encoder_commit(struct drm_encoder *encoder);
391extern void intel_encoder_destroy(struct drm_encoder *encoder);
392
393static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
394{
395 return to_intel_connector(connector)->encoder;
396}
397
398extern void intel_connector_attach_encoder(struct intel_connector *connector,
399 struct intel_encoder *encoder);
400extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
401
402extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
403 struct drm_crtc *crtc);
404int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
405 struct drm_file *file_priv);
406extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
407extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
408
409struct intel_load_detect_pipe {
410 struct drm_framebuffer *release_fb;
411 bool load_detect_temp;
412 int dpms_mode;
413};
414extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
415 struct drm_connector *connector,
416 struct drm_display_mode *mode,
417 struct intel_load_detect_pipe *old);
418extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
419 struct drm_connector *connector,
420 struct intel_load_detect_pipe *old);
421
422extern void intelfb_restore(void);
423extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
424 u16 blue, int regno);
425extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
426 u16 *blue, int regno);
427extern void intel_enable_clock_gating(struct drm_device *dev);
428extern void ironlake_disable_rc6(struct drm_device *dev);
429extern void ironlake_enable_drps(struct drm_device *dev);
430extern void ironlake_disable_drps(struct drm_device *dev);
431
432extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
433 struct drm_i915_gem_object *obj,
434 struct intel_ring_buffer *pipelined);
435extern void intel_unpin_fb_obj(struct drm_i915_gem_object *obj);
436
437extern int intel_framebuffer_init(struct drm_device *dev,
438 struct intel_framebuffer *ifb,
439 struct drm_mode_fb_cmd2 *mode_cmd,
440 struct drm_i915_gem_object *obj);
441extern int intel_fbdev_init(struct drm_device *dev);
442extern void intel_fbdev_fini(struct drm_device *dev);
443extern void intel_fbdev_set_suspend(struct drm_device *dev, int state);
444extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
445extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
446extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
447
448extern void intel_setup_overlay(struct drm_device *dev);
449extern void intel_cleanup_overlay(struct drm_device *dev);
450extern int intel_overlay_switch_off(struct intel_overlay *overlay);
451extern int intel_overlay_put_image(struct drm_device *dev, void *data,
452 struct drm_file *file_priv);
453extern int intel_overlay_attrs(struct drm_device *dev, void *data,
454 struct drm_file *file_priv);
455
456extern void intel_fb_output_poll_changed(struct drm_device *dev);
457extern void intel_fb_restore_mode(struct drm_device *dev);
458
459extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe,
460 bool state);
461#define assert_pipe_enabled(d, p) assert_pipe(d, p, true)
462#define assert_pipe_disabled(d, p) assert_pipe(d, p, false)
463
464extern void intel_init_clock_gating(struct drm_device *dev);
465extern void intel_write_eld(struct drm_encoder *encoder,
466 struct drm_display_mode *mode);
467extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
468extern void intel_prepare_ddi(struct drm_device *dev);
469extern void hsw_fdi_link_train(struct drm_crtc *crtc);
470extern void intel_ddi_init(struct drm_device *dev, enum port port);
471
472/* For use by IVB LP watermark workaround in intel_sprite.c */
473extern void intel_update_watermarks(struct drm_device *dev);
474extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe,
475 uint32_t sprite_width,
476 int pixel_size);
477extern void intel_update_linetime_watermarks(struct drm_device *dev, int pipe,
478 struct drm_display_mode *mode);
479
480extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data,
481 struct drm_file *file_priv);
482extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data,
483 struct drm_file *file_priv);
484
485extern u32 intel_dpio_read(struct drm_i915_private *dev_priv, int reg);
486
487/* Power-related functions, located in intel_pm.c */
488extern void intel_init_pm(struct drm_device *dev);
489/* FBC */
490extern bool intel_fbc_enabled(struct drm_device *dev);
491extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval);
492extern void intel_update_fbc(struct drm_device *dev);
493/* IPS */
494extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
495extern void intel_gpu_ips_teardown(void);
496
497extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
498extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
499extern void gen6_disable_rps(struct drm_device *dev);
500extern void intel_init_emon(struct drm_device *dev);
501
502extern void intel_ddi_dpms(struct drm_encoder *encoder, int mode);
503extern void intel_ddi_mode_set(struct drm_encoder *encoder,
504 struct drm_display_mode *mode,
505 struct drm_display_mode *adjusted_mode);
506
507#endif /* __INTEL_DRV_H__ */