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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Low-level parallel-support for PC-style hardware integrated in the
4 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
5 *
6 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
7 *
8 * based on parport_pc.c by
9 * Grant Guenther <grant@torque.net>
10 * Phil Blundell <philb@gnu.org>
11 * Tim Waugh <tim@cyberelk.demon.co.uk>
12 * Jose Renau <renau@acm.org>
13 * David Campbell
14 * Andrea Arcangeli
15 */
16
17#undef DEBUG /* undef for production */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/delay.h>
22#include <linux/errno.h>
23#include <linux/interrupt.h>
24#include <linux/ioport.h>
25#include <linux/kernel.h>
26#include <linux/slab.h>
27#include <linux/pci.h>
28#include <linux/sysctl.h>
29
30#include <asm/io.h>
31#include <linux/uaccess.h>
32#include <asm/superio.h>
33
34#include <linux/parport.h>
35#include <asm/pdc.h>
36#include <asm/parisc-device.h>
37#include <asm/hardware.h>
38#include "parport_gsc.h"
39
40
41MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
42MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
43MODULE_LICENSE("GPL");
44
45
46/*
47 * Clear TIMEOUT BIT in EPP MODE
48 *
49 * This is also used in SPP detection.
50 */
51static int clear_epp_timeout(struct parport *pb)
52{
53 unsigned char r;
54
55 if (!(parport_gsc_read_status(pb) & 0x01))
56 return 1;
57
58 /* To clear timeout some chips require double read */
59 parport_gsc_read_status(pb);
60 r = parport_gsc_read_status(pb);
61 parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
62 parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
63 r = parport_gsc_read_status(pb);
64
65 return !(r & 0x01);
66}
67
68/*
69 * Access functions.
70 *
71 * Most of these aren't static because they may be used by the
72 * parport_xxx_yyy macros. extern __inline__ versions of several
73 * of these are in parport_gsc.h.
74 */
75
76void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s)
77{
78 s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0);
79}
80
81void parport_gsc_save_state(struct parport *p, struct parport_state *s)
82{
83 s->u.pc.ctr = parport_readb (CONTROL (p));
84}
85
86void parport_gsc_restore_state(struct parport *p, struct parport_state *s)
87{
88 parport_writeb (s->u.pc.ctr, CONTROL (p));
89}
90
91struct parport_operations parport_gsc_ops =
92{
93 .write_data = parport_gsc_write_data,
94 .read_data = parport_gsc_read_data,
95
96 .write_control = parport_gsc_write_control,
97 .read_control = parport_gsc_read_control,
98 .frob_control = parport_gsc_frob_control,
99
100 .read_status = parport_gsc_read_status,
101
102 .enable_irq = parport_gsc_enable_irq,
103 .disable_irq = parport_gsc_disable_irq,
104
105 .data_forward = parport_gsc_data_forward,
106 .data_reverse = parport_gsc_data_reverse,
107
108 .init_state = parport_gsc_init_state,
109 .save_state = parport_gsc_save_state,
110 .restore_state = parport_gsc_restore_state,
111
112 .epp_write_data = parport_ieee1284_epp_write_data,
113 .epp_read_data = parport_ieee1284_epp_read_data,
114 .epp_write_addr = parport_ieee1284_epp_write_addr,
115 .epp_read_addr = parport_ieee1284_epp_read_addr,
116
117 .ecp_write_data = parport_ieee1284_ecp_write_data,
118 .ecp_read_data = parport_ieee1284_ecp_read_data,
119 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
120
121 .compat_write_data = parport_ieee1284_write_compat,
122 .nibble_read_data = parport_ieee1284_read_nibble,
123 .byte_read_data = parport_ieee1284_read_byte,
124
125 .owner = THIS_MODULE,
126};
127
128/* --- Mode detection ------------------------------------- */
129
130/*
131 * Checks for port existence, all ports support SPP MODE
132 */
133static int parport_SPP_supported(struct parport *pb)
134{
135 unsigned char r, w;
136
137 /*
138 * first clear an eventually pending EPP timeout
139 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
140 * that does not even respond to SPP cycles if an EPP
141 * timeout is pending
142 */
143 clear_epp_timeout(pb);
144
145 /* Do a simple read-write test to make sure the port exists. */
146 w = 0xc;
147 parport_writeb (w, CONTROL (pb));
148
149 /* Is there a control register that we can read from? Some
150 * ports don't allow reads, so read_control just returns a
151 * software copy. Some ports _do_ allow reads, so bypass the
152 * software copy here. In addition, some bits aren't
153 * writable. */
154 r = parport_readb (CONTROL (pb));
155 if ((r & 0xf) == w) {
156 w = 0xe;
157 parport_writeb (w, CONTROL (pb));
158 r = parport_readb (CONTROL (pb));
159 parport_writeb (0xc, CONTROL (pb));
160 if ((r & 0xf) == w)
161 return PARPORT_MODE_PCSPP;
162 }
163
164 /* Try the data register. The data lines aren't tri-stated at
165 * this stage, so we expect back what we wrote. */
166 w = 0xaa;
167 parport_gsc_write_data (pb, w);
168 r = parport_gsc_read_data (pb);
169 if (r == w) {
170 w = 0x55;
171 parport_gsc_write_data (pb, w);
172 r = parport_gsc_read_data (pb);
173 if (r == w)
174 return PARPORT_MODE_PCSPP;
175 }
176
177 return 0;
178}
179
180/* Detect PS/2 support.
181 *
182 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
183 * allows us to read data from the data lines. In theory we would get back
184 * 0xff but any peripheral attached to the port may drag some or all of the
185 * lines down to zero. So if we get back anything that isn't the contents
186 * of the data register we deem PS/2 support to be present.
187 *
188 * Some SPP ports have "half PS/2" ability - you can't turn off the line
189 * drivers, but an external peripheral with sufficiently beefy drivers of
190 * its own can overpower them and assert its own levels onto the bus, from
191 * where they can then be read back as normal. Ports with this property
192 * and the right type of device attached are likely to fail the SPP test,
193 * (as they will appear to have stuck bits) and so the fact that they might
194 * be misdetected here is rather academic.
195 */
196
197static int parport_PS2_supported(struct parport *pb)
198{
199 int ok = 0;
200
201 clear_epp_timeout(pb);
202
203 /* try to tri-state the buffer */
204 parport_gsc_data_reverse (pb);
205
206 parport_gsc_write_data(pb, 0x55);
207 if (parport_gsc_read_data(pb) != 0x55) ok++;
208
209 parport_gsc_write_data(pb, 0xaa);
210 if (parport_gsc_read_data(pb) != 0xaa) ok++;
211
212 /* cancel input mode */
213 parport_gsc_data_forward (pb);
214
215 if (ok) {
216 pb->modes |= PARPORT_MODE_TRISTATE;
217 } else {
218 struct parport_gsc_private *priv = pb->private_data;
219 priv->ctr_writable &= ~0x20;
220 }
221
222 return ok;
223}
224
225
226/* --- Initialisation code -------------------------------- */
227
228static struct parport *parport_gsc_probe_port(unsigned long base,
229 unsigned long base_hi, int irq,
230 struct parisc_device *padev)
231{
232 struct parport_gsc_private *priv;
233 struct parport_operations *ops;
234 struct parport tmp;
235 struct parport *p = &tmp;
236
237 priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
238 if (!priv) {
239 printk(KERN_DEBUG "parport (0x%lx): no memory!\n", base);
240 return NULL;
241 }
242 ops = kmemdup(&parport_gsc_ops, sizeof(struct parport_operations),
243 GFP_KERNEL);
244 if (!ops) {
245 printk(KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
246 base);
247 kfree (priv);
248 return NULL;
249 }
250 priv->ctr = 0xc;
251 priv->ctr_writable = 0xff;
252 p->base = base;
253 p->base_hi = base_hi;
254 p->irq = irq;
255 p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
256 p->ops = ops;
257 p->private_data = priv;
258 p->physport = p;
259 if (!parport_SPP_supported (p)) {
260 /* No port. */
261 kfree (priv);
262 kfree(ops);
263 return NULL;
264 }
265 parport_PS2_supported (p);
266
267 if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
268 PARPORT_DMA_NONE, ops))) {
269 kfree (priv);
270 kfree (ops);
271 return NULL;
272 }
273
274 p->dev = &padev->dev;
275 p->base_hi = base_hi;
276 p->modes = tmp.modes;
277 p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
278 p->private_data = priv;
279
280 pr_info("%s: PC-style at 0x%lx", p->name, p->base);
281 p->irq = irq;
282 if (p->irq == PARPORT_IRQ_AUTO) {
283 p->irq = PARPORT_IRQ_NONE;
284 }
285 if (p->irq != PARPORT_IRQ_NONE)
286 pr_cont(", irq %d", p->irq);
287
288 pr_cont(" [");
289#define printmode(x) \
290do { \
291 if (p->modes & PARPORT_MODE_##x) \
292 pr_cont("%s%s", f++ ? "," : "", #x); \
293} while (0)
294 {
295 int f = 0;
296 printmode(PCSPP);
297 printmode(TRISTATE);
298 printmode(COMPAT);
299 printmode(EPP);
300// printmode(ECP);
301// printmode(DMA);
302 }
303#undef printmode
304 pr_cont("]\n");
305
306 if (p->irq != PARPORT_IRQ_NONE) {
307 if (request_irq (p->irq, parport_irq_handler,
308 0, p->name, p)) {
309 pr_warn("%s: irq %d in use, resorting to polled operation\n",
310 p->name, p->irq);
311 p->irq = PARPORT_IRQ_NONE;
312 }
313 }
314
315 /* Done probing. Now put the port into a sensible start-up state. */
316
317 parport_gsc_write_data(p, 0);
318 parport_gsc_data_forward (p);
319
320 /* Now that we've told the sharing engine about the port, and
321 found out its characteristics, let the high-level drivers
322 know about it. */
323 parport_announce_port (p);
324
325 return p;
326}
327
328
329#define PARPORT_GSC_OFFSET 0x800
330
331static int parport_count;
332
333static int __init parport_init_chip(struct parisc_device *dev)
334{
335 struct parport *p;
336 unsigned long port;
337
338 if (!dev->irq) {
339 pr_warn("IRQ not found for parallel device at 0x%llx\n",
340 (unsigned long long)dev->hpa.start);
341 return -ENODEV;
342 }
343
344 port = dev->hpa.start + PARPORT_GSC_OFFSET;
345
346 /* some older machines with ASP-chip don't support
347 * the enhanced parport modes.
348 */
349 if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {
350
351 /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
352 pr_info("%s: initialize bidirectional-mode\n", __func__);
353 parport_writeb ( (0x10 + 0x20), port + 4);
354
355 } else {
356 pr_info("%s: enhanced parport-modes not supported\n", __func__);
357 }
358
359 p = parport_gsc_probe_port(port, 0, dev->irq, dev);
360 if (p)
361 parport_count++;
362 dev_set_drvdata(&dev->dev, p);
363
364 return 0;
365}
366
367static void __exit parport_remove_chip(struct parisc_device *dev)
368{
369 struct parport *p = dev_get_drvdata(&dev->dev);
370 if (p) {
371 struct parport_operations *ops = p->ops;
372 parport_remove_port(p);
373 if (p->irq != PARPORT_IRQ_NONE)
374 free_irq(p->irq, p);
375 kfree (p->private_data);
376 parport_put_port(p);
377 kfree (ops); /* hope no-one cached it */
378 }
379}
380
381static const struct parisc_device_id parport_tbl[] __initconst = {
382 { HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
383 { 0, }
384};
385
386MODULE_DEVICE_TABLE(parisc, parport_tbl);
387
388static struct parisc_driver parport_driver __refdata = {
389 .name = "Parallel",
390 .id_table = parport_tbl,
391 .probe = parport_init_chip,
392 .remove = __exit_p(parport_remove_chip),
393};
394
395static int parport_gsc_init(void)
396{
397 return register_parisc_driver(&parport_driver);
398}
399
400static void parport_gsc_exit(void)
401{
402 unregister_parisc_driver(&parport_driver);
403}
404
405module_init(parport_gsc_init);
406module_exit(parport_gsc_exit);
1/*
2 * Low-level parallel-support for PC-style hardware integrated in the
3 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
11 *
12 *
13 * based on parport_pc.c by
14 * Grant Guenther <grant@torque.net>
15 * Phil Blundell <philb@gnu.org>
16 * Tim Waugh <tim@cyberelk.demon.co.uk>
17 * Jose Renau <renau@acm.org>
18 * David Campbell
19 * Andrea Arcangeli
20 */
21
22#undef DEBUG /* undef for production */
23
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/errno.h>
28#include <linux/interrupt.h>
29#include <linux/ioport.h>
30#include <linux/kernel.h>
31#include <linux/slab.h>
32#include <linux/pci.h>
33#include <linux/sysctl.h>
34
35#include <asm/io.h>
36#include <asm/dma.h>
37#include <asm/uaccess.h>
38#include <asm/superio.h>
39
40#include <linux/parport.h>
41#include <asm/pdc.h>
42#include <asm/parisc-device.h>
43#include <asm/hardware.h>
44#include "parport_gsc.h"
45
46
47MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
48MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
49MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
50MODULE_LICENSE("GPL");
51
52
53/*
54 * Clear TIMEOUT BIT in EPP MODE
55 *
56 * This is also used in SPP detection.
57 */
58static int clear_epp_timeout(struct parport *pb)
59{
60 unsigned char r;
61
62 if (!(parport_gsc_read_status(pb) & 0x01))
63 return 1;
64
65 /* To clear timeout some chips require double read */
66 parport_gsc_read_status(pb);
67 r = parport_gsc_read_status(pb);
68 parport_writeb (r | 0x01, STATUS (pb)); /* Some reset by writing 1 */
69 parport_writeb (r & 0xfe, STATUS (pb)); /* Others by writing 0 */
70 r = parport_gsc_read_status(pb);
71
72 return !(r & 0x01);
73}
74
75/*
76 * Access functions.
77 *
78 * Most of these aren't static because they may be used by the
79 * parport_xxx_yyy macros. extern __inline__ versions of several
80 * of these are in parport_gsc.h.
81 */
82
83void parport_gsc_init_state(struct pardevice *dev, struct parport_state *s)
84{
85 s->u.pc.ctr = 0xc | (dev->irq_func ? 0x10 : 0x0);
86}
87
88void parport_gsc_save_state(struct parport *p, struct parport_state *s)
89{
90 s->u.pc.ctr = parport_readb (CONTROL (p));
91}
92
93void parport_gsc_restore_state(struct parport *p, struct parport_state *s)
94{
95 parport_writeb (s->u.pc.ctr, CONTROL (p));
96}
97
98struct parport_operations parport_gsc_ops =
99{
100 .write_data = parport_gsc_write_data,
101 .read_data = parport_gsc_read_data,
102
103 .write_control = parport_gsc_write_control,
104 .read_control = parport_gsc_read_control,
105 .frob_control = parport_gsc_frob_control,
106
107 .read_status = parport_gsc_read_status,
108
109 .enable_irq = parport_gsc_enable_irq,
110 .disable_irq = parport_gsc_disable_irq,
111
112 .data_forward = parport_gsc_data_forward,
113 .data_reverse = parport_gsc_data_reverse,
114
115 .init_state = parport_gsc_init_state,
116 .save_state = parport_gsc_save_state,
117 .restore_state = parport_gsc_restore_state,
118
119 .epp_write_data = parport_ieee1284_epp_write_data,
120 .epp_read_data = parport_ieee1284_epp_read_data,
121 .epp_write_addr = parport_ieee1284_epp_write_addr,
122 .epp_read_addr = parport_ieee1284_epp_read_addr,
123
124 .ecp_write_data = parport_ieee1284_ecp_write_data,
125 .ecp_read_data = parport_ieee1284_ecp_read_data,
126 .ecp_write_addr = parport_ieee1284_ecp_write_addr,
127
128 .compat_write_data = parport_ieee1284_write_compat,
129 .nibble_read_data = parport_ieee1284_read_nibble,
130 .byte_read_data = parport_ieee1284_read_byte,
131
132 .owner = THIS_MODULE,
133};
134
135/* --- Mode detection ------------------------------------- */
136
137/*
138 * Checks for port existence, all ports support SPP MODE
139 */
140static int __devinit parport_SPP_supported(struct parport *pb)
141{
142 unsigned char r, w;
143
144 /*
145 * first clear an eventually pending EPP timeout
146 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
147 * that does not even respond to SPP cycles if an EPP
148 * timeout is pending
149 */
150 clear_epp_timeout(pb);
151
152 /* Do a simple read-write test to make sure the port exists. */
153 w = 0xc;
154 parport_writeb (w, CONTROL (pb));
155
156 /* Is there a control register that we can read from? Some
157 * ports don't allow reads, so read_control just returns a
158 * software copy. Some ports _do_ allow reads, so bypass the
159 * software copy here. In addition, some bits aren't
160 * writable. */
161 r = parport_readb (CONTROL (pb));
162 if ((r & 0xf) == w) {
163 w = 0xe;
164 parport_writeb (w, CONTROL (pb));
165 r = parport_readb (CONTROL (pb));
166 parport_writeb (0xc, CONTROL (pb));
167 if ((r & 0xf) == w)
168 return PARPORT_MODE_PCSPP;
169 }
170
171 /* Try the data register. The data lines aren't tri-stated at
172 * this stage, so we expect back what we wrote. */
173 w = 0xaa;
174 parport_gsc_write_data (pb, w);
175 r = parport_gsc_read_data (pb);
176 if (r == w) {
177 w = 0x55;
178 parport_gsc_write_data (pb, w);
179 r = parport_gsc_read_data (pb);
180 if (r == w)
181 return PARPORT_MODE_PCSPP;
182 }
183
184 return 0;
185}
186
187/* Detect PS/2 support.
188 *
189 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
190 * allows us to read data from the data lines. In theory we would get back
191 * 0xff but any peripheral attached to the port may drag some or all of the
192 * lines down to zero. So if we get back anything that isn't the contents
193 * of the data register we deem PS/2 support to be present.
194 *
195 * Some SPP ports have "half PS/2" ability - you can't turn off the line
196 * drivers, but an external peripheral with sufficiently beefy drivers of
197 * its own can overpower them and assert its own levels onto the bus, from
198 * where they can then be read back as normal. Ports with this property
199 * and the right type of device attached are likely to fail the SPP test,
200 * (as they will appear to have stuck bits) and so the fact that they might
201 * be misdetected here is rather academic.
202 */
203
204static int __devinit parport_PS2_supported(struct parport *pb)
205{
206 int ok = 0;
207
208 clear_epp_timeout(pb);
209
210 /* try to tri-state the buffer */
211 parport_gsc_data_reverse (pb);
212
213 parport_gsc_write_data(pb, 0x55);
214 if (parport_gsc_read_data(pb) != 0x55) ok++;
215
216 parport_gsc_write_data(pb, 0xaa);
217 if (parport_gsc_read_data(pb) != 0xaa) ok++;
218
219 /* cancel input mode */
220 parport_gsc_data_forward (pb);
221
222 if (ok) {
223 pb->modes |= PARPORT_MODE_TRISTATE;
224 } else {
225 struct parport_gsc_private *priv = pb->private_data;
226 priv->ctr_writable &= ~0x20;
227 }
228
229 return ok;
230}
231
232
233/* --- Initialisation code -------------------------------- */
234
235struct parport *__devinit parport_gsc_probe_port (unsigned long base,
236 unsigned long base_hi,
237 int irq, int dma,
238 struct pci_dev *dev)
239{
240 struct parport_gsc_private *priv;
241 struct parport_operations *ops;
242 struct parport tmp;
243 struct parport *p = &tmp;
244
245 priv = kzalloc (sizeof (struct parport_gsc_private), GFP_KERNEL);
246 if (!priv) {
247 printk (KERN_DEBUG "parport (0x%lx): no memory!\n", base);
248 return NULL;
249 }
250 ops = kmalloc (sizeof (struct parport_operations), GFP_KERNEL);
251 if (!ops) {
252 printk (KERN_DEBUG "parport (0x%lx): no memory for ops!\n",
253 base);
254 kfree (priv);
255 return NULL;
256 }
257 memcpy (ops, &parport_gsc_ops, sizeof (struct parport_operations));
258 priv->ctr = 0xc;
259 priv->ctr_writable = 0xff;
260 priv->dma_buf = 0;
261 priv->dma_handle = 0;
262 priv->dev = dev;
263 p->base = base;
264 p->base_hi = base_hi;
265 p->irq = irq;
266 p->dma = dma;
267 p->modes = PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT;
268 p->ops = ops;
269 p->private_data = priv;
270 p->physport = p;
271 if (!parport_SPP_supported (p)) {
272 /* No port. */
273 kfree (priv);
274 return NULL;
275 }
276 parport_PS2_supported (p);
277
278 if (!(p = parport_register_port(base, PARPORT_IRQ_NONE,
279 PARPORT_DMA_NONE, ops))) {
280 kfree (priv);
281 kfree (ops);
282 return NULL;
283 }
284
285 p->base_hi = base_hi;
286 p->modes = tmp.modes;
287 p->size = (p->modes & PARPORT_MODE_EPP)?8:3;
288 p->private_data = priv;
289
290 printk(KERN_INFO "%s: PC-style at 0x%lx", p->name, p->base);
291 p->irq = irq;
292 if (p->irq == PARPORT_IRQ_AUTO) {
293 p->irq = PARPORT_IRQ_NONE;
294 }
295 if (p->irq != PARPORT_IRQ_NONE) {
296 printk(", irq %d", p->irq);
297
298 if (p->dma == PARPORT_DMA_AUTO) {
299 p->dma = PARPORT_DMA_NONE;
300 }
301 }
302 if (p->dma == PARPORT_DMA_AUTO) /* To use DMA, giving the irq
303 is mandatory (see above) */
304 p->dma = PARPORT_DMA_NONE;
305
306 printk(" [");
307#define printmode(x) {if(p->modes&PARPORT_MODE_##x){printk("%s%s",f?",":"",#x);f++;}}
308 {
309 int f = 0;
310 printmode(PCSPP);
311 printmode(TRISTATE);
312 printmode(COMPAT)
313 printmode(EPP);
314// printmode(ECP);
315// printmode(DMA);
316 }
317#undef printmode
318 printk("]\n");
319
320 if (p->irq != PARPORT_IRQ_NONE) {
321 if (request_irq (p->irq, parport_irq_handler,
322 0, p->name, p)) {
323 printk (KERN_WARNING "%s: irq %d in use, "
324 "resorting to polled operation\n",
325 p->name, p->irq);
326 p->irq = PARPORT_IRQ_NONE;
327 p->dma = PARPORT_DMA_NONE;
328 }
329 }
330
331 /* Done probing. Now put the port into a sensible start-up state. */
332
333 parport_gsc_write_data(p, 0);
334 parport_gsc_data_forward (p);
335
336 /* Now that we've told the sharing engine about the port, and
337 found out its characteristics, let the high-level drivers
338 know about it. */
339 parport_announce_port (p);
340
341 return p;
342}
343
344
345#define PARPORT_GSC_OFFSET 0x800
346
347static int __devinitdata parport_count;
348
349static int __devinit parport_init_chip(struct parisc_device *dev)
350{
351 struct parport *p;
352 unsigned long port;
353
354 if (!dev->irq) {
355 printk(KERN_WARNING "IRQ not found for parallel device at 0x%llx\n",
356 (unsigned long long)dev->hpa.start);
357 return -ENODEV;
358 }
359
360 port = dev->hpa.start + PARPORT_GSC_OFFSET;
361
362 /* some older machines with ASP-chip don't support
363 * the enhanced parport modes.
364 */
365 if (boot_cpu_data.cpu_type > pcxt && !pdc_add_valid(port+4)) {
366
367 /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
368 printk("%s: initialize bidirectional-mode.\n", __func__);
369 parport_writeb ( (0x10 + 0x20), port + 4);
370
371 } else {
372 printk("%s: enhanced parport-modes not supported.\n", __func__);
373 }
374
375 p = parport_gsc_probe_port(port, 0, dev->irq,
376 /* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE, NULL);
377 if (p)
378 parport_count++;
379 dev_set_drvdata(&dev->dev, p);
380
381 return 0;
382}
383
384static int __devexit parport_remove_chip(struct parisc_device *dev)
385{
386 struct parport *p = dev_get_drvdata(&dev->dev);
387 if (p) {
388 struct parport_gsc_private *priv = p->private_data;
389 struct parport_operations *ops = p->ops;
390 parport_remove_port(p);
391 if (p->dma != PARPORT_DMA_NONE)
392 free_dma(p->dma);
393 if (p->irq != PARPORT_IRQ_NONE)
394 free_irq(p->irq, p);
395 if (priv->dma_buf)
396 pci_free_consistent(priv->dev, PAGE_SIZE,
397 priv->dma_buf,
398 priv->dma_handle);
399 kfree (p->private_data);
400 parport_put_port(p);
401 kfree (ops); /* hope no-one cached it */
402 }
403 return 0;
404}
405
406static struct parisc_device_id parport_tbl[] = {
407 { HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x74 },
408 { 0, }
409};
410
411MODULE_DEVICE_TABLE(parisc, parport_tbl);
412
413static struct parisc_driver parport_driver = {
414 .name = "Parallel",
415 .id_table = parport_tbl,
416 .probe = parport_init_chip,
417 .remove = __devexit_p(parport_remove_chip),
418};
419
420int __devinit parport_gsc_init(void)
421{
422 return register_parisc_driver(&parport_driver);
423}
424
425static void __devexit parport_gsc_exit(void)
426{
427 unregister_parisc_driver(&parport_driver);
428}
429
430module_init(parport_gsc_init);
431module_exit(parport_gsc_exit);