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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * Modifications for ppc64:
6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 */
8
9#include <linux/string.h>
10#include <linux/sched.h>
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/jump_label.h>
15#include <linux/of.h>
16
17#include <asm/cputable.h>
18#include <asm/mce.h>
19#include <asm/mmu.h>
20#include <asm/setup.h>
21#include <asm/cpu_setup.h>
22
23static struct cpu_spec the_cpu_spec __ro_after_init;
24
25struct cpu_spec *cur_cpu_spec __ro_after_init = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* The platform string corresponding to the real PVR */
29const char *powerpc_base_platform;
30
31#include "cpu_specs.h"
32
33void __init set_cur_cpu_spec(struct cpu_spec *s)
34{
35 struct cpu_spec *t = &the_cpu_spec;
36
37 t = PTRRELOC(t);
38 /*
39 * use memcpy() instead of *t = *s so that GCC replaces it
40 * by __memcpy() when KASAN is active
41 */
42 memcpy(t, s, sizeof(*t));
43
44 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
45}
46
47static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
48 struct cpu_spec *s)
49{
50 struct cpu_spec *t = &the_cpu_spec;
51 struct cpu_spec old;
52
53 t = PTRRELOC(t);
54 old = *t;
55
56 /*
57 * Copy everything, then do fixups. Use memcpy() instead of *t = *s
58 * so that GCC replaces it by __memcpy() when KASAN is active
59 */
60 memcpy(t, s, sizeof(*t));
61
62 /*
63 * If we are overriding a previous value derived from the real
64 * PVR with a new value obtained using a logical PVR value,
65 * don't modify the performance monitor fields.
66 */
67 if (old.num_pmcs && !s->num_pmcs) {
68 t->num_pmcs = old.num_pmcs;
69 t->pmc_type = old.pmc_type;
70
71 /*
72 * Let's ensure that the
73 * fix for the PMAO bug is enabled on compatibility mode.
74 */
75 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
76 }
77
78 /* Set kuap ON at startup, will be disabled later if cmdline has 'nosmap' */
79 if (IS_ENABLED(CONFIG_PPC_KUAP) && IS_ENABLED(CONFIG_PPC32))
80 t->mmu_features |= MMU_FTR_KUAP;
81
82 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
83
84 /*
85 * Set the base platform string once; assumes
86 * we're called with real pvr first.
87 */
88 if (*PTRRELOC(&powerpc_base_platform) == NULL)
89 *PTRRELOC(&powerpc_base_platform) = t->platform;
90
91#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
92 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
93 * that processor. I will consolidate that at a later time, for now,
94 * just use #ifdef. We also don't need to PTRRELOC the function
95 * pointer on ppc64 and booke as we are running at 0 in real mode
96 * on ppc64 and reloc_offset is always 0 on booke.
97 */
98 if (t->cpu_setup) {
99 t->cpu_setup(offset, t);
100 }
101#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
102
103 return t;
104}
105
106struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
107{
108 struct cpu_spec *s = cpu_specs;
109 int i;
110
111 BUILD_BUG_ON(!ARRAY_SIZE(cpu_specs));
112
113 s = PTRRELOC(s);
114
115 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
116 if ((pvr & s->pvr_mask) == s->pvr_value)
117 return setup_cpu_spec(offset, s);
118 }
119
120 BUG();
121
122 return NULL;
123}
124
125/*
126 * Used by cpufeatures to get the name for CPUs with a PVR table.
127 * If they don't hae a PVR table, cpufeatures gets the name from
128 * cpu device-tree node.
129 */
130void __init identify_cpu_name(unsigned int pvr)
131{
132 struct cpu_spec *s = cpu_specs;
133 struct cpu_spec *t = &the_cpu_spec;
134 int i;
135
136 s = PTRRELOC(s);
137 t = PTRRELOC(t);
138
139 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
140 if ((pvr & s->pvr_mask) == s->pvr_value) {
141 t->cpu_name = s->cpu_name;
142 return;
143 }
144 }
145}
146
147
148#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
149struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
150 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
151};
152EXPORT_SYMBOL_GPL(cpu_feature_keys);
153
154void __init cpu_feature_keys_init(void)
155{
156 int i;
157
158 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
159 unsigned long f = 1ul << i;
160
161 if (!(cur_cpu_spec->cpu_features & f))
162 static_branch_disable(&cpu_feature_keys[i]);
163 }
164}
165
166struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
167 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
168};
169EXPORT_SYMBOL(mmu_feature_keys);
170
171void __init mmu_feature_keys_init(void)
172{
173 int i;
174
175 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
176 unsigned long f = 1ul << i;
177
178 if (!(cur_cpu_spec->mmu_features & f))
179 static_branch_disable(&mmu_feature_keys[i]);
180 }
181}
182#endif
1/*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <linux/export.h>
18
19#include <asm/oprofile_impl.h>
20#include <asm/cputable.h>
21#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22#include <asm/mmu.h>
23#include <asm/setup.h>
24
25struct cpu_spec* cur_cpu_spec = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* The platform string corresponding to the real PVR */
29const char *powerpc_base_platform;
30
31/* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38#ifdef CONFIG_PPC32
39extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61#endif /* CONFIG_PPC32 */
62#ifdef CONFIG_PPC64
63extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67extern void __restore_cpu_pa6t(void);
68extern void __restore_cpu_ppc970(void);
69extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70extern void __restore_cpu_power7(void);
71extern void __restore_cpu_a2(void);
72#endif /* CONFIG_PPC64 */
73#if defined(CONFIG_E500)
74extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
75extern void __restore_cpu_e5500(void);
76#endif /* CONFIG_E500 */
77
78/* This table only contains "desktop" CPUs, it need to be filled with embedded
79 * ones as well...
80 */
81#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
82 PPC_FEATURE_HAS_MMU)
83#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
84#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
85#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
87#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
88 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
89#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
91 PPC_FEATURE_TRUE_LE | \
92 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
93#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
95 PPC_FEATURE_TRUE_LE | \
96 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
97#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
98 PPC_FEATURE_TRUE_LE | \
99 PPC_FEATURE_HAS_ALTIVEC_COMP)
100#ifdef CONFIG_PPC_BOOK3E_64
101#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
102#else
103#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
104 PPC_FEATURE_BOOKE)
105#endif
106
107static struct cpu_spec __initdata cpu_specs[] = {
108#ifdef CONFIG_PPC_BOOK3S_64
109 { /* Power3 */
110 .pvr_mask = 0xffff0000,
111 .pvr_value = 0x00400000,
112 .cpu_name = "POWER3 (630)",
113 .cpu_features = CPU_FTRS_POWER3,
114 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
115 .mmu_features = MMU_FTR_HPTE_TABLE,
116 .icache_bsize = 128,
117 .dcache_bsize = 128,
118 .num_pmcs = 8,
119 .pmc_type = PPC_PMC_IBM,
120 .oprofile_cpu_type = "ppc64/power3",
121 .oprofile_type = PPC_OPROFILE_RS64,
122 .platform = "power3",
123 },
124 { /* Power3+ */
125 .pvr_mask = 0xffff0000,
126 .pvr_value = 0x00410000,
127 .cpu_name = "POWER3 (630+)",
128 .cpu_features = CPU_FTRS_POWER3,
129 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
130 .mmu_features = MMU_FTR_HPTE_TABLE,
131 .icache_bsize = 128,
132 .dcache_bsize = 128,
133 .num_pmcs = 8,
134 .pmc_type = PPC_PMC_IBM,
135 .oprofile_cpu_type = "ppc64/power3",
136 .oprofile_type = PPC_OPROFILE_RS64,
137 .platform = "power3",
138 },
139 { /* Northstar */
140 .pvr_mask = 0xffff0000,
141 .pvr_value = 0x00330000,
142 .cpu_name = "RS64-II (northstar)",
143 .cpu_features = CPU_FTRS_RS64,
144 .cpu_user_features = COMMON_USER_PPC64,
145 .mmu_features = MMU_FTR_HPTE_TABLE,
146 .icache_bsize = 128,
147 .dcache_bsize = 128,
148 .num_pmcs = 8,
149 .pmc_type = PPC_PMC_IBM,
150 .oprofile_cpu_type = "ppc64/rs64",
151 .oprofile_type = PPC_OPROFILE_RS64,
152 .platform = "rs64",
153 },
154 { /* Pulsar */
155 .pvr_mask = 0xffff0000,
156 .pvr_value = 0x00340000,
157 .cpu_name = "RS64-III (pulsar)",
158 .cpu_features = CPU_FTRS_RS64,
159 .cpu_user_features = COMMON_USER_PPC64,
160 .mmu_features = MMU_FTR_HPTE_TABLE,
161 .icache_bsize = 128,
162 .dcache_bsize = 128,
163 .num_pmcs = 8,
164 .pmc_type = PPC_PMC_IBM,
165 .oprofile_cpu_type = "ppc64/rs64",
166 .oprofile_type = PPC_OPROFILE_RS64,
167 .platform = "rs64",
168 },
169 { /* I-star */
170 .pvr_mask = 0xffff0000,
171 .pvr_value = 0x00360000,
172 .cpu_name = "RS64-III (icestar)",
173 .cpu_features = CPU_FTRS_RS64,
174 .cpu_user_features = COMMON_USER_PPC64,
175 .mmu_features = MMU_FTR_HPTE_TABLE,
176 .icache_bsize = 128,
177 .dcache_bsize = 128,
178 .num_pmcs = 8,
179 .pmc_type = PPC_PMC_IBM,
180 .oprofile_cpu_type = "ppc64/rs64",
181 .oprofile_type = PPC_OPROFILE_RS64,
182 .platform = "rs64",
183 },
184 { /* S-star */
185 .pvr_mask = 0xffff0000,
186 .pvr_value = 0x00370000,
187 .cpu_name = "RS64-IV (sstar)",
188 .cpu_features = CPU_FTRS_RS64,
189 .cpu_user_features = COMMON_USER_PPC64,
190 .mmu_features = MMU_FTR_HPTE_TABLE,
191 .icache_bsize = 128,
192 .dcache_bsize = 128,
193 .num_pmcs = 8,
194 .pmc_type = PPC_PMC_IBM,
195 .oprofile_cpu_type = "ppc64/rs64",
196 .oprofile_type = PPC_OPROFILE_RS64,
197 .platform = "rs64",
198 },
199 { /* Power4 */
200 .pvr_mask = 0xffff0000,
201 .pvr_value = 0x00350000,
202 .cpu_name = "POWER4 (gp)",
203 .cpu_features = CPU_FTRS_POWER4,
204 .cpu_user_features = COMMON_USER_POWER4,
205 .mmu_features = MMU_FTRS_POWER4,
206 .icache_bsize = 128,
207 .dcache_bsize = 128,
208 .num_pmcs = 8,
209 .pmc_type = PPC_PMC_IBM,
210 .oprofile_cpu_type = "ppc64/power4",
211 .oprofile_type = PPC_OPROFILE_POWER4,
212 .platform = "power4",
213 },
214 { /* Power4+ */
215 .pvr_mask = 0xffff0000,
216 .pvr_value = 0x00380000,
217 .cpu_name = "POWER4+ (gq)",
218 .cpu_features = CPU_FTRS_POWER4,
219 .cpu_user_features = COMMON_USER_POWER4,
220 .mmu_features = MMU_FTRS_POWER4,
221 .icache_bsize = 128,
222 .dcache_bsize = 128,
223 .num_pmcs = 8,
224 .pmc_type = PPC_PMC_IBM,
225 .oprofile_cpu_type = "ppc64/power4",
226 .oprofile_type = PPC_OPROFILE_POWER4,
227 .platform = "power4",
228 },
229 { /* PPC970 */
230 .pvr_mask = 0xffff0000,
231 .pvr_value = 0x00390000,
232 .cpu_name = "PPC970",
233 .cpu_features = CPU_FTRS_PPC970,
234 .cpu_user_features = COMMON_USER_POWER4 |
235 PPC_FEATURE_HAS_ALTIVEC_COMP,
236 .mmu_features = MMU_FTRS_PPC970,
237 .icache_bsize = 128,
238 .dcache_bsize = 128,
239 .num_pmcs = 8,
240 .pmc_type = PPC_PMC_IBM,
241 .cpu_setup = __setup_cpu_ppc970,
242 .cpu_restore = __restore_cpu_ppc970,
243 .oprofile_cpu_type = "ppc64/970",
244 .oprofile_type = PPC_OPROFILE_POWER4,
245 .platform = "ppc970",
246 },
247 { /* PPC970FX */
248 .pvr_mask = 0xffff0000,
249 .pvr_value = 0x003c0000,
250 .cpu_name = "PPC970FX",
251 .cpu_features = CPU_FTRS_PPC970,
252 .cpu_user_features = COMMON_USER_POWER4 |
253 PPC_FEATURE_HAS_ALTIVEC_COMP,
254 .mmu_features = MMU_FTRS_PPC970,
255 .icache_bsize = 128,
256 .dcache_bsize = 128,
257 .num_pmcs = 8,
258 .pmc_type = PPC_PMC_IBM,
259 .cpu_setup = __setup_cpu_ppc970,
260 .cpu_restore = __restore_cpu_ppc970,
261 .oprofile_cpu_type = "ppc64/970",
262 .oprofile_type = PPC_OPROFILE_POWER4,
263 .platform = "ppc970",
264 },
265 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
266 .pvr_mask = 0xffffffff,
267 .pvr_value = 0x00440100,
268 .cpu_name = "PPC970MP",
269 .cpu_features = CPU_FTRS_PPC970,
270 .cpu_user_features = COMMON_USER_POWER4 |
271 PPC_FEATURE_HAS_ALTIVEC_COMP,
272 .mmu_features = MMU_FTR_HPTE_TABLE,
273 .icache_bsize = 128,
274 .dcache_bsize = 128,
275 .num_pmcs = 8,
276 .pmc_type = PPC_PMC_IBM,
277 .cpu_setup = __setup_cpu_ppc970,
278 .cpu_restore = __restore_cpu_ppc970,
279 .oprofile_cpu_type = "ppc64/970MP",
280 .oprofile_type = PPC_OPROFILE_POWER4,
281 .platform = "ppc970",
282 },
283 { /* PPC970MP */
284 .pvr_mask = 0xffff0000,
285 .pvr_value = 0x00440000,
286 .cpu_name = "PPC970MP",
287 .cpu_features = CPU_FTRS_PPC970,
288 .cpu_user_features = COMMON_USER_POWER4 |
289 PPC_FEATURE_HAS_ALTIVEC_COMP,
290 .mmu_features = MMU_FTRS_PPC970,
291 .icache_bsize = 128,
292 .dcache_bsize = 128,
293 .num_pmcs = 8,
294 .pmc_type = PPC_PMC_IBM,
295 .cpu_setup = __setup_cpu_ppc970MP,
296 .cpu_restore = __restore_cpu_ppc970,
297 .oprofile_cpu_type = "ppc64/970MP",
298 .oprofile_type = PPC_OPROFILE_POWER4,
299 .platform = "ppc970",
300 },
301 { /* PPC970GX */
302 .pvr_mask = 0xffff0000,
303 .pvr_value = 0x00450000,
304 .cpu_name = "PPC970GX",
305 .cpu_features = CPU_FTRS_PPC970,
306 .cpu_user_features = COMMON_USER_POWER4 |
307 PPC_FEATURE_HAS_ALTIVEC_COMP,
308 .mmu_features = MMU_FTRS_PPC970,
309 .icache_bsize = 128,
310 .dcache_bsize = 128,
311 .num_pmcs = 8,
312 .pmc_type = PPC_PMC_IBM,
313 .cpu_setup = __setup_cpu_ppc970,
314 .oprofile_cpu_type = "ppc64/970",
315 .oprofile_type = PPC_OPROFILE_POWER4,
316 .platform = "ppc970",
317 },
318 { /* Power5 GR */
319 .pvr_mask = 0xffff0000,
320 .pvr_value = 0x003a0000,
321 .cpu_name = "POWER5 (gr)",
322 .cpu_features = CPU_FTRS_POWER5,
323 .cpu_user_features = COMMON_USER_POWER5,
324 .mmu_features = MMU_FTRS_POWER5,
325 .icache_bsize = 128,
326 .dcache_bsize = 128,
327 .num_pmcs = 6,
328 .pmc_type = PPC_PMC_IBM,
329 .oprofile_cpu_type = "ppc64/power5",
330 .oprofile_type = PPC_OPROFILE_POWER4,
331 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
332 * and above but only works on POWER5 and above
333 */
334 .oprofile_mmcra_sihv = MMCRA_SIHV,
335 .oprofile_mmcra_sipr = MMCRA_SIPR,
336 .platform = "power5",
337 },
338 { /* Power5++ */
339 .pvr_mask = 0xffffff00,
340 .pvr_value = 0x003b0300,
341 .cpu_name = "POWER5+ (gs)",
342 .cpu_features = CPU_FTRS_POWER5,
343 .cpu_user_features = COMMON_USER_POWER5_PLUS,
344 .mmu_features = MMU_FTRS_POWER5,
345 .icache_bsize = 128,
346 .dcache_bsize = 128,
347 .num_pmcs = 6,
348 .oprofile_cpu_type = "ppc64/power5++",
349 .oprofile_type = PPC_OPROFILE_POWER4,
350 .oprofile_mmcra_sihv = MMCRA_SIHV,
351 .oprofile_mmcra_sipr = MMCRA_SIPR,
352 .platform = "power5+",
353 },
354 { /* Power5 GS */
355 .pvr_mask = 0xffff0000,
356 .pvr_value = 0x003b0000,
357 .cpu_name = "POWER5+ (gs)",
358 .cpu_features = CPU_FTRS_POWER5,
359 .cpu_user_features = COMMON_USER_POWER5_PLUS,
360 .mmu_features = MMU_FTRS_POWER5,
361 .icache_bsize = 128,
362 .dcache_bsize = 128,
363 .num_pmcs = 6,
364 .pmc_type = PPC_PMC_IBM,
365 .oprofile_cpu_type = "ppc64/power5+",
366 .oprofile_type = PPC_OPROFILE_POWER4,
367 .oprofile_mmcra_sihv = MMCRA_SIHV,
368 .oprofile_mmcra_sipr = MMCRA_SIPR,
369 .platform = "power5+",
370 },
371 { /* POWER6 in P5+ mode; 2.04-compliant processor */
372 .pvr_mask = 0xffffffff,
373 .pvr_value = 0x0f000001,
374 .cpu_name = "POWER5+",
375 .cpu_features = CPU_FTRS_POWER5,
376 .cpu_user_features = COMMON_USER_POWER5_PLUS,
377 .mmu_features = MMU_FTRS_POWER5,
378 .icache_bsize = 128,
379 .dcache_bsize = 128,
380 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
381 .oprofile_type = PPC_OPROFILE_POWER4,
382 .platform = "power5+",
383 },
384 { /* Power6 */
385 .pvr_mask = 0xffff0000,
386 .pvr_value = 0x003e0000,
387 .cpu_name = "POWER6 (raw)",
388 .cpu_features = CPU_FTRS_POWER6,
389 .cpu_user_features = COMMON_USER_POWER6 |
390 PPC_FEATURE_POWER6_EXT,
391 .mmu_features = MMU_FTRS_POWER6,
392 .icache_bsize = 128,
393 .dcache_bsize = 128,
394 .num_pmcs = 6,
395 .pmc_type = PPC_PMC_IBM,
396 .oprofile_cpu_type = "ppc64/power6",
397 .oprofile_type = PPC_OPROFILE_POWER4,
398 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
399 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
400 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
401 POWER6_MMCRA_OTHER,
402 .platform = "power6x",
403 },
404 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
405 .pvr_mask = 0xffffffff,
406 .pvr_value = 0x0f000002,
407 .cpu_name = "POWER6 (architected)",
408 .cpu_features = CPU_FTRS_POWER6,
409 .cpu_user_features = COMMON_USER_POWER6,
410 .mmu_features = MMU_FTRS_POWER6,
411 .icache_bsize = 128,
412 .dcache_bsize = 128,
413 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
414 .oprofile_type = PPC_OPROFILE_POWER4,
415 .platform = "power6",
416 },
417 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
418 .pvr_mask = 0xffffffff,
419 .pvr_value = 0x0f000003,
420 .cpu_name = "POWER7 (architected)",
421 .cpu_features = CPU_FTRS_POWER7,
422 .cpu_user_features = COMMON_USER_POWER7,
423 .mmu_features = MMU_FTRS_POWER7,
424 .icache_bsize = 128,
425 .dcache_bsize = 128,
426 .oprofile_type = PPC_OPROFILE_POWER4,
427 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
428 .cpu_setup = __setup_cpu_power7,
429 .cpu_restore = __restore_cpu_power7,
430 .platform = "power7",
431 },
432 { /* Power7 */
433 .pvr_mask = 0xffff0000,
434 .pvr_value = 0x003f0000,
435 .cpu_name = "POWER7 (raw)",
436 .cpu_features = CPU_FTRS_POWER7,
437 .cpu_user_features = COMMON_USER_POWER7,
438 .mmu_features = MMU_FTRS_POWER7,
439 .icache_bsize = 128,
440 .dcache_bsize = 128,
441 .num_pmcs = 6,
442 .pmc_type = PPC_PMC_IBM,
443 .oprofile_cpu_type = "ppc64/power7",
444 .oprofile_type = PPC_OPROFILE_POWER4,
445 .cpu_setup = __setup_cpu_power7,
446 .cpu_restore = __restore_cpu_power7,
447 .platform = "power7",
448 },
449 { /* Power7+ */
450 .pvr_mask = 0xffff0000,
451 .pvr_value = 0x004A0000,
452 .cpu_name = "POWER7+ (raw)",
453 .cpu_features = CPU_FTRS_POWER7,
454 .cpu_user_features = COMMON_USER_POWER7,
455 .mmu_features = MMU_FTRS_POWER7,
456 .icache_bsize = 128,
457 .dcache_bsize = 128,
458 .num_pmcs = 6,
459 .pmc_type = PPC_PMC_IBM,
460 .oprofile_cpu_type = "ppc64/power7",
461 .oprofile_type = PPC_OPROFILE_POWER4,
462 .cpu_setup = __setup_cpu_power7,
463 .cpu_restore = __restore_cpu_power7,
464 .platform = "power7+",
465 },
466 { /* Cell Broadband Engine */
467 .pvr_mask = 0xffff0000,
468 .pvr_value = 0x00700000,
469 .cpu_name = "Cell Broadband Engine",
470 .cpu_features = CPU_FTRS_CELL,
471 .cpu_user_features = COMMON_USER_PPC64 |
472 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
473 PPC_FEATURE_SMT,
474 .mmu_features = MMU_FTRS_CELL,
475 .icache_bsize = 128,
476 .dcache_bsize = 128,
477 .num_pmcs = 4,
478 .pmc_type = PPC_PMC_IBM,
479 .oprofile_cpu_type = "ppc64/cell-be",
480 .oprofile_type = PPC_OPROFILE_CELL,
481 .platform = "ppc-cell-be",
482 },
483 { /* PA Semi PA6T */
484 .pvr_mask = 0x7fff0000,
485 .pvr_value = 0x00900000,
486 .cpu_name = "PA6T",
487 .cpu_features = CPU_FTRS_PA6T,
488 .cpu_user_features = COMMON_USER_PA6T,
489 .mmu_features = MMU_FTRS_PA6T,
490 .icache_bsize = 64,
491 .dcache_bsize = 64,
492 .num_pmcs = 6,
493 .pmc_type = PPC_PMC_PA6T,
494 .cpu_setup = __setup_cpu_pa6t,
495 .cpu_restore = __restore_cpu_pa6t,
496 .oprofile_cpu_type = "ppc64/pa6t",
497 .oprofile_type = PPC_OPROFILE_PA6T,
498 .platform = "pa6t",
499 },
500 { /* default match */
501 .pvr_mask = 0x00000000,
502 .pvr_value = 0x00000000,
503 .cpu_name = "POWER4 (compatible)",
504 .cpu_features = CPU_FTRS_COMPATIBLE,
505 .cpu_user_features = COMMON_USER_PPC64,
506 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
507 .icache_bsize = 128,
508 .dcache_bsize = 128,
509 .num_pmcs = 6,
510 .pmc_type = PPC_PMC_IBM,
511 .platform = "power4",
512 }
513#endif /* CONFIG_PPC_BOOK3S_64 */
514
515#ifdef CONFIG_PPC32
516#if CLASSIC_PPC
517 { /* 601 */
518 .pvr_mask = 0xffff0000,
519 .pvr_value = 0x00010000,
520 .cpu_name = "601",
521 .cpu_features = CPU_FTRS_PPC601,
522 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
523 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
524 .mmu_features = MMU_FTR_HPTE_TABLE,
525 .icache_bsize = 32,
526 .dcache_bsize = 32,
527 .machine_check = machine_check_generic,
528 .platform = "ppc601",
529 },
530 { /* 603 */
531 .pvr_mask = 0xffff0000,
532 .pvr_value = 0x00030000,
533 .cpu_name = "603",
534 .cpu_features = CPU_FTRS_603,
535 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
536 .mmu_features = 0,
537 .icache_bsize = 32,
538 .dcache_bsize = 32,
539 .cpu_setup = __setup_cpu_603,
540 .machine_check = machine_check_generic,
541 .platform = "ppc603",
542 },
543 { /* 603e */
544 .pvr_mask = 0xffff0000,
545 .pvr_value = 0x00060000,
546 .cpu_name = "603e",
547 .cpu_features = CPU_FTRS_603,
548 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
549 .mmu_features = 0,
550 .icache_bsize = 32,
551 .dcache_bsize = 32,
552 .cpu_setup = __setup_cpu_603,
553 .machine_check = machine_check_generic,
554 .platform = "ppc603",
555 },
556 { /* 603ev */
557 .pvr_mask = 0xffff0000,
558 .pvr_value = 0x00070000,
559 .cpu_name = "603ev",
560 .cpu_features = CPU_FTRS_603,
561 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
562 .mmu_features = 0,
563 .icache_bsize = 32,
564 .dcache_bsize = 32,
565 .cpu_setup = __setup_cpu_603,
566 .machine_check = machine_check_generic,
567 .platform = "ppc603",
568 },
569 { /* 604 */
570 .pvr_mask = 0xffff0000,
571 .pvr_value = 0x00040000,
572 .cpu_name = "604",
573 .cpu_features = CPU_FTRS_604,
574 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
575 .mmu_features = MMU_FTR_HPTE_TABLE,
576 .icache_bsize = 32,
577 .dcache_bsize = 32,
578 .num_pmcs = 2,
579 .cpu_setup = __setup_cpu_604,
580 .machine_check = machine_check_generic,
581 .platform = "ppc604",
582 },
583 { /* 604e */
584 .pvr_mask = 0xfffff000,
585 .pvr_value = 0x00090000,
586 .cpu_name = "604e",
587 .cpu_features = CPU_FTRS_604,
588 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
589 .mmu_features = MMU_FTR_HPTE_TABLE,
590 .icache_bsize = 32,
591 .dcache_bsize = 32,
592 .num_pmcs = 4,
593 .cpu_setup = __setup_cpu_604,
594 .machine_check = machine_check_generic,
595 .platform = "ppc604",
596 },
597 { /* 604r */
598 .pvr_mask = 0xffff0000,
599 .pvr_value = 0x00090000,
600 .cpu_name = "604r",
601 .cpu_features = CPU_FTRS_604,
602 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
603 .mmu_features = MMU_FTR_HPTE_TABLE,
604 .icache_bsize = 32,
605 .dcache_bsize = 32,
606 .num_pmcs = 4,
607 .cpu_setup = __setup_cpu_604,
608 .machine_check = machine_check_generic,
609 .platform = "ppc604",
610 },
611 { /* 604ev */
612 .pvr_mask = 0xffff0000,
613 .pvr_value = 0x000a0000,
614 .cpu_name = "604ev",
615 .cpu_features = CPU_FTRS_604,
616 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
617 .mmu_features = MMU_FTR_HPTE_TABLE,
618 .icache_bsize = 32,
619 .dcache_bsize = 32,
620 .num_pmcs = 4,
621 .cpu_setup = __setup_cpu_604,
622 .machine_check = machine_check_generic,
623 .platform = "ppc604",
624 },
625 { /* 740/750 (0x4202, don't support TAU ?) */
626 .pvr_mask = 0xffffffff,
627 .pvr_value = 0x00084202,
628 .cpu_name = "740/750",
629 .cpu_features = CPU_FTRS_740_NOTAU,
630 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
631 .mmu_features = MMU_FTR_HPTE_TABLE,
632 .icache_bsize = 32,
633 .dcache_bsize = 32,
634 .num_pmcs = 4,
635 .cpu_setup = __setup_cpu_750,
636 .machine_check = machine_check_generic,
637 .platform = "ppc750",
638 },
639 { /* 750CX (80100 and 8010x?) */
640 .pvr_mask = 0xfffffff0,
641 .pvr_value = 0x00080100,
642 .cpu_name = "750CX",
643 .cpu_features = CPU_FTRS_750,
644 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
645 .mmu_features = MMU_FTR_HPTE_TABLE,
646 .icache_bsize = 32,
647 .dcache_bsize = 32,
648 .num_pmcs = 4,
649 .cpu_setup = __setup_cpu_750cx,
650 .machine_check = machine_check_generic,
651 .platform = "ppc750",
652 },
653 { /* 750CX (82201 and 82202) */
654 .pvr_mask = 0xfffffff0,
655 .pvr_value = 0x00082200,
656 .cpu_name = "750CX",
657 .cpu_features = CPU_FTRS_750,
658 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
659 .mmu_features = MMU_FTR_HPTE_TABLE,
660 .icache_bsize = 32,
661 .dcache_bsize = 32,
662 .num_pmcs = 4,
663 .pmc_type = PPC_PMC_IBM,
664 .cpu_setup = __setup_cpu_750cx,
665 .machine_check = machine_check_generic,
666 .platform = "ppc750",
667 },
668 { /* 750CXe (82214) */
669 .pvr_mask = 0xfffffff0,
670 .pvr_value = 0x00082210,
671 .cpu_name = "750CXe",
672 .cpu_features = CPU_FTRS_750,
673 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
674 .mmu_features = MMU_FTR_HPTE_TABLE,
675 .icache_bsize = 32,
676 .dcache_bsize = 32,
677 .num_pmcs = 4,
678 .pmc_type = PPC_PMC_IBM,
679 .cpu_setup = __setup_cpu_750cx,
680 .machine_check = machine_check_generic,
681 .platform = "ppc750",
682 },
683 { /* 750CXe "Gekko" (83214) */
684 .pvr_mask = 0xffffffff,
685 .pvr_value = 0x00083214,
686 .cpu_name = "750CXe",
687 .cpu_features = CPU_FTRS_750,
688 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
689 .mmu_features = MMU_FTR_HPTE_TABLE,
690 .icache_bsize = 32,
691 .dcache_bsize = 32,
692 .num_pmcs = 4,
693 .pmc_type = PPC_PMC_IBM,
694 .cpu_setup = __setup_cpu_750cx,
695 .machine_check = machine_check_generic,
696 .platform = "ppc750",
697 },
698 { /* 750CL (and "Broadway") */
699 .pvr_mask = 0xfffff0e0,
700 .pvr_value = 0x00087000,
701 .cpu_name = "750CL",
702 .cpu_features = CPU_FTRS_750CL,
703 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
704 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
705 .icache_bsize = 32,
706 .dcache_bsize = 32,
707 .num_pmcs = 4,
708 .pmc_type = PPC_PMC_IBM,
709 .cpu_setup = __setup_cpu_750,
710 .machine_check = machine_check_generic,
711 .platform = "ppc750",
712 .oprofile_cpu_type = "ppc/750",
713 .oprofile_type = PPC_OPROFILE_G4,
714 },
715 { /* 745/755 */
716 .pvr_mask = 0xfffff000,
717 .pvr_value = 0x00083000,
718 .cpu_name = "745/755",
719 .cpu_features = CPU_FTRS_750,
720 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
721 .mmu_features = MMU_FTR_HPTE_TABLE,
722 .icache_bsize = 32,
723 .dcache_bsize = 32,
724 .num_pmcs = 4,
725 .pmc_type = PPC_PMC_IBM,
726 .cpu_setup = __setup_cpu_750,
727 .machine_check = machine_check_generic,
728 .platform = "ppc750",
729 },
730 { /* 750FX rev 1.x */
731 .pvr_mask = 0xffffff00,
732 .pvr_value = 0x70000100,
733 .cpu_name = "750FX",
734 .cpu_features = CPU_FTRS_750FX1,
735 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
736 .mmu_features = MMU_FTR_HPTE_TABLE,
737 .icache_bsize = 32,
738 .dcache_bsize = 32,
739 .num_pmcs = 4,
740 .pmc_type = PPC_PMC_IBM,
741 .cpu_setup = __setup_cpu_750,
742 .machine_check = machine_check_generic,
743 .platform = "ppc750",
744 .oprofile_cpu_type = "ppc/750",
745 .oprofile_type = PPC_OPROFILE_G4,
746 },
747 { /* 750FX rev 2.0 must disable HID0[DPM] */
748 .pvr_mask = 0xffffffff,
749 .pvr_value = 0x70000200,
750 .cpu_name = "750FX",
751 .cpu_features = CPU_FTRS_750FX2,
752 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
753 .mmu_features = MMU_FTR_HPTE_TABLE,
754 .icache_bsize = 32,
755 .dcache_bsize = 32,
756 .num_pmcs = 4,
757 .pmc_type = PPC_PMC_IBM,
758 .cpu_setup = __setup_cpu_750,
759 .machine_check = machine_check_generic,
760 .platform = "ppc750",
761 .oprofile_cpu_type = "ppc/750",
762 .oprofile_type = PPC_OPROFILE_G4,
763 },
764 { /* 750FX (All revs except 2.0) */
765 .pvr_mask = 0xffff0000,
766 .pvr_value = 0x70000000,
767 .cpu_name = "750FX",
768 .cpu_features = CPU_FTRS_750FX,
769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
770 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
771 .icache_bsize = 32,
772 .dcache_bsize = 32,
773 .num_pmcs = 4,
774 .pmc_type = PPC_PMC_IBM,
775 .cpu_setup = __setup_cpu_750fx,
776 .machine_check = machine_check_generic,
777 .platform = "ppc750",
778 .oprofile_cpu_type = "ppc/750",
779 .oprofile_type = PPC_OPROFILE_G4,
780 },
781 { /* 750GX */
782 .pvr_mask = 0xffff0000,
783 .pvr_value = 0x70020000,
784 .cpu_name = "750GX",
785 .cpu_features = CPU_FTRS_750GX,
786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
787 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
788 .icache_bsize = 32,
789 .dcache_bsize = 32,
790 .num_pmcs = 4,
791 .pmc_type = PPC_PMC_IBM,
792 .cpu_setup = __setup_cpu_750fx,
793 .machine_check = machine_check_generic,
794 .platform = "ppc750",
795 .oprofile_cpu_type = "ppc/750",
796 .oprofile_type = PPC_OPROFILE_G4,
797 },
798 { /* 740/750 (L2CR bit need fixup for 740) */
799 .pvr_mask = 0xffff0000,
800 .pvr_value = 0x00080000,
801 .cpu_name = "740/750",
802 .cpu_features = CPU_FTRS_740,
803 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
804 .mmu_features = MMU_FTR_HPTE_TABLE,
805 .icache_bsize = 32,
806 .dcache_bsize = 32,
807 .num_pmcs = 4,
808 .pmc_type = PPC_PMC_IBM,
809 .cpu_setup = __setup_cpu_750,
810 .machine_check = machine_check_generic,
811 .platform = "ppc750",
812 },
813 { /* 7400 rev 1.1 ? (no TAU) */
814 .pvr_mask = 0xffffffff,
815 .pvr_value = 0x000c1101,
816 .cpu_name = "7400 (1.1)",
817 .cpu_features = CPU_FTRS_7400_NOTAU,
818 .cpu_user_features = COMMON_USER |
819 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
820 .mmu_features = MMU_FTR_HPTE_TABLE,
821 .icache_bsize = 32,
822 .dcache_bsize = 32,
823 .num_pmcs = 4,
824 .pmc_type = PPC_PMC_G4,
825 .cpu_setup = __setup_cpu_7400,
826 .machine_check = machine_check_generic,
827 .platform = "ppc7400",
828 },
829 { /* 7400 */
830 .pvr_mask = 0xffff0000,
831 .pvr_value = 0x000c0000,
832 .cpu_name = "7400",
833 .cpu_features = CPU_FTRS_7400,
834 .cpu_user_features = COMMON_USER |
835 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
836 .mmu_features = MMU_FTR_HPTE_TABLE,
837 .icache_bsize = 32,
838 .dcache_bsize = 32,
839 .num_pmcs = 4,
840 .pmc_type = PPC_PMC_G4,
841 .cpu_setup = __setup_cpu_7400,
842 .machine_check = machine_check_generic,
843 .platform = "ppc7400",
844 },
845 { /* 7410 */
846 .pvr_mask = 0xffff0000,
847 .pvr_value = 0x800c0000,
848 .cpu_name = "7410",
849 .cpu_features = CPU_FTRS_7400,
850 .cpu_user_features = COMMON_USER |
851 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
852 .mmu_features = MMU_FTR_HPTE_TABLE,
853 .icache_bsize = 32,
854 .dcache_bsize = 32,
855 .num_pmcs = 4,
856 .pmc_type = PPC_PMC_G4,
857 .cpu_setup = __setup_cpu_7410,
858 .machine_check = machine_check_generic,
859 .platform = "ppc7400",
860 },
861 { /* 7450 2.0 - no doze/nap */
862 .pvr_mask = 0xffffffff,
863 .pvr_value = 0x80000200,
864 .cpu_name = "7450",
865 .cpu_features = CPU_FTRS_7450_20,
866 .cpu_user_features = COMMON_USER |
867 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
868 .mmu_features = MMU_FTR_HPTE_TABLE,
869 .icache_bsize = 32,
870 .dcache_bsize = 32,
871 .num_pmcs = 6,
872 .pmc_type = PPC_PMC_G4,
873 .cpu_setup = __setup_cpu_745x,
874 .oprofile_cpu_type = "ppc/7450",
875 .oprofile_type = PPC_OPROFILE_G4,
876 .machine_check = machine_check_generic,
877 .platform = "ppc7450",
878 },
879 { /* 7450 2.1 */
880 .pvr_mask = 0xffffffff,
881 .pvr_value = 0x80000201,
882 .cpu_name = "7450",
883 .cpu_features = CPU_FTRS_7450_21,
884 .cpu_user_features = COMMON_USER |
885 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
886 .mmu_features = MMU_FTR_HPTE_TABLE,
887 .icache_bsize = 32,
888 .dcache_bsize = 32,
889 .num_pmcs = 6,
890 .pmc_type = PPC_PMC_G4,
891 .cpu_setup = __setup_cpu_745x,
892 .oprofile_cpu_type = "ppc/7450",
893 .oprofile_type = PPC_OPROFILE_G4,
894 .machine_check = machine_check_generic,
895 .platform = "ppc7450",
896 },
897 { /* 7450 2.3 and newer */
898 .pvr_mask = 0xffff0000,
899 .pvr_value = 0x80000000,
900 .cpu_name = "7450",
901 .cpu_features = CPU_FTRS_7450_23,
902 .cpu_user_features = COMMON_USER |
903 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
904 .mmu_features = MMU_FTR_HPTE_TABLE,
905 .icache_bsize = 32,
906 .dcache_bsize = 32,
907 .num_pmcs = 6,
908 .pmc_type = PPC_PMC_G4,
909 .cpu_setup = __setup_cpu_745x,
910 .oprofile_cpu_type = "ppc/7450",
911 .oprofile_type = PPC_OPROFILE_G4,
912 .machine_check = machine_check_generic,
913 .platform = "ppc7450",
914 },
915 { /* 7455 rev 1.x */
916 .pvr_mask = 0xffffff00,
917 .pvr_value = 0x80010100,
918 .cpu_name = "7455",
919 .cpu_features = CPU_FTRS_7455_1,
920 .cpu_user_features = COMMON_USER |
921 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
922 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
923 .icache_bsize = 32,
924 .dcache_bsize = 32,
925 .num_pmcs = 6,
926 .pmc_type = PPC_PMC_G4,
927 .cpu_setup = __setup_cpu_745x,
928 .oprofile_cpu_type = "ppc/7450",
929 .oprofile_type = PPC_OPROFILE_G4,
930 .machine_check = machine_check_generic,
931 .platform = "ppc7450",
932 },
933 { /* 7455 rev 2.0 */
934 .pvr_mask = 0xffffffff,
935 .pvr_value = 0x80010200,
936 .cpu_name = "7455",
937 .cpu_features = CPU_FTRS_7455_20,
938 .cpu_user_features = COMMON_USER |
939 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
940 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
941 .icache_bsize = 32,
942 .dcache_bsize = 32,
943 .num_pmcs = 6,
944 .pmc_type = PPC_PMC_G4,
945 .cpu_setup = __setup_cpu_745x,
946 .oprofile_cpu_type = "ppc/7450",
947 .oprofile_type = PPC_OPROFILE_G4,
948 .machine_check = machine_check_generic,
949 .platform = "ppc7450",
950 },
951 { /* 7455 others */
952 .pvr_mask = 0xffff0000,
953 .pvr_value = 0x80010000,
954 .cpu_name = "7455",
955 .cpu_features = CPU_FTRS_7455,
956 .cpu_user_features = COMMON_USER |
957 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
958 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
959 .icache_bsize = 32,
960 .dcache_bsize = 32,
961 .num_pmcs = 6,
962 .pmc_type = PPC_PMC_G4,
963 .cpu_setup = __setup_cpu_745x,
964 .oprofile_cpu_type = "ppc/7450",
965 .oprofile_type = PPC_OPROFILE_G4,
966 .machine_check = machine_check_generic,
967 .platform = "ppc7450",
968 },
969 { /* 7447/7457 Rev 1.0 */
970 .pvr_mask = 0xffffffff,
971 .pvr_value = 0x80020100,
972 .cpu_name = "7447/7457",
973 .cpu_features = CPU_FTRS_7447_10,
974 .cpu_user_features = COMMON_USER |
975 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
976 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
977 .icache_bsize = 32,
978 .dcache_bsize = 32,
979 .num_pmcs = 6,
980 .pmc_type = PPC_PMC_G4,
981 .cpu_setup = __setup_cpu_745x,
982 .oprofile_cpu_type = "ppc/7450",
983 .oprofile_type = PPC_OPROFILE_G4,
984 .machine_check = machine_check_generic,
985 .platform = "ppc7450",
986 },
987 { /* 7447/7457 Rev 1.1 */
988 .pvr_mask = 0xffffffff,
989 .pvr_value = 0x80020101,
990 .cpu_name = "7447/7457",
991 .cpu_features = CPU_FTRS_7447_10,
992 .cpu_user_features = COMMON_USER |
993 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
994 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
995 .icache_bsize = 32,
996 .dcache_bsize = 32,
997 .num_pmcs = 6,
998 .pmc_type = PPC_PMC_G4,
999 .cpu_setup = __setup_cpu_745x,
1000 .oprofile_cpu_type = "ppc/7450",
1001 .oprofile_type = PPC_OPROFILE_G4,
1002 .machine_check = machine_check_generic,
1003 .platform = "ppc7450",
1004 },
1005 { /* 7447/7457 Rev 1.2 and later */
1006 .pvr_mask = 0xffff0000,
1007 .pvr_value = 0x80020000,
1008 .cpu_name = "7447/7457",
1009 .cpu_features = CPU_FTRS_7447,
1010 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1011 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1012 .icache_bsize = 32,
1013 .dcache_bsize = 32,
1014 .num_pmcs = 6,
1015 .pmc_type = PPC_PMC_G4,
1016 .cpu_setup = __setup_cpu_745x,
1017 .oprofile_cpu_type = "ppc/7450",
1018 .oprofile_type = PPC_OPROFILE_G4,
1019 .machine_check = machine_check_generic,
1020 .platform = "ppc7450",
1021 },
1022 { /* 7447A */
1023 .pvr_mask = 0xffff0000,
1024 .pvr_value = 0x80030000,
1025 .cpu_name = "7447A",
1026 .cpu_features = CPU_FTRS_7447A,
1027 .cpu_user_features = COMMON_USER |
1028 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1029 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1030 .icache_bsize = 32,
1031 .dcache_bsize = 32,
1032 .num_pmcs = 6,
1033 .pmc_type = PPC_PMC_G4,
1034 .cpu_setup = __setup_cpu_745x,
1035 .oprofile_cpu_type = "ppc/7450",
1036 .oprofile_type = PPC_OPROFILE_G4,
1037 .machine_check = machine_check_generic,
1038 .platform = "ppc7450",
1039 },
1040 { /* 7448 */
1041 .pvr_mask = 0xffff0000,
1042 .pvr_value = 0x80040000,
1043 .cpu_name = "7448",
1044 .cpu_features = CPU_FTRS_7448,
1045 .cpu_user_features = COMMON_USER |
1046 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1047 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1048 .icache_bsize = 32,
1049 .dcache_bsize = 32,
1050 .num_pmcs = 6,
1051 .pmc_type = PPC_PMC_G4,
1052 .cpu_setup = __setup_cpu_745x,
1053 .oprofile_cpu_type = "ppc/7450",
1054 .oprofile_type = PPC_OPROFILE_G4,
1055 .machine_check = machine_check_generic,
1056 .platform = "ppc7450",
1057 },
1058 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1059 .pvr_mask = 0x7fff0000,
1060 .pvr_value = 0x00810000,
1061 .cpu_name = "82xx",
1062 .cpu_features = CPU_FTRS_82XX,
1063 .cpu_user_features = COMMON_USER,
1064 .mmu_features = 0,
1065 .icache_bsize = 32,
1066 .dcache_bsize = 32,
1067 .cpu_setup = __setup_cpu_603,
1068 .machine_check = machine_check_generic,
1069 .platform = "ppc603",
1070 },
1071 { /* All G2_LE (603e core, plus some) have the same pvr */
1072 .pvr_mask = 0x7fff0000,
1073 .pvr_value = 0x00820000,
1074 .cpu_name = "G2_LE",
1075 .cpu_features = CPU_FTRS_G2_LE,
1076 .cpu_user_features = COMMON_USER,
1077 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1078 .icache_bsize = 32,
1079 .dcache_bsize = 32,
1080 .cpu_setup = __setup_cpu_603,
1081 .machine_check = machine_check_generic,
1082 .platform = "ppc603",
1083 },
1084 { /* e300c1 (a 603e core, plus some) on 83xx */
1085 .pvr_mask = 0x7fff0000,
1086 .pvr_value = 0x00830000,
1087 .cpu_name = "e300c1",
1088 .cpu_features = CPU_FTRS_E300,
1089 .cpu_user_features = COMMON_USER,
1090 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1091 .icache_bsize = 32,
1092 .dcache_bsize = 32,
1093 .cpu_setup = __setup_cpu_603,
1094 .machine_check = machine_check_generic,
1095 .platform = "ppc603",
1096 },
1097 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1098 .pvr_mask = 0x7fff0000,
1099 .pvr_value = 0x00840000,
1100 .cpu_name = "e300c2",
1101 .cpu_features = CPU_FTRS_E300C2,
1102 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1103 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1104 MMU_FTR_NEED_DTLB_SW_LRU,
1105 .icache_bsize = 32,
1106 .dcache_bsize = 32,
1107 .cpu_setup = __setup_cpu_603,
1108 .machine_check = machine_check_generic,
1109 .platform = "ppc603",
1110 },
1111 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1112 .pvr_mask = 0x7fff0000,
1113 .pvr_value = 0x00850000,
1114 .cpu_name = "e300c3",
1115 .cpu_features = CPU_FTRS_E300,
1116 .cpu_user_features = COMMON_USER,
1117 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1118 MMU_FTR_NEED_DTLB_SW_LRU,
1119 .icache_bsize = 32,
1120 .dcache_bsize = 32,
1121 .cpu_setup = __setup_cpu_603,
1122 .num_pmcs = 4,
1123 .oprofile_cpu_type = "ppc/e300",
1124 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1125 .platform = "ppc603",
1126 },
1127 { /* e300c4 (e300c1, plus one IU) */
1128 .pvr_mask = 0x7fff0000,
1129 .pvr_value = 0x00860000,
1130 .cpu_name = "e300c4",
1131 .cpu_features = CPU_FTRS_E300,
1132 .cpu_user_features = COMMON_USER,
1133 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1134 MMU_FTR_NEED_DTLB_SW_LRU,
1135 .icache_bsize = 32,
1136 .dcache_bsize = 32,
1137 .cpu_setup = __setup_cpu_603,
1138 .machine_check = machine_check_generic,
1139 .num_pmcs = 4,
1140 .oprofile_cpu_type = "ppc/e300",
1141 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1142 .platform = "ppc603",
1143 },
1144 { /* default match, we assume split I/D cache & TB (non-601)... */
1145 .pvr_mask = 0x00000000,
1146 .pvr_value = 0x00000000,
1147 .cpu_name = "(generic PPC)",
1148 .cpu_features = CPU_FTRS_CLASSIC32,
1149 .cpu_user_features = COMMON_USER,
1150 .mmu_features = MMU_FTR_HPTE_TABLE,
1151 .icache_bsize = 32,
1152 .dcache_bsize = 32,
1153 .machine_check = machine_check_generic,
1154 .platform = "ppc603",
1155 },
1156#endif /* CLASSIC_PPC */
1157#ifdef CONFIG_8xx
1158 { /* 8xx */
1159 .pvr_mask = 0xffff0000,
1160 .pvr_value = 0x00500000,
1161 .cpu_name = "8xx",
1162 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1163 * if the 8xx code is there.... */
1164 .cpu_features = CPU_FTRS_8XX,
1165 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1166 .mmu_features = MMU_FTR_TYPE_8xx,
1167 .icache_bsize = 16,
1168 .dcache_bsize = 16,
1169 .platform = "ppc823",
1170 },
1171#endif /* CONFIG_8xx */
1172#ifdef CONFIG_40x
1173 { /* 403GC */
1174 .pvr_mask = 0xffffff00,
1175 .pvr_value = 0x00200200,
1176 .cpu_name = "403GC",
1177 .cpu_features = CPU_FTRS_40X,
1178 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1179 .mmu_features = MMU_FTR_TYPE_40x,
1180 .icache_bsize = 16,
1181 .dcache_bsize = 16,
1182 .machine_check = machine_check_4xx,
1183 .platform = "ppc403",
1184 },
1185 { /* 403GCX */
1186 .pvr_mask = 0xffffff00,
1187 .pvr_value = 0x00201400,
1188 .cpu_name = "403GCX",
1189 .cpu_features = CPU_FTRS_40X,
1190 .cpu_user_features = PPC_FEATURE_32 |
1191 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1192 .mmu_features = MMU_FTR_TYPE_40x,
1193 .icache_bsize = 16,
1194 .dcache_bsize = 16,
1195 .machine_check = machine_check_4xx,
1196 .platform = "ppc403",
1197 },
1198 { /* 403G ?? */
1199 .pvr_mask = 0xffff0000,
1200 .pvr_value = 0x00200000,
1201 .cpu_name = "403G ??",
1202 .cpu_features = CPU_FTRS_40X,
1203 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1204 .mmu_features = MMU_FTR_TYPE_40x,
1205 .icache_bsize = 16,
1206 .dcache_bsize = 16,
1207 .machine_check = machine_check_4xx,
1208 .platform = "ppc403",
1209 },
1210 { /* 405GP */
1211 .pvr_mask = 0xffff0000,
1212 .pvr_value = 0x40110000,
1213 .cpu_name = "405GP",
1214 .cpu_features = CPU_FTRS_40X,
1215 .cpu_user_features = PPC_FEATURE_32 |
1216 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1217 .mmu_features = MMU_FTR_TYPE_40x,
1218 .icache_bsize = 32,
1219 .dcache_bsize = 32,
1220 .machine_check = machine_check_4xx,
1221 .platform = "ppc405",
1222 },
1223 { /* STB 03xxx */
1224 .pvr_mask = 0xffff0000,
1225 .pvr_value = 0x40130000,
1226 .cpu_name = "STB03xxx",
1227 .cpu_features = CPU_FTRS_40X,
1228 .cpu_user_features = PPC_FEATURE_32 |
1229 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1230 .mmu_features = MMU_FTR_TYPE_40x,
1231 .icache_bsize = 32,
1232 .dcache_bsize = 32,
1233 .machine_check = machine_check_4xx,
1234 .platform = "ppc405",
1235 },
1236 { /* STB 04xxx */
1237 .pvr_mask = 0xffff0000,
1238 .pvr_value = 0x41810000,
1239 .cpu_name = "STB04xxx",
1240 .cpu_features = CPU_FTRS_40X,
1241 .cpu_user_features = PPC_FEATURE_32 |
1242 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1243 .mmu_features = MMU_FTR_TYPE_40x,
1244 .icache_bsize = 32,
1245 .dcache_bsize = 32,
1246 .machine_check = machine_check_4xx,
1247 .platform = "ppc405",
1248 },
1249 { /* NP405L */
1250 .pvr_mask = 0xffff0000,
1251 .pvr_value = 0x41610000,
1252 .cpu_name = "NP405L",
1253 .cpu_features = CPU_FTRS_40X,
1254 .cpu_user_features = PPC_FEATURE_32 |
1255 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1256 .mmu_features = MMU_FTR_TYPE_40x,
1257 .icache_bsize = 32,
1258 .dcache_bsize = 32,
1259 .machine_check = machine_check_4xx,
1260 .platform = "ppc405",
1261 },
1262 { /* NP4GS3 */
1263 .pvr_mask = 0xffff0000,
1264 .pvr_value = 0x40B10000,
1265 .cpu_name = "NP4GS3",
1266 .cpu_features = CPU_FTRS_40X,
1267 .cpu_user_features = PPC_FEATURE_32 |
1268 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1269 .mmu_features = MMU_FTR_TYPE_40x,
1270 .icache_bsize = 32,
1271 .dcache_bsize = 32,
1272 .machine_check = machine_check_4xx,
1273 .platform = "ppc405",
1274 },
1275 { /* NP405H */
1276 .pvr_mask = 0xffff0000,
1277 .pvr_value = 0x41410000,
1278 .cpu_name = "NP405H",
1279 .cpu_features = CPU_FTRS_40X,
1280 .cpu_user_features = PPC_FEATURE_32 |
1281 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1282 .mmu_features = MMU_FTR_TYPE_40x,
1283 .icache_bsize = 32,
1284 .dcache_bsize = 32,
1285 .machine_check = machine_check_4xx,
1286 .platform = "ppc405",
1287 },
1288 { /* 405GPr */
1289 .pvr_mask = 0xffff0000,
1290 .pvr_value = 0x50910000,
1291 .cpu_name = "405GPr",
1292 .cpu_features = CPU_FTRS_40X,
1293 .cpu_user_features = PPC_FEATURE_32 |
1294 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1295 .mmu_features = MMU_FTR_TYPE_40x,
1296 .icache_bsize = 32,
1297 .dcache_bsize = 32,
1298 .machine_check = machine_check_4xx,
1299 .platform = "ppc405",
1300 },
1301 { /* STBx25xx */
1302 .pvr_mask = 0xffff0000,
1303 .pvr_value = 0x51510000,
1304 .cpu_name = "STBx25xx",
1305 .cpu_features = CPU_FTRS_40X,
1306 .cpu_user_features = PPC_FEATURE_32 |
1307 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1308 .mmu_features = MMU_FTR_TYPE_40x,
1309 .icache_bsize = 32,
1310 .dcache_bsize = 32,
1311 .machine_check = machine_check_4xx,
1312 .platform = "ppc405",
1313 },
1314 { /* 405LP */
1315 .pvr_mask = 0xffff0000,
1316 .pvr_value = 0x41F10000,
1317 .cpu_name = "405LP",
1318 .cpu_features = CPU_FTRS_40X,
1319 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1320 .mmu_features = MMU_FTR_TYPE_40x,
1321 .icache_bsize = 32,
1322 .dcache_bsize = 32,
1323 .machine_check = machine_check_4xx,
1324 .platform = "ppc405",
1325 },
1326 { /* Xilinx Virtex-II Pro */
1327 .pvr_mask = 0xfffff000,
1328 .pvr_value = 0x20010000,
1329 .cpu_name = "Virtex-II Pro",
1330 .cpu_features = CPU_FTRS_40X,
1331 .cpu_user_features = PPC_FEATURE_32 |
1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1333 .mmu_features = MMU_FTR_TYPE_40x,
1334 .icache_bsize = 32,
1335 .dcache_bsize = 32,
1336 .machine_check = machine_check_4xx,
1337 .platform = "ppc405",
1338 },
1339 { /* Xilinx Virtex-4 FX */
1340 .pvr_mask = 0xfffff000,
1341 .pvr_value = 0x20011000,
1342 .cpu_name = "Virtex-4 FX",
1343 .cpu_features = CPU_FTRS_40X,
1344 .cpu_user_features = PPC_FEATURE_32 |
1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1346 .mmu_features = MMU_FTR_TYPE_40x,
1347 .icache_bsize = 32,
1348 .dcache_bsize = 32,
1349 .machine_check = machine_check_4xx,
1350 .platform = "ppc405",
1351 },
1352 { /* 405EP */
1353 .pvr_mask = 0xffff0000,
1354 .pvr_value = 0x51210000,
1355 .cpu_name = "405EP",
1356 .cpu_features = CPU_FTRS_40X,
1357 .cpu_user_features = PPC_FEATURE_32 |
1358 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1359 .mmu_features = MMU_FTR_TYPE_40x,
1360 .icache_bsize = 32,
1361 .dcache_bsize = 32,
1362 .machine_check = machine_check_4xx,
1363 .platform = "ppc405",
1364 },
1365 { /* 405EX Rev. A/B with Security */
1366 .pvr_mask = 0xffff000f,
1367 .pvr_value = 0x12910007,
1368 .cpu_name = "405EX Rev. A/B",
1369 .cpu_features = CPU_FTRS_40X,
1370 .cpu_user_features = PPC_FEATURE_32 |
1371 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1372 .mmu_features = MMU_FTR_TYPE_40x,
1373 .icache_bsize = 32,
1374 .dcache_bsize = 32,
1375 .machine_check = machine_check_4xx,
1376 .platform = "ppc405",
1377 },
1378 { /* 405EX Rev. C without Security */
1379 .pvr_mask = 0xffff000f,
1380 .pvr_value = 0x1291000d,
1381 .cpu_name = "405EX Rev. C",
1382 .cpu_features = CPU_FTRS_40X,
1383 .cpu_user_features = PPC_FEATURE_32 |
1384 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1385 .mmu_features = MMU_FTR_TYPE_40x,
1386 .icache_bsize = 32,
1387 .dcache_bsize = 32,
1388 .machine_check = machine_check_4xx,
1389 .platform = "ppc405",
1390 },
1391 { /* 405EX Rev. C with Security */
1392 .pvr_mask = 0xffff000f,
1393 .pvr_value = 0x1291000f,
1394 .cpu_name = "405EX Rev. C",
1395 .cpu_features = CPU_FTRS_40X,
1396 .cpu_user_features = PPC_FEATURE_32 |
1397 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1398 .mmu_features = MMU_FTR_TYPE_40x,
1399 .icache_bsize = 32,
1400 .dcache_bsize = 32,
1401 .machine_check = machine_check_4xx,
1402 .platform = "ppc405",
1403 },
1404 { /* 405EX Rev. D without Security */
1405 .pvr_mask = 0xffff000f,
1406 .pvr_value = 0x12910003,
1407 .cpu_name = "405EX Rev. D",
1408 .cpu_features = CPU_FTRS_40X,
1409 .cpu_user_features = PPC_FEATURE_32 |
1410 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1411 .mmu_features = MMU_FTR_TYPE_40x,
1412 .icache_bsize = 32,
1413 .dcache_bsize = 32,
1414 .machine_check = machine_check_4xx,
1415 .platform = "ppc405",
1416 },
1417 { /* 405EX Rev. D with Security */
1418 .pvr_mask = 0xffff000f,
1419 .pvr_value = 0x12910005,
1420 .cpu_name = "405EX Rev. D",
1421 .cpu_features = CPU_FTRS_40X,
1422 .cpu_user_features = PPC_FEATURE_32 |
1423 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1424 .mmu_features = MMU_FTR_TYPE_40x,
1425 .icache_bsize = 32,
1426 .dcache_bsize = 32,
1427 .machine_check = machine_check_4xx,
1428 .platform = "ppc405",
1429 },
1430 { /* 405EXr Rev. A/B without Security */
1431 .pvr_mask = 0xffff000f,
1432 .pvr_value = 0x12910001,
1433 .cpu_name = "405EXr Rev. A/B",
1434 .cpu_features = CPU_FTRS_40X,
1435 .cpu_user_features = PPC_FEATURE_32 |
1436 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1437 .mmu_features = MMU_FTR_TYPE_40x,
1438 .icache_bsize = 32,
1439 .dcache_bsize = 32,
1440 .machine_check = machine_check_4xx,
1441 .platform = "ppc405",
1442 },
1443 { /* 405EXr Rev. C without Security */
1444 .pvr_mask = 0xffff000f,
1445 .pvr_value = 0x12910009,
1446 .cpu_name = "405EXr Rev. C",
1447 .cpu_features = CPU_FTRS_40X,
1448 .cpu_user_features = PPC_FEATURE_32 |
1449 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1450 .mmu_features = MMU_FTR_TYPE_40x,
1451 .icache_bsize = 32,
1452 .dcache_bsize = 32,
1453 .machine_check = machine_check_4xx,
1454 .platform = "ppc405",
1455 },
1456 { /* 405EXr Rev. C with Security */
1457 .pvr_mask = 0xffff000f,
1458 .pvr_value = 0x1291000b,
1459 .cpu_name = "405EXr Rev. C",
1460 .cpu_features = CPU_FTRS_40X,
1461 .cpu_user_features = PPC_FEATURE_32 |
1462 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1463 .mmu_features = MMU_FTR_TYPE_40x,
1464 .icache_bsize = 32,
1465 .dcache_bsize = 32,
1466 .machine_check = machine_check_4xx,
1467 .platform = "ppc405",
1468 },
1469 { /* 405EXr Rev. D without Security */
1470 .pvr_mask = 0xffff000f,
1471 .pvr_value = 0x12910000,
1472 .cpu_name = "405EXr Rev. D",
1473 .cpu_features = CPU_FTRS_40X,
1474 .cpu_user_features = PPC_FEATURE_32 |
1475 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1476 .mmu_features = MMU_FTR_TYPE_40x,
1477 .icache_bsize = 32,
1478 .dcache_bsize = 32,
1479 .machine_check = machine_check_4xx,
1480 .platform = "ppc405",
1481 },
1482 { /* 405EXr Rev. D with Security */
1483 .pvr_mask = 0xffff000f,
1484 .pvr_value = 0x12910002,
1485 .cpu_name = "405EXr Rev. D",
1486 .cpu_features = CPU_FTRS_40X,
1487 .cpu_user_features = PPC_FEATURE_32 |
1488 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1489 .mmu_features = MMU_FTR_TYPE_40x,
1490 .icache_bsize = 32,
1491 .dcache_bsize = 32,
1492 .machine_check = machine_check_4xx,
1493 .platform = "ppc405",
1494 },
1495 {
1496 /* 405EZ */
1497 .pvr_mask = 0xffff0000,
1498 .pvr_value = 0x41510000,
1499 .cpu_name = "405EZ",
1500 .cpu_features = CPU_FTRS_40X,
1501 .cpu_user_features = PPC_FEATURE_32 |
1502 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1503 .mmu_features = MMU_FTR_TYPE_40x,
1504 .icache_bsize = 32,
1505 .dcache_bsize = 32,
1506 .machine_check = machine_check_4xx,
1507 .platform = "ppc405",
1508 },
1509 { /* APM8018X */
1510 .pvr_mask = 0xffff0000,
1511 .pvr_value = 0x7ff11432,
1512 .cpu_name = "APM8018X",
1513 .cpu_features = CPU_FTRS_40X,
1514 .cpu_user_features = PPC_FEATURE_32 |
1515 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1516 .mmu_features = MMU_FTR_TYPE_40x,
1517 .icache_bsize = 32,
1518 .dcache_bsize = 32,
1519 .machine_check = machine_check_4xx,
1520 .platform = "ppc405",
1521 },
1522 { /* default match */
1523 .pvr_mask = 0x00000000,
1524 .pvr_value = 0x00000000,
1525 .cpu_name = "(generic 40x PPC)",
1526 .cpu_features = CPU_FTRS_40X,
1527 .cpu_user_features = PPC_FEATURE_32 |
1528 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1529 .mmu_features = MMU_FTR_TYPE_40x,
1530 .icache_bsize = 32,
1531 .dcache_bsize = 32,
1532 .machine_check = machine_check_4xx,
1533 .platform = "ppc405",
1534 }
1535
1536#endif /* CONFIG_40x */
1537#ifdef CONFIG_44x
1538 {
1539 .pvr_mask = 0xf0000fff,
1540 .pvr_value = 0x40000850,
1541 .cpu_name = "440GR Rev. A",
1542 .cpu_features = CPU_FTRS_44X,
1543 .cpu_user_features = COMMON_USER_BOOKE,
1544 .mmu_features = MMU_FTR_TYPE_44x,
1545 .icache_bsize = 32,
1546 .dcache_bsize = 32,
1547 .machine_check = machine_check_4xx,
1548 .platform = "ppc440",
1549 },
1550 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1551 .pvr_mask = 0xf0000fff,
1552 .pvr_value = 0x40000858,
1553 .cpu_name = "440EP Rev. A",
1554 .cpu_features = CPU_FTRS_44X,
1555 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1556 .mmu_features = MMU_FTR_TYPE_44x,
1557 .icache_bsize = 32,
1558 .dcache_bsize = 32,
1559 .cpu_setup = __setup_cpu_440ep,
1560 .machine_check = machine_check_4xx,
1561 .platform = "ppc440",
1562 },
1563 {
1564 .pvr_mask = 0xf0000fff,
1565 .pvr_value = 0x400008d3,
1566 .cpu_name = "440GR Rev. B",
1567 .cpu_features = CPU_FTRS_44X,
1568 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1569 .mmu_features = MMU_FTR_TYPE_44x,
1570 .icache_bsize = 32,
1571 .dcache_bsize = 32,
1572 .machine_check = machine_check_4xx,
1573 .platform = "ppc440",
1574 },
1575 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1576 .pvr_mask = 0xf0000ff7,
1577 .pvr_value = 0x400008d4,
1578 .cpu_name = "440EP Rev. C",
1579 .cpu_features = CPU_FTRS_44X,
1580 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1581 .mmu_features = MMU_FTR_TYPE_44x,
1582 .icache_bsize = 32,
1583 .dcache_bsize = 32,
1584 .cpu_setup = __setup_cpu_440ep,
1585 .machine_check = machine_check_4xx,
1586 .platform = "ppc440",
1587 },
1588 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1589 .pvr_mask = 0xf0000fff,
1590 .pvr_value = 0x400008db,
1591 .cpu_name = "440EP Rev. B",
1592 .cpu_features = CPU_FTRS_44X,
1593 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1594 .mmu_features = MMU_FTR_TYPE_44x,
1595 .icache_bsize = 32,
1596 .dcache_bsize = 32,
1597 .cpu_setup = __setup_cpu_440ep,
1598 .machine_check = machine_check_4xx,
1599 .platform = "ppc440",
1600 },
1601 { /* 440GRX */
1602 .pvr_mask = 0xf0000ffb,
1603 .pvr_value = 0x200008D0,
1604 .cpu_name = "440GRX",
1605 .cpu_features = CPU_FTRS_44X,
1606 .cpu_user_features = COMMON_USER_BOOKE,
1607 .mmu_features = MMU_FTR_TYPE_44x,
1608 .icache_bsize = 32,
1609 .dcache_bsize = 32,
1610 .cpu_setup = __setup_cpu_440grx,
1611 .machine_check = machine_check_440A,
1612 .platform = "ppc440",
1613 },
1614 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1615 .pvr_mask = 0xf0000ffb,
1616 .pvr_value = 0x200008D8,
1617 .cpu_name = "440EPX",
1618 .cpu_features = CPU_FTRS_44X,
1619 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1620 .mmu_features = MMU_FTR_TYPE_44x,
1621 .icache_bsize = 32,
1622 .dcache_bsize = 32,
1623 .cpu_setup = __setup_cpu_440epx,
1624 .machine_check = machine_check_440A,
1625 .platform = "ppc440",
1626 },
1627 { /* 440GP Rev. B */
1628 .pvr_mask = 0xf0000fff,
1629 .pvr_value = 0x40000440,
1630 .cpu_name = "440GP Rev. B",
1631 .cpu_features = CPU_FTRS_44X,
1632 .cpu_user_features = COMMON_USER_BOOKE,
1633 .mmu_features = MMU_FTR_TYPE_44x,
1634 .icache_bsize = 32,
1635 .dcache_bsize = 32,
1636 .machine_check = machine_check_4xx,
1637 .platform = "ppc440gp",
1638 },
1639 { /* 440GP Rev. C */
1640 .pvr_mask = 0xf0000fff,
1641 .pvr_value = 0x40000481,
1642 .cpu_name = "440GP Rev. C",
1643 .cpu_features = CPU_FTRS_44X,
1644 .cpu_user_features = COMMON_USER_BOOKE,
1645 .mmu_features = MMU_FTR_TYPE_44x,
1646 .icache_bsize = 32,
1647 .dcache_bsize = 32,
1648 .machine_check = machine_check_4xx,
1649 .platform = "ppc440gp",
1650 },
1651 { /* 440GX Rev. A */
1652 .pvr_mask = 0xf0000fff,
1653 .pvr_value = 0x50000850,
1654 .cpu_name = "440GX Rev. A",
1655 .cpu_features = CPU_FTRS_44X,
1656 .cpu_user_features = COMMON_USER_BOOKE,
1657 .mmu_features = MMU_FTR_TYPE_44x,
1658 .icache_bsize = 32,
1659 .dcache_bsize = 32,
1660 .cpu_setup = __setup_cpu_440gx,
1661 .machine_check = machine_check_440A,
1662 .platform = "ppc440",
1663 },
1664 { /* 440GX Rev. B */
1665 .pvr_mask = 0xf0000fff,
1666 .pvr_value = 0x50000851,
1667 .cpu_name = "440GX Rev. B",
1668 .cpu_features = CPU_FTRS_44X,
1669 .cpu_user_features = COMMON_USER_BOOKE,
1670 .mmu_features = MMU_FTR_TYPE_44x,
1671 .icache_bsize = 32,
1672 .dcache_bsize = 32,
1673 .cpu_setup = __setup_cpu_440gx,
1674 .machine_check = machine_check_440A,
1675 .platform = "ppc440",
1676 },
1677 { /* 440GX Rev. C */
1678 .pvr_mask = 0xf0000fff,
1679 .pvr_value = 0x50000892,
1680 .cpu_name = "440GX Rev. C",
1681 .cpu_features = CPU_FTRS_44X,
1682 .cpu_user_features = COMMON_USER_BOOKE,
1683 .mmu_features = MMU_FTR_TYPE_44x,
1684 .icache_bsize = 32,
1685 .dcache_bsize = 32,
1686 .cpu_setup = __setup_cpu_440gx,
1687 .machine_check = machine_check_440A,
1688 .platform = "ppc440",
1689 },
1690 { /* 440GX Rev. F */
1691 .pvr_mask = 0xf0000fff,
1692 .pvr_value = 0x50000894,
1693 .cpu_name = "440GX Rev. F",
1694 .cpu_features = CPU_FTRS_44X,
1695 .cpu_user_features = COMMON_USER_BOOKE,
1696 .mmu_features = MMU_FTR_TYPE_44x,
1697 .icache_bsize = 32,
1698 .dcache_bsize = 32,
1699 .cpu_setup = __setup_cpu_440gx,
1700 .machine_check = machine_check_440A,
1701 .platform = "ppc440",
1702 },
1703 { /* 440SP Rev. A */
1704 .pvr_mask = 0xfff00fff,
1705 .pvr_value = 0x53200891,
1706 .cpu_name = "440SP Rev. A",
1707 .cpu_features = CPU_FTRS_44X,
1708 .cpu_user_features = COMMON_USER_BOOKE,
1709 .mmu_features = MMU_FTR_TYPE_44x,
1710 .icache_bsize = 32,
1711 .dcache_bsize = 32,
1712 .machine_check = machine_check_4xx,
1713 .platform = "ppc440",
1714 },
1715 { /* 440SPe Rev. A */
1716 .pvr_mask = 0xfff00fff,
1717 .pvr_value = 0x53400890,
1718 .cpu_name = "440SPe Rev. A",
1719 .cpu_features = CPU_FTRS_44X,
1720 .cpu_user_features = COMMON_USER_BOOKE,
1721 .mmu_features = MMU_FTR_TYPE_44x,
1722 .icache_bsize = 32,
1723 .dcache_bsize = 32,
1724 .cpu_setup = __setup_cpu_440spe,
1725 .machine_check = machine_check_440A,
1726 .platform = "ppc440",
1727 },
1728 { /* 440SPe Rev. B */
1729 .pvr_mask = 0xfff00fff,
1730 .pvr_value = 0x53400891,
1731 .cpu_name = "440SPe Rev. B",
1732 .cpu_features = CPU_FTRS_44X,
1733 .cpu_user_features = COMMON_USER_BOOKE,
1734 .mmu_features = MMU_FTR_TYPE_44x,
1735 .icache_bsize = 32,
1736 .dcache_bsize = 32,
1737 .cpu_setup = __setup_cpu_440spe,
1738 .machine_check = machine_check_440A,
1739 .platform = "ppc440",
1740 },
1741 { /* 440 in Xilinx Virtex-5 FXT */
1742 .pvr_mask = 0xfffffff0,
1743 .pvr_value = 0x7ff21910,
1744 .cpu_name = "440 in Virtex-5 FXT",
1745 .cpu_features = CPU_FTRS_44X,
1746 .cpu_user_features = COMMON_USER_BOOKE,
1747 .mmu_features = MMU_FTR_TYPE_44x,
1748 .icache_bsize = 32,
1749 .dcache_bsize = 32,
1750 .cpu_setup = __setup_cpu_440x5,
1751 .machine_check = machine_check_440A,
1752 .platform = "ppc440",
1753 },
1754 { /* 460EX */
1755 .pvr_mask = 0xffff0006,
1756 .pvr_value = 0x13020002,
1757 .cpu_name = "460EX",
1758 .cpu_features = CPU_FTRS_440x6,
1759 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1760 .mmu_features = MMU_FTR_TYPE_44x,
1761 .icache_bsize = 32,
1762 .dcache_bsize = 32,
1763 .cpu_setup = __setup_cpu_460ex,
1764 .machine_check = machine_check_440A,
1765 .platform = "ppc440",
1766 },
1767 { /* 460EX Rev B */
1768 .pvr_mask = 0xffff0007,
1769 .pvr_value = 0x13020004,
1770 .cpu_name = "460EX Rev. B",
1771 .cpu_features = CPU_FTRS_440x6,
1772 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1773 .mmu_features = MMU_FTR_TYPE_44x,
1774 .icache_bsize = 32,
1775 .dcache_bsize = 32,
1776 .cpu_setup = __setup_cpu_460ex,
1777 .machine_check = machine_check_440A,
1778 .platform = "ppc440",
1779 },
1780 { /* 460GT */
1781 .pvr_mask = 0xffff0006,
1782 .pvr_value = 0x13020000,
1783 .cpu_name = "460GT",
1784 .cpu_features = CPU_FTRS_440x6,
1785 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1786 .mmu_features = MMU_FTR_TYPE_44x,
1787 .icache_bsize = 32,
1788 .dcache_bsize = 32,
1789 .cpu_setup = __setup_cpu_460gt,
1790 .machine_check = machine_check_440A,
1791 .platform = "ppc440",
1792 },
1793 { /* 460GT Rev B */
1794 .pvr_mask = 0xffff0007,
1795 .pvr_value = 0x13020005,
1796 .cpu_name = "460GT Rev. B",
1797 .cpu_features = CPU_FTRS_440x6,
1798 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1799 .mmu_features = MMU_FTR_TYPE_44x,
1800 .icache_bsize = 32,
1801 .dcache_bsize = 32,
1802 .cpu_setup = __setup_cpu_460gt,
1803 .machine_check = machine_check_440A,
1804 .platform = "ppc440",
1805 },
1806 { /* 460SX */
1807 .pvr_mask = 0xffffff00,
1808 .pvr_value = 0x13541800,
1809 .cpu_name = "460SX",
1810 .cpu_features = CPU_FTRS_44X,
1811 .cpu_user_features = COMMON_USER_BOOKE,
1812 .mmu_features = MMU_FTR_TYPE_44x,
1813 .icache_bsize = 32,
1814 .dcache_bsize = 32,
1815 .cpu_setup = __setup_cpu_460sx,
1816 .machine_check = machine_check_440A,
1817 .platform = "ppc440",
1818 },
1819 { /* 464 in APM821xx */
1820 .pvr_mask = 0xfffffff0,
1821 .pvr_value = 0x12C41C80,
1822 .cpu_name = "APM821XX",
1823 .cpu_features = CPU_FTRS_44X,
1824 .cpu_user_features = COMMON_USER_BOOKE |
1825 PPC_FEATURE_HAS_FPU,
1826 .mmu_features = MMU_FTR_TYPE_44x,
1827 .icache_bsize = 32,
1828 .dcache_bsize = 32,
1829 .cpu_setup = __setup_cpu_apm821xx,
1830 .machine_check = machine_check_440A,
1831 .platform = "ppc440",
1832 },
1833 { /* 476 DD2 core */
1834 .pvr_mask = 0xffffffff,
1835 .pvr_value = 0x11a52080,
1836 .cpu_name = "476",
1837 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1838 .cpu_user_features = COMMON_USER_BOOKE |
1839 PPC_FEATURE_HAS_FPU,
1840 .mmu_features = MMU_FTR_TYPE_47x |
1841 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1842 .icache_bsize = 32,
1843 .dcache_bsize = 128,
1844 .machine_check = machine_check_47x,
1845 .platform = "ppc470",
1846 },
1847 { /* 476fpe */
1848 .pvr_mask = 0xffff0000,
1849 .pvr_value = 0x7ff50000,
1850 .cpu_name = "476fpe",
1851 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1852 .cpu_user_features = COMMON_USER_BOOKE |
1853 PPC_FEATURE_HAS_FPU,
1854 .mmu_features = MMU_FTR_TYPE_47x |
1855 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1856 .icache_bsize = 32,
1857 .dcache_bsize = 128,
1858 .machine_check = machine_check_47x,
1859 .platform = "ppc470",
1860 },
1861 { /* 476 iss */
1862 .pvr_mask = 0xffff0000,
1863 .pvr_value = 0x00050000,
1864 .cpu_name = "476",
1865 .cpu_features = CPU_FTRS_47X,
1866 .cpu_user_features = COMMON_USER_BOOKE |
1867 PPC_FEATURE_HAS_FPU,
1868 .mmu_features = MMU_FTR_TYPE_47x |
1869 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1870 .icache_bsize = 32,
1871 .dcache_bsize = 128,
1872 .machine_check = machine_check_47x,
1873 .platform = "ppc470",
1874 },
1875 { /* 476 others */
1876 .pvr_mask = 0xffff0000,
1877 .pvr_value = 0x11a50000,
1878 .cpu_name = "476",
1879 .cpu_features = CPU_FTRS_47X,
1880 .cpu_user_features = COMMON_USER_BOOKE |
1881 PPC_FEATURE_HAS_FPU,
1882 .mmu_features = MMU_FTR_TYPE_47x |
1883 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1884 .icache_bsize = 32,
1885 .dcache_bsize = 128,
1886 .machine_check = machine_check_47x,
1887 .platform = "ppc470",
1888 },
1889 { /* default match */
1890 .pvr_mask = 0x00000000,
1891 .pvr_value = 0x00000000,
1892 .cpu_name = "(generic 44x PPC)",
1893 .cpu_features = CPU_FTRS_44X,
1894 .cpu_user_features = COMMON_USER_BOOKE,
1895 .mmu_features = MMU_FTR_TYPE_44x,
1896 .icache_bsize = 32,
1897 .dcache_bsize = 32,
1898 .machine_check = machine_check_4xx,
1899 .platform = "ppc440",
1900 }
1901#endif /* CONFIG_44x */
1902#ifdef CONFIG_E200
1903 { /* e200z5 */
1904 .pvr_mask = 0xfff00000,
1905 .pvr_value = 0x81000000,
1906 .cpu_name = "e200z5",
1907 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1908 .cpu_features = CPU_FTRS_E200,
1909 .cpu_user_features = COMMON_USER_BOOKE |
1910 PPC_FEATURE_HAS_EFP_SINGLE |
1911 PPC_FEATURE_UNIFIED_CACHE,
1912 .mmu_features = MMU_FTR_TYPE_FSL_E,
1913 .dcache_bsize = 32,
1914 .machine_check = machine_check_e200,
1915 .platform = "ppc5554",
1916 },
1917 { /* e200z6 */
1918 .pvr_mask = 0xfff00000,
1919 .pvr_value = 0x81100000,
1920 .cpu_name = "e200z6",
1921 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1922 .cpu_features = CPU_FTRS_E200,
1923 .cpu_user_features = COMMON_USER_BOOKE |
1924 PPC_FEATURE_HAS_SPE_COMP |
1925 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1926 PPC_FEATURE_UNIFIED_CACHE,
1927 .mmu_features = MMU_FTR_TYPE_FSL_E,
1928 .dcache_bsize = 32,
1929 .machine_check = machine_check_e200,
1930 .platform = "ppc5554",
1931 },
1932 { /* default match */
1933 .pvr_mask = 0x00000000,
1934 .pvr_value = 0x00000000,
1935 .cpu_name = "(generic E200 PPC)",
1936 .cpu_features = CPU_FTRS_E200,
1937 .cpu_user_features = COMMON_USER_BOOKE |
1938 PPC_FEATURE_HAS_EFP_SINGLE |
1939 PPC_FEATURE_UNIFIED_CACHE,
1940 .mmu_features = MMU_FTR_TYPE_FSL_E,
1941 .dcache_bsize = 32,
1942 .cpu_setup = __setup_cpu_e200,
1943 .machine_check = machine_check_e200,
1944 .platform = "ppc5554",
1945 }
1946#endif /* CONFIG_E200 */
1947#endif /* CONFIG_PPC32 */
1948#ifdef CONFIG_E500
1949#ifdef CONFIG_PPC32
1950 { /* e500 */
1951 .pvr_mask = 0xffff0000,
1952 .pvr_value = 0x80200000,
1953 .cpu_name = "e500",
1954 .cpu_features = CPU_FTRS_E500,
1955 .cpu_user_features = COMMON_USER_BOOKE |
1956 PPC_FEATURE_HAS_SPE_COMP |
1957 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1958 .mmu_features = MMU_FTR_TYPE_FSL_E,
1959 .icache_bsize = 32,
1960 .dcache_bsize = 32,
1961 .num_pmcs = 4,
1962 .oprofile_cpu_type = "ppc/e500",
1963 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1964 .cpu_setup = __setup_cpu_e500v1,
1965 .machine_check = machine_check_e500,
1966 .platform = "ppc8540",
1967 },
1968 { /* e500v2 */
1969 .pvr_mask = 0xffff0000,
1970 .pvr_value = 0x80210000,
1971 .cpu_name = "e500v2",
1972 .cpu_features = CPU_FTRS_E500_2,
1973 .cpu_user_features = COMMON_USER_BOOKE |
1974 PPC_FEATURE_HAS_SPE_COMP |
1975 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1976 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1977 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1978 .icache_bsize = 32,
1979 .dcache_bsize = 32,
1980 .num_pmcs = 4,
1981 .oprofile_cpu_type = "ppc/e500",
1982 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1983 .cpu_setup = __setup_cpu_e500v2,
1984 .machine_check = machine_check_e500,
1985 .platform = "ppc8548",
1986 },
1987 { /* e500mc */
1988 .pvr_mask = 0xffff0000,
1989 .pvr_value = 0x80230000,
1990 .cpu_name = "e500mc",
1991 .cpu_features = CPU_FTRS_E500MC,
1992 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1993 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1994 MMU_FTR_USE_TLBILX,
1995 .icache_bsize = 64,
1996 .dcache_bsize = 64,
1997 .num_pmcs = 4,
1998 .oprofile_cpu_type = "ppc/e500mc",
1999 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2000 .cpu_setup = __setup_cpu_e500mc,
2001 .machine_check = machine_check_e500mc,
2002 .platform = "ppce500mc",
2003 },
2004#endif /* CONFIG_PPC32 */
2005 { /* e5500 */
2006 .pvr_mask = 0xffff0000,
2007 .pvr_value = 0x80240000,
2008 .cpu_name = "e5500",
2009 .cpu_features = CPU_FTRS_E5500,
2010 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2011 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2012 MMU_FTR_USE_TLBILX,
2013 .icache_bsize = 64,
2014 .dcache_bsize = 64,
2015 .num_pmcs = 4,
2016 .oprofile_cpu_type = "ppc/e500mc",
2017 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2018 .cpu_setup = __setup_cpu_e5500,
2019 .cpu_restore = __restore_cpu_e5500,
2020 .machine_check = machine_check_e500mc,
2021 .platform = "ppce5500",
2022 },
2023 { /* e6500 */
2024 .pvr_mask = 0xffff0000,
2025 .pvr_value = 0x80400000,
2026 .cpu_name = "e6500",
2027 .cpu_features = CPU_FTRS_E6500,
2028 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2029 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2030 MMU_FTR_USE_TLBILX,
2031 .icache_bsize = 64,
2032 .dcache_bsize = 64,
2033 .num_pmcs = 4,
2034 .oprofile_cpu_type = "ppc/e6500",
2035 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2036 .cpu_setup = __setup_cpu_e5500,
2037 .cpu_restore = __restore_cpu_e5500,
2038 .machine_check = machine_check_e500mc,
2039 .platform = "ppce6500",
2040 },
2041#ifdef CONFIG_PPC32
2042 { /* default match */
2043 .pvr_mask = 0x00000000,
2044 .pvr_value = 0x00000000,
2045 .cpu_name = "(generic E500 PPC)",
2046 .cpu_features = CPU_FTRS_E500,
2047 .cpu_user_features = COMMON_USER_BOOKE |
2048 PPC_FEATURE_HAS_SPE_COMP |
2049 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2050 .mmu_features = MMU_FTR_TYPE_FSL_E,
2051 .icache_bsize = 32,
2052 .dcache_bsize = 32,
2053 .machine_check = machine_check_e500,
2054 .platform = "powerpc",
2055 }
2056#endif /* CONFIG_PPC32 */
2057#endif /* CONFIG_E500 */
2058
2059#ifdef CONFIG_PPC_A2
2060 { /* Standard A2 (>= DD2) + FPU core */
2061 .pvr_mask = 0xffff0000,
2062 .pvr_value = 0x00480000,
2063 .cpu_name = "A2 (>= DD2)",
2064 .cpu_features = CPU_FTRS_A2,
2065 .cpu_user_features = COMMON_USER_PPC64,
2066 .mmu_features = MMU_FTRS_A2,
2067 .icache_bsize = 64,
2068 .dcache_bsize = 64,
2069 .num_pmcs = 0,
2070 .cpu_setup = __setup_cpu_a2,
2071 .cpu_restore = __restore_cpu_a2,
2072 .machine_check = machine_check_generic,
2073 .platform = "ppca2",
2074 },
2075 { /* This is a default entry to get going, to be replaced by
2076 * a real one at some stage
2077 */
2078#define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2079 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2080 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2081 .pvr_mask = 0x00000000,
2082 .pvr_value = 0x00000000,
2083 .cpu_name = "Book3E",
2084 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2085 .cpu_user_features = COMMON_USER_PPC64,
2086 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2087 MMU_FTR_USE_TLBIVAX_BCAST |
2088 MMU_FTR_LOCK_BCAST_INVAL,
2089 .icache_bsize = 64,
2090 .dcache_bsize = 64,
2091 .num_pmcs = 0,
2092 .machine_check = machine_check_generic,
2093 .platform = "power6",
2094 },
2095#endif /* CONFIG_PPC_A2 */
2096};
2097
2098static struct cpu_spec the_cpu_spec;
2099
2100static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2101 struct cpu_spec *s)
2102{
2103 struct cpu_spec *t = &the_cpu_spec;
2104 struct cpu_spec old;
2105
2106 t = PTRRELOC(t);
2107 old = *t;
2108
2109 /* Copy everything, then do fixups */
2110 *t = *s;
2111
2112 /*
2113 * If we are overriding a previous value derived from the real
2114 * PVR with a new value obtained using a logical PVR value,
2115 * don't modify the performance monitor fields.
2116 */
2117 if (old.num_pmcs && !s->num_pmcs) {
2118 t->num_pmcs = old.num_pmcs;
2119 t->pmc_type = old.pmc_type;
2120 t->oprofile_type = old.oprofile_type;
2121 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2122 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2123 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2124
2125 /*
2126 * If we have passed through this logic once before and
2127 * have pulled the default case because the real PVR was
2128 * not found inside cpu_specs[], then we are possibly
2129 * running in compatibility mode. In that case, let the
2130 * oprofiler know which set of compatibility counters to
2131 * pull from by making sure the oprofile_cpu_type string
2132 * is set to that of compatibility mode. If the
2133 * oprofile_cpu_type already has a value, then we are
2134 * possibly overriding a real PVR with a logical one,
2135 * and, in that case, keep the current value for
2136 * oprofile_cpu_type.
2137 */
2138 if (old.oprofile_cpu_type != NULL) {
2139 t->oprofile_cpu_type = old.oprofile_cpu_type;
2140 t->oprofile_type = old.oprofile_type;
2141 }
2142 }
2143
2144 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2145
2146 /*
2147 * Set the base platform string once; assumes
2148 * we're called with real pvr first.
2149 */
2150 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2151 *PTRRELOC(&powerpc_base_platform) = t->platform;
2152
2153#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2154 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2155 * that processor. I will consolidate that at a later time, for now,
2156 * just use #ifdef. We also don't need to PTRRELOC the function
2157 * pointer on ppc64 and booke as we are running at 0 in real mode
2158 * on ppc64 and reloc_offset is always 0 on booke.
2159 */
2160 if (t->cpu_setup) {
2161 t->cpu_setup(offset, t);
2162 }
2163#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2164
2165 return t;
2166}
2167
2168struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2169{
2170 struct cpu_spec *s = cpu_specs;
2171 int i;
2172
2173 s = PTRRELOC(s);
2174
2175 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2176 if ((pvr & s->pvr_mask) == s->pvr_value)
2177 return setup_cpu_spec(offset, s);
2178 }
2179
2180 BUG();
2181
2182 return NULL;
2183}