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1/*
2 * FOTG210 UDC Driver supports Bulk transfer so far
3 *
4 * Copyright (C) 2013 Faraday Technology Corporation
5 *
6 * Author : Yuan-Hsin Chen <yhchen@faraday-tech.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 */
12
13#include <linux/dma-mapping.h>
14#include <linux/err.h>
15#include <linux/interrupt.h>
16#include <linux/io.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/usb/ch9.h>
20#include <linux/usb/gadget.h>
21
22#include "fotg210.h"
23
24#define DRIVER_DESC "FOTG210 USB Device Controller Driver"
25#define DRIVER_VERSION "30-April-2013"
26
27static const char udc_name[] = "fotg210_udc";
28static const char * const fotg210_ep_name[] = {
29 "ep0", "ep1", "ep2", "ep3", "ep4"};
30
31static void fotg210_disable_fifo_int(struct fotg210_ep *ep)
32{
33 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1);
34
35 if (ep->dir_in)
36 value |= DMISGR1_MF_IN_INT(ep->epnum - 1);
37 else
38 value |= DMISGR1_MF_OUTSPK_INT(ep->epnum - 1);
39 iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1);
40}
41
42static void fotg210_enable_fifo_int(struct fotg210_ep *ep)
43{
44 u32 value = ioread32(ep->fotg210->reg + FOTG210_DMISGR1);
45
46 if (ep->dir_in)
47 value &= ~DMISGR1_MF_IN_INT(ep->epnum - 1);
48 else
49 value &= ~DMISGR1_MF_OUTSPK_INT(ep->epnum - 1);
50 iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR1);
51}
52
53static void fotg210_set_cxdone(struct fotg210_udc *fotg210)
54{
55 u32 value = ioread32(fotg210->reg + FOTG210_DCFESR);
56
57 value |= DCFESR_CX_DONE;
58 iowrite32(value, fotg210->reg + FOTG210_DCFESR);
59}
60
61static void fotg210_done(struct fotg210_ep *ep, struct fotg210_request *req,
62 int status)
63{
64 list_del_init(&req->queue);
65
66 /* don't modify queue heads during completion callback */
67 if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN)
68 req->req.status = -ESHUTDOWN;
69 else
70 req->req.status = status;
71
72 spin_unlock(&ep->fotg210->lock);
73 req->req.complete(&ep->ep, &req->req);
74 spin_lock(&ep->fotg210->lock);
75
76 if (ep->epnum) {
77 if (list_empty(&ep->queue))
78 fotg210_disable_fifo_int(ep);
79 } else {
80 fotg210_set_cxdone(ep->fotg210);
81 }
82}
83
84static void fotg210_fifo_ep_mapping(struct fotg210_ep *ep, u32 epnum,
85 u32 dir_in)
86{
87 struct fotg210_udc *fotg210 = ep->fotg210;
88 u32 val;
89
90 /* Driver should map an ep to a fifo and then map the fifo
91 * to the ep. What a brain-damaged design!
92 */
93
94 /* map a fifo to an ep */
95 val = ioread32(fotg210->reg + FOTG210_EPMAP);
96 val &= ~EPMAP_FIFONOMSK(epnum, dir_in);
97 val |= EPMAP_FIFONO(epnum, dir_in);
98 iowrite32(val, fotg210->reg + FOTG210_EPMAP);
99
100 /* map the ep to the fifo */
101 val = ioread32(fotg210->reg + FOTG210_FIFOMAP);
102 val &= ~FIFOMAP_EPNOMSK(epnum);
103 val |= FIFOMAP_EPNO(epnum);
104 iowrite32(val, fotg210->reg + FOTG210_FIFOMAP);
105
106 /* enable fifo */
107 val = ioread32(fotg210->reg + FOTG210_FIFOCF);
108 val |= FIFOCF_FIFO_EN(epnum - 1);
109 iowrite32(val, fotg210->reg + FOTG210_FIFOCF);
110}
111
112static void fotg210_set_fifo_dir(struct fotg210_ep *ep, u32 epnum, u32 dir_in)
113{
114 struct fotg210_udc *fotg210 = ep->fotg210;
115 u32 val;
116
117 val = ioread32(fotg210->reg + FOTG210_FIFOMAP);
118 val |= (dir_in ? FIFOMAP_DIRIN(epnum - 1) : FIFOMAP_DIROUT(epnum - 1));
119 iowrite32(val, fotg210->reg + FOTG210_FIFOMAP);
120}
121
122static void fotg210_set_tfrtype(struct fotg210_ep *ep, u32 epnum, u32 type)
123{
124 struct fotg210_udc *fotg210 = ep->fotg210;
125 u32 val;
126
127 val = ioread32(fotg210->reg + FOTG210_FIFOCF);
128 val |= FIFOCF_TYPE(type, epnum - 1);
129 iowrite32(val, fotg210->reg + FOTG210_FIFOCF);
130}
131
132static void fotg210_set_mps(struct fotg210_ep *ep, u32 epnum, u32 mps,
133 u32 dir_in)
134{
135 struct fotg210_udc *fotg210 = ep->fotg210;
136 u32 val;
137 u32 offset = dir_in ? FOTG210_INEPMPSR(epnum) :
138 FOTG210_OUTEPMPSR(epnum);
139
140 val = ioread32(fotg210->reg + offset);
141 val |= INOUTEPMPSR_MPS(mps);
142 iowrite32(val, fotg210->reg + offset);
143}
144
145static int fotg210_config_ep(struct fotg210_ep *ep,
146 const struct usb_endpoint_descriptor *desc)
147{
148 struct fotg210_udc *fotg210 = ep->fotg210;
149
150 fotg210_set_fifo_dir(ep, ep->epnum, ep->dir_in);
151 fotg210_set_tfrtype(ep, ep->epnum, ep->type);
152 fotg210_set_mps(ep, ep->epnum, ep->ep.maxpacket, ep->dir_in);
153 fotg210_fifo_ep_mapping(ep, ep->epnum, ep->dir_in);
154
155 fotg210->ep[ep->epnum] = ep;
156
157 return 0;
158}
159
160static int fotg210_ep_enable(struct usb_ep *_ep,
161 const struct usb_endpoint_descriptor *desc)
162{
163 struct fotg210_ep *ep;
164
165 ep = container_of(_ep, struct fotg210_ep, ep);
166
167 ep->desc = desc;
168 ep->epnum = usb_endpoint_num(desc);
169 ep->type = usb_endpoint_type(desc);
170 ep->dir_in = usb_endpoint_dir_in(desc);
171 ep->ep.maxpacket = usb_endpoint_maxp(desc);
172
173 return fotg210_config_ep(ep, desc);
174}
175
176static void fotg210_reset_tseq(struct fotg210_udc *fotg210, u8 epnum)
177{
178 struct fotg210_ep *ep = fotg210->ep[epnum];
179 u32 value;
180 void __iomem *reg;
181
182 reg = (ep->dir_in) ?
183 fotg210->reg + FOTG210_INEPMPSR(epnum) :
184 fotg210->reg + FOTG210_OUTEPMPSR(epnum);
185
186 /* Note: Driver needs to set and clear INOUTEPMPSR_RESET_TSEQ
187 * bit. Controller wouldn't clear this bit. WTF!!!
188 */
189
190 value = ioread32(reg);
191 value |= INOUTEPMPSR_RESET_TSEQ;
192 iowrite32(value, reg);
193
194 value = ioread32(reg);
195 value &= ~INOUTEPMPSR_RESET_TSEQ;
196 iowrite32(value, reg);
197}
198
199static int fotg210_ep_release(struct fotg210_ep *ep)
200{
201 if (!ep->epnum)
202 return 0;
203 ep->epnum = 0;
204 ep->stall = 0;
205 ep->wedged = 0;
206
207 fotg210_reset_tseq(ep->fotg210, ep->epnum);
208
209 return 0;
210}
211
212static int fotg210_ep_disable(struct usb_ep *_ep)
213{
214 struct fotg210_ep *ep;
215 struct fotg210_request *req;
216 unsigned long flags;
217
218 BUG_ON(!_ep);
219
220 ep = container_of(_ep, struct fotg210_ep, ep);
221
222 while (!list_empty(&ep->queue)) {
223 req = list_entry(ep->queue.next,
224 struct fotg210_request, queue);
225 spin_lock_irqsave(&ep->fotg210->lock, flags);
226 fotg210_done(ep, req, -ECONNRESET);
227 spin_unlock_irqrestore(&ep->fotg210->lock, flags);
228 }
229
230 return fotg210_ep_release(ep);
231}
232
233static struct usb_request *fotg210_ep_alloc_request(struct usb_ep *_ep,
234 gfp_t gfp_flags)
235{
236 struct fotg210_request *req;
237
238 req = kzalloc(sizeof(struct fotg210_request), gfp_flags);
239 if (!req)
240 return NULL;
241
242 INIT_LIST_HEAD(&req->queue);
243
244 return &req->req;
245}
246
247static void fotg210_ep_free_request(struct usb_ep *_ep,
248 struct usb_request *_req)
249{
250 struct fotg210_request *req;
251
252 req = container_of(_req, struct fotg210_request, req);
253 kfree(req);
254}
255
256static void fotg210_enable_dma(struct fotg210_ep *ep,
257 dma_addr_t d, u32 len)
258{
259 u32 value;
260 struct fotg210_udc *fotg210 = ep->fotg210;
261
262 /* set transfer length and direction */
263 value = ioread32(fotg210->reg + FOTG210_DMACPSR1);
264 value &= ~(DMACPSR1_DMA_LEN(0xFFFF) | DMACPSR1_DMA_TYPE(1));
265 value |= DMACPSR1_DMA_LEN(len) | DMACPSR1_DMA_TYPE(ep->dir_in);
266 iowrite32(value, fotg210->reg + FOTG210_DMACPSR1);
267
268 /* set device DMA target FIFO number */
269 value = ioread32(fotg210->reg + FOTG210_DMATFNR);
270 if (ep->epnum)
271 value |= DMATFNR_ACC_FN(ep->epnum - 1);
272 else
273 value |= DMATFNR_ACC_CXF;
274 iowrite32(value, fotg210->reg + FOTG210_DMATFNR);
275
276 /* set DMA memory address */
277 iowrite32(d, fotg210->reg + FOTG210_DMACPSR2);
278
279 /* enable MDMA_EROR and MDMA_CMPLT interrupt */
280 value = ioread32(fotg210->reg + FOTG210_DMISGR2);
281 value &= ~(DMISGR2_MDMA_CMPLT | DMISGR2_MDMA_ERROR);
282 iowrite32(value, fotg210->reg + FOTG210_DMISGR2);
283
284 /* start DMA */
285 value = ioread32(fotg210->reg + FOTG210_DMACPSR1);
286 value |= DMACPSR1_DMA_START;
287 iowrite32(value, fotg210->reg + FOTG210_DMACPSR1);
288}
289
290static void fotg210_disable_dma(struct fotg210_ep *ep)
291{
292 iowrite32(DMATFNR_DISDMA, ep->fotg210->reg + FOTG210_DMATFNR);
293}
294
295static void fotg210_wait_dma_done(struct fotg210_ep *ep)
296{
297 u32 value;
298
299 do {
300 value = ioread32(ep->fotg210->reg + FOTG210_DISGR2);
301 if ((value & DISGR2_USBRST_INT) ||
302 (value & DISGR2_DMA_ERROR))
303 goto dma_reset;
304 } while (!(value & DISGR2_DMA_CMPLT));
305
306 value &= ~DISGR2_DMA_CMPLT;
307 iowrite32(value, ep->fotg210->reg + FOTG210_DISGR2);
308 return;
309
310dma_reset:
311 value = ioread32(ep->fotg210->reg + FOTG210_DMACPSR1);
312 value |= DMACPSR1_DMA_ABORT;
313 iowrite32(value, ep->fotg210->reg + FOTG210_DMACPSR1);
314
315 /* reset fifo */
316 if (ep->epnum) {
317 value = ioread32(ep->fotg210->reg +
318 FOTG210_FIBCR(ep->epnum - 1));
319 value |= FIBCR_FFRST;
320 iowrite32(value, ep->fotg210->reg +
321 FOTG210_FIBCR(ep->epnum - 1));
322 } else {
323 value = ioread32(ep->fotg210->reg + FOTG210_DCFESR);
324 value |= DCFESR_CX_CLR;
325 iowrite32(value, ep->fotg210->reg + FOTG210_DCFESR);
326 }
327}
328
329static void fotg210_start_dma(struct fotg210_ep *ep,
330 struct fotg210_request *req)
331{
332 dma_addr_t d;
333 u8 *buffer;
334 u32 length;
335
336 if (ep->epnum) {
337 if (ep->dir_in) {
338 buffer = req->req.buf;
339 length = req->req.length;
340 } else {
341 buffer = req->req.buf + req->req.actual;
342 length = ioread32(ep->fotg210->reg +
343 FOTG210_FIBCR(ep->epnum - 1));
344 length &= FIBCR_BCFX;
345 }
346 } else {
347 buffer = req->req.buf + req->req.actual;
348 if (req->req.length - req->req.actual > ep->ep.maxpacket)
349 length = ep->ep.maxpacket;
350 else
351 length = req->req.length;
352 }
353
354 d = dma_map_single(NULL, buffer, length,
355 ep->dir_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
356
357 if (dma_mapping_error(NULL, d)) {
358 pr_err("dma_mapping_error\n");
359 return;
360 }
361
362 dma_sync_single_for_device(NULL, d, length,
363 ep->dir_in ? DMA_TO_DEVICE :
364 DMA_FROM_DEVICE);
365
366 fotg210_enable_dma(ep, d, length);
367
368 /* check if dma is done */
369 fotg210_wait_dma_done(ep);
370
371 fotg210_disable_dma(ep);
372
373 /* update actual transfer length */
374 req->req.actual += length;
375
376 dma_unmap_single(NULL, d, length, DMA_TO_DEVICE);
377}
378
379static void fotg210_ep0_queue(struct fotg210_ep *ep,
380 struct fotg210_request *req)
381{
382 if (!req->req.length) {
383 fotg210_done(ep, req, 0);
384 return;
385 }
386 if (ep->dir_in) { /* if IN */
387 if (req->req.length) {
388 fotg210_start_dma(ep, req);
389 } else {
390 pr_err("%s : req->req.length = 0x%x\n",
391 __func__, req->req.length);
392 }
393 if ((req->req.length == req->req.actual) ||
394 (req->req.actual < ep->ep.maxpacket))
395 fotg210_done(ep, req, 0);
396 } else { /* OUT */
397 if (!req->req.length) {
398 fotg210_done(ep, req, 0);
399 } else {
400 u32 value = ioread32(ep->fotg210->reg +
401 FOTG210_DMISGR0);
402
403 value &= ~DMISGR0_MCX_OUT_INT;
404 iowrite32(value, ep->fotg210->reg + FOTG210_DMISGR0);
405 }
406 }
407}
408
409static int fotg210_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
410 gfp_t gfp_flags)
411{
412 struct fotg210_ep *ep;
413 struct fotg210_request *req;
414 unsigned long flags;
415 int request = 0;
416
417 ep = container_of(_ep, struct fotg210_ep, ep);
418 req = container_of(_req, struct fotg210_request, req);
419
420 if (ep->fotg210->gadget.speed == USB_SPEED_UNKNOWN)
421 return -ESHUTDOWN;
422
423 spin_lock_irqsave(&ep->fotg210->lock, flags);
424
425 if (list_empty(&ep->queue))
426 request = 1;
427
428 list_add_tail(&req->queue, &ep->queue);
429
430 req->req.actual = 0;
431 req->req.status = -EINPROGRESS;
432
433 if (!ep->epnum) /* ep0 */
434 fotg210_ep0_queue(ep, req);
435 else if (request && !ep->stall)
436 fotg210_enable_fifo_int(ep);
437
438 spin_unlock_irqrestore(&ep->fotg210->lock, flags);
439
440 return 0;
441}
442
443static int fotg210_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
444{
445 struct fotg210_ep *ep;
446 struct fotg210_request *req;
447 unsigned long flags;
448
449 ep = container_of(_ep, struct fotg210_ep, ep);
450 req = container_of(_req, struct fotg210_request, req);
451
452 spin_lock_irqsave(&ep->fotg210->lock, flags);
453 if (!list_empty(&ep->queue))
454 fotg210_done(ep, req, -ECONNRESET);
455 spin_unlock_irqrestore(&ep->fotg210->lock, flags);
456
457 return 0;
458}
459
460static void fotg210_set_epnstall(struct fotg210_ep *ep)
461{
462 struct fotg210_udc *fotg210 = ep->fotg210;
463 u32 value;
464 void __iomem *reg;
465
466 /* check if IN FIFO is empty before stall */
467 if (ep->dir_in) {
468 do {
469 value = ioread32(fotg210->reg + FOTG210_DCFESR);
470 } while (!(value & DCFESR_FIFO_EMPTY(ep->epnum - 1)));
471 }
472
473 reg = (ep->dir_in) ?
474 fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
475 fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
476 value = ioread32(reg);
477 value |= INOUTEPMPSR_STL_EP;
478 iowrite32(value, reg);
479}
480
481static void fotg210_clear_epnstall(struct fotg210_ep *ep)
482{
483 struct fotg210_udc *fotg210 = ep->fotg210;
484 u32 value;
485 void __iomem *reg;
486
487 reg = (ep->dir_in) ?
488 fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
489 fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
490 value = ioread32(reg);
491 value &= ~INOUTEPMPSR_STL_EP;
492 iowrite32(value, reg);
493}
494
495static int fotg210_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
496{
497 struct fotg210_ep *ep;
498 struct fotg210_udc *fotg210;
499 unsigned long flags;
500 int ret = 0;
501
502 ep = container_of(_ep, struct fotg210_ep, ep);
503
504 fotg210 = ep->fotg210;
505
506 spin_lock_irqsave(&ep->fotg210->lock, flags);
507
508 if (value) {
509 fotg210_set_epnstall(ep);
510 ep->stall = 1;
511 if (wedge)
512 ep->wedged = 1;
513 } else {
514 fotg210_reset_tseq(fotg210, ep->epnum);
515 fotg210_clear_epnstall(ep);
516 ep->stall = 0;
517 ep->wedged = 0;
518 if (!list_empty(&ep->queue))
519 fotg210_enable_fifo_int(ep);
520 }
521
522 spin_unlock_irqrestore(&ep->fotg210->lock, flags);
523 return ret;
524}
525
526static int fotg210_ep_set_halt(struct usb_ep *_ep, int value)
527{
528 return fotg210_set_halt_and_wedge(_ep, value, 0);
529}
530
531static int fotg210_ep_set_wedge(struct usb_ep *_ep)
532{
533 return fotg210_set_halt_and_wedge(_ep, 1, 1);
534}
535
536static void fotg210_ep_fifo_flush(struct usb_ep *_ep)
537{
538}
539
540static struct usb_ep_ops fotg210_ep_ops = {
541 .enable = fotg210_ep_enable,
542 .disable = fotg210_ep_disable,
543
544 .alloc_request = fotg210_ep_alloc_request,
545 .free_request = fotg210_ep_free_request,
546
547 .queue = fotg210_ep_queue,
548 .dequeue = fotg210_ep_dequeue,
549
550 .set_halt = fotg210_ep_set_halt,
551 .fifo_flush = fotg210_ep_fifo_flush,
552 .set_wedge = fotg210_ep_set_wedge,
553};
554
555static void fotg210_clear_tx0byte(struct fotg210_udc *fotg210)
556{
557 u32 value = ioread32(fotg210->reg + FOTG210_TX0BYTE);
558
559 value &= ~(TX0BYTE_EP1 | TX0BYTE_EP2 | TX0BYTE_EP3
560 | TX0BYTE_EP4);
561 iowrite32(value, fotg210->reg + FOTG210_TX0BYTE);
562}
563
564static void fotg210_clear_rx0byte(struct fotg210_udc *fotg210)
565{
566 u32 value = ioread32(fotg210->reg + FOTG210_RX0BYTE);
567
568 value &= ~(RX0BYTE_EP1 | RX0BYTE_EP2 | RX0BYTE_EP3
569 | RX0BYTE_EP4);
570 iowrite32(value, fotg210->reg + FOTG210_RX0BYTE);
571}
572
573/* read 8-byte setup packet only */
574static void fotg210_rdsetupp(struct fotg210_udc *fotg210,
575 u8 *buffer)
576{
577 int i = 0;
578 u8 *tmp = buffer;
579 u32 data;
580 u32 length = 8;
581
582 iowrite32(DMATFNR_ACC_CXF, fotg210->reg + FOTG210_DMATFNR);
583
584 for (i = (length >> 2); i > 0; i--) {
585 data = ioread32(fotg210->reg + FOTG210_CXPORT);
586 *tmp = data & 0xFF;
587 *(tmp + 1) = (data >> 8) & 0xFF;
588 *(tmp + 2) = (data >> 16) & 0xFF;
589 *(tmp + 3) = (data >> 24) & 0xFF;
590 tmp = tmp + 4;
591 }
592
593 switch (length % 4) {
594 case 1:
595 data = ioread32(fotg210->reg + FOTG210_CXPORT);
596 *tmp = data & 0xFF;
597 break;
598 case 2:
599 data = ioread32(fotg210->reg + FOTG210_CXPORT);
600 *tmp = data & 0xFF;
601 *(tmp + 1) = (data >> 8) & 0xFF;
602 break;
603 case 3:
604 data = ioread32(fotg210->reg + FOTG210_CXPORT);
605 *tmp = data & 0xFF;
606 *(tmp + 1) = (data >> 8) & 0xFF;
607 *(tmp + 2) = (data >> 16) & 0xFF;
608 break;
609 default:
610 break;
611 }
612
613 iowrite32(DMATFNR_DISDMA, fotg210->reg + FOTG210_DMATFNR);
614}
615
616static void fotg210_set_configuration(struct fotg210_udc *fotg210)
617{
618 u32 value = ioread32(fotg210->reg + FOTG210_DAR);
619
620 value |= DAR_AFT_CONF;
621 iowrite32(value, fotg210->reg + FOTG210_DAR);
622}
623
624static void fotg210_set_dev_addr(struct fotg210_udc *fotg210, u32 addr)
625{
626 u32 value = ioread32(fotg210->reg + FOTG210_DAR);
627
628 value |= (addr & 0x7F);
629 iowrite32(value, fotg210->reg + FOTG210_DAR);
630}
631
632static void fotg210_set_cxstall(struct fotg210_udc *fotg210)
633{
634 u32 value = ioread32(fotg210->reg + FOTG210_DCFESR);
635
636 value |= DCFESR_CX_STL;
637 iowrite32(value, fotg210->reg + FOTG210_DCFESR);
638}
639
640static void fotg210_request_error(struct fotg210_udc *fotg210)
641{
642 fotg210_set_cxstall(fotg210);
643 pr_err("request error!!\n");
644}
645
646static void fotg210_set_address(struct fotg210_udc *fotg210,
647 struct usb_ctrlrequest *ctrl)
648{
649 if (ctrl->wValue >= 0x0100) {
650 fotg210_request_error(fotg210);
651 } else {
652 fotg210_set_dev_addr(fotg210, ctrl->wValue);
653 fotg210_set_cxdone(fotg210);
654 }
655}
656
657static void fotg210_set_feature(struct fotg210_udc *fotg210,
658 struct usb_ctrlrequest *ctrl)
659{
660 switch (ctrl->bRequestType & USB_RECIP_MASK) {
661 case USB_RECIP_DEVICE:
662 fotg210_set_cxdone(fotg210);
663 break;
664 case USB_RECIP_INTERFACE:
665 fotg210_set_cxdone(fotg210);
666 break;
667 case USB_RECIP_ENDPOINT: {
668 u8 epnum;
669 epnum = le16_to_cpu(ctrl->wIndex) & USB_ENDPOINT_NUMBER_MASK;
670 if (epnum)
671 fotg210_set_epnstall(fotg210->ep[epnum]);
672 else
673 fotg210_set_cxstall(fotg210);
674 fotg210_set_cxdone(fotg210);
675 }
676 break;
677 default:
678 fotg210_request_error(fotg210);
679 break;
680 }
681}
682
683static void fotg210_clear_feature(struct fotg210_udc *fotg210,
684 struct usb_ctrlrequest *ctrl)
685{
686 struct fotg210_ep *ep =
687 fotg210->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
688
689 switch (ctrl->bRequestType & USB_RECIP_MASK) {
690 case USB_RECIP_DEVICE:
691 fotg210_set_cxdone(fotg210);
692 break;
693 case USB_RECIP_INTERFACE:
694 fotg210_set_cxdone(fotg210);
695 break;
696 case USB_RECIP_ENDPOINT:
697 if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
698 if (ep->wedged) {
699 fotg210_set_cxdone(fotg210);
700 break;
701 }
702 if (ep->stall)
703 fotg210_set_halt_and_wedge(&ep->ep, 0, 0);
704 }
705 fotg210_set_cxdone(fotg210);
706 break;
707 default:
708 fotg210_request_error(fotg210);
709 break;
710 }
711}
712
713static int fotg210_is_epnstall(struct fotg210_ep *ep)
714{
715 struct fotg210_udc *fotg210 = ep->fotg210;
716 u32 value;
717 void __iomem *reg;
718
719 reg = (ep->dir_in) ?
720 fotg210->reg + FOTG210_INEPMPSR(ep->epnum) :
721 fotg210->reg + FOTG210_OUTEPMPSR(ep->epnum);
722 value = ioread32(reg);
723 return value & INOUTEPMPSR_STL_EP ? 1 : 0;
724}
725
726static void fotg210_get_status(struct fotg210_udc *fotg210,
727 struct usb_ctrlrequest *ctrl)
728{
729 u8 epnum;
730
731 switch (ctrl->bRequestType & USB_RECIP_MASK) {
732 case USB_RECIP_DEVICE:
733 fotg210->ep0_data = 1 << USB_DEVICE_SELF_POWERED;
734 break;
735 case USB_RECIP_INTERFACE:
736 fotg210->ep0_data = 0;
737 break;
738 case USB_RECIP_ENDPOINT:
739 epnum = ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK;
740 if (epnum)
741 fotg210->ep0_data =
742 fotg210_is_epnstall(fotg210->ep[epnum])
743 << USB_ENDPOINT_HALT;
744 else
745 fotg210_request_error(fotg210);
746 break;
747
748 default:
749 fotg210_request_error(fotg210);
750 return; /* exit */
751 }
752
753 fotg210->ep0_req->buf = &fotg210->ep0_data;
754 fotg210->ep0_req->length = 2;
755
756 spin_unlock(&fotg210->lock);
757 fotg210_ep_queue(fotg210->gadget.ep0, fotg210->ep0_req, GFP_KERNEL);
758 spin_lock(&fotg210->lock);
759}
760
761static int fotg210_setup_packet(struct fotg210_udc *fotg210,
762 struct usb_ctrlrequest *ctrl)
763{
764 u8 *p = (u8 *)ctrl;
765 u8 ret = 0;
766
767 fotg210_rdsetupp(fotg210, p);
768
769 fotg210->ep[0]->dir_in = ctrl->bRequestType & USB_DIR_IN;
770
771 if (fotg210->gadget.speed == USB_SPEED_UNKNOWN) {
772 u32 value = ioread32(fotg210->reg + FOTG210_DMCR);
773 fotg210->gadget.speed = value & DMCR_HS_EN ?
774 USB_SPEED_HIGH : USB_SPEED_FULL;
775 }
776
777 /* check request */
778 if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
779 switch (ctrl->bRequest) {
780 case USB_REQ_GET_STATUS:
781 fotg210_get_status(fotg210, ctrl);
782 break;
783 case USB_REQ_CLEAR_FEATURE:
784 fotg210_clear_feature(fotg210, ctrl);
785 break;
786 case USB_REQ_SET_FEATURE:
787 fotg210_set_feature(fotg210, ctrl);
788 break;
789 case USB_REQ_SET_ADDRESS:
790 fotg210_set_address(fotg210, ctrl);
791 break;
792 case USB_REQ_SET_CONFIGURATION:
793 fotg210_set_configuration(fotg210);
794 ret = 1;
795 break;
796 default:
797 ret = 1;
798 break;
799 }
800 } else {
801 ret = 1;
802 }
803
804 return ret;
805}
806
807static void fotg210_ep0out(struct fotg210_udc *fotg210)
808{
809 struct fotg210_ep *ep = fotg210->ep[0];
810
811 if (!list_empty(&ep->queue) && !ep->dir_in) {
812 struct fotg210_request *req;
813
814 req = list_first_entry(&ep->queue,
815 struct fotg210_request, queue);
816
817 if (req->req.length)
818 fotg210_start_dma(ep, req);
819
820 if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
821 fotg210_done(ep, req, 0);
822 } else {
823 pr_err("%s : empty queue\n", __func__);
824 }
825}
826
827static void fotg210_ep0in(struct fotg210_udc *fotg210)
828{
829 struct fotg210_ep *ep = fotg210->ep[0];
830
831 if ((!list_empty(&ep->queue)) && (ep->dir_in)) {
832 struct fotg210_request *req;
833
834 req = list_entry(ep->queue.next,
835 struct fotg210_request, queue);
836
837 if (req->req.length)
838 fotg210_start_dma(ep, req);
839
840 if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
841 fotg210_done(ep, req, 0);
842 } else {
843 fotg210_set_cxdone(fotg210);
844 }
845}
846
847static void fotg210_clear_comabt_int(struct fotg210_udc *fotg210)
848{
849 u32 value = ioread32(fotg210->reg + FOTG210_DISGR0);
850
851 value &= ~DISGR0_CX_COMABT_INT;
852 iowrite32(value, fotg210->reg + FOTG210_DISGR0);
853}
854
855static void fotg210_in_fifo_handler(struct fotg210_ep *ep)
856{
857 struct fotg210_request *req = list_entry(ep->queue.next,
858 struct fotg210_request, queue);
859
860 if (req->req.length)
861 fotg210_start_dma(ep, req);
862 fotg210_done(ep, req, 0);
863}
864
865static void fotg210_out_fifo_handler(struct fotg210_ep *ep)
866{
867 struct fotg210_request *req = list_entry(ep->queue.next,
868 struct fotg210_request, queue);
869
870 fotg210_start_dma(ep, req);
871
872 /* finish out transfer */
873 if (req->req.length == req->req.actual ||
874 req->req.actual < ep->ep.maxpacket)
875 fotg210_done(ep, req, 0);
876}
877
878static irqreturn_t fotg210_irq(int irq, void *_fotg210)
879{
880 struct fotg210_udc *fotg210 = _fotg210;
881 u32 int_grp = ioread32(fotg210->reg + FOTG210_DIGR);
882 u32 int_msk = ioread32(fotg210->reg + FOTG210_DMIGR);
883
884 int_grp &= ~int_msk;
885
886 spin_lock(&fotg210->lock);
887
888 if (int_grp & DIGR_INT_G2) {
889 void __iomem *reg = fotg210->reg + FOTG210_DISGR2;
890 u32 int_grp2 = ioread32(reg);
891 u32 int_msk2 = ioread32(fotg210->reg + FOTG210_DMISGR2);
892 u32 value;
893
894 int_grp2 &= ~int_msk2;
895
896 if (int_grp2 & DISGR2_USBRST_INT) {
897 value = ioread32(reg);
898 value &= ~DISGR2_USBRST_INT;
899 iowrite32(value, reg);
900 pr_info("fotg210 udc reset\n");
901 }
902 if (int_grp2 & DISGR2_SUSP_INT) {
903 value = ioread32(reg);
904 value &= ~DISGR2_SUSP_INT;
905 iowrite32(value, reg);
906 pr_info("fotg210 udc suspend\n");
907 }
908 if (int_grp2 & DISGR2_RESM_INT) {
909 value = ioread32(reg);
910 value &= ~DISGR2_RESM_INT;
911 iowrite32(value, reg);
912 pr_info("fotg210 udc resume\n");
913 }
914 if (int_grp2 & DISGR2_ISO_SEQ_ERR_INT) {
915 value = ioread32(reg);
916 value &= ~DISGR2_ISO_SEQ_ERR_INT;
917 iowrite32(value, reg);
918 pr_info("fotg210 iso sequence error\n");
919 }
920 if (int_grp2 & DISGR2_ISO_SEQ_ABORT_INT) {
921 value = ioread32(reg);
922 value &= ~DISGR2_ISO_SEQ_ABORT_INT;
923 iowrite32(value, reg);
924 pr_info("fotg210 iso sequence abort\n");
925 }
926 if (int_grp2 & DISGR2_TX0BYTE_INT) {
927 fotg210_clear_tx0byte(fotg210);
928 value = ioread32(reg);
929 value &= ~DISGR2_TX0BYTE_INT;
930 iowrite32(value, reg);
931 pr_info("fotg210 transferred 0 byte\n");
932 }
933 if (int_grp2 & DISGR2_RX0BYTE_INT) {
934 fotg210_clear_rx0byte(fotg210);
935 value = ioread32(reg);
936 value &= ~DISGR2_RX0BYTE_INT;
937 iowrite32(value, reg);
938 pr_info("fotg210 received 0 byte\n");
939 }
940 if (int_grp2 & DISGR2_DMA_ERROR) {
941 value = ioread32(reg);
942 value &= ~DISGR2_DMA_ERROR;
943 iowrite32(value, reg);
944 }
945 }
946
947 if (int_grp & DIGR_INT_G0) {
948 void __iomem *reg = fotg210->reg + FOTG210_DISGR0;
949 u32 int_grp0 = ioread32(reg);
950 u32 int_msk0 = ioread32(fotg210->reg + FOTG210_DMISGR0);
951 struct usb_ctrlrequest ctrl;
952
953 int_grp0 &= ~int_msk0;
954
955 /* the highest priority in this source register */
956 if (int_grp0 & DISGR0_CX_COMABT_INT) {
957 fotg210_clear_comabt_int(fotg210);
958 pr_info("fotg210 CX command abort\n");
959 }
960
961 if (int_grp0 & DISGR0_CX_SETUP_INT) {
962 if (fotg210_setup_packet(fotg210, &ctrl)) {
963 spin_unlock(&fotg210->lock);
964 if (fotg210->driver->setup(&fotg210->gadget,
965 &ctrl) < 0)
966 fotg210_set_cxstall(fotg210);
967 spin_lock(&fotg210->lock);
968 }
969 }
970 if (int_grp0 & DISGR0_CX_COMEND_INT)
971 pr_info("fotg210 cmd end\n");
972
973 if (int_grp0 & DISGR0_CX_IN_INT)
974 fotg210_ep0in(fotg210);
975
976 if (int_grp0 & DISGR0_CX_OUT_INT)
977 fotg210_ep0out(fotg210);
978
979 if (int_grp0 & DISGR0_CX_COMFAIL_INT) {
980 fotg210_set_cxstall(fotg210);
981 pr_info("fotg210 ep0 fail\n");
982 }
983 }
984
985 if (int_grp & DIGR_INT_G1) {
986 void __iomem *reg = fotg210->reg + FOTG210_DISGR1;
987 u32 int_grp1 = ioread32(reg);
988 u32 int_msk1 = ioread32(fotg210->reg + FOTG210_DMISGR1);
989 int fifo;
990
991 int_grp1 &= ~int_msk1;
992
993 for (fifo = 0; fifo < FOTG210_MAX_FIFO_NUM; fifo++) {
994 if (int_grp1 & DISGR1_IN_INT(fifo))
995 fotg210_in_fifo_handler(fotg210->ep[fifo + 1]);
996
997 if ((int_grp1 & DISGR1_OUT_INT(fifo)) ||
998 (int_grp1 & DISGR1_SPK_INT(fifo)))
999 fotg210_out_fifo_handler(fotg210->ep[fifo + 1]);
1000 }
1001 }
1002
1003 spin_unlock(&fotg210->lock);
1004
1005 return IRQ_HANDLED;
1006}
1007
1008static void fotg210_disable_unplug(struct fotg210_udc *fotg210)
1009{
1010 u32 reg = ioread32(fotg210->reg + FOTG210_PHYTMSR);
1011
1012 reg &= ~PHYTMSR_UNPLUG;
1013 iowrite32(reg, fotg210->reg + FOTG210_PHYTMSR);
1014}
1015
1016static int fotg210_udc_start(struct usb_gadget *g,
1017 struct usb_gadget_driver *driver)
1018{
1019 struct fotg210_udc *fotg210 = gadget_to_fotg210(g);
1020 u32 value;
1021
1022 /* hook up the driver */
1023 driver->driver.bus = NULL;
1024 fotg210->driver = driver;
1025
1026 /* enable device global interrupt */
1027 value = ioread32(fotg210->reg + FOTG210_DMCR);
1028 value |= DMCR_GLINT_EN;
1029 iowrite32(value, fotg210->reg + FOTG210_DMCR);
1030
1031 return 0;
1032}
1033
1034static void fotg210_init(struct fotg210_udc *fotg210)
1035{
1036 u32 value;
1037
1038 /* disable global interrupt and set int polarity to active high */
1039 iowrite32(GMIR_MHC_INT | GMIR_MOTG_INT | GMIR_INT_POLARITY,
1040 fotg210->reg + FOTG210_GMIR);
1041
1042 /* disable device global interrupt */
1043 value = ioread32(fotg210->reg + FOTG210_DMCR);
1044 value &= ~DMCR_GLINT_EN;
1045 iowrite32(value, fotg210->reg + FOTG210_DMCR);
1046
1047 /* disable all fifo interrupt */
1048 iowrite32(~(u32)0, fotg210->reg + FOTG210_DMISGR1);
1049
1050 /* disable cmd end */
1051 value = ioread32(fotg210->reg + FOTG210_DMISGR0);
1052 value |= DMISGR0_MCX_COMEND;
1053 iowrite32(value, fotg210->reg + FOTG210_DMISGR0);
1054}
1055
1056static int fotg210_udc_stop(struct usb_gadget *g,
1057 struct usb_gadget_driver *driver)
1058{
1059 struct fotg210_udc *fotg210 = gadget_to_fotg210(g);
1060 unsigned long flags;
1061
1062 spin_lock_irqsave(&fotg210->lock, flags);
1063
1064 fotg210_init(fotg210);
1065 fotg210->driver = NULL;
1066
1067 spin_unlock_irqrestore(&fotg210->lock, flags);
1068
1069 return 0;
1070}
1071
1072static struct usb_gadget_ops fotg210_gadget_ops = {
1073 .udc_start = fotg210_udc_start,
1074 .udc_stop = fotg210_udc_stop,
1075};
1076
1077static int fotg210_udc_remove(struct platform_device *pdev)
1078{
1079 struct fotg210_udc *fotg210 = platform_get_drvdata(pdev);
1080
1081 usb_del_gadget_udc(&fotg210->gadget);
1082 iounmap(fotg210->reg);
1083 free_irq(platform_get_irq(pdev, 0), fotg210);
1084
1085 fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
1086 kfree(fotg210);
1087
1088 return 0;
1089}
1090
1091static int fotg210_udc_probe(struct platform_device *pdev)
1092{
1093 struct resource *res, *ires;
1094 struct fotg210_udc *fotg210 = NULL;
1095 struct fotg210_ep *_ep[FOTG210_MAX_NUM_EP];
1096 int ret = 0;
1097 int i;
1098
1099 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1100 if (!res) {
1101 pr_err("platform_get_resource error.\n");
1102 return -ENODEV;
1103 }
1104
1105 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1106 if (!ires) {
1107 pr_err("platform_get_resource IORESOURCE_IRQ error.\n");
1108 return -ENODEV;
1109 }
1110
1111 ret = -ENOMEM;
1112
1113 /* initialize udc */
1114 fotg210 = kzalloc(sizeof(struct fotg210_udc), GFP_KERNEL);
1115 if (fotg210 == NULL) {
1116 pr_err("kzalloc error\n");
1117 goto err_alloc;
1118 }
1119
1120 for (i = 0; i < FOTG210_MAX_NUM_EP; i++) {
1121 _ep[i] = kzalloc(sizeof(struct fotg210_ep), GFP_KERNEL);
1122 if (_ep[i] == NULL) {
1123 pr_err("_ep kzalloc error\n");
1124 goto err_alloc;
1125 }
1126 fotg210->ep[i] = _ep[i];
1127 }
1128
1129 fotg210->reg = ioremap(res->start, resource_size(res));
1130 if (fotg210->reg == NULL) {
1131 pr_err("ioremap error.\n");
1132 goto err_map;
1133 }
1134
1135 spin_lock_init(&fotg210->lock);
1136
1137 platform_set_drvdata(pdev, fotg210);
1138
1139 fotg210->gadget.ops = &fotg210_gadget_ops;
1140
1141 fotg210->gadget.max_speed = USB_SPEED_HIGH;
1142 fotg210->gadget.dev.parent = &pdev->dev;
1143 fotg210->gadget.dev.dma_mask = pdev->dev.dma_mask;
1144 fotg210->gadget.name = udc_name;
1145
1146 INIT_LIST_HEAD(&fotg210->gadget.ep_list);
1147
1148 for (i = 0; i < FOTG210_MAX_NUM_EP; i++) {
1149 struct fotg210_ep *ep = fotg210->ep[i];
1150
1151 if (i) {
1152 INIT_LIST_HEAD(&fotg210->ep[i]->ep.ep_list);
1153 list_add_tail(&fotg210->ep[i]->ep.ep_list,
1154 &fotg210->gadget.ep_list);
1155 }
1156 ep->fotg210 = fotg210;
1157 INIT_LIST_HEAD(&ep->queue);
1158 ep->ep.name = fotg210_ep_name[i];
1159 ep->ep.ops = &fotg210_ep_ops;
1160 usb_ep_set_maxpacket_limit(&ep->ep, (unsigned short) ~0);
1161 }
1162 usb_ep_set_maxpacket_limit(&fotg210->ep[0]->ep, 0x40);
1163 fotg210->gadget.ep0 = &fotg210->ep[0]->ep;
1164 INIT_LIST_HEAD(&fotg210->gadget.ep0->ep_list);
1165
1166 fotg210->ep0_req = fotg210_ep_alloc_request(&fotg210->ep[0]->ep,
1167 GFP_KERNEL);
1168 if (fotg210->ep0_req == NULL)
1169 goto err_req;
1170
1171 fotg210_init(fotg210);
1172
1173 fotg210_disable_unplug(fotg210);
1174
1175 ret = request_irq(ires->start, fotg210_irq, IRQF_SHARED,
1176 udc_name, fotg210);
1177 if (ret < 0) {
1178 pr_err("request_irq error (%d)\n", ret);
1179 goto err_irq;
1180 }
1181
1182 ret = usb_add_gadget_udc(&pdev->dev, &fotg210->gadget);
1183 if (ret)
1184 goto err_add_udc;
1185
1186 dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
1187
1188 return 0;
1189
1190err_add_udc:
1191err_irq:
1192 free_irq(ires->start, fotg210);
1193
1194err_req:
1195 fotg210_ep_free_request(&fotg210->ep[0]->ep, fotg210->ep0_req);
1196
1197err_map:
1198 if (fotg210->reg)
1199 iounmap(fotg210->reg);
1200
1201err_alloc:
1202 kfree(fotg210);
1203
1204 return ret;
1205}
1206
1207static struct platform_driver fotg210_driver = {
1208 .driver = {
1209 .name = (char *)udc_name,
1210 .owner = THIS_MODULE,
1211 },
1212 .probe = fotg210_udc_probe,
1213 .remove = fotg210_udc_remove,
1214};
1215
1216module_platform_driver(fotg210_driver);
1217
1218MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>");
1219MODULE_LICENSE("GPL");
1220MODULE_DESCRIPTION(DRIVER_DESC);