1/*  linux/drivers/scsi/esas2r/atioctl.h
   2 *      ATTO IOCTL Handling
   3 *
   4 *  Copyright (c) 2001-2013 ATTO Technology, Inc.
   5 *  (mailto:linuxdrivers@attotech.com)
   6 */
   7/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
   8/*
   9 *  This program is free software; you can redistribute it and/or modify
  10 *  it under the terms of the GNU General Public License as published by
  11 *  the Free Software Foundation; version 2 of the License.
  12 *
  13 *  This program is distributed in the hope that it will be useful,
  14 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 *  GNU General Public License for more details.
  17 *
  18 *  NO WARRANTY
  19 *  THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  20 *  CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  21 *  LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  22 *  MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  23 *  solely responsible for determining the appropriateness of using and
  24 *  distributing the Program and assumes all risks associated with its
  25 *  exercise of rights under this Agreement, including but not limited to
  26 *  the risks and costs of program errors, damage to or loss of data,
  27 *  programs or equipment, and unavailability or interruption of operations.
  28 *
  29 *  DISCLAIMER OF LIABILITY
  30 *  NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31 *  DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32 *  DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33 *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34 *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35 *  USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36 *  HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37 *
  38 *  You should have received a copy of the GNU General Public License
  39 *  along with this program; if not, write to the Free Software
  40 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  41 */
  42/*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
  43
  44#include "atvda.h"
  45
  46#ifndef ATIOCTL_H
  47#define ATIOCTL_H
  48
  49#define EXPRESS_IOCTL_SIGNATURE        "Express"
  50#define EXPRESS_IOCTL_SIGNATURE_SIZE   8
  51
  52/* structure definitions for IOCTls */
  53
  54struct __packed atto_express_ioctl_header {
  55	u8 signature[EXPRESS_IOCTL_SIGNATURE_SIZE];
  56	u8 return_code;
  57
  58#define IOCTL_SUCCESS               0
  59#define IOCTL_ERR_INVCMD          101
  60#define IOCTL_INIT_FAILED         102
  61#define IOCTL_NOT_IMPLEMENTED     103
  62#define IOCTL_BAD_CHANNEL         104
  63#define IOCTL_TARGET_OVERRUN      105
  64#define IOCTL_TARGET_NOT_ENABLED  106
  65#define IOCTL_BAD_FLASH_IMGTYPE   107
  66#define IOCTL_OUT_OF_RESOURCES    108
  67#define IOCTL_GENERAL_ERROR       109
  68#define IOCTL_INVALID_PARAM       110
  69
  70	u8 channel;
  71	u8 retries;
  72	u8 pad[5];
  73};
  74
  75/*
  76 * NOTE - if channel == 0xFF, the request is
  77 * handled on the adapter it came in on.
  78 */
  79#define MAX_NODE_NAMES  256
  80
  81struct __packed atto_firmware_rw_request {
  82	u8 function;
  83	#define FUNC_FW_DOWNLOAD        0x09
  84	#define FUNC_FW_UPLOAD          0x12
  85
  86	u8 img_type;
  87	#define FW_IMG_FW               0x01
  88	#define FW_IMG_BIOS             0x02
  89	#define FW_IMG_NVR              0x03
  90	#define FW_IMG_RAW              0x04
  91	#define FW_IMG_FM_API           0x05
  92	#define FW_IMG_FS_API           0x06
  93
  94	u8 pad[2];
  95	u32 img_offset;
  96	u32 img_size;
  97	u8 image[0x80000];
  98};
  99
 100struct __packed atto_param_rw_request {
 101	u16 code;
 102	char data_buffer[512];
 103};
 104
 105#define MAX_CHANNEL 256
 106
 107struct __packed atto_channel_list {
 108	u32 num_channels;
 109	u8 channel[MAX_CHANNEL];
 110};
 111
 112struct __packed atto_channel_info {
 113	u8 major_rev;
 114	u8 minor_rev;
 115	u8 IRQ;
 116	u8 revision_id;
 117	u8 pci_bus;
 118	u8 pci_dev_func;
 119	u8 core_rev;
 120	u8 host_no;
 121	u16 device_id;
 122	u16 vendor_id;
 123	u16 ven_dev_id;
 124	u8 pad[3];
 125	u32 hbaapi_rev;
 126};
 127
 128/*
 129 * CSMI control codes
 130 * class independent
 131 */
 132#define CSMI_CC_GET_DRVR_INFO        1
 133#define CSMI_CC_GET_CNTLR_CFG        2
 134#define CSMI_CC_GET_CNTLR_STS        3
 135#define CSMI_CC_FW_DOWNLOAD          4
 136
 137/* RAID class */
 138#define CSMI_CC_GET_RAID_INFO        10
 139#define CSMI_CC_GET_RAID_CFG         11
 140
 141/* HBA class */
 142#define CSMI_CC_GET_PHY_INFO         20
 143#define CSMI_CC_SET_PHY_INFO         21
 144#define CSMI_CC_GET_LINK_ERRORS      22
 145#define CSMI_CC_SMP_PASSTHRU         23
 146#define CSMI_CC_SSP_PASSTHRU         24
 147#define CSMI_CC_STP_PASSTHRU         25
 148#define CSMI_CC_GET_SATA_SIG         26
 149#define CSMI_CC_GET_SCSI_ADDR        27
 150#define CSMI_CC_GET_DEV_ADDR         28
 151#define CSMI_CC_TASK_MGT             29
 152#define CSMI_CC_GET_CONN_INFO        30
 153
 154/* PHY class */
 155#define CSMI_CC_PHY_CTRL             60
 156
 157/*
 158 * CSMI status codes
 159 * class independent
 160 */
 161#define CSMI_STS_SUCCESS             0
 162#define CSMI_STS_FAILED              1
 163#define CSMI_STS_BAD_CTRL_CODE       2
 164#define CSMI_STS_INV_PARAM           3
 165#define CSMI_STS_WRITE_ATTEMPTED     4
 166
 167/* RAID class */
 168#define CSMI_STS_INV_RAID_SET        1000
 169
 170/* HBA class */
 171#define CSMI_STS_PHY_CHANGED         CSMI_STS_SUCCESS
 172#define CSMI_STS_PHY_UNCHANGEABLE    2000
 173#define CSMI_STS_INV_LINK_RATE       2001
 174#define CSMI_STS_INV_PHY             2002
 175#define CSMI_STS_INV_PHY_FOR_PORT    2003
 176#define CSMI_STS_PHY_UNSELECTABLE    2004
 177#define CSMI_STS_SELECT_PHY_OR_PORT  2005
 178#define CSMI_STS_INV_PORT            2006
 179#define CSMI_STS_PORT_UNSELECTABLE   2007
 180#define CSMI_STS_CONNECTION_FAILED   2008
 181#define CSMI_STS_NO_SATA_DEV         2009
 182#define CSMI_STS_NO_SATA_SIGNATURE   2010
 183#define CSMI_STS_SCSI_EMULATION      2011
 184#define CSMI_STS_NOT_AN_END_DEV      2012
 185#define CSMI_STS_NO_SCSI_ADDR        2013
 186#define CSMI_STS_NO_DEV_ADDR         2014
 187
 188/* CSMI class independent structures */
 189struct atto_csmi_get_driver_info {
 190	char name[81];
 191	char description[81];
 192	u16 major_rev;
 193	u16 minor_rev;
 194	u16 build_rev;
 195	u16 release_rev;
 196	u16 csmi_major_rev;
 197	u16 csmi_minor_rev;
 198	#define CSMI_MAJOR_REV_0_81      0
 199	#define CSMI_MINOR_REV_0_81      81
 200
 201	#define CSMI_MAJOR_REV           CSMI_MAJOR_REV_0_81
 202	#define CSMI_MINOR_REV           CSMI_MINOR_REV_0_81
 203};
 204
 205struct atto_csmi_get_pci_bus_addr {
 206	u8 bus_num;
 207	u8 device_num;
 208	u8 function_num;
 209	u8 reserved;
 210};
 211
 212struct atto_csmi_get_cntlr_cfg {
 213	u32 base_io_addr;
 214
 215	struct {
 216		u32 base_memaddr_lo;
 217		u32 base_memaddr_hi;
 218	};
 219
 220	u32 board_id;
 221	u16 slot_num;
 222	#define CSMI_SLOT_NUM_UNKNOWN    0xFFFF
 223
 224	u8 cntlr_class;
 225	#define CSMI_CNTLR_CLASS_HBA     5
 226
 227	u8 io_bus_type;
 228	#define CSMI_BUS_TYPE_PCI        3
 229	#define CSMI_BUS_TYPE_PCMCIA     4
 230
 231	union {
 232		struct atto_csmi_get_pci_bus_addr pci_addr;
 233		u8 reserved[32];
 234	};
 235
 236	char serial_num[81];
 237	u16 major_rev;
 238	u16 minor_rev;
 239	u16 build_rev;
 240	u16 release_rev;
 241	u16 bios_major_rev;
 242	u16 bios_minor_rev;
 243	u16 bios_build_rev;
 244	u16 bios_release_rev;
 245	u32 cntlr_flags;
 246	#define CSMI_CNTLRF_SAS_HBA      0x00000001
 247	#define CSMI_CNTLRF_SAS_RAID     0x00000002
 248	#define CSMI_CNTLRF_SATA_HBA     0x00000004
 249	#define CSMI_CNTLRF_SATA_RAID    0x00000008
 250	#define CSMI_CNTLRF_FWD_SUPPORT  0x00010000
 251	#define CSMI_CNTLRF_FWD_ONLINE   0x00020000
 252	#define CSMI_CNTLRF_FWD_SRESET   0x00040000
 253	#define CSMI_CNTLRF_FWD_HRESET   0x00080000
 254	#define CSMI_CNTLRF_FWD_RROM     0x00100000
 255
 256	u16 rrom_major_rev;
 257	u16 rrom_minor_rev;
 258	u16 rrom_build_rev;
 259	u16 rrom_release_rev;
 260	u16 rrom_biosmajor_rev;
 261	u16 rrom_biosminor_rev;
 262	u16 rrom_biosbuild_rev;
 263	u16 rrom_biosrelease_rev;
 264	u8 reserved2[7];
 265};
 266
 267struct atto_csmi_get_cntlr_sts {
 268	u32 status;
 269	#define CSMI_CNTLR_STS_GOOD          1
 270	#define CSMI_CNTLR_STS_FAILED        2
 271	#define CSMI_CNTLR_STS_OFFLINE       3
 272	#define CSMI_CNTLR_STS_POWEROFF      4
 273
 274	u32 offline_reason;
 275	#define CSMI_OFFLINE_NO_REASON       0
 276	#define CSMI_OFFLINE_INITIALIZING    1
 277	#define CSMI_OFFLINE_BUS_DEGRADED    2
 278	#define CSMI_OFFLINE_BUS_FAILURE     3
 279
 280	u8 reserved[28];
 281};
 282
 283struct atto_csmi_fw_download {
 284	u32 buffer_len;
 285	u32 download_flags;
 286	#define CSMI_FWDF_VALIDATE       0x00000001
 287	#define CSMI_FWDF_SOFT_RESET     0x00000002
 288	#define CSMI_FWDF_HARD_RESET     0x00000004
 289
 290	u8 reserved[32];
 291	u16 status;
 292	#define CSMI_FWD_STS_SUCCESS     0
 293	#define CSMI_FWD_STS_FAILED      1
 294	#define CSMI_FWD_STS_USING_RROM  2
 295	#define CSMI_FWD_STS_REJECT      3
 296	#define CSMI_FWD_STS_DOWNREV     4
 297
 298	u16 severity;
 299	#define CSMI_FWD_SEV_INFO        0
 300	#define CSMI_FWD_SEV_WARNING     1
 301	#define CSMI_FWD_SEV_ERROR       2
 302	#define CSMI_FWD_SEV_FATAL       3
 303
 304};
 305
 306/* CSMI RAID class structures */
 307struct atto_csmi_get_raid_info {
 308	u32 num_raid_sets;
 309	u32 max_drivesper_set;
 310	u8 reserved[92];
 311};
 312
 313struct atto_csmi_raid_drives {
 314	char model[40];
 315	char firmware[8];
 316	char serial_num[40];
 317	u8 sas_addr[8];
 318	u8 lun[8];
 319	u8 drive_sts;
 320	#define CSMI_DRV_STS_OK          0
 321	#define CSMI_DRV_STS_REBUILDING  1
 322	#define CSMI_DRV_STS_FAILED      2
 323	#define CSMI_DRV_STS_DEGRADED    3
 324
 325	u8 drive_usage;
 326	#define CSMI_DRV_USE_NOT_USED    0
 327	#define CSMI_DRV_USE_MEMBER      1
 328	#define CSMI_DRV_USE_SPARE       2
 329
 330	u8 reserved[30]; /* spec says 22 */
 331};
 332
 333struct atto_csmi_get_raid_cfg {
 334	u32 raid_set_index;
 335	u32 capacity;
 336	u32 stripe_size;
 337	u8 raid_type;
 338	u8 status;
 339	u8 information;
 340	u8 drive_cnt;
 341	u8 reserved[20];
 342
 343	struct atto_csmi_raid_drives drives[1];
 344};
 345
 346/* CSMI HBA class structures */
 347struct atto_csmi_phy_entity {
 348	u8 ident_frame[0x1C];
 349	u8 port_id;
 350	u8 neg_link_rate;
 351	u8 min_link_rate;
 352	u8 max_link_rate;
 353	u8 phy_change_cnt;
 354	u8 auto_discover;
 355	#define CSMI_DISC_NOT_SUPPORTED  0x00
 356	#define CSMI_DISC_NOT_STARTED    0x01
 357	#define CSMI_DISC_IN_PROGRESS    0x02
 358	#define CSMI_DISC_COMPLETE       0x03
 359	#define CSMI_DISC_ERROR          0x04
 360
 361	u8 reserved[2];
 362	u8 attach_ident_frame[0x1C];
 363};
 364
 365struct atto_csmi_get_phy_info {
 366	u8 number_of_phys;
 367	u8 reserved[3];
 368	struct atto_csmi_phy_entity
 369		phy[32];
 370};
 371
 372struct atto_csmi_set_phy_info {
 373	u8 phy_id;
 374	u8 neg_link_rate;
 375	#define CSMI_NEG_RATE_NEGOTIATE  0x00
 376	#define CSMI_NEG_RATE_PHY_DIS    0x01
 377
 378	u8 prog_minlink_rate;
 379	u8 prog_maxlink_rate;
 380	u8 signal_class;
 381	#define CSMI_SIG_CLASS_UNKNOWN   0x00
 382	#define CSMI_SIG_CLASS_DIRECT    0x01
 383	#define CSMI_SIG_CLASS_SERVER    0x02
 384	#define CSMI_SIG_CLASS_ENCLOSURE 0x03
 385
 386	u8 reserved[3];
 387};
 388
 389struct atto_csmi_get_link_errors {
 390	u8 phy_id;
 391	u8 reset_cnts;
 392	#define CSMI_RESET_CNTS_NO       0x00
 393	#define CSMI_RESET_CNTS_YES      0x01
 394
 395	u8 reserved[2];
 396	u32 inv_dw_cnt;
 397	u32 disp_err_cnt;
 398	u32 loss_ofdw_sync_cnt;
 399	u32 phy_reseterr_cnt;
 400
 401	/*
 402	 * The following field has been added by ATTO for ease of
 403	 * implementation of additional statistics.  Drivers must validate
 404	 * the length of the IOCTL payload prior to filling them in so CSMI
 405	 * complaint applications function correctly.
 406	 */
 407
 408	u32 crc_err_cnt;
 409};
 410
 411struct atto_csmi_smp_passthru {
 412	u8 phy_id;
 413	u8 port_id;
 414	u8 conn_rate;
 415	u8 reserved;
 416	u8 dest_sas_addr[8];
 417	u32 req_len;
 418	u8 smp_req[1020];
 419	u8 conn_sts;
 420	u8 reserved2[3];
 421	u32 rsp_len;
 422	u8 smp_rsp[1020];
 423};
 424
 425struct atto_csmi_ssp_passthru_sts {
 426	u8 conn_sts;
 427	u8 reserved[3];
 428	u8 data_present;
 429	u8 status;
 430	u16 rsp_length;
 431	u8 rsp[256];
 432	u32 data_bytes;
 433};
 434
 435struct atto_csmi_ssp_passthru {
 436	u8 phy_id;
 437	u8 port_id;
 438	u8 conn_rate;
 439	u8 reserved;
 440	u8 dest_sas_addr[8];
 441	u8 lun[8];
 442	u8 cdb_len;
 443	u8 add_cdb_len;
 444	u8 reserved2[2];
 445	u8 cdb[16];
 446	u32 flags;
 447	#define CSMI_SSPF_DD_READ        0x00000001
 448	#define CSMI_SSPF_DD_WRITE       0x00000002
 449	#define CSMI_SSPF_DD_UNSPECIFIED 0x00000004
 450	#define CSMI_SSPF_TA_SIMPLE      0x00000000
 451	#define CSMI_SSPF_TA_HEAD_OF_Q   0x00000010
 452	#define CSMI_SSPF_TA_ORDERED     0x00000020
 453	#define CSMI_SSPF_TA_ACA         0x00000040
 454
 455	u8 add_cdb[24];
 456	u32 data_len;
 457
 458	struct atto_csmi_ssp_passthru_sts sts;
 459};
 460
 461struct atto_csmi_stp_passthru_sts {
 462	u8 conn_sts;
 463	u8 reserved[3];
 464	u8 sts_fis[20];
 465	u32 scr[16];
 466	u32 data_bytes;
 467};
 468
 469struct atto_csmi_stp_passthru {
 470	u8 phy_id;
 471	u8 port_id;
 472	u8 conn_rate;
 473	u8 reserved;
 474	u8 dest_sas_addr[8];
 475	u8 reserved2[4];
 476	u8 command_fis[20];
 477	u32 flags;
 478	#define CSMI_STPF_DD_READ        0x00000001
 479	#define CSMI_STPF_DD_WRITE       0x00000002
 480	#define CSMI_STPF_DD_UNSPECIFIED 0x00000004
 481	#define CSMI_STPF_PIO            0x00000010
 482	#define CSMI_STPF_DMA            0x00000020
 483	#define CSMI_STPF_PACKET         0x00000040
 484	#define CSMI_STPF_DMA_QUEUED     0x00000080
 485	#define CSMI_STPF_EXECUTE_DIAG   0x00000100
 486	#define CSMI_STPF_RESET_DEVICE   0x00000200
 487
 488	u32 data_len;
 489
 490	struct atto_csmi_stp_passthru_sts sts;
 491};
 492
 493struct atto_csmi_get_sata_sig {
 494	u8 phy_id;
 495	u8 reserved[3];
 496	u8 reg_dth_fis[20];
 497};
 498
 499struct atto_csmi_get_scsi_addr {
 500	u8 sas_addr[8];
 501	u8 sas_lun[8];
 502	u8 host_index;
 503	u8 path_id;
 504	u8 target_id;
 505	u8 lun;
 506};
 507
 508struct atto_csmi_get_dev_addr {
 509	u8 host_index;
 510	u8 path_id;
 511	u8 target_id;
 512	u8 lun;
 513	u8 sas_addr[8];
 514	u8 sas_lun[8];
 515};
 516
 517struct atto_csmi_task_mgmt {
 518	u8 host_index;
 519	u8 path_id;
 520	u8 target_id;
 521	u8 lun;
 522	u32 flags;
 523	#define CSMI_TMF_TASK_IU         0x00000001
 524	#define CSMI_TMF_HARD_RST        0x00000002
 525	#define CSMI_TMF_SUPPRESS_RSLT   0x00000004
 526
 527	u32 queue_tag;
 528	u32 reserved;
 529	u8 task_mgt_func;
 530	u8 reserved2[7];
 531	u32 information;
 532	#define CSMI_TM_INFO_TEST        1
 533	#define CSMI_TM_INFO_EXCEEDED    2
 534	#define CSMI_TM_INFO_DEMAND      3
 535	#define CSMI_TM_INFO_TRIGGER     4
 536
 537	struct atto_csmi_ssp_passthru_sts sts;
 538
 539};
 540
 541struct atto_csmi_get_conn_info {
 542	u32 pinout;
 543	#define CSMI_CON_UNKNOWN         0x00000001
 544	#define CSMI_CON_SFF_8482        0x00000002
 545	#define CSMI_CON_SFF_8470_LANE_1 0x00000100
 546	#define CSMI_CON_SFF_8470_LANE_2 0x00000200
 547	#define CSMI_CON_SFF_8470_LANE_3 0x00000400
 548	#define CSMI_CON_SFF_8470_LANE_4 0x00000800
 549	#define CSMI_CON_SFF_8484_LANE_1 0x00010000
 550	#define CSMI_CON_SFF_8484_LANE_2 0x00020000
 551	#define CSMI_CON_SFF_8484_LANE_3 0x00040000
 552	#define CSMI_CON_SFF_8484_LANE_4 0x00080000
 553
 554	u8 connector[16];
 555	u8 location;
 556	#define CSMI_CON_INTERNAL        0x02
 557	#define CSMI_CON_EXTERNAL        0x04
 558	#define CSMI_CON_SWITCHABLE      0x08
 559	#define CSMI_CON_AUTO            0x10
 560
 561	u8 reserved[15];
 562};
 563
 564/* CSMI PHY class structures */
 565struct atto_csmi_character {
 566	u8 type_flags;
 567	#define CSMI_CTF_POS_DISP        0x01
 568	#define CSMI_CTF_NEG_DISP        0x02
 569	#define CSMI_CTF_CTRL_CHAR       0x04
 570
 571	u8 value;
 572};
 573
 574struct atto_csmi_pc_ctrl {
 575	u8 type;
 576	#define CSMI_PC_TYPE_UNDEFINED   0x00
 577	#define CSMI_PC_TYPE_SATA        0x01
 578	#define CSMI_PC_TYPE_SAS         0x02
 579	u8 rate;
 580	u8 reserved[6];
 581	u32 vendor_unique[8];
 582	u32 tx_flags;
 583	#define CSMI_PC_TXF_PREEMP_DIS   0x00000001
 584
 585	signed char tx_amplitude;
 586	signed char tx_preemphasis;
 587	signed char tx_slew_rate;
 588	signed char tx_reserved[13];
 589	u8 tx_vendor_unique[64];
 590	u32 rx_flags;
 591	#define CSMI_PC_RXF_EQ_DIS       0x00000001
 592
 593	signed char rx_threshold;
 594	signed char rx_equalization_gain;
 595	signed char rx_reserved[14];
 596	u8 rx_vendor_unique[64];
 597	u32 pattern_flags;
 598	#define CSMI_PC_PATF_FIXED       0x00000001
 599	#define CSMI_PC_PATF_DIS_SCR     0x00000002
 600	#define CSMI_PC_PATF_DIS_ALIGN   0x00000004
 601	#define CSMI_PC_PATF_DIS_SSC     0x00000008
 602
 603	u8 fixed_pattern;
 604	#define CSMI_PC_FP_CJPAT         0x00000001
 605	#define CSMI_PC_FP_ALIGN         0x00000002
 606
 607	u8 user_pattern_len;
 608	u8 pattern_reserved[6];
 609
 610	struct atto_csmi_character user_pattern_buffer[16];
 611};
 612
 613struct atto_csmi_phy_ctrl {
 614	u32 function;
 615	#define CSMI_PC_FUNC_GET_SETUP   0x00000100
 616
 617	u8 phy_id;
 618	u16 len_of_cntl;
 619	u8 num_of_cntls;
 620	u8 reserved[4];
 621	u32 link_flags;
 622	#define CSMI_PHY_ACTIVATE_CTRL   0x00000001
 623	#define CSMI_PHY_UPD_SPINUP_RATE 0x00000002
 624	#define CSMI_PHY_AUTO_COMWAKE    0x00000004
 625
 626	u8 spinup_rate;
 627	u8 link_reserved[7];
 628	u32 vendor_unique[8];
 629
 630	struct atto_csmi_pc_ctrl control[1];
 631};
 632
 633union atto_ioctl_csmi {
 634	struct atto_csmi_get_driver_info drvr_info;
 635	struct atto_csmi_get_cntlr_cfg cntlr_cfg;
 636	struct atto_csmi_get_cntlr_sts cntlr_sts;
 637	struct atto_csmi_fw_download fw_dwnld;
 638	struct atto_csmi_get_raid_info raid_info;
 639	struct atto_csmi_get_raid_cfg raid_cfg;
 640	struct atto_csmi_get_phy_info get_phy_info;
 641	struct atto_csmi_set_phy_info set_phy_info;
 642	struct atto_csmi_get_link_errors link_errs;
 643	struct atto_csmi_smp_passthru smp_pass_thru;
 644	struct atto_csmi_ssp_passthru ssp_pass_thru;
 645	struct atto_csmi_stp_passthru stp_pass_thru;
 646	struct atto_csmi_task_mgmt tsk_mgt;
 647	struct atto_csmi_get_sata_sig sata_sig;
 648	struct atto_csmi_get_scsi_addr scsi_addr;
 649	struct atto_csmi_get_dev_addr dev_addr;
 650	struct atto_csmi_get_conn_info conn_info[32];
 651	struct atto_csmi_phy_ctrl phy_ctrl;
 652};
 653
 654struct atto_csmi {
 655	u32 control_code;
 656	u32 status;
 657	union atto_ioctl_csmi data;
 658};
 659
 660struct atto_module_info {
 661	void *adapter;
 662	void *pci_dev;
 663	void *scsi_host;
 664	unsigned short host_no;
 665	union {
 666		struct {
 667			u64 node_name;
 668			u64 port_name;
 669		};
 670		u64 sas_addr;
 671	};
 672};
 673
 674#define ATTO_FUNC_GET_ADAP_INFO      0x00
 675#define ATTO_VER_GET_ADAP_INFO0      0
 676#define ATTO_VER_GET_ADAP_INFO       ATTO_VER_GET_ADAP_INFO0
 677
 678struct __packed atto_hba_get_adapter_info {
 679
 680	struct {
 681		u16 vendor_id;
 682		u16 device_id;
 683		u16 ss_vendor_id;
 684		u16 ss_device_id;
 685		u8 class_code[3];
 686		u8 rev_id;
 687		u8 bus_num;
 688		u8 dev_num;
 689		u8 func_num;
 690		u8 link_width_max;
 691		u8 link_width_curr;
 692	    #define ATTO_GAI_PCILW_UNKNOWN   0x00
 693
 694		u8 link_speed_max;
 695		u8 link_speed_curr;
 696	    #define ATTO_GAI_PCILS_UNKNOWN   0x00
 697	    #define ATTO_GAI_PCILS_GEN1      0x01
 698	    #define ATTO_GAI_PCILS_GEN2      0x02
 699	    #define ATTO_GAI_PCILS_GEN3      0x03
 700
 701		u8 interrupt_mode;
 702	    #define ATTO_GAI_PCIIM_UNKNOWN   0x00
 703	    #define ATTO_GAI_PCIIM_LEGACY    0x01
 704	    #define ATTO_GAI_PCIIM_MSI       0x02
 705	    #define ATTO_GAI_PCIIM_MSIX      0x03
 706
 707		u8 msi_vector_cnt;
 708		u8 reserved[19];
 709	} pci;
 710
 711	u8 adap_type;
 712	#define ATTO_GAI_AT_EPCIU320     0x00
 713	#define ATTO_GAI_AT_ESASRAID     0x01
 714	#define ATTO_GAI_AT_ESASRAID2    0x02
 715	#define ATTO_GAI_AT_ESASHBA      0x03
 716	#define ATTO_GAI_AT_ESASHBA2     0x04
 717	#define ATTO_GAI_AT_CELERITY     0x05
 718	#define ATTO_GAI_AT_CELERITY8    0x06
 719	#define ATTO_GAI_AT_FASTFRAME    0x07
 720	#define ATTO_GAI_AT_ESASHBA3     0x08
 721	#define ATTO_GAI_AT_CELERITY16   0x09
 722	#define ATTO_GAI_AT_TLSASHBA     0x0A
 723	#define ATTO_GAI_AT_ESASHBA4     0x0B
 724
 725	u8 adap_flags;
 726	#define ATTO_GAI_AF_DEGRADED     0x01
 727	#define ATTO_GAI_AF_SPT_SUPP     0x02
 728	#define ATTO_GAI_AF_DEVADDR_SUPP 0x04
 729	#define ATTO_GAI_AF_PHYCTRL_SUPP 0x08
 730	#define ATTO_GAI_AF_TEST_SUPP    0x10
 731	#define ATTO_GAI_AF_DIAG_SUPP    0x20
 732	#define ATTO_GAI_AF_VIRT_SES     0x40
 733	#define ATTO_GAI_AF_CONN_CTRL    0x80
 734
 735	u8 num_ports;
 736	u8 num_phys;
 737	u8 drvr_rev_major;
 738	u8 drvr_rev_minor;
 739	u8 drvr_revsub_minor;
 740	u8 drvr_rev_build;
 741	char drvr_rev_ascii[16];
 742	char drvr_name[32];
 743	char firmware_rev[16];
 744	char flash_rev[16];
 745	char model_name_short[16];
 746	char model_name[32];
 747	u32 num_targets;
 748	u32 num_targsper_bus;
 749	u32 num_lunsper_targ;
 750	u8 num_busses;
 751	u8 num_connectors;
 752	u8 adap_flags2;
 753	#define ATTO_GAI_AF2_FCOE_SUPP       0x01
 754	#define ATTO_GAI_AF2_NIC_SUPP        0x02
 755	#define ATTO_GAI_AF2_LOCATE_SUPP     0x04
 756	#define ATTO_GAI_AF2_ADAP_CTRL_SUPP  0x08
 757	#define ATTO_GAI_AF2_DEV_INFO_SUPP   0x10
 758	#define ATTO_GAI_AF2_NPIV_SUPP       0x20
 759	#define ATTO_GAI_AF2_MP_SUPP         0x40
 760
 761	u8 num_temp_sensors;
 762	u32 num_targets_backend;
 763	u32 tunnel_flags;
 764	#define ATTO_GAI_TF_MEM_RW           0x00000001
 765	#define ATTO_GAI_TF_TRACE            0x00000002
 766	#define ATTO_GAI_TF_SCSI_PASS_THRU   0x00000004
 767	#define ATTO_GAI_TF_GET_DEV_ADDR     0x00000008
 768	#define ATTO_GAI_TF_PHY_CTRL         0x00000010
 769	#define ATTO_GAI_TF_CONN_CTRL        0x00000020
 770	#define ATTO_GAI_TF_GET_DEV_INFO     0x00000040
 771
 772	u8 reserved3[0x138];
 773};
 774
 775#define ATTO_FUNC_GET_ADAP_ADDR      0x01
 776#define ATTO_VER_GET_ADAP_ADDR0      0
 777#define ATTO_VER_GET_ADAP_ADDR       ATTO_VER_GET_ADAP_ADDR0
 778
 779struct __packed atto_hba_get_adapter_address {
 780
 781	u8 addr_type;
 782	#define ATTO_GAA_AT_PORT         0x00
 783	#define ATTO_GAA_AT_NODE         0x01
 784	#define ATTO_GAA_AT_CURR_MAC     0x02
 785	#define ATTO_GAA_AT_PERM_MAC     0x03
 786	#define ATTO_GAA_AT_VNIC         0x04
 787
 788	u8 port_id;
 789	u16 addr_len;
 790	u8 address[256];
 791};
 792
 793#define ATTO_FUNC_MEM_RW             0x02
 794#define ATTO_VER_MEM_RW0             0
 795#define ATTO_VER_MEM_RW              ATTO_VER_MEM_RW0
 796
 797struct __packed atto_hba_memory_read_write {
 798	u8 mem_func;
 799	u8 mem_type;
 800	union {
 801		u8 pci_index;
 802		u8 i2c_dev;
 803	};
 804	u8 i2c_status;
 805	u32 length;
 806	u64 address;
 807	u8 reserved[48];
 808
 809};
 810
 811#define ATTO_FUNC_TRACE              0x03
 812#define ATTO_VER_TRACE0              0
 813#define ATTO_VER_TRACE1              1
 814#define ATTO_VER_TRACE               ATTO_VER_TRACE1
 815
 816struct __packed atto_hba_trace {
 817	u8 trace_func;
 818	#define ATTO_TRC_TF_GET_INFO     0x00
 819	#define ATTO_TRC_TF_ENABLE       0x01
 820	#define ATTO_TRC_TF_DISABLE      0x02
 821	#define ATTO_TRC_TF_SET_MASK     0x03
 822	#define ATTO_TRC_TF_UPLOAD       0x04
 823	#define ATTO_TRC_TF_RESET        0x05
 824
 825	u8 trace_type;
 826	#define ATTO_TRC_TT_DRIVER       0x00
 827	#define ATTO_TRC_TT_FWCOREDUMP   0x01
 828
 829	u8 reserved[2];
 830	u32 current_offset;
 831	u32 total_length;
 832	u32 trace_mask;
 833	u8 reserved2[48];
 834	u8 contents[];
 835};
 836
 837#define ATTO_FUNC_SCSI_PASS_THRU     0x04
 838#define ATTO_VER_SCSI_PASS_THRU0     0
 839#define ATTO_VER_SCSI_PASS_THRU      ATTO_VER_SCSI_PASS_THRU0
 840
 841struct __packed atto_hba_scsi_pass_thru {
 842	u8 cdb[32];
 843	u8 cdb_length;
 844	u8 req_status;
 845	#define ATTO_SPT_RS_SUCCESS      0x00
 846	#define ATTO_SPT_RS_FAILED       0x01
 847	#define ATTO_SPT_RS_OVERRUN      0x02
 848	#define ATTO_SPT_RS_UNDERRUN     0x03
 849	#define ATTO_SPT_RS_NO_DEVICE    0x04
 850	#define ATTO_SPT_RS_NO_LUN       0x05
 851	#define ATTO_SPT_RS_TIMEOUT      0x06
 852	#define ATTO_SPT_RS_BUS_RESET    0x07
 853	#define ATTO_SPT_RS_ABORTED      0x08
 854	#define ATTO_SPT_RS_BUSY         0x09
 855	#define ATTO_SPT_RS_DEGRADED     0x0A
 856
 857	u8 scsi_status;
 858	u8 sense_length;
 859	u32 flags;
 860	#define ATTO_SPTF_DATA_IN    0x00000001
 861	#define ATTO_SPTF_DATA_OUT   0x00000002
 862	#define ATTO_SPTF_SIMPLE_Q   0x00000004
 863	#define ATTO_SPTF_HEAD_OF_Q  0x00000008
 864	#define ATTO_SPTF_ORDERED_Q  0x00000010
 865
 866	u32 timeout;
 867	u32 target_id;
 868	u8 lun[8];
 869	u32 residual_length;
 870	u8 sense_data[0xFC];
 871	u8 reserved[0x28];
 872};
 873
 874#define ATTO_FUNC_GET_DEV_ADDR       0x05
 875#define ATTO_VER_GET_DEV_ADDR0       0
 876#define ATTO_VER_GET_DEV_ADDR        ATTO_VER_GET_DEV_ADDR0
 877
 878struct __packed atto_hba_get_device_address {
 879	u8 addr_type;
 880	#define ATTO_GDA_AT_PORT         0x00
 881	#define ATTO_GDA_AT_NODE         0x01
 882	#define ATTO_GDA_AT_MAC          0x02
 883	#define ATTO_GDA_AT_PORTID       0x03
 884	#define ATTO_GDA_AT_UNIQUE       0x04
 885
 886	u8 reserved;
 887	u16 addr_len;
 888	u32 target_id;
 889	u8 address[256];
 890};
 891
 892/* The following functions are supported by firmware but do not have any
 893 * associated driver structures
 894 */
 895#define ATTO_FUNC_PHY_CTRL           0x06
 896#define ATTO_FUNC_CONN_CTRL          0x0C
 897#define ATTO_FUNC_ADAP_CTRL          0x0E
 898#define ATTO_VER_ADAP_CTRL0          0
 899#define ATTO_VER_ADAP_CTRL           ATTO_VER_ADAP_CTRL0
 900
 901struct __packed atto_hba_adap_ctrl {
 902	u8 adap_func;
 903	#define ATTO_AC_AF_HARD_RST      0x00
 904	#define ATTO_AC_AF_GET_STATE     0x01
 905	#define ATTO_AC_AF_GET_TEMP      0x02
 906
 907	u8 adap_state;
 908	#define ATTO_AC_AS_UNKNOWN       0x00
 909	#define ATTO_AC_AS_OK            0x01
 910	#define ATTO_AC_AS_RST_SCHED     0x02
 911	#define ATTO_AC_AS_RST_IN_PROG   0x03
 912	#define ATTO_AC_AS_RST_DISC      0x04
 913	#define ATTO_AC_AS_DEGRADED      0x05
 914	#define ATTO_AC_AS_DISABLED      0x06
 915	#define ATTO_AC_AS_TEMP          0x07
 916
 917	u8 reserved[2];
 918
 919	union {
 920		struct {
 921			u8 temp_sensor;
 922			u8 temp_state;
 923
 924	#define ATTO_AC_TS_UNSUPP        0x00
 925	#define ATTO_AC_TS_UNKNOWN       0x01
 926	#define ATTO_AC_TS_INIT_FAILED   0x02
 927	#define ATTO_AC_TS_NORMAL        0x03
 928	#define ATTO_AC_TS_OUT_OF_RANGE  0x04
 929	#define ATTO_AC_TS_FAULT         0x05
 930
 931			signed short temp_value;
 932			signed short temp_lower_lim;
 933			signed short temp_upper_lim;
 934			char temp_desc[32];
 935			u8 reserved2[20];
 936		};
 937	};
 938};
 939
 940#define ATTO_FUNC_GET_DEV_INFO       0x0F
 941#define ATTO_VER_GET_DEV_INFO0       0
 942#define ATTO_VER_GET_DEV_INFO        ATTO_VER_GET_DEV_INFO0
 943
 944struct __packed atto_hba_sas_device_info {
 945
 946    #define ATTO_SDI_MAX_PHYS_WIDE_PORT  16
 947
 948	u8 phy_id[ATTO_SDI_MAX_PHYS_WIDE_PORT]; /* IDs of parent exp/adapt */
 949	#define ATTO_SDI_PHY_ID_INV      ATTO_SAS_PHY_ID_INV
 950	u32 exp_target_id;
 951	u32 sas_port_mask;
 952	u8 sas_level;
 953	#define ATTO_SDI_SAS_LVL_INV     0xFF
 954
 955	u8 slot_num;
 956	#define ATTO_SDI_SLOT_NUM_INV    ATTO_SLOT_NUM_INV
 957
 958	u8 dev_type;
 959	#define ATTO_SDI_DT_END_DEVICE   0
 960	#define ATTO_SDI_DT_EXPANDER     1
 961	#define ATTO_SDI_DT_PORT_MULT    2
 962
 963	u8 ini_flags;
 964	u8 tgt_flags;
 965	u8 link_rate; /* SMP_RATE_XXX */
 966	u8 loc_flags;
 967	#define ATTO_SDI_LF_DIRECT       0x01
 968	#define ATTO_SDI_LF_EXPANDER     0x02
 969	#define ATTO_SDI_LF_PORT_MULT    0x04
 970	u8 pm_port;
 971	u8 reserved[0x60];
 972};
 973
 974union atto_hba_device_info {
 975	struct atto_hba_sas_device_info sas_dev_info;
 976};
 977
 978struct __packed atto_hba_get_device_info {
 979	u32 target_id;
 980	u8 info_type;
 981	#define ATTO_GDI_IT_UNKNOWN      0x00
 982	#define ATTO_GDI_IT_SAS          0x01
 983	#define ATTO_GDI_IT_FC           0x02
 984	#define ATTO_GDI_IT_FCOE         0x03
 985
 986	u8 reserved[11];
 987	union atto_hba_device_info dev_info;
 988};
 989
 990struct atto_ioctl {
 991	u8 version;
 992	u8 function; /* ATTO_FUNC_XXX */
 993	u8 status;
 994#define ATTO_STS_SUCCESS         0x00
 995#define ATTO_STS_FAILED          0x01
 996#define ATTO_STS_INV_VERSION     0x02
 997#define ATTO_STS_OUT_OF_RSRC     0x03
 998#define ATTO_STS_INV_FUNC        0x04
 999#define ATTO_STS_UNSUPPORTED     0x05
1000#define ATTO_STS_INV_ADAPTER     0x06
1001#define ATTO_STS_INV_DRVR_VER    0x07
1002#define ATTO_STS_INV_PARAM       0x08
1003#define ATTO_STS_TIMEOUT         0x09
1004#define ATTO_STS_NOT_APPL        0x0A
1005#define ATTO_STS_DEGRADED        0x0B
1006
1007	u8 flags;
1008	#define HBAF_TUNNEL      0x01
1009
1010	u32 data_length;
1011	u8 reserved2[56];
1012
1013	union {
1014		u8 byte[1];
1015		struct atto_hba_get_adapter_info get_adap_info;
1016		struct atto_hba_get_adapter_address get_adap_addr;
1017		struct atto_hba_scsi_pass_thru scsi_pass_thru;
1018		struct atto_hba_get_device_address get_dev_addr;
1019		struct atto_hba_adap_ctrl adap_ctrl;
1020		struct atto_hba_get_device_info get_dev_info;
1021		struct atto_hba_trace trace;
1022	} data;
1023
1024};
1025
1026struct __packed atto_ioctl_vda_scsi_cmd {
1027
1028    #define ATTO_VDA_SCSI_VER0   0
1029    #define ATTO_VDA_SCSI_VER    ATTO_VDA_SCSI_VER0
1030
1031	u8 cdb[16];
1032	u32 flags;
1033	u32 data_length;
1034	u32 residual_length;
1035	u16 target_id;
1036	u8 sense_len;
1037	u8 scsi_stat;
1038	u8 reserved[8];
1039	u8 sense_data[80];
1040};
1041
1042struct __packed atto_ioctl_vda_flash_cmd {
1043
1044    #define ATTO_VDA_FLASH_VER0  0
1045    #define ATTO_VDA_FLASH_VER   ATTO_VDA_FLASH_VER0
1046
1047	u32 flash_addr;
1048	u32 data_length;
1049	u8 sub_func;
1050	u8 reserved[15];
1051
1052	union {
1053		struct {
1054			u32 flash_size;
1055			u32 page_size;
1056			u8 prod_info[32];
1057		} info;
1058
1059		struct {
1060			char file_name[16]; /* 8.3 fname, NULL term, wc=* */
1061			u32 file_size;
1062		} file;
1063	} data;
1064
1065};
1066
1067struct __packed atto_ioctl_vda_diag_cmd {
1068
1069    #define ATTO_VDA_DIAG_VER0   0
1070    #define ATTO_VDA_DIAG_VER    ATTO_VDA_DIAG_VER0
1071
1072	u64 local_addr;
1073	u32 data_length;
1074	u8 sub_func;
1075	u8 flags;
1076	u8 reserved[3];
1077};
1078
1079struct __packed atto_ioctl_vda_cli_cmd {
1080
1081    #define ATTO_VDA_CLI_VER0    0
1082    #define ATTO_VDA_CLI_VER     ATTO_VDA_CLI_VER0
1083
1084	u32 cmd_rsp_len;
1085};
1086
1087struct __packed atto_ioctl_vda_smp_cmd {
1088
1089    #define ATTO_VDA_SMP_VER0    0
1090    #define ATTO_VDA_SMP_VER     ATTO_VDA_SMP_VER0
1091
1092	u64 dest;
1093	u32 cmd_rsp_len;
1094};
1095
1096struct __packed atto_ioctl_vda_cfg_cmd {
1097
1098    #define ATTO_VDA_CFG_VER0    0
1099    #define ATTO_VDA_CFG_VER     ATTO_VDA_CFG_VER0
1100
1101	u32 data_length;
1102	u8 cfg_func;
1103	u8 reserved[11];
1104
1105	union {
1106		u8 bytes[112];
1107		struct atto_vda_cfg_init init;
1108	} data;
1109
1110};
1111
1112struct __packed atto_ioctl_vda_mgt_cmd {
1113
1114    #define ATTO_VDA_MGT_VER0    0
1115    #define ATTO_VDA_MGT_VER     ATTO_VDA_MGT_VER0
1116
1117	u8 mgt_func;
1118	u8 scan_generation;
1119	u16 dev_index;
1120	u32 data_length;
1121	u8 reserved[8];
1122	union {
1123		u8 bytes[112];
1124		struct atto_vda_devinfo dev_info;
1125		struct atto_vda_grp_info grp_info;
1126		struct atto_vdapart_info part_info;
1127		struct atto_vda_dh_info dh_info;
1128		struct atto_vda_metrics_info metrics_info;
1129		struct atto_vda_schedule_info sched_info;
1130		struct atto_vda_n_vcache_info nvcache_info;
1131		struct atto_vda_buzzer_info buzzer_info;
1132		struct atto_vda_adapter_info adapter_info;
1133		struct atto_vda_temp_info temp_info;
1134		struct atto_vda_fan_info fan_info;
1135	} data;
1136};
1137
1138struct __packed atto_ioctl_vda_gsv_cmd {
1139
1140    #define ATTO_VDA_GSV_VER0    0
1141    #define ATTO_VDA_GSV_VER     ATTO_VDA_GSV_VER0
1142
1143	u8 rsp_len;
1144	u8 reserved[7];
1145	u8 version_info[];
1146	#define ATTO_VDA_VER_UNSUPPORTED 0xFF
1147
1148};
1149
1150struct __packed atto_ioctl_vda {
1151	u8 version;
1152	u8 function;    /* VDA_FUNC_XXXX */
1153	u8 status;      /* ATTO_STS_XXX */
1154	u8 vda_status;  /* RS_XXX (if status == ATTO_STS_SUCCESS) */
1155	u32 data_length;
1156	u8 reserved[8];
1157
1158	union {
1159		struct atto_ioctl_vda_scsi_cmd scsi;
1160		struct atto_ioctl_vda_flash_cmd flash;
1161		struct atto_ioctl_vda_diag_cmd diag;
1162		struct atto_ioctl_vda_cli_cmd cli;
1163		struct atto_ioctl_vda_smp_cmd smp;
1164		struct atto_ioctl_vda_cfg_cmd cfg;
1165		struct atto_ioctl_vda_mgt_cmd mgt;
1166		struct atto_ioctl_vda_gsv_cmd gsv;
1167		u8 cmd_info[256];
1168	} cmd;
1169
1170	union {
1171		u8 data[1];
1172		struct atto_vda_devinfo2 dev_info2;
1173	} data;
1174
1175};
1176
1177struct __packed atto_ioctl_smp {
1178	u8 version;
1179	#define ATTO_SMP_VERSION0        0
1180	#define ATTO_SMP_VERSION1        1
1181	#define ATTO_SMP_VERSION2        2
1182	#define ATTO_SMP_VERSION         ATTO_SMP_VERSION2
1183
1184	u8 function;
1185#define ATTO_SMP_FUNC_DISC_SMP           0x00
1186#define ATTO_SMP_FUNC_DISC_TARG          0x01
1187#define ATTO_SMP_FUNC_SEND_CMD           0x02
1188#define ATTO_SMP_FUNC_DISC_TARG_DIRECT   0x03
1189#define ATTO_SMP_FUNC_SEND_CMD_DIRECT    0x04
1190#define ATTO_SMP_FUNC_DISC_SMP_DIRECT    0x05
1191
1192	u8 status;      /* ATTO_STS_XXX */
1193	u8 smp_status;  /* if status == ATTO_STS_SUCCESS */
1194	#define ATTO_SMP_STS_SUCCESS     0x00
1195	#define ATTO_SMP_STS_FAILURE     0x01
1196	#define ATTO_SMP_STS_RESCAN      0x02
1197	#define ATTO_SMP_STS_NOT_FOUND   0x03
1198
1199	u16 target_id;
1200	u8 phy_id;
1201	u8 dev_index;
1202	u64 smp_sas_addr;
1203	u64 targ_sas_addr;
1204	u32 req_length;
1205	u32 rsp_length;
1206	u8 flags;
1207	#define ATTO_SMPF_ROOT_EXP       0x01 /* expander direct attached */
1208
1209	u8 reserved[31];
1210
1211	union {
1212		u8 byte[1];
1213		u32 dword[1];
1214	} data;
1215
1216};
1217
1218struct __packed atto_express_ioctl {
1219	struct atto_express_ioctl_header header;
1220
1221	union {
1222		struct atto_firmware_rw_request fwrw;
1223		struct atto_param_rw_request prw;
1224		struct atto_channel_list chanlist;
1225		struct atto_channel_info chaninfo;
1226		struct atto_ioctl ioctl_hba;
1227		struct atto_module_info modinfo;
1228		struct atto_ioctl_vda ioctl_vda;
1229		struct atto_ioctl_smp ioctl_smp;
1230		struct atto_csmi csmi;
1231
1232	} data;
1233};
1234
1235/* The struct associated with the code is listed after the definition */
1236#define EXPRESS_IOCTL_MIN             0x4500
1237#define EXPRESS_IOCTL_RW_FIRMWARE     0x4500            /* FIRMWARERW    */
1238#define EXPRESS_IOCTL_READ_PARAMS     0x4501            /* PARAMRW       */
1239#define EXPRESS_IOCTL_WRITE_PARAMS    0x4502            /* PARAMRW       */
1240#define EXPRESS_IOCTL_FC_API          0x4503            /* internal      */
1241#define EXPRESS_IOCTL_GET_CHANNELS    0x4504            /* CHANNELLIST   */
1242#define EXPRESS_IOCTL_CHAN_INFO       0x4505            /* CHANNELINFO   */
1243#define EXPRESS_IOCTL_DEFAULT_PARAMS  0x4506            /* PARAMRW       */
1244#define EXPRESS_ADDR_MEMORY           0x4507            /* MEMADDR       */
1245#define EXPRESS_RW_MEMORY             0x4508            /* MEMRW         */
1246#define EXPRESS_TSDK_DUMP             0x4509            /* TSDKDUMP      */
1247#define EXPRESS_IOCTL_SMP             0x450A            /* IOCTL_SMP     */
1248#define EXPRESS_CSMI                  0x450B            /* CSMI          */
1249#define EXPRESS_IOCTL_HBA             0x450C            /* IOCTL_HBA     */
1250#define EXPRESS_IOCTL_VDA             0x450D            /* IOCTL_VDA     */
1251#define EXPRESS_IOCTL_GET_ID          0x450E            /* GET_ID        */
1252#define EXPRESS_IOCTL_GET_MOD_INFO    0x450F            /* MODULE_INFO   */
1253#define EXPRESS_IOCTL_MAX             0x450F
1254
1255#endif