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1/******************************************************************************
2 *
3 * Copyright(c) 2009-2012 Realtek Corporation.
4 *
5 * Tmis program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * Tmis program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * tmis program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * Tme full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *****************************************************************************/
28
29#ifndef __RTL_DEBUG_H__
30#define __RTL_DEBUG_H__
31
32/*--------------------------------------------------------------
33 Debug level
34--------------------------------------------------------------*/
35/*
36 *Fatal bug.
37 *For example, Tx/Rx/IO locked up,
38 *memory access violation,
39 *resource allocation failed,
40 *unexpected HW behavior, HW BUG
41 *and so on.
42 */
43#define DBG_EMERG 0
44
45/*
46 *Abnormal, rare, or unexpeted cases.
47 *For example, Packet/IO Ctl canceled,
48 *device suprisely unremoved and so on.
49 */
50#define DBG_WARNING 2
51
52/*
53 *Normal case driver developer should
54 *open, we can see link status like
55 *assoc/AddBA/DHCP/adapter start and
56 *so on basic and useful infromations.
57 */
58#define DBG_DMESG 3
59
60/*
61 *Normal case with useful information
62 *about current SW or HW state.
63 *For example, Tx/Rx descriptor to fill,
64 *Tx/Rx descriptor completed status,
65 *SW protocol state change, dynamic
66 *mechanism state change and so on.
67 */
68#define DBG_LOUD 4
69
70/*
71 *Normal case with detail execution
72 *flow or information.
73 */
74#define DBG_TRACE 5
75
76/*--------------------------------------------------------------
77 Define the rt_trace components
78--------------------------------------------------------------*/
79#define COMP_ERR BIT(0)
80#define COMP_FW BIT(1)
81#define COMP_INIT BIT(2) /*For init/deinit */
82#define COMP_RECV BIT(3) /*For Rx. */
83#define COMP_SEND BIT(4) /*For Tx. */
84#define COMP_MLME BIT(5) /*For MLME. */
85#define COMP_SCAN BIT(6) /*For Scan. */
86#define COMP_INTR BIT(7) /*For interrupt Related. */
87#define COMP_LED BIT(8) /*For LED. */
88#define COMP_SEC BIT(9) /*For sec. */
89#define COMP_BEACON BIT(10) /*For beacon. */
90#define COMP_RATE BIT(11) /*For rate. */
91#define COMP_RXDESC BIT(12) /*For rx desc. */
92#define COMP_DIG BIT(13) /*For DIG */
93#define COMP_TXAGC BIT(14) /*For Tx power */
94#define COMP_HIPWR BIT(15) /*For High Power Mechanism */
95#define COMP_POWER BIT(16) /*For lps/ips/aspm. */
96#define COMP_POWER_TRACKING BIT(17) /*For TX POWER TRACKING */
97#define COMP_BB_POWERSAVING BIT(18)
98#define COMP_SWAS BIT(19) /*For SW Antenna Switch */
99#define COMP_RF BIT(20) /*For RF. */
100#define COMP_TURBO BIT(21) /*For EDCA TURBO. */
101#define COMP_RATR BIT(22)
102#define COMP_CMD BIT(23)
103#define COMP_EFUSE BIT(24)
104#define COMP_QOS BIT(25)
105#define COMP_MAC80211 BIT(26)
106#define COMP_REGD BIT(27)
107#define COMP_CHAN BIT(28)
108#define COMP_USB BIT(29)
109#define COMP_EASY_CONCURRENT COMP_USB /* reuse of this bit is OK */
110#define COMP_BT_COEXIST BIT(30)
111
112/*--------------------------------------------------------------
113 Define the rt_print components
114--------------------------------------------------------------*/
115/* Define EEPROM and EFUSE check module bit*/
116#define EEPROM_W BIT(0)
117#define EFUSE_PG BIT(1)
118#define EFUSE_READ_ALL BIT(2)
119
120/* Define init check for module bit*/
121#define INIT_EEPROM BIT(0)
122#define INIT_TXPOWER BIT(1)
123#define INIT_IQK BIT(2)
124#define INIT_RF BIT(3)
125
126/* Define PHY-BB/RF/MAC check module bit */
127#define PHY_BBR BIT(0)
128#define PHY_BBW BIT(1)
129#define PHY_RFR BIT(2)
130#define PHY_RFW BIT(3)
131#define PHY_MACR BIT(4)
132#define PHY_MACW BIT(5)
133#define PHY_ALLR BIT(6)
134#define PHY_ALLW BIT(7)
135#define PHY_TXPWR BIT(8)
136#define PHY_PWRDIFF BIT(9)
137
138/* Define Dynamic Mechanism check module bit --> FDM */
139#define WA_IOT BIT(0)
140#define DM_PWDB BIT(1)
141#define DM_MONITOR BIT(2)
142#define DM_DIG BIT(3)
143#define DM_EDCA_TURBO BIT(4)
144
145#define DM_PWDB BIT(1)
146
147enum dbgp_flag_e {
148 FQOS = 0,
149 FTX = 1,
150 FRX = 2,
151 FSEC = 3,
152 FMGNT = 4,
153 FMLME = 5,
154 FRESOURCE = 6,
155 FBEACON = 7,
156 FISR = 8,
157 FPHY = 9,
158 FMP = 10,
159 FEEPROM = 11,
160 FPWR = 12,
161 FDM = 13,
162 FDBGCtrl = 14,
163 FC2H = 15,
164 FBT = 16,
165 FINIT = 17,
166 FIOCTL = 18,
167 DBGP_TYPE_MAX
168};
169
170#ifdef CONFIG_RTLWIFI_DEBUG
171
172#define RT_ASSERT(_exp, fmt, ...) \
173do { \
174 if (!(_exp)) { \
175 printk(KERN_DEBUG KBUILD_MODNAME ":%s(): " fmt, \
176 __func__, ##__VA_ARGS__); \
177 } \
178} while (0)
179
180#define RT_TRACE(rtlpriv, comp, level, fmt, ...) \
181do { \
182 if (unlikely(((comp) & rtlpriv->dbg.global_debugcomponents) && \
183 ((level) <= rtlpriv->dbg.global_debuglevel))) { \
184 printk(KERN_DEBUG KBUILD_MODNAME ":%s():<%lx-%x> " fmt, \
185 __func__, in_interrupt(), in_atomic(), \
186 ##__VA_ARGS__); \
187 } \
188} while (0)
189
190#define RTPRINT(rtlpriv, dbgtype, dbgflag, fmt, ...) \
191do { \
192 if (unlikely(rtlpriv->dbg.dbgp_type[dbgtype] & dbgflag)) { \
193 printk(KERN_DEBUG KBUILD_MODNAME ": " fmt, \
194 ##__VA_ARGS__); \
195 } \
196} while (0)
197
198#define RT_PRINT_DATA(rtlpriv, _comp, _level, _titlestring, _hexdata, \
199 _hexdatalen) \
200do { \
201 if (unlikely(((_comp) & rtlpriv->dbg.global_debugcomponents) && \
202 (_level <= rtlpriv->dbg.global_debuglevel))) { \
203 printk(KERN_DEBUG "%s: In process \"%s\" (pid %i): %s\n", \
204 KBUILD_MODNAME, current->comm, current->pid, \
205 _titlestring); \
206 print_hex_dump_bytes("", DUMP_PREFIX_NONE, \
207 _hexdata, _hexdatalen); \
208 } \
209} while (0)
210
211#else
212
213struct rtl_priv;
214
215__printf(2, 3)
216static inline void RT_ASSERT(int exp, const char *fmt, ...)
217{
218}
219
220__printf(4, 5)
221static inline void RT_TRACE(struct rtl_priv *rtlpriv,
222 int comp, int level,
223 const char *fmt, ...)
224{
225}
226
227__printf(4, 5)
228static inline void RTPRINT(struct rtl_priv *rtlpriv,
229 int dbgtype, int dbgflag,
230 const char *fmt, ...)
231{
232}
233
234static inline void RT_PRINT_DATA(struct rtl_priv *rtlpriv,
235 int comp, int level,
236 const char *titlestring,
237 const void *hexdata, size_t hexdatalen)
238{
239}
240
241#endif
242
243void rtl_dbgp_flag_init(struct ieee80211_hw *hw);
244#endif