1/* SPDX-License-Identifier: GPL-2.0-only */
  2/*
  3 * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  4 * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  5 */
  6
  7#ifndef __MT7601U_DMA_H
  8#define __MT7601U_DMA_H
  9
 10#include <asm/unaligned.h>
 11#include <linux/skbuff.h>
 12
 13#define MT_DMA_HDR_LEN			4
 14#define MT_RX_INFO_LEN			4
 15#define MT_FCE_INFO_LEN			4
 16#define MT_DMA_HDRS			(MT_DMA_HDR_LEN + MT_RX_INFO_LEN)
 17
 18/* Common Tx DMA descriptor fields */
 19#define MT_TXD_INFO_LEN			GENMASK(15, 0)
 20#define MT_TXD_INFO_D_PORT		GENMASK(29, 27)
 21#define MT_TXD_INFO_TYPE		GENMASK(31, 30)
 22
 23enum mt76_msg_port {
 24	WLAN_PORT,
 25	CPU_RX_PORT,
 26	CPU_TX_PORT,
 27	HOST_PORT,
 28	VIRTUAL_CPU_RX_PORT,
 29	VIRTUAL_CPU_TX_PORT,
 30	DISCARD,
 31};
 32
 33enum mt76_info_type {
 34	DMA_PACKET,
 35	DMA_COMMAND,
 36};
 37
 38/* Tx DMA packet specific flags */
 39#define MT_TXD_PKT_INFO_NEXT_VLD	BIT(16)
 40#define MT_TXD_PKT_INFO_TX_BURST	BIT(17)
 41#define MT_TXD_PKT_INFO_80211		BIT(19)
 42#define MT_TXD_PKT_INFO_TSO		BIT(20)
 43#define MT_TXD_PKT_INFO_CSO		BIT(21)
 44#define MT_TXD_PKT_INFO_WIV		BIT(24)
 45#define MT_TXD_PKT_INFO_QSEL		GENMASK(26, 25)
 46
 47enum mt76_qsel {
 48	MT_QSEL_MGMT,
 49	MT_QSEL_HCCA,
 50	MT_QSEL_EDCA,
 51	MT_QSEL_EDCA_2,
 52};
 53
 54/* Tx DMA MCU command specific flags */
 55#define MT_TXD_CMD_INFO_SEQ		GENMASK(19, 16)
 56#define MT_TXD_CMD_INFO_TYPE		GENMASK(26, 20)
 57
 58static inline int mt7601u_dma_skb_wrap(struct sk_buff *skb,
 59				       enum mt76_msg_port d_port,
 60				       enum mt76_info_type type, u32 flags)
 61{
 62	u32 info;
 63
 64	/* Buffer layout:
 65	 *	|   4B   | xfer len |      pad       |  4B  |
 66	 *	| TXINFO | pkt/cmd  | zero pad to 4B | zero |
 67	 *
 68	 * length field of TXINFO should be set to 'xfer len'.
 69	 */
 70
 71	info = flags |
 72		FIELD_PREP(MT_TXD_INFO_LEN, round_up(skb->len, 4)) |
 73		FIELD_PREP(MT_TXD_INFO_D_PORT, d_port) |
 74		FIELD_PREP(MT_TXD_INFO_TYPE, type);
 75
 76	put_unaligned_le32(info, skb_push(skb, sizeof(info)));
 77	return skb_put_padto(skb, round_up(skb->len, 4) + 4);
 78}
 79
 80static inline int
 81mt7601u_dma_skb_wrap_pkt(struct sk_buff *skb, enum mt76_qsel qsel, u32 flags)
 82{
 83	flags |= FIELD_PREP(MT_TXD_PKT_INFO_QSEL, qsel);
 84	return mt7601u_dma_skb_wrap(skb, WLAN_PORT, DMA_PACKET, flags);
 85}
 86
 87/* Common Rx DMA descriptor fields */
 88#define MT_RXD_INFO_LEN			GENMASK(13, 0)
 89#define MT_RXD_INFO_PCIE_INTR		BIT(24)
 90#define MT_RXD_INFO_QSEL		GENMASK(26, 25)
 91#define MT_RXD_INFO_PORT		GENMASK(29, 27)
 92#define MT_RXD_INFO_TYPE		GENMASK(31, 30)
 93
 94/* Rx DMA packet specific flags */
 95#define MT_RXD_PKT_INFO_UDP_ERR		BIT(16)
 96#define MT_RXD_PKT_INFO_TCP_ERR		BIT(17)
 97#define MT_RXD_PKT_INFO_IP_ERR		BIT(18)
 98#define MT_RXD_PKT_INFO_PKT_80211	BIT(19)
 99#define MT_RXD_PKT_INFO_L3L4_DONE	BIT(20)
100#define MT_RXD_PKT_INFO_MAC_LEN		GENMASK(23, 21)
101
102/* Rx DMA MCU command specific flags */
103#define MT_RXD_CMD_INFO_SELF_GEN	BIT(15)
104#define MT_RXD_CMD_INFO_CMD_SEQ		GENMASK(19, 16)
105#define MT_RXD_CMD_INFO_EVT_TYPE	GENMASK(23, 20)
106
107enum mt76_evt_type {
108	CMD_DONE,
109	CMD_ERROR,
110	CMD_RETRY,
111	EVENT_PWR_RSP,
112	EVENT_WOW_RSP,
113	EVENT_CARRIER_DETECT_RSP,
114	EVENT_DFS_DETECT_RSP,
115};
116
117#endif