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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
4 * and audio CODEC devices
5 *
6 * Copyright (C) 2005-2006 Texas Instruments, Inc.
7 *
8 * Modifications to defer interrupt handling to a kernel thread:
9 * Copyright (C) 2006 MontaVista Software, Inc.
10 *
11 * Based on tlv320aic23.c:
12 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
13 *
14 * Code cleanup and modifications to IRQ handler.
15 * by syed khasim <x0khasim@ti.com>
16 */
17
18#include <linux/init.h>
19#include <linux/mutex.h>
20#include <linux/platform_device.h>
21#include <linux/regmap.h>
22#include <linux/clk.h>
23#include <linux/err.h>
24#include <linux/device.h>
25#include <linux/of.h>
26#include <linux/of_irq.h>
27#include <linux/of_platform.h>
28#include <linux/irq.h>
29#include <linux/irqdomain.h>
30
31#include <linux/regulator/machine.h>
32
33#include <linux/i2c.h>
34
35#include <linux/mfd/core.h>
36#include <linux/mfd/twl.h>
37
38/* Register descriptions for audio */
39#include <linux/mfd/twl4030-audio.h>
40
41#include "twl-core.h"
42
43/*
44 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
45 * Management and System Companion Device" chips originally designed for
46 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
47 * often at around 3 Mbit/sec, including for interrupt handling.
48 *
49 * This driver core provides genirq support for the interrupts emitted,
50 * by the various modules, and exports register access primitives.
51 *
52 * FIXME this driver currently requires use of the first interrupt line
53 * (and associated registers).
54 */
55
56#define DRIVER_NAME "twl"
57
58/* Triton Core internal information (BEGIN) */
59
60/* Base Address defns for twl4030_map[] */
61
62/* subchip/slave 0 - USB ID */
63#define TWL4030_BASEADD_USB 0x0000
64
65/* subchip/slave 1 - AUD ID */
66#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
67#define TWL4030_BASEADD_GPIO 0x0098
68#define TWL4030_BASEADD_INTBR 0x0085
69#define TWL4030_BASEADD_PIH 0x0080
70#define TWL4030_BASEADD_TEST 0x004C
71
72/* subchip/slave 2 - AUX ID */
73#define TWL4030_BASEADD_INTERRUPTS 0x00B9
74#define TWL4030_BASEADD_LED 0x00EE
75#define TWL4030_BASEADD_MADC 0x0000
76#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
77#define TWL4030_BASEADD_PRECHARGE 0x00AA
78#define TWL4030_BASEADD_PWM 0x00F8
79#define TWL4030_BASEADD_KEYPAD 0x00D2
80
81#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
82#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
83 one */
84
85/* subchip/slave 3 - POWER ID */
86#define TWL4030_BASEADD_BACKUP 0x0014
87#define TWL4030_BASEADD_INT 0x002E
88#define TWL4030_BASEADD_PM_MASTER 0x0036
89
90#define TWL4030_BASEADD_PM_RECEIVER 0x005B
91#define TWL4030_DCDC_GLOBAL_CFG 0x06
92#define SMARTREFLEX_ENABLE BIT(3)
93
94#define TWL4030_BASEADD_RTC 0x001C
95#define TWL4030_BASEADD_SECURED_REG 0x0000
96
97/* Triton Core internal information (END) */
98
99
100/* subchip/slave 0 0x48 - POWER */
101#define TWL6030_BASEADD_RTC 0x0000
102#define TWL6030_BASEADD_SECURED_REG 0x0017
103#define TWL6030_BASEADD_PM_MASTER 0x001F
104#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
105#define TWL6030_BASEADD_PM_MISC 0x00E2
106#define TWL6030_BASEADD_PM_PUPD 0x00F0
107
108/* subchip/slave 1 0x49 - FEATURE */
109#define TWL6030_BASEADD_USB 0x0000
110#define TWL6030_BASEADD_GPADC_CTRL 0x002E
111#define TWL6030_BASEADD_AUX 0x0090
112#define TWL6030_BASEADD_PWM 0x00BA
113#define TWL6030_BASEADD_GASGAUGE 0x00C0
114#define TWL6030_BASEADD_PIH 0x00D0
115#define TWL6032_BASEADD_CHARGER 0x00DA
116#define TWL6030_BASEADD_CHARGER 0x00E0
117#define TWL6030_BASEADD_LED 0x00F4
118
119/* subchip/slave 2 0x4A - DFT */
120#define TWL6030_BASEADD_DIEID 0x00C0
121
122/* subchip/slave 3 0x4B - AUDIO */
123#define TWL6030_BASEADD_AUDIO 0x0000
124#define TWL6030_BASEADD_RSV 0x0000
125#define TWL6030_BASEADD_ZERO 0x0000
126
127/* Few power values */
128#define R_CFG_BOOT 0x05
129
130/* some fields in R_CFG_BOOT */
131#define HFCLK_FREQ_19p2_MHZ (1 << 0)
132#define HFCLK_FREQ_26_MHZ (2 << 0)
133#define HFCLK_FREQ_38p4_MHZ (3 << 0)
134#define HIGH_PERF_SQ (1 << 3)
135#define CK32K_LOWPWR_EN (1 << 7)
136
137/*----------------------------------------------------------------------*/
138
139/* Structure for each TWL4030/TWL6030 Slave */
140struct twl_client {
141 struct i2c_client *client;
142 struct regmap *regmap;
143};
144
145/* mapping the module id to slave id and base address */
146struct twl_mapping {
147 unsigned char sid; /* Slave ID */
148 unsigned char base; /* base address */
149};
150
151struct twl_private {
152 bool ready; /* The core driver is ready to be used */
153 u32 twl_idcode; /* TWL IDCODE Register value */
154 unsigned int twl_id;
155
156 struct twl_mapping *twl_map;
157 struct twl_client *twl_modules;
158};
159
160static struct twl_private *twl_priv;
161
162static struct twl_mapping twl4030_map[] = {
163 /*
164 * NOTE: don't change this table without updating the
165 * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
166 * so they continue to match the order in this table.
167 */
168
169 /* Common IPs */
170 { 0, TWL4030_BASEADD_USB },
171 { 1, TWL4030_BASEADD_PIH },
172 { 2, TWL4030_BASEADD_MAIN_CHARGE },
173 { 3, TWL4030_BASEADD_PM_MASTER },
174 { 3, TWL4030_BASEADD_PM_RECEIVER },
175
176 { 3, TWL4030_BASEADD_RTC },
177 { 2, TWL4030_BASEADD_PWM },
178 { 2, TWL4030_BASEADD_LED },
179 { 3, TWL4030_BASEADD_SECURED_REG },
180
181 /* TWL4030 specific IPs */
182 { 1, TWL4030_BASEADD_AUDIO_VOICE },
183 { 1, TWL4030_BASEADD_GPIO },
184 { 1, TWL4030_BASEADD_INTBR },
185 { 1, TWL4030_BASEADD_TEST },
186 { 2, TWL4030_BASEADD_KEYPAD },
187
188 { 2, TWL4030_BASEADD_MADC },
189 { 2, TWL4030_BASEADD_INTERRUPTS },
190 { 2, TWL4030_BASEADD_PRECHARGE },
191 { 3, TWL4030_BASEADD_BACKUP },
192 { 3, TWL4030_BASEADD_INT },
193
194 { 2, TWL5031_BASEADD_ACCESSORY },
195 { 2, TWL5031_BASEADD_INTERRUPTS },
196};
197
198static const struct reg_default twl4030_49_defaults[] = {
199 /* Audio Registers */
200 { 0x01, 0x00}, /* CODEC_MODE */
201 { 0x02, 0x00}, /* OPTION */
202 /* 0x03 Unused */
203 { 0x04, 0x00}, /* MICBIAS_CTL */
204 { 0x05, 0x00}, /* ANAMICL */
205 { 0x06, 0x00}, /* ANAMICR */
206 { 0x07, 0x00}, /* AVADC_CTL */
207 { 0x08, 0x00}, /* ADCMICSEL */
208 { 0x09, 0x00}, /* DIGMIXING */
209 { 0x0a, 0x0f}, /* ATXL1PGA */
210 { 0x0b, 0x0f}, /* ATXR1PGA */
211 { 0x0c, 0x0f}, /* AVTXL2PGA */
212 { 0x0d, 0x0f}, /* AVTXR2PGA */
213 { 0x0e, 0x00}, /* AUDIO_IF */
214 { 0x0f, 0x00}, /* VOICE_IF */
215 { 0x10, 0x3f}, /* ARXR1PGA */
216 { 0x11, 0x3f}, /* ARXL1PGA */
217 { 0x12, 0x3f}, /* ARXR2PGA */
218 { 0x13, 0x3f}, /* ARXL2PGA */
219 { 0x14, 0x25}, /* VRXPGA */
220 { 0x15, 0x00}, /* VSTPGA */
221 { 0x16, 0x00}, /* VRX2ARXPGA */
222 { 0x17, 0x00}, /* AVDAC_CTL */
223 { 0x18, 0x00}, /* ARX2VTXPGA */
224 { 0x19, 0x32}, /* ARXL1_APGA_CTL*/
225 { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/
226 { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/
227 { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/
228 { 0x1d, 0x00}, /* ATX2ARXPGA */
229 { 0x1e, 0x00}, /* BT_IF */
230 { 0x1f, 0x55}, /* BTPGA */
231 { 0x20, 0x00}, /* BTSTPGA */
232 { 0x21, 0x00}, /* EAR_CTL */
233 { 0x22, 0x00}, /* HS_SEL */
234 { 0x23, 0x00}, /* HS_GAIN_SET */
235 { 0x24, 0x00}, /* HS_POPN_SET */
236 { 0x25, 0x00}, /* PREDL_CTL */
237 { 0x26, 0x00}, /* PREDR_CTL */
238 { 0x27, 0x00}, /* PRECKL_CTL */
239 { 0x28, 0x00}, /* PRECKR_CTL */
240 { 0x29, 0x00}, /* HFL_CTL */
241 { 0x2a, 0x00}, /* HFR_CTL */
242 { 0x2b, 0x05}, /* ALC_CTL */
243 { 0x2c, 0x00}, /* ALC_SET1 */
244 { 0x2d, 0x00}, /* ALC_SET2 */
245 { 0x2e, 0x00}, /* BOOST_CTL */
246 { 0x2f, 0x00}, /* SOFTVOL_CTL */
247 { 0x30, 0x13}, /* DTMF_FREQSEL */
248 { 0x31, 0x00}, /* DTMF_TONEXT1H */
249 { 0x32, 0x00}, /* DTMF_TONEXT1L */
250 { 0x33, 0x00}, /* DTMF_TONEXT2H */
251 { 0x34, 0x00}, /* DTMF_TONEXT2L */
252 { 0x35, 0x79}, /* DTMF_TONOFF */
253 { 0x36, 0x11}, /* DTMF_WANONOFF */
254 { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */
255 { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */
256 { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */
257 { 0x3a, 0x06}, /* APLL_CTL */
258 { 0x3b, 0x00}, /* DTMF_CTL */
259 { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */
260 { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */
261 { 0x3e, 0x00}, /* MISC_SET_1 */
262 { 0x3f, 0x00}, /* PCMBTMUX */
263 /* 0x40 - 0x42 Unused */
264 { 0x43, 0x00}, /* RX_PATH_SEL */
265 { 0x44, 0x32}, /* VDL_APGA_CTL */
266 { 0x45, 0x00}, /* VIBRA_CTL */
267 { 0x46, 0x00}, /* VIBRA_SET */
268 { 0x47, 0x00}, /* VIBRA_PWM_SET */
269 { 0x48, 0x00}, /* ANAMIC_GAIN */
270 { 0x49, 0x00}, /* MISC_SET_2 */
271 /* End of Audio Registers */
272};
273
274static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
275{
276 switch (reg) {
277 case 0x00:
278 case 0x03:
279 case 0x40:
280 case 0x41:
281 case 0x42:
282 return false;
283 default:
284 return true;
285 }
286}
287
288static const struct regmap_range twl4030_49_volatile_ranges[] = {
289 regmap_reg_range(TWL4030_BASEADD_TEST, 0xff),
290};
291
292static const struct regmap_access_table twl4030_49_volatile_table = {
293 .yes_ranges = twl4030_49_volatile_ranges,
294 .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges),
295};
296
297static const struct regmap_config twl4030_regmap_config[4] = {
298 {
299 /* Address 0x48 */
300 .reg_bits = 8,
301 .val_bits = 8,
302 .max_register = 0xff,
303 },
304 {
305 /* Address 0x49 */
306 .reg_bits = 8,
307 .val_bits = 8,
308 .max_register = 0xff,
309
310 .readable_reg = twl4030_49_nop_reg,
311 .writeable_reg = twl4030_49_nop_reg,
312
313 .volatile_table = &twl4030_49_volatile_table,
314
315 .reg_defaults = twl4030_49_defaults,
316 .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults),
317 .cache_type = REGCACHE_MAPLE,
318 },
319 {
320 /* Address 0x4a */
321 .reg_bits = 8,
322 .val_bits = 8,
323 .max_register = 0xff,
324 },
325 {
326 /* Address 0x4b */
327 .reg_bits = 8,
328 .val_bits = 8,
329 .max_register = 0xff,
330 },
331};
332
333static struct twl_mapping twl6030_map[] = {
334 /*
335 * NOTE: don't change this table without updating the
336 * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
337 * so they continue to match the order in this table.
338 */
339
340 /* Common IPs */
341 { 1, TWL6030_BASEADD_USB },
342 { 1, TWL6030_BASEADD_PIH },
343 { 1, TWL6030_BASEADD_CHARGER },
344 { 0, TWL6030_BASEADD_PM_MASTER },
345 { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
346
347 { 0, TWL6030_BASEADD_RTC },
348 { 1, TWL6030_BASEADD_PWM },
349 { 1, TWL6030_BASEADD_LED },
350 { 0, TWL6030_BASEADD_SECURED_REG },
351
352 /* TWL6030 specific IPs */
353 { 0, TWL6030_BASEADD_ZERO },
354 { 1, TWL6030_BASEADD_ZERO },
355 { 2, TWL6030_BASEADD_ZERO },
356 { 1, TWL6030_BASEADD_GPADC_CTRL },
357 { 1, TWL6030_BASEADD_GASGAUGE },
358
359 /* TWL6032 specific charger registers */
360 { 1, TWL6032_BASEADD_CHARGER },
361};
362
363static const struct regmap_config twl6030_regmap_config[3] = {
364 {
365 /* Address 0x48 */
366 .reg_bits = 8,
367 .val_bits = 8,
368 .max_register = 0xff,
369 },
370 {
371 /* Address 0x49 */
372 .reg_bits = 8,
373 .val_bits = 8,
374 .max_register = 0xff,
375 },
376 {
377 /* Address 0x4a */
378 .reg_bits = 8,
379 .val_bits = 8,
380 .max_register = 0xff,
381 },
382};
383
384/*----------------------------------------------------------------------*/
385
386static inline int twl_get_num_slaves(void)
387{
388 if (twl_class_is_4030())
389 return 4; /* TWL4030 class have four slave address */
390 else
391 return 3; /* TWL6030 class have three slave address */
392}
393
394static inline int twl_get_last_module(void)
395{
396 if (twl_class_is_4030())
397 return TWL4030_MODULE_LAST;
398 else
399 return TWL6030_MODULE_LAST;
400}
401
402/* Exported Functions */
403
404unsigned int twl_rev(void)
405{
406 return twl_priv ? twl_priv->twl_id : 0;
407}
408EXPORT_SYMBOL(twl_rev);
409
410/**
411 * twl_get_regmap - Get the regmap associated with the given module
412 * @mod_no: module number
413 *
414 * Returns the regmap pointer or NULL in case of failure.
415 */
416static struct regmap *twl_get_regmap(u8 mod_no)
417{
418 int sid;
419 struct twl_client *twl;
420
421 if (unlikely(!twl_priv || !twl_priv->ready)) {
422 pr_err("%s: not initialized\n", DRIVER_NAME);
423 return NULL;
424 }
425 if (unlikely(mod_no >= twl_get_last_module())) {
426 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
427 return NULL;
428 }
429
430 sid = twl_priv->twl_map[mod_no].sid;
431 twl = &twl_priv->twl_modules[sid];
432
433 return twl->regmap;
434}
435
436/**
437 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
438 * @mod_no: module number
439 * @value: an array of num_bytes+1 containing data to write
440 * @reg: register address (just offset will do)
441 * @num_bytes: number of bytes to transfer
442 *
443 * Returns 0 on success or else a negative error code.
444 */
445int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
446{
447 struct regmap *regmap = twl_get_regmap(mod_no);
448 int ret;
449
450 if (!regmap)
451 return -EPERM;
452
453 ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
454 value, num_bytes);
455
456 if (ret)
457 pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
458 DRIVER_NAME, mod_no, reg, num_bytes);
459
460 return ret;
461}
462EXPORT_SYMBOL(twl_i2c_write);
463
464/**
465 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
466 * @mod_no: module number
467 * @value: an array of num_bytes containing data to be read
468 * @reg: register address (just offset will do)
469 * @num_bytes: number of bytes to transfer
470 *
471 * Returns 0 on success or else a negative error code.
472 */
473int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
474{
475 struct regmap *regmap = twl_get_regmap(mod_no);
476 int ret;
477
478 if (!regmap)
479 return -EPERM;
480
481 ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
482 value, num_bytes);
483
484 if (ret)
485 pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
486 DRIVER_NAME, mod_no, reg, num_bytes);
487
488 return ret;
489}
490EXPORT_SYMBOL(twl_i2c_read);
491
492/**
493 * twl_set_regcache_bypass - Configure the regcache bypass for the regmap associated
494 * with the module
495 * @mod_no: module number
496 * @enable: Regcache bypass state
497 *
498 * Returns 0 else failure.
499 */
500int twl_set_regcache_bypass(u8 mod_no, bool enable)
501{
502 struct regmap *regmap = twl_get_regmap(mod_no);
503
504 if (!regmap)
505 return -EPERM;
506
507 regcache_cache_bypass(regmap, enable);
508
509 return 0;
510}
511EXPORT_SYMBOL(twl_set_regcache_bypass);
512
513/*----------------------------------------------------------------------*/
514
515/**
516 * twl_read_idcode_register - API to read the IDCODE register.
517 *
518 * Unlocks the IDCODE register and read the 32 bit value.
519 */
520static int twl_read_idcode_register(void)
521{
522 int err;
523
524 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
525 REG_UNLOCK_TEST_REG);
526 if (err) {
527 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
528 goto fail;
529 }
530
531 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
532 REG_IDCODE_7_0, 4);
533 if (err) {
534 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
535 goto fail;
536 }
537
538 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
539 if (err)
540 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
541fail:
542 return err;
543}
544
545/**
546 * twl_get_type - API to get TWL Si type.
547 *
548 * Api to get the TWL Si type from IDCODE value.
549 */
550int twl_get_type(void)
551{
552 return TWL_SIL_TYPE(twl_priv->twl_idcode);
553}
554EXPORT_SYMBOL_GPL(twl_get_type);
555
556/**
557 * twl_get_version - API to get TWL Si version.
558 *
559 * Api to get the TWL Si version from IDCODE value.
560 */
561int twl_get_version(void)
562{
563 return TWL_SIL_REV(twl_priv->twl_idcode);
564}
565EXPORT_SYMBOL_GPL(twl_get_version);
566
567/**
568 * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
569 *
570 * Api to get the TWL HFCLK rate based on BOOT_CFG register.
571 */
572int twl_get_hfclk_rate(void)
573{
574 u8 ctrl;
575 int rate;
576
577 twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
578
579 switch (ctrl & 0x3) {
580 case HFCLK_FREQ_19p2_MHZ:
581 rate = 19200000;
582 break;
583 case HFCLK_FREQ_26_MHZ:
584 rate = 26000000;
585 break;
586 case HFCLK_FREQ_38p4_MHZ:
587 rate = 38400000;
588 break;
589 default:
590 pr_err("TWL4030: HFCLK is not configured\n");
591 rate = -EINVAL;
592 break;
593 }
594
595 return rate;
596}
597EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
598
599/*----------------------------------------------------------------------*/
600
601/*
602 * These three functions initialize the on-chip clock framework,
603 * letting it generate the right frequencies for USB, MADC, and
604 * other purposes.
605 */
606static inline int protect_pm_master(void)
607{
608 int e = 0;
609
610 e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
611 TWL4030_PM_MASTER_PROTECT_KEY);
612 return e;
613}
614
615static inline int unprotect_pm_master(void)
616{
617 int e = 0;
618
619 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
620 TWL4030_PM_MASTER_PROTECT_KEY);
621 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
622 TWL4030_PM_MASTER_PROTECT_KEY);
623
624 return e;
625}
626
627static void clocks_init(struct device *dev)
628{
629 int e = 0;
630 struct clk *osc;
631 u32 rate;
632 u8 ctrl = HFCLK_FREQ_26_MHZ;
633
634 osc = clk_get(dev, "fck");
635 if (IS_ERR(osc)) {
636 printk(KERN_WARNING "Skipping twl internal clock init and "
637 "using bootloader value (unknown osc rate)\n");
638 return;
639 }
640
641 rate = clk_get_rate(osc);
642 clk_put(osc);
643
644 switch (rate) {
645 case 19200000:
646 ctrl = HFCLK_FREQ_19p2_MHZ;
647 break;
648 case 26000000:
649 ctrl = HFCLK_FREQ_26_MHZ;
650 break;
651 case 38400000:
652 ctrl = HFCLK_FREQ_38p4_MHZ;
653 break;
654 }
655
656 ctrl |= HIGH_PERF_SQ;
657
658 e |= unprotect_pm_master();
659 /* effect->MADC+USB ck en */
660 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
661 e |= protect_pm_master();
662
663 if (e < 0)
664 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
665}
666
667/*----------------------------------------------------------------------*/
668
669
670static void twl_remove(struct i2c_client *client)
671{
672 unsigned i, num_slaves;
673
674 if (twl_class_is_4030())
675 twl4030_exit_irq();
676 else
677 twl6030_exit_irq();
678
679 num_slaves = twl_get_num_slaves();
680 for (i = 0; i < num_slaves; i++) {
681 struct twl_client *twl = &twl_priv->twl_modules[i];
682
683 if (twl->client && twl->client != client)
684 i2c_unregister_device(twl->client);
685 twl->client = NULL;
686 }
687 twl_priv->ready = false;
688}
689
690static struct of_dev_auxdata twl_auxdata_lookup[] = {
691 OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL),
692 { /* sentinel */ },
693};
694
695static const struct mfd_cell twl6032_cells[] = {
696 { .name = "twl6032-clk" },
697};
698
699/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
700static int
701twl_probe(struct i2c_client *client)
702{
703 const struct i2c_device_id *id = i2c_client_get_device_id(client);
704 struct device_node *node = client->dev.of_node;
705 struct platform_device *pdev;
706 const struct regmap_config *twl_regmap_config;
707 int irq_base = 0;
708 int status;
709 unsigned i, num_slaves;
710
711 if (!node) {
712 dev_err(&client->dev, "no platform data\n");
713 return -EINVAL;
714 }
715
716 if (twl_priv) {
717 dev_dbg(&client->dev, "only one instance of %s allowed\n",
718 DRIVER_NAME);
719 return -EBUSY;
720 }
721
722 pdev = platform_device_alloc(DRIVER_NAME, -1);
723 if (!pdev) {
724 dev_err(&client->dev, "can't alloc pdev\n");
725 return -ENOMEM;
726 }
727
728 status = platform_device_add(pdev);
729 if (status) {
730 platform_device_put(pdev);
731 return status;
732 }
733
734 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
735 dev_dbg(&client->dev, "can't talk I2C?\n");
736 status = -EIO;
737 goto free;
738 }
739
740 twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
741 GFP_KERNEL);
742 if (!twl_priv) {
743 status = -ENOMEM;
744 goto free;
745 }
746
747 if ((id->driver_data) & TWL6030_CLASS) {
748 twl_priv->twl_id = TWL6030_CLASS_ID;
749 twl_priv->twl_map = &twl6030_map[0];
750 twl_regmap_config = twl6030_regmap_config;
751 } else {
752 twl_priv->twl_id = TWL4030_CLASS_ID;
753 twl_priv->twl_map = &twl4030_map[0];
754 twl_regmap_config = twl4030_regmap_config;
755 }
756
757 num_slaves = twl_get_num_slaves();
758 twl_priv->twl_modules = devm_kcalloc(&client->dev,
759 num_slaves,
760 sizeof(struct twl_client),
761 GFP_KERNEL);
762 if (!twl_priv->twl_modules) {
763 status = -ENOMEM;
764 goto free;
765 }
766
767 for (i = 0; i < num_slaves; i++) {
768 struct twl_client *twl = &twl_priv->twl_modules[i];
769
770 if (i == 0) {
771 twl->client = client;
772 } else {
773 twl->client = i2c_new_dummy_device(client->adapter,
774 client->addr + i);
775 if (IS_ERR(twl->client)) {
776 dev_err(&client->dev,
777 "can't attach client %d\n", i);
778 status = PTR_ERR(twl->client);
779 goto fail;
780 }
781 }
782
783 twl->regmap = devm_regmap_init_i2c(twl->client,
784 &twl_regmap_config[i]);
785 if (IS_ERR(twl->regmap)) {
786 status = PTR_ERR(twl->regmap);
787 dev_err(&client->dev,
788 "Failed to allocate regmap %d, err: %d\n", i,
789 status);
790 goto fail;
791 }
792 }
793
794 twl_priv->ready = true;
795
796 /* setup clock framework */
797 clocks_init(&client->dev);
798
799 /* read TWL IDCODE Register */
800 if (twl_class_is_4030()) {
801 status = twl_read_idcode_register();
802 WARN(status < 0, "Error: reading twl_idcode register value\n");
803 }
804
805 /* Maybe init the T2 Interrupt subsystem */
806 if (client->irq) {
807 if (twl_class_is_4030()) {
808 twl4030_init_chip_irq(id->name);
809 irq_base = twl4030_init_irq(&client->dev, client->irq);
810 } else {
811 irq_base = twl6030_init_irq(&client->dev, client->irq);
812 }
813
814 if (irq_base < 0) {
815 status = irq_base;
816 goto fail;
817 }
818 }
819
820 /*
821 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
822 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
823 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
824 *
825 * Also, always enable SmartReflex bit as that's needed for omaps to
826 * do anything over I2C4 for voltage scaling even if SmartReflex
827 * is disabled. Without the SmartReflex bit omap sys_clkreq idle
828 * signal will never trigger for retention idle.
829 */
830 if (twl_class_is_4030()) {
831 u8 temp;
832
833 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
834 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
835 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
836 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
837
838 twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
839 TWL4030_DCDC_GLOBAL_CFG);
840 temp |= SMARTREFLEX_ENABLE;
841 twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
842 TWL4030_DCDC_GLOBAL_CFG);
843 }
844
845 if (id->driver_data == (TWL6030_CLASS | TWL6032_SUBCLASS)) {
846 status = devm_mfd_add_devices(&client->dev,
847 PLATFORM_DEVID_NONE,
848 twl6032_cells,
849 ARRAY_SIZE(twl6032_cells),
850 NULL, 0, NULL);
851 if (status < 0)
852 goto free;
853 }
854
855 status = of_platform_populate(node, NULL, twl_auxdata_lookup,
856 &client->dev);
857
858fail:
859 if (status < 0)
860 twl_remove(client);
861free:
862 if (status < 0)
863 platform_device_unregister(pdev);
864
865 return status;
866}
867
868static int __maybe_unused twl_suspend(struct device *dev)
869{
870 struct i2c_client *client = to_i2c_client(dev);
871
872 if (client->irq)
873 disable_irq(client->irq);
874
875 return 0;
876}
877
878static int __maybe_unused twl_resume(struct device *dev)
879{
880 struct i2c_client *client = to_i2c_client(dev);
881
882 if (client->irq)
883 enable_irq(client->irq);
884
885 return 0;
886}
887
888static SIMPLE_DEV_PM_OPS(twl_dev_pm_ops, twl_suspend, twl_resume);
889
890static const struct i2c_device_id twl_ids[] = {
891 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
892 { "twl5030", 0 }, /* T2 updated */
893 { "twl5031", TWL5031 }, /* TWL5030 updated */
894 { "tps65950", 0 }, /* catalog version of twl5030 */
895 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
896 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
897 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
898 and vibrator. Charger in USB module*/
899 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
900 { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
901 { /* end of list */ },
902};
903
904/* One Client Driver , 4 Clients */
905static struct i2c_driver twl_driver = {
906 .driver.name = DRIVER_NAME,
907 .driver.pm = &twl_dev_pm_ops,
908 .id_table = twl_ids,
909 .probe = twl_probe,
910 .remove = twl_remove,
911};
912builtin_i2c_driver(twl_driver);
1/*
2 * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
3 * and audio CODEC devices
4 *
5 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 *
7 * Modifications to defer interrupt handling to a kernel thread:
8 * Copyright (C) 2006 MontaVista Software, Inc.
9 *
10 * Based on tlv320aic23.c:
11 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 *
13 * Code cleanup and modifications to IRQ handler.
14 * by syed khasim <x0khasim@ti.com>
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
29 */
30
31#include <linux/init.h>
32#include <linux/mutex.h>
33#include <linux/module.h>
34#include <linux/platform_device.h>
35#include <linux/regmap.h>
36#include <linux/clk.h>
37#include <linux/err.h>
38#include <linux/device.h>
39#include <linux/of.h>
40#include <linux/of_irq.h>
41#include <linux/of_platform.h>
42#include <linux/irq.h>
43#include <linux/irqdomain.h>
44
45#include <linux/regulator/machine.h>
46
47#include <linux/i2c.h>
48#include <linux/i2c/twl.h>
49
50/* Register descriptions for audio */
51#include <linux/mfd/twl4030-audio.h>
52
53#include "twl-core.h"
54
55/*
56 * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
57 * Management and System Companion Device" chips originally designed for
58 * use in OMAP2 and OMAP 3 based systems. Its control interfaces use I2C,
59 * often at around 3 Mbit/sec, including for interrupt handling.
60 *
61 * This driver core provides genirq support for the interrupts emitted,
62 * by the various modules, and exports register access primitives.
63 *
64 * FIXME this driver currently requires use of the first interrupt line
65 * (and associated registers).
66 */
67
68#define DRIVER_NAME "twl"
69
70/* Triton Core internal information (BEGIN) */
71
72/* Base Address defns for twl4030_map[] */
73
74/* subchip/slave 0 - USB ID */
75#define TWL4030_BASEADD_USB 0x0000
76
77/* subchip/slave 1 - AUD ID */
78#define TWL4030_BASEADD_AUDIO_VOICE 0x0000
79#define TWL4030_BASEADD_GPIO 0x0098
80#define TWL4030_BASEADD_INTBR 0x0085
81#define TWL4030_BASEADD_PIH 0x0080
82#define TWL4030_BASEADD_TEST 0x004C
83
84/* subchip/slave 2 - AUX ID */
85#define TWL4030_BASEADD_INTERRUPTS 0x00B9
86#define TWL4030_BASEADD_LED 0x00EE
87#define TWL4030_BASEADD_MADC 0x0000
88#define TWL4030_BASEADD_MAIN_CHARGE 0x0074
89#define TWL4030_BASEADD_PRECHARGE 0x00AA
90#define TWL4030_BASEADD_PWM 0x00F8
91#define TWL4030_BASEADD_KEYPAD 0x00D2
92
93#define TWL5031_BASEADD_ACCESSORY 0x0074 /* Replaces Main Charge */
94#define TWL5031_BASEADD_INTERRUPTS 0x00B9 /* Different than TWL4030's
95 one */
96
97/* subchip/slave 3 - POWER ID */
98#define TWL4030_BASEADD_BACKUP 0x0014
99#define TWL4030_BASEADD_INT 0x002E
100#define TWL4030_BASEADD_PM_MASTER 0x0036
101#define TWL4030_BASEADD_PM_RECEIVER 0x005B
102#define TWL4030_BASEADD_RTC 0x001C
103#define TWL4030_BASEADD_SECURED_REG 0x0000
104
105/* Triton Core internal information (END) */
106
107
108/* subchip/slave 0 0x48 - POWER */
109#define TWL6030_BASEADD_RTC 0x0000
110#define TWL6030_BASEADD_SECURED_REG 0x0017
111#define TWL6030_BASEADD_PM_MASTER 0x001F
112#define TWL6030_BASEADD_PM_SLAVE_MISC 0x0030 /* PM_RECEIVER */
113#define TWL6030_BASEADD_PM_MISC 0x00E2
114#define TWL6030_BASEADD_PM_PUPD 0x00F0
115
116/* subchip/slave 1 0x49 - FEATURE */
117#define TWL6030_BASEADD_USB 0x0000
118#define TWL6030_BASEADD_GPADC_CTRL 0x002E
119#define TWL6030_BASEADD_AUX 0x0090
120#define TWL6030_BASEADD_PWM 0x00BA
121#define TWL6030_BASEADD_GASGAUGE 0x00C0
122#define TWL6030_BASEADD_PIH 0x00D0
123#define TWL6030_BASEADD_CHARGER 0x00E0
124#define TWL6032_BASEADD_CHARGER 0x00DA
125#define TWL6030_BASEADD_LED 0x00F4
126
127/* subchip/slave 2 0x4A - DFT */
128#define TWL6030_BASEADD_DIEID 0x00C0
129
130/* subchip/slave 3 0x4B - AUDIO */
131#define TWL6030_BASEADD_AUDIO 0x0000
132#define TWL6030_BASEADD_RSV 0x0000
133#define TWL6030_BASEADD_ZERO 0x0000
134
135/* Few power values */
136#define R_CFG_BOOT 0x05
137
138/* some fields in R_CFG_BOOT */
139#define HFCLK_FREQ_19p2_MHZ (1 << 0)
140#define HFCLK_FREQ_26_MHZ (2 << 0)
141#define HFCLK_FREQ_38p4_MHZ (3 << 0)
142#define HIGH_PERF_SQ (1 << 3)
143#define CK32K_LOWPWR_EN (1 << 7)
144
145/*----------------------------------------------------------------------*/
146
147/* Structure for each TWL4030/TWL6030 Slave */
148struct twl_client {
149 struct i2c_client *client;
150 struct regmap *regmap;
151};
152
153/* mapping the module id to slave id and base address */
154struct twl_mapping {
155 unsigned char sid; /* Slave ID */
156 unsigned char base; /* base address */
157};
158
159struct twl_private {
160 bool ready; /* The core driver is ready to be used */
161 u32 twl_idcode; /* TWL IDCODE Register value */
162 unsigned int twl_id;
163
164 struct twl_mapping *twl_map;
165 struct twl_client *twl_modules;
166};
167
168static struct twl_private *twl_priv;
169
170static struct twl_mapping twl4030_map[] = {
171 /*
172 * NOTE: don't change this table without updating the
173 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
174 * so they continue to match the order in this table.
175 */
176
177 /* Common IPs */
178 { 0, TWL4030_BASEADD_USB },
179 { 1, TWL4030_BASEADD_PIH },
180 { 2, TWL4030_BASEADD_MAIN_CHARGE },
181 { 3, TWL4030_BASEADD_PM_MASTER },
182 { 3, TWL4030_BASEADD_PM_RECEIVER },
183
184 { 3, TWL4030_BASEADD_RTC },
185 { 2, TWL4030_BASEADD_PWM },
186 { 2, TWL4030_BASEADD_LED },
187 { 3, TWL4030_BASEADD_SECURED_REG },
188
189 /* TWL4030 specific IPs */
190 { 1, TWL4030_BASEADD_AUDIO_VOICE },
191 { 1, TWL4030_BASEADD_GPIO },
192 { 1, TWL4030_BASEADD_INTBR },
193 { 1, TWL4030_BASEADD_TEST },
194 { 2, TWL4030_BASEADD_KEYPAD },
195
196 { 2, TWL4030_BASEADD_MADC },
197 { 2, TWL4030_BASEADD_INTERRUPTS },
198 { 2, TWL4030_BASEADD_PRECHARGE },
199 { 3, TWL4030_BASEADD_BACKUP },
200 { 3, TWL4030_BASEADD_INT },
201
202 { 2, TWL5031_BASEADD_ACCESSORY },
203 { 2, TWL5031_BASEADD_INTERRUPTS },
204};
205
206static struct reg_default twl4030_49_defaults[] = {
207 /* Audio Registers */
208 { 0x01, 0x00}, /* CODEC_MODE */
209 { 0x02, 0x00}, /* OPTION */
210 /* 0x03 Unused */
211 { 0x04, 0x00}, /* MICBIAS_CTL */
212 { 0x05, 0x00}, /* ANAMICL */
213 { 0x06, 0x00}, /* ANAMICR */
214 { 0x07, 0x00}, /* AVADC_CTL */
215 { 0x08, 0x00}, /* ADCMICSEL */
216 { 0x09, 0x00}, /* DIGMIXING */
217 { 0x0a, 0x0f}, /* ATXL1PGA */
218 { 0x0b, 0x0f}, /* ATXR1PGA */
219 { 0x0c, 0x0f}, /* AVTXL2PGA */
220 { 0x0d, 0x0f}, /* AVTXR2PGA */
221 { 0x0e, 0x00}, /* AUDIO_IF */
222 { 0x0f, 0x00}, /* VOICE_IF */
223 { 0x10, 0x3f}, /* ARXR1PGA */
224 { 0x11, 0x3f}, /* ARXL1PGA */
225 { 0x12, 0x3f}, /* ARXR2PGA */
226 { 0x13, 0x3f}, /* ARXL2PGA */
227 { 0x14, 0x25}, /* VRXPGA */
228 { 0x15, 0x00}, /* VSTPGA */
229 { 0x16, 0x00}, /* VRX2ARXPGA */
230 { 0x17, 0x00}, /* AVDAC_CTL */
231 { 0x18, 0x00}, /* ARX2VTXPGA */
232 { 0x19, 0x32}, /* ARXL1_APGA_CTL*/
233 { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/
234 { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/
235 { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/
236 { 0x1d, 0x00}, /* ATX2ARXPGA */
237 { 0x1e, 0x00}, /* BT_IF */
238 { 0x1f, 0x55}, /* BTPGA */
239 { 0x20, 0x00}, /* BTSTPGA */
240 { 0x21, 0x00}, /* EAR_CTL */
241 { 0x22, 0x00}, /* HS_SEL */
242 { 0x23, 0x00}, /* HS_GAIN_SET */
243 { 0x24, 0x00}, /* HS_POPN_SET */
244 { 0x25, 0x00}, /* PREDL_CTL */
245 { 0x26, 0x00}, /* PREDR_CTL */
246 { 0x27, 0x00}, /* PRECKL_CTL */
247 { 0x28, 0x00}, /* PRECKR_CTL */
248 { 0x29, 0x00}, /* HFL_CTL */
249 { 0x2a, 0x00}, /* HFR_CTL */
250 { 0x2b, 0x05}, /* ALC_CTL */
251 { 0x2c, 0x00}, /* ALC_SET1 */
252 { 0x2d, 0x00}, /* ALC_SET2 */
253 { 0x2e, 0x00}, /* BOOST_CTL */
254 { 0x2f, 0x00}, /* SOFTVOL_CTL */
255 { 0x30, 0x13}, /* DTMF_FREQSEL */
256 { 0x31, 0x00}, /* DTMF_TONEXT1H */
257 { 0x32, 0x00}, /* DTMF_TONEXT1L */
258 { 0x33, 0x00}, /* DTMF_TONEXT2H */
259 { 0x34, 0x00}, /* DTMF_TONEXT2L */
260 { 0x35, 0x79}, /* DTMF_TONOFF */
261 { 0x36, 0x11}, /* DTMF_WANONOFF */
262 { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */
263 { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */
264 { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */
265 { 0x3a, 0x06}, /* APLL_CTL */
266 { 0x3b, 0x00}, /* DTMF_CTL */
267 { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */
268 { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */
269 { 0x3e, 0x00}, /* MISC_SET_1 */
270 { 0x3f, 0x00}, /* PCMBTMUX */
271 /* 0x40 - 0x42 Unused */
272 { 0x43, 0x00}, /* RX_PATH_SEL */
273 { 0x44, 0x32}, /* VDL_APGA_CTL */
274 { 0x45, 0x00}, /* VIBRA_CTL */
275 { 0x46, 0x00}, /* VIBRA_SET */
276 { 0x47, 0x00}, /* VIBRA_PWM_SET */
277 { 0x48, 0x00}, /* ANAMIC_GAIN */
278 { 0x49, 0x00}, /* MISC_SET_2 */
279 /* End of Audio Registers */
280};
281
282static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
283{
284 switch (reg) {
285 case 0x00:
286 case 0x03:
287 case 0x40:
288 case 0x41:
289 case 0x42:
290 return false;
291 default:
292 return true;
293 }
294}
295
296static const struct regmap_range twl4030_49_volatile_ranges[] = {
297 regmap_reg_range(TWL4030_BASEADD_TEST, 0xff),
298};
299
300static const struct regmap_access_table twl4030_49_volatile_table = {
301 .yes_ranges = twl4030_49_volatile_ranges,
302 .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges),
303};
304
305static struct regmap_config twl4030_regmap_config[4] = {
306 {
307 /* Address 0x48 */
308 .reg_bits = 8,
309 .val_bits = 8,
310 .max_register = 0xff,
311 },
312 {
313 /* Address 0x49 */
314 .reg_bits = 8,
315 .val_bits = 8,
316 .max_register = 0xff,
317
318 .readable_reg = twl4030_49_nop_reg,
319 .writeable_reg = twl4030_49_nop_reg,
320
321 .volatile_table = &twl4030_49_volatile_table,
322
323 .reg_defaults = twl4030_49_defaults,
324 .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults),
325 .cache_type = REGCACHE_RBTREE,
326 },
327 {
328 /* Address 0x4a */
329 .reg_bits = 8,
330 .val_bits = 8,
331 .max_register = 0xff,
332 },
333 {
334 /* Address 0x4b */
335 .reg_bits = 8,
336 .val_bits = 8,
337 .max_register = 0xff,
338 },
339};
340
341static struct twl_mapping twl6030_map[] = {
342 /*
343 * NOTE: don't change this table without updating the
344 * <linux/i2c/twl.h> defines for TWL4030_MODULE_*
345 * so they continue to match the order in this table.
346 */
347
348 /* Common IPs */
349 { 1, TWL6030_BASEADD_USB },
350 { 1, TWL6030_BASEADD_PIH },
351 { 1, TWL6030_BASEADD_CHARGER },
352 { 0, TWL6030_BASEADD_PM_MASTER },
353 { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
354
355 { 0, TWL6030_BASEADD_RTC },
356 { 1, TWL6030_BASEADD_PWM },
357 { 1, TWL6030_BASEADD_LED },
358 { 0, TWL6030_BASEADD_SECURED_REG },
359
360 /* TWL6030 specific IPs */
361 { 0, TWL6030_BASEADD_ZERO },
362 { 1, TWL6030_BASEADD_ZERO },
363 { 2, TWL6030_BASEADD_ZERO },
364 { 1, TWL6030_BASEADD_GPADC_CTRL },
365 { 1, TWL6030_BASEADD_GASGAUGE },
366};
367
368static struct regmap_config twl6030_regmap_config[3] = {
369 {
370 /* Address 0x48 */
371 .reg_bits = 8,
372 .val_bits = 8,
373 .max_register = 0xff,
374 },
375 {
376 /* Address 0x49 */
377 .reg_bits = 8,
378 .val_bits = 8,
379 .max_register = 0xff,
380 },
381 {
382 /* Address 0x4a */
383 .reg_bits = 8,
384 .val_bits = 8,
385 .max_register = 0xff,
386 },
387};
388
389/*----------------------------------------------------------------------*/
390
391static inline int twl_get_num_slaves(void)
392{
393 if (twl_class_is_4030())
394 return 4; /* TWL4030 class have four slave address */
395 else
396 return 3; /* TWL6030 class have three slave address */
397}
398
399static inline int twl_get_last_module(void)
400{
401 if (twl_class_is_4030())
402 return TWL4030_MODULE_LAST;
403 else
404 return TWL6030_MODULE_LAST;
405}
406
407/* Exported Functions */
408
409unsigned int twl_rev(void)
410{
411 return twl_priv ? twl_priv->twl_id : 0;
412}
413EXPORT_SYMBOL(twl_rev);
414
415/**
416 * twl_get_regmap - Get the regmap associated with the given module
417 * @mod_no: module number
418 *
419 * Returns the regmap pointer or NULL in case of failure.
420 */
421static struct regmap *twl_get_regmap(u8 mod_no)
422{
423 int sid;
424 struct twl_client *twl;
425
426 if (unlikely(!twl_priv || !twl_priv->ready)) {
427 pr_err("%s: not initialized\n", DRIVER_NAME);
428 return NULL;
429 }
430 if (unlikely(mod_no >= twl_get_last_module())) {
431 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
432 return NULL;
433 }
434
435 sid = twl_priv->twl_map[mod_no].sid;
436 twl = &twl_priv->twl_modules[sid];
437
438 return twl->regmap;
439}
440
441/**
442 * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
443 * @mod_no: module number
444 * @value: an array of num_bytes+1 containing data to write
445 * @reg: register address (just offset will do)
446 * @num_bytes: number of bytes to transfer
447 *
448 * Returns the result of operation - 0 is success
449 */
450int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
451{
452 struct regmap *regmap = twl_get_regmap(mod_no);
453 int ret;
454
455 if (!regmap)
456 return -EPERM;
457
458 ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
459 value, num_bytes);
460
461 if (ret)
462 pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
463 DRIVER_NAME, mod_no, reg, num_bytes);
464
465 return ret;
466}
467EXPORT_SYMBOL(twl_i2c_write);
468
469/**
470 * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
471 * @mod_no: module number
472 * @value: an array of num_bytes containing data to be read
473 * @reg: register address (just offset will do)
474 * @num_bytes: number of bytes to transfer
475 *
476 * Returns result of operation - num_bytes is success else failure.
477 */
478int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
479{
480 struct regmap *regmap = twl_get_regmap(mod_no);
481 int ret;
482
483 if (!regmap)
484 return -EPERM;
485
486 ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
487 value, num_bytes);
488
489 if (ret)
490 pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
491 DRIVER_NAME, mod_no, reg, num_bytes);
492
493 return ret;
494}
495EXPORT_SYMBOL(twl_i2c_read);
496
497/**
498 * twl_regcache_bypass - Configure the regcache bypass for the regmap associated
499 * with the module
500 * @mod_no: module number
501 * @enable: Regcache bypass state
502 *
503 * Returns 0 else failure.
504 */
505int twl_set_regcache_bypass(u8 mod_no, bool enable)
506{
507 struct regmap *regmap = twl_get_regmap(mod_no);
508
509 if (!regmap)
510 return -EPERM;
511
512 regcache_cache_bypass(regmap, enable);
513
514 return 0;
515}
516EXPORT_SYMBOL(twl_set_regcache_bypass);
517
518/*----------------------------------------------------------------------*/
519
520/**
521 * twl_read_idcode_register - API to read the IDCODE register.
522 *
523 * Unlocks the IDCODE register and read the 32 bit value.
524 */
525static int twl_read_idcode_register(void)
526{
527 int err;
528
529 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
530 REG_UNLOCK_TEST_REG);
531 if (err) {
532 pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
533 goto fail;
534 }
535
536 err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
537 REG_IDCODE_7_0, 4);
538 if (err) {
539 pr_err("TWL4030: unable to read IDCODE -%d\n", err);
540 goto fail;
541 }
542
543 err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
544 if (err)
545 pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
546fail:
547 return err;
548}
549
550/**
551 * twl_get_type - API to get TWL Si type.
552 *
553 * Api to get the TWL Si type from IDCODE value.
554 */
555int twl_get_type(void)
556{
557 return TWL_SIL_TYPE(twl_priv->twl_idcode);
558}
559EXPORT_SYMBOL_GPL(twl_get_type);
560
561/**
562 * twl_get_version - API to get TWL Si version.
563 *
564 * Api to get the TWL Si version from IDCODE value.
565 */
566int twl_get_version(void)
567{
568 return TWL_SIL_REV(twl_priv->twl_idcode);
569}
570EXPORT_SYMBOL_GPL(twl_get_version);
571
572/**
573 * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
574 *
575 * Api to get the TWL HFCLK rate based on BOOT_CFG register.
576 */
577int twl_get_hfclk_rate(void)
578{
579 u8 ctrl;
580 int rate;
581
582 twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
583
584 switch (ctrl & 0x3) {
585 case HFCLK_FREQ_19p2_MHZ:
586 rate = 19200000;
587 break;
588 case HFCLK_FREQ_26_MHZ:
589 rate = 26000000;
590 break;
591 case HFCLK_FREQ_38p4_MHZ:
592 rate = 38400000;
593 break;
594 default:
595 pr_err("TWL4030: HFCLK is not configured\n");
596 rate = -EINVAL;
597 break;
598 }
599
600 return rate;
601}
602EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
603
604static struct device *
605add_numbered_child(unsigned mod_no, const char *name, int num,
606 void *pdata, unsigned pdata_len,
607 bool can_wakeup, int irq0, int irq1)
608{
609 struct platform_device *pdev;
610 struct twl_client *twl;
611 int status, sid;
612
613 if (unlikely(mod_no >= twl_get_last_module())) {
614 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
615 return ERR_PTR(-EPERM);
616 }
617 sid = twl_priv->twl_map[mod_no].sid;
618 twl = &twl_priv->twl_modules[sid];
619
620 pdev = platform_device_alloc(name, num);
621 if (!pdev) {
622 dev_dbg(&twl->client->dev, "can't alloc dev\n");
623 status = -ENOMEM;
624 goto err;
625 }
626
627 pdev->dev.parent = &twl->client->dev;
628
629 if (pdata) {
630 status = platform_device_add_data(pdev, pdata, pdata_len);
631 if (status < 0) {
632 dev_dbg(&pdev->dev, "can't add platform_data\n");
633 goto err;
634 }
635 }
636
637 if (irq0) {
638 struct resource r[2] = {
639 { .start = irq0, .flags = IORESOURCE_IRQ, },
640 { .start = irq1, .flags = IORESOURCE_IRQ, },
641 };
642
643 status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
644 if (status < 0) {
645 dev_dbg(&pdev->dev, "can't add irqs\n");
646 goto err;
647 }
648 }
649
650 status = platform_device_add(pdev);
651 if (status == 0)
652 device_init_wakeup(&pdev->dev, can_wakeup);
653
654err:
655 if (status < 0) {
656 platform_device_put(pdev);
657 dev_err(&twl->client->dev, "can't add %s dev\n", name);
658 return ERR_PTR(status);
659 }
660 return &pdev->dev;
661}
662
663static inline struct device *add_child(unsigned mod_no, const char *name,
664 void *pdata, unsigned pdata_len,
665 bool can_wakeup, int irq0, int irq1)
666{
667 return add_numbered_child(mod_no, name, -1, pdata, pdata_len,
668 can_wakeup, irq0, irq1);
669}
670
671static struct device *
672add_regulator_linked(int num, struct regulator_init_data *pdata,
673 struct regulator_consumer_supply *consumers,
674 unsigned num_consumers, unsigned long features)
675{
676 struct twl_regulator_driver_data drv_data;
677
678 /* regulator framework demands init_data ... */
679 if (!pdata)
680 return NULL;
681
682 if (consumers) {
683 pdata->consumer_supplies = consumers;
684 pdata->num_consumer_supplies = num_consumers;
685 }
686
687 if (pdata->driver_data) {
688 /* If we have existing drv_data, just add the flags */
689 struct twl_regulator_driver_data *tmp;
690 tmp = pdata->driver_data;
691 tmp->features |= features;
692 } else {
693 /* add new driver data struct, used only during init */
694 drv_data.features = features;
695 drv_data.set_voltage = NULL;
696 drv_data.get_voltage = NULL;
697 drv_data.data = NULL;
698 pdata->driver_data = &drv_data;
699 }
700
701 /* NOTE: we currently ignore regulator IRQs, e.g. for short circuits */
702 return add_numbered_child(TWL_MODULE_PM_MASTER, "twl_reg", num,
703 pdata, sizeof(*pdata), false, 0, 0);
704}
705
706static struct device *
707add_regulator(int num, struct regulator_init_data *pdata,
708 unsigned long features)
709{
710 return add_regulator_linked(num, pdata, NULL, 0, features);
711}
712
713/*
714 * NOTE: We know the first 8 IRQs after pdata->base_irq are
715 * for the PIH, and the next are for the PWR_INT SIH, since
716 * that's how twl_init_irq() sets things up.
717 */
718
719static int
720add_children(struct twl4030_platform_data *pdata, unsigned irq_base,
721 unsigned long features)
722{
723 struct device *child;
724
725 if (IS_ENABLED(CONFIG_GPIO_TWL4030) && pdata->gpio) {
726 child = add_child(TWL4030_MODULE_GPIO, "twl4030_gpio",
727 pdata->gpio, sizeof(*pdata->gpio),
728 false, irq_base + GPIO_INTR_OFFSET, 0);
729 if (IS_ERR(child))
730 return PTR_ERR(child);
731 }
732
733 if (IS_ENABLED(CONFIG_KEYBOARD_TWL4030) && pdata->keypad) {
734 child = add_child(TWL4030_MODULE_KEYPAD, "twl4030_keypad",
735 pdata->keypad, sizeof(*pdata->keypad),
736 true, irq_base + KEYPAD_INTR_OFFSET, 0);
737 if (IS_ERR(child))
738 return PTR_ERR(child);
739 }
740
741 if (IS_ENABLED(CONFIG_TWL4030_MADC) && pdata->madc &&
742 twl_class_is_4030()) {
743 child = add_child(TWL4030_MODULE_MADC, "twl4030_madc",
744 pdata->madc, sizeof(*pdata->madc),
745 true, irq_base + MADC_INTR_OFFSET, 0);
746 if (IS_ERR(child))
747 return PTR_ERR(child);
748 }
749
750 if (IS_ENABLED(CONFIG_RTC_DRV_TWL4030)) {
751 /*
752 * REVISIT platform_data here currently might expose the
753 * "msecure" line ... but for now we just expect board
754 * setup to tell the chip "it's always ok to SET_TIME".
755 * Eventually, Linux might become more aware of such
756 * HW security concerns, and "least privilege".
757 */
758 child = add_child(TWL_MODULE_RTC, "twl_rtc", NULL, 0,
759 true, irq_base + RTC_INTR_OFFSET, 0);
760 if (IS_ERR(child))
761 return PTR_ERR(child);
762 }
763
764 if (IS_ENABLED(CONFIG_PWM_TWL)) {
765 child = add_child(TWL_MODULE_PWM, "twl-pwm", NULL, 0,
766 false, 0, 0);
767 if (IS_ERR(child))
768 return PTR_ERR(child);
769 }
770
771 if (IS_ENABLED(CONFIG_PWM_TWL_LED)) {
772 child = add_child(TWL_MODULE_LED, "twl-pwmled", NULL, 0,
773 false, 0, 0);
774 if (IS_ERR(child))
775 return PTR_ERR(child);
776 }
777
778 if (IS_ENABLED(CONFIG_TWL4030_USB) && pdata->usb &&
779 twl_class_is_4030()) {
780
781 static struct regulator_consumer_supply usb1v5 = {
782 .supply = "usb1v5",
783 };
784 static struct regulator_consumer_supply usb1v8 = {
785 .supply = "usb1v8",
786 };
787 static struct regulator_consumer_supply usb3v1[] = {
788 { .supply = "usb3v1" },
789 { .supply = "bci3v1" },
790 };
791
792 /* First add the regulators so that they can be used by transceiver */
793 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030)) {
794 /* this is a template that gets copied */
795 struct regulator_init_data usb_fixed = {
796 .constraints.valid_modes_mask =
797 REGULATOR_MODE_NORMAL
798 | REGULATOR_MODE_STANDBY,
799 .constraints.valid_ops_mask =
800 REGULATOR_CHANGE_MODE
801 | REGULATOR_CHANGE_STATUS,
802 };
803
804 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
805 &usb_fixed, &usb1v5, 1,
806 features);
807 if (IS_ERR(child))
808 return PTR_ERR(child);
809
810 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
811 &usb_fixed, &usb1v8, 1,
812 features);
813 if (IS_ERR(child))
814 return PTR_ERR(child);
815
816 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
817 &usb_fixed, usb3v1, 2,
818 features);
819 if (IS_ERR(child))
820 return PTR_ERR(child);
821
822 }
823
824 child = add_child(TWL_MODULE_USB, "twl4030_usb",
825 pdata->usb, sizeof(*pdata->usb), true,
826 /* irq0 = USB_PRES, irq1 = USB */
827 irq_base + USB_PRES_INTR_OFFSET,
828 irq_base + USB_INTR_OFFSET);
829
830 if (IS_ERR(child))
831 return PTR_ERR(child);
832
833 /* we need to connect regulators to this transceiver */
834 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && child) {
835 usb1v5.dev_name = dev_name(child);
836 usb1v8.dev_name = dev_name(child);
837 usb3v1[0].dev_name = dev_name(child);
838 }
839 }
840
841 if (IS_ENABLED(CONFIG_TWL4030_WATCHDOG) && twl_class_is_4030()) {
842 child = add_child(TWL_MODULE_PM_RECEIVER, "twl4030_wdt", NULL,
843 0, false, 0, 0);
844 if (IS_ERR(child))
845 return PTR_ERR(child);
846 }
847
848 if (IS_ENABLED(CONFIG_INPUT_TWL4030_PWRBUTTON) && twl_class_is_4030()) {
849 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_pwrbutton",
850 NULL, 0, true, irq_base + 8 + 0, 0);
851 if (IS_ERR(child))
852 return PTR_ERR(child);
853 }
854
855 if (IS_ENABLED(CONFIG_MFD_TWL4030_AUDIO) && pdata->audio &&
856 twl_class_is_4030()) {
857 child = add_child(TWL4030_MODULE_AUDIO_VOICE, "twl4030-audio",
858 pdata->audio, sizeof(*pdata->audio),
859 false, 0, 0);
860 if (IS_ERR(child))
861 return PTR_ERR(child);
862 }
863
864 /* twl4030 regulators */
865 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && twl_class_is_4030()) {
866 child = add_regulator(TWL4030_REG_VPLL1, pdata->vpll1,
867 features);
868 if (IS_ERR(child))
869 return PTR_ERR(child);
870
871 child = add_regulator(TWL4030_REG_VIO, pdata->vio,
872 features);
873 if (IS_ERR(child))
874 return PTR_ERR(child);
875
876 child = add_regulator(TWL4030_REG_VDD1, pdata->vdd1,
877 features);
878 if (IS_ERR(child))
879 return PTR_ERR(child);
880
881 child = add_regulator(TWL4030_REG_VDD2, pdata->vdd2,
882 features);
883 if (IS_ERR(child))
884 return PTR_ERR(child);
885
886 child = add_regulator(TWL4030_REG_VMMC1, pdata->vmmc1,
887 features);
888 if (IS_ERR(child))
889 return PTR_ERR(child);
890
891 child = add_regulator(TWL4030_REG_VDAC, pdata->vdac,
892 features);
893 if (IS_ERR(child))
894 return PTR_ERR(child);
895
896 child = add_regulator((features & TWL4030_VAUX2)
897 ? TWL4030_REG_VAUX2_4030
898 : TWL4030_REG_VAUX2,
899 pdata->vaux2, features);
900 if (IS_ERR(child))
901 return PTR_ERR(child);
902
903 child = add_regulator(TWL4030_REG_VINTANA1, pdata->vintana1,
904 features);
905 if (IS_ERR(child))
906 return PTR_ERR(child);
907
908 child = add_regulator(TWL4030_REG_VINTANA2, pdata->vintana2,
909 features);
910 if (IS_ERR(child))
911 return PTR_ERR(child);
912
913 child = add_regulator(TWL4030_REG_VINTDIG, pdata->vintdig,
914 features);
915 if (IS_ERR(child))
916 return PTR_ERR(child);
917 }
918
919 /* maybe add LDOs that are omitted on cost-reduced parts */
920 if (IS_ENABLED(CONFIG_REGULATOR_TWL4030) && !(features & TPS_SUBSET)
921 && twl_class_is_4030()) {
922 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2,
923 features);
924 if (IS_ERR(child))
925 return PTR_ERR(child);
926
927 child = add_regulator(TWL4030_REG_VMMC2, pdata->vmmc2,
928 features);
929 if (IS_ERR(child))
930 return PTR_ERR(child);
931
932 child = add_regulator(TWL4030_REG_VSIM, pdata->vsim,
933 features);
934 if (IS_ERR(child))
935 return PTR_ERR(child);
936
937 child = add_regulator(TWL4030_REG_VAUX1, pdata->vaux1,
938 features);
939 if (IS_ERR(child))
940 return PTR_ERR(child);
941
942 child = add_regulator(TWL4030_REG_VAUX3, pdata->vaux3,
943 features);
944 if (IS_ERR(child))
945 return PTR_ERR(child);
946
947 child = add_regulator(TWL4030_REG_VAUX4, pdata->vaux4,
948 features);
949 if (IS_ERR(child))
950 return PTR_ERR(child);
951 }
952
953 if (IS_ENABLED(CONFIG_CHARGER_TWL4030) && pdata->bci &&
954 !(features & (TPS_SUBSET | TWL5031))) {
955 child = add_child(TWL_MODULE_MAIN_CHARGE, "twl4030_bci",
956 pdata->bci, sizeof(*pdata->bci), false,
957 /* irq0 = CHG_PRES, irq1 = BCI */
958 irq_base + BCI_PRES_INTR_OFFSET,
959 irq_base + BCI_INTR_OFFSET);
960 if (IS_ERR(child))
961 return PTR_ERR(child);
962 }
963
964 if (IS_ENABLED(CONFIG_TWL4030_POWER) && pdata->power) {
965 child = add_child(TWL_MODULE_PM_MASTER, "twl4030_power",
966 pdata->power, sizeof(*pdata->power), false,
967 0, 0);
968 if (IS_ERR(child))
969 return PTR_ERR(child);
970 }
971
972 return 0;
973}
974
975/*----------------------------------------------------------------------*/
976
977/*
978 * These three functions initialize the on-chip clock framework,
979 * letting it generate the right frequencies for USB, MADC, and
980 * other purposes.
981 */
982static inline int __init protect_pm_master(void)
983{
984 int e = 0;
985
986 e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
987 TWL4030_PM_MASTER_PROTECT_KEY);
988 return e;
989}
990
991static inline int __init unprotect_pm_master(void)
992{
993 int e = 0;
994
995 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
996 TWL4030_PM_MASTER_PROTECT_KEY);
997 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
998 TWL4030_PM_MASTER_PROTECT_KEY);
999
1000 return e;
1001}
1002
1003static void clocks_init(struct device *dev,
1004 struct twl4030_clock_init_data *clock)
1005{
1006 int e = 0;
1007 struct clk *osc;
1008 u32 rate;
1009 u8 ctrl = HFCLK_FREQ_26_MHZ;
1010
1011 osc = clk_get(dev, "fck");
1012 if (IS_ERR(osc)) {
1013 printk(KERN_WARNING "Skipping twl internal clock init and "
1014 "using bootloader value (unknown osc rate)\n");
1015 return;
1016 }
1017
1018 rate = clk_get_rate(osc);
1019 clk_put(osc);
1020
1021 switch (rate) {
1022 case 19200000:
1023 ctrl = HFCLK_FREQ_19p2_MHZ;
1024 break;
1025 case 26000000:
1026 ctrl = HFCLK_FREQ_26_MHZ;
1027 break;
1028 case 38400000:
1029 ctrl = HFCLK_FREQ_38p4_MHZ;
1030 break;
1031 }
1032
1033 ctrl |= HIGH_PERF_SQ;
1034 if (clock && clock->ck32k_lowpwr_enable)
1035 ctrl |= CK32K_LOWPWR_EN;
1036
1037 e |= unprotect_pm_master();
1038 /* effect->MADC+USB ck en */
1039 e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
1040 e |= protect_pm_master();
1041
1042 if (e < 0)
1043 pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
1044}
1045
1046/*----------------------------------------------------------------------*/
1047
1048
1049static int twl_remove(struct i2c_client *client)
1050{
1051 unsigned i, num_slaves;
1052 int status;
1053
1054 if (twl_class_is_4030())
1055 status = twl4030_exit_irq();
1056 else
1057 status = twl6030_exit_irq();
1058
1059 if (status < 0)
1060 return status;
1061
1062 num_slaves = twl_get_num_slaves();
1063 for (i = 0; i < num_slaves; i++) {
1064 struct twl_client *twl = &twl_priv->twl_modules[i];
1065
1066 if (twl->client && twl->client != client)
1067 i2c_unregister_device(twl->client);
1068 twl->client = NULL;
1069 }
1070 twl_priv->ready = false;
1071 return 0;
1072}
1073
1074static struct of_dev_auxdata twl_auxdata_lookup[] = {
1075 OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL),
1076 { /* sentinel */ },
1077};
1078
1079/* NOTE: This driver only handles a single twl4030/tps659x0 chip */
1080static int
1081twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
1082{
1083 struct twl4030_platform_data *pdata = dev_get_platdata(&client->dev);
1084 struct device_node *node = client->dev.of_node;
1085 struct platform_device *pdev;
1086 struct regmap_config *twl_regmap_config;
1087 int irq_base = 0;
1088 int status;
1089 unsigned i, num_slaves;
1090
1091 if (!node && !pdata) {
1092 dev_err(&client->dev, "no platform data\n");
1093 return -EINVAL;
1094 }
1095
1096 if (twl_priv) {
1097 dev_dbg(&client->dev, "only one instance of %s allowed\n",
1098 DRIVER_NAME);
1099 return -EBUSY;
1100 }
1101
1102 pdev = platform_device_alloc(DRIVER_NAME, -1);
1103 if (!pdev) {
1104 dev_err(&client->dev, "can't alloc pdev\n");
1105 return -ENOMEM;
1106 }
1107
1108 status = platform_device_add(pdev);
1109 if (status) {
1110 platform_device_put(pdev);
1111 return status;
1112 }
1113
1114 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
1115 dev_dbg(&client->dev, "can't talk I2C?\n");
1116 status = -EIO;
1117 goto free;
1118 }
1119
1120 twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
1121 GFP_KERNEL);
1122 if (!twl_priv) {
1123 status = -ENOMEM;
1124 goto free;
1125 }
1126
1127 if ((id->driver_data) & TWL6030_CLASS) {
1128 twl_priv->twl_id = TWL6030_CLASS_ID;
1129 twl_priv->twl_map = &twl6030_map[0];
1130 /* The charger base address is different in twl6032 */
1131 if ((id->driver_data) & TWL6032_SUBCLASS)
1132 twl_priv->twl_map[TWL_MODULE_MAIN_CHARGE].base =
1133 TWL6032_BASEADD_CHARGER;
1134 twl_regmap_config = twl6030_regmap_config;
1135 } else {
1136 twl_priv->twl_id = TWL4030_CLASS_ID;
1137 twl_priv->twl_map = &twl4030_map[0];
1138 twl_regmap_config = twl4030_regmap_config;
1139 }
1140
1141 num_slaves = twl_get_num_slaves();
1142 twl_priv->twl_modules = devm_kzalloc(&client->dev,
1143 sizeof(struct twl_client) * num_slaves,
1144 GFP_KERNEL);
1145 if (!twl_priv->twl_modules) {
1146 status = -ENOMEM;
1147 goto free;
1148 }
1149
1150 for (i = 0; i < num_slaves; i++) {
1151 struct twl_client *twl = &twl_priv->twl_modules[i];
1152
1153 if (i == 0) {
1154 twl->client = client;
1155 } else {
1156 twl->client = i2c_new_dummy(client->adapter,
1157 client->addr + i);
1158 if (!twl->client) {
1159 dev_err(&client->dev,
1160 "can't attach client %d\n", i);
1161 status = -ENOMEM;
1162 goto fail;
1163 }
1164 }
1165
1166 twl->regmap = devm_regmap_init_i2c(twl->client,
1167 &twl_regmap_config[i]);
1168 if (IS_ERR(twl->regmap)) {
1169 status = PTR_ERR(twl->regmap);
1170 dev_err(&client->dev,
1171 "Failed to allocate regmap %d, err: %d\n", i,
1172 status);
1173 goto fail;
1174 }
1175 }
1176
1177 twl_priv->ready = true;
1178
1179 /* setup clock framework */
1180 clocks_init(&pdev->dev, pdata ? pdata->clock : NULL);
1181
1182 /* read TWL IDCODE Register */
1183 if (twl_class_is_4030()) {
1184 status = twl_read_idcode_register();
1185 WARN(status < 0, "Error: reading twl_idcode register value\n");
1186 }
1187
1188 /* Maybe init the T2 Interrupt subsystem */
1189 if (client->irq) {
1190 if (twl_class_is_4030()) {
1191 twl4030_init_chip_irq(id->name);
1192 irq_base = twl4030_init_irq(&client->dev, client->irq);
1193 } else {
1194 irq_base = twl6030_init_irq(&client->dev, client->irq);
1195 }
1196
1197 if (irq_base < 0) {
1198 status = irq_base;
1199 goto fail;
1200 }
1201 }
1202
1203 /*
1204 * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
1205 * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
1206 * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
1207 */
1208 if (twl_class_is_4030()) {
1209 u8 temp;
1210
1211 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
1212 temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
1213 I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
1214 twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
1215 }
1216
1217 if (node) {
1218 if (pdata)
1219 twl_auxdata_lookup[0].platform_data = pdata->gpio;
1220 status = of_platform_populate(node, NULL, twl_auxdata_lookup,
1221 &client->dev);
1222 } else {
1223 status = add_children(pdata, irq_base, id->driver_data);
1224 }
1225
1226fail:
1227 if (status < 0)
1228 twl_remove(client);
1229free:
1230 if (status < 0)
1231 platform_device_unregister(pdev);
1232
1233 return status;
1234}
1235
1236static const struct i2c_device_id twl_ids[] = {
1237 { "twl4030", TWL4030_VAUX2 }, /* "Triton 2" */
1238 { "twl5030", 0 }, /* T2 updated */
1239 { "twl5031", TWL5031 }, /* TWL5030 updated */
1240 { "tps65950", 0 }, /* catalog version of twl5030 */
1241 { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
1242 { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
1243 { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
1244 and vibrator. Charger in USB module*/
1245 { "twl6030", TWL6030_CLASS }, /* "Phoenix power chip" */
1246 { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
1247 { /* end of list */ },
1248};
1249MODULE_DEVICE_TABLE(i2c, twl_ids);
1250
1251/* One Client Driver , 4 Clients */
1252static struct i2c_driver twl_driver = {
1253 .driver.name = DRIVER_NAME,
1254 .id_table = twl_ids,
1255 .probe = twl_probe,
1256 .remove = twl_remove,
1257};
1258
1259module_i2c_driver(twl_driver);
1260
1261MODULE_AUTHOR("Texas Instruments, Inc.");
1262MODULE_DESCRIPTION("I2C Core interface for TWL");
1263MODULE_LICENSE("GPL");