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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2011 Samsung Electronics Co.Ltd
4 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
5 */
6
7
8#include <drm/drm_atomic.h>
9#include <drm/drm_atomic_helper.h>
10#include <drm/drm_blend.h>
11#include <drm/drm_framebuffer.h>
12#include <drm/exynos_drm.h>
13
14#include "exynos_drm_crtc.h"
15#include "exynos_drm_drv.h"
16#include "exynos_drm_fb.h"
17#include "exynos_drm_gem.h"
18#include "exynos_drm_plane.h"
19
20/*
21 * This function is to get X or Y size shown via screen. This needs length and
22 * start position of CRTC.
23 *
24 * <--- length --->
25 * CRTC ----------------
26 * ^ start ^ end
27 *
28 * There are six cases from a to f.
29 *
30 * <----- SCREEN ----->
31 * 0 last
32 * ----------|------------------|----------
33 * CRTCs
34 * a -------
35 * b -------
36 * c --------------------------
37 * d --------
38 * e -------
39 * f -------
40 */
41static int exynos_plane_get_size(int start, unsigned length, unsigned last)
42{
43 int end = start + length;
44 int size = 0;
45
46 if (start <= 0) {
47 if (end > 0)
48 size = min_t(unsigned, end, last);
49 } else if (start <= last) {
50 size = min_t(unsigned, last - start, length);
51 }
52
53 return size;
54}
55
56static void exynos_plane_mode_set(struct exynos_drm_plane_state *exynos_state)
57{
58 struct drm_plane_state *state = &exynos_state->base;
59 struct drm_crtc *crtc = state->crtc;
60 struct drm_crtc_state *crtc_state =
61 drm_atomic_get_existing_crtc_state(state->state, crtc);
62 struct drm_display_mode *mode = &crtc_state->adjusted_mode;
63 int crtc_x, crtc_y;
64 unsigned int crtc_w, crtc_h;
65 unsigned int src_x, src_y;
66 unsigned int src_w, src_h;
67 unsigned int actual_w;
68 unsigned int actual_h;
69
70 /*
71 * The original src/dest coordinates are stored in exynos_state->base,
72 * but we want to keep another copy internal to our driver that we can
73 * clip/modify ourselves.
74 */
75
76 crtc_x = state->crtc_x;
77 crtc_y = state->crtc_y;
78 crtc_w = state->crtc_w;
79 crtc_h = state->crtc_h;
80
81 src_x = state->src_x >> 16;
82 src_y = state->src_y >> 16;
83 src_w = state->src_w >> 16;
84 src_h = state->src_h >> 16;
85
86 /* set ratio */
87 exynos_state->h_ratio = (src_w << 16) / crtc_w;
88 exynos_state->v_ratio = (src_h << 16) / crtc_h;
89
90 /* clip to visible area */
91 actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay);
92 actual_h = exynos_plane_get_size(crtc_y, crtc_h, mode->vdisplay);
93
94 if (crtc_x < 0) {
95 if (actual_w)
96 src_x += ((-crtc_x) * exynos_state->h_ratio) >> 16;
97 crtc_x = 0;
98 }
99
100 if (crtc_y < 0) {
101 if (actual_h)
102 src_y += ((-crtc_y) * exynos_state->v_ratio) >> 16;
103 crtc_y = 0;
104 }
105
106 /* set drm framebuffer data. */
107 exynos_state->src.x = src_x;
108 exynos_state->src.y = src_y;
109 exynos_state->src.w = (actual_w * exynos_state->h_ratio) >> 16;
110 exynos_state->src.h = (actual_h * exynos_state->v_ratio) >> 16;
111
112 /* set plane range to be displayed. */
113 exynos_state->crtc.x = crtc_x;
114 exynos_state->crtc.y = crtc_y;
115 exynos_state->crtc.w = actual_w;
116 exynos_state->crtc.h = actual_h;
117
118 DRM_DEV_DEBUG_KMS(crtc->dev->dev,
119 "plane : offset_x/y(%d,%d), width/height(%d,%d)",
120 exynos_state->crtc.x, exynos_state->crtc.y,
121 exynos_state->crtc.w, exynos_state->crtc.h);
122}
123
124static void exynos_drm_plane_reset(struct drm_plane *plane)
125{
126 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
127 struct exynos_drm_plane_state *exynos_state;
128
129 if (plane->state) {
130 exynos_state = to_exynos_plane_state(plane->state);
131 __drm_atomic_helper_plane_destroy_state(plane->state);
132 kfree(exynos_state);
133 plane->state = NULL;
134 }
135
136 exynos_state = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
137 if (exynos_state) {
138 __drm_atomic_helper_plane_reset(plane, &exynos_state->base);
139 plane->state->zpos = exynos_plane->config->zpos;
140 }
141}
142
143static struct drm_plane_state *
144exynos_drm_plane_duplicate_state(struct drm_plane *plane)
145{
146 struct exynos_drm_plane_state *exynos_state;
147 struct exynos_drm_plane_state *copy;
148
149 exynos_state = to_exynos_plane_state(plane->state);
150 copy = kzalloc(sizeof(*exynos_state), GFP_KERNEL);
151 if (!copy)
152 return NULL;
153
154 __drm_atomic_helper_plane_duplicate_state(plane, ©->base);
155 return ©->base;
156}
157
158static void exynos_drm_plane_destroy_state(struct drm_plane *plane,
159 struct drm_plane_state *old_state)
160{
161 struct exynos_drm_plane_state *old_exynos_state =
162 to_exynos_plane_state(old_state);
163 __drm_atomic_helper_plane_destroy_state(old_state);
164 kfree(old_exynos_state);
165}
166
167static struct drm_plane_funcs exynos_plane_funcs = {
168 .update_plane = drm_atomic_helper_update_plane,
169 .disable_plane = drm_atomic_helper_disable_plane,
170 .destroy = drm_plane_cleanup,
171 .reset = exynos_drm_plane_reset,
172 .atomic_duplicate_state = exynos_drm_plane_duplicate_state,
173 .atomic_destroy_state = exynos_drm_plane_destroy_state,
174};
175
176static int
177exynos_drm_plane_check_format(const struct exynos_drm_plane_config *config,
178 struct exynos_drm_plane_state *state)
179{
180 struct drm_framebuffer *fb = state->base.fb;
181 struct drm_device *dev = fb->dev;
182
183 switch (fb->modifier) {
184 case DRM_FORMAT_MOD_SAMSUNG_64_32_TILE:
185 if (!(config->capabilities & EXYNOS_DRM_PLANE_CAP_TILE))
186 return -ENOTSUPP;
187 break;
188
189 case DRM_FORMAT_MOD_LINEAR:
190 break;
191
192 default:
193 DRM_DEV_ERROR(dev->dev, "unsupported pixel format modifier");
194 return -ENOTSUPP;
195 }
196
197 return 0;
198}
199
200static int
201exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
202 struct exynos_drm_plane_state *state)
203{
204 struct drm_crtc *crtc = state->base.crtc;
205 bool width_ok = false, height_ok = false;
206
207 if (config->capabilities & EXYNOS_DRM_PLANE_CAP_SCALE)
208 return 0;
209
210 if (state->src.w == state->crtc.w)
211 width_ok = true;
212
213 if (state->src.h == state->crtc.h)
214 height_ok = true;
215
216 if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
217 state->h_ratio == (1 << 15))
218 width_ok = true;
219
220 if ((config->capabilities & EXYNOS_DRM_PLANE_CAP_DOUBLE) &&
221 state->v_ratio == (1 << 15))
222 height_ok = true;
223
224 if (width_ok && height_ok)
225 return 0;
226
227 DRM_DEV_DEBUG_KMS(crtc->dev->dev, "scaling mode is not supported");
228 return -ENOTSUPP;
229}
230
231static int exynos_plane_atomic_check(struct drm_plane *plane,
232 struct drm_atomic_state *state)
233{
234 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
235 plane);
236 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
237 struct exynos_drm_plane_state *exynos_state =
238 to_exynos_plane_state(new_plane_state);
239 int ret = 0;
240
241 if (!new_plane_state->crtc || !new_plane_state->fb)
242 return 0;
243
244 /* translate state into exynos_state */
245 exynos_plane_mode_set(exynos_state);
246
247 ret = exynos_drm_plane_check_format(exynos_plane->config, exynos_state);
248 if (ret)
249 return ret;
250
251 ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
252 return ret;
253}
254
255static void exynos_plane_atomic_update(struct drm_plane *plane,
256 struct drm_atomic_state *state)
257{
258 struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
259 plane);
260 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(new_state->crtc);
261 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
262
263 if (!new_state->crtc)
264 return;
265
266 if (exynos_crtc->ops->update_plane)
267 exynos_crtc->ops->update_plane(exynos_crtc, exynos_plane);
268}
269
270static void exynos_plane_atomic_disable(struct drm_plane *plane,
271 struct drm_atomic_state *state)
272{
273 struct drm_plane_state *old_state = drm_atomic_get_old_plane_state(state, plane);
274 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
275 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(old_state->crtc);
276
277 if (!old_state->crtc)
278 return;
279
280 if (exynos_crtc->ops->disable_plane)
281 exynos_crtc->ops->disable_plane(exynos_crtc, exynos_plane);
282}
283
284static const struct drm_plane_helper_funcs plane_helper_funcs = {
285 .atomic_check = exynos_plane_atomic_check,
286 .atomic_update = exynos_plane_atomic_update,
287 .atomic_disable = exynos_plane_atomic_disable,
288};
289
290static void exynos_plane_attach_zpos_property(struct drm_plane *plane,
291 int zpos, bool immutable)
292{
293 if (immutable)
294 drm_plane_create_zpos_immutable_property(plane, zpos);
295 else
296 drm_plane_create_zpos_property(plane, zpos, 0, MAX_PLANE - 1);
297}
298
299int exynos_plane_init(struct drm_device *dev,
300 struct exynos_drm_plane *exynos_plane, unsigned int index,
301 const struct exynos_drm_plane_config *config)
302{
303 int err;
304 unsigned int supported_modes = BIT(DRM_MODE_BLEND_PIXEL_NONE) |
305 BIT(DRM_MODE_BLEND_PREMULTI) |
306 BIT(DRM_MODE_BLEND_COVERAGE);
307 struct drm_plane *plane = &exynos_plane->base;
308
309 err = drm_universal_plane_init(dev, &exynos_plane->base,
310 1 << dev->mode_config.num_crtc,
311 &exynos_plane_funcs,
312 config->pixel_formats,
313 config->num_pixel_formats,
314 NULL, config->type, NULL);
315 if (err) {
316 DRM_DEV_ERROR(dev->dev, "failed to initialize plane\n");
317 return err;
318 }
319
320 drm_plane_helper_add(&exynos_plane->base, &plane_helper_funcs);
321
322 exynos_plane->index = index;
323 exynos_plane->config = config;
324
325 exynos_plane_attach_zpos_property(&exynos_plane->base, config->zpos,
326 !(config->capabilities & EXYNOS_DRM_PLANE_CAP_ZPOS));
327
328 if (config->capabilities & EXYNOS_DRM_PLANE_CAP_PIX_BLEND)
329 drm_plane_create_blend_mode_property(plane, supported_modes);
330
331 if (config->capabilities & EXYNOS_DRM_PLANE_CAP_WIN_BLEND)
332 drm_plane_create_alpha_property(plane);
333
334 return 0;
335}
1/*
2 * Copyright (C) 2011 Samsung Electronics Co.Ltd
3 * Authors: Joonyoung Shim <jy0922.shim@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License as published by the
7 * Free Software Foundation; either version 2 of the License, or (at your
8 * option) any later version.
9 *
10 */
11
12#include <drm/drmP.h>
13
14#include <drm/exynos_drm.h>
15#include "exynos_drm_drv.h"
16#include "exynos_drm_crtc.h"
17#include "exynos_drm_fb.h"
18#include "exynos_drm_gem.h"
19#include "exynos_drm_plane.h"
20
21#define to_exynos_plane(x) container_of(x, struct exynos_plane, base)
22
23struct exynos_plane {
24 struct drm_plane base;
25 struct exynos_drm_overlay overlay;
26 bool enabled;
27};
28
29static const uint32_t formats[] = {
30 DRM_FORMAT_XRGB8888,
31 DRM_FORMAT_ARGB8888,
32 DRM_FORMAT_NV12,
33 DRM_FORMAT_NV12MT,
34};
35
36/*
37 * This function is to get X or Y size shown via screen. This needs length and
38 * start position of CRTC.
39 *
40 * <--- length --->
41 * CRTC ----------------
42 * ^ start ^ end
43 *
44 * There are six cases from a to f.
45 *
46 * <----- SCREEN ----->
47 * 0 last
48 * ----------|------------------|----------
49 * CRTCs
50 * a -------
51 * b -------
52 * c --------------------------
53 * d --------
54 * e -------
55 * f -------
56 */
57static int exynos_plane_get_size(int start, unsigned length, unsigned last)
58{
59 int end = start + length;
60 int size = 0;
61
62 if (start <= 0) {
63 if (end > 0)
64 size = min_t(unsigned, end, last);
65 } else if (start <= last) {
66 size = min_t(unsigned, last - start, length);
67 }
68
69 return size;
70}
71
72int exynos_plane_mode_set(struct drm_plane *plane, struct drm_crtc *crtc,
73 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
74 unsigned int crtc_w, unsigned int crtc_h,
75 uint32_t src_x, uint32_t src_y,
76 uint32_t src_w, uint32_t src_h)
77{
78 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
79 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
80 unsigned int actual_w;
81 unsigned int actual_h;
82 int nr;
83 int i;
84
85 nr = exynos_drm_fb_get_buf_cnt(fb);
86 for (i = 0; i < nr; i++) {
87 struct exynos_drm_gem_buf *buffer = exynos_drm_fb_buffer(fb, i);
88
89 if (!buffer) {
90 DRM_DEBUG_KMS("buffer is null\n");
91 return -EFAULT;
92 }
93
94 overlay->dma_addr[i] = buffer->dma_addr;
95
96 DRM_DEBUG_KMS("buffer: %d, dma_addr = 0x%lx\n",
97 i, (unsigned long)overlay->dma_addr[i]);
98 }
99
100 actual_w = exynos_plane_get_size(crtc_x, crtc_w, crtc->mode.hdisplay);
101 actual_h = exynos_plane_get_size(crtc_y, crtc_h, crtc->mode.vdisplay);
102
103 if (crtc_x < 0) {
104 if (actual_w)
105 src_x -= crtc_x;
106 crtc_x = 0;
107 }
108
109 if (crtc_y < 0) {
110 if (actual_h)
111 src_y -= crtc_y;
112 crtc_y = 0;
113 }
114
115 /* set drm framebuffer data. */
116 overlay->fb_x = src_x;
117 overlay->fb_y = src_y;
118 overlay->fb_width = fb->width;
119 overlay->fb_height = fb->height;
120 overlay->src_width = src_w;
121 overlay->src_height = src_h;
122 overlay->bpp = fb->bits_per_pixel;
123 overlay->pitch = fb->pitches[0];
124 overlay->pixel_format = fb->pixel_format;
125
126 /* set overlay range to be displayed. */
127 overlay->crtc_x = crtc_x;
128 overlay->crtc_y = crtc_y;
129 overlay->crtc_width = actual_w;
130 overlay->crtc_height = actual_h;
131
132 /* set drm mode data. */
133 overlay->mode_width = crtc->mode.hdisplay;
134 overlay->mode_height = crtc->mode.vdisplay;
135 overlay->refresh = crtc->mode.vrefresh;
136 overlay->scan_flag = crtc->mode.flags;
137
138 DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
139 overlay->crtc_x, overlay->crtc_y,
140 overlay->crtc_width, overlay->crtc_height);
141
142 exynos_drm_crtc_plane_mode_set(crtc, overlay);
143
144 return 0;
145}
146
147void exynos_plane_commit(struct drm_plane *plane)
148{
149 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
150 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
151
152 exynos_drm_crtc_plane_commit(plane->crtc, overlay->zpos);
153}
154
155void exynos_plane_dpms(struct drm_plane *plane, int mode)
156{
157 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
158 struct exynos_drm_overlay *overlay = &exynos_plane->overlay;
159
160 if (mode == DRM_MODE_DPMS_ON) {
161 if (exynos_plane->enabled)
162 return;
163
164 exynos_drm_crtc_plane_enable(plane->crtc, overlay->zpos);
165 exynos_plane->enabled = true;
166 } else {
167 if (!exynos_plane->enabled)
168 return;
169
170 exynos_drm_crtc_plane_disable(plane->crtc, overlay->zpos);
171 exynos_plane->enabled = false;
172 }
173}
174
175static int
176exynos_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
177 struct drm_framebuffer *fb, int crtc_x, int crtc_y,
178 unsigned int crtc_w, unsigned int crtc_h,
179 uint32_t src_x, uint32_t src_y,
180 uint32_t src_w, uint32_t src_h)
181{
182 int ret;
183
184 ret = exynos_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y,
185 crtc_w, crtc_h, src_x >> 16, src_y >> 16,
186 src_w >> 16, src_h >> 16);
187 if (ret < 0)
188 return ret;
189
190 plane->crtc = crtc;
191
192 exynos_plane_commit(plane);
193 exynos_plane_dpms(plane, DRM_MODE_DPMS_ON);
194
195 return 0;
196}
197
198static int exynos_disable_plane(struct drm_plane *plane)
199{
200 exynos_plane_dpms(plane, DRM_MODE_DPMS_OFF);
201
202 return 0;
203}
204
205static void exynos_plane_destroy(struct drm_plane *plane)
206{
207 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
208
209 exynos_disable_plane(plane);
210 drm_plane_cleanup(plane);
211 kfree(exynos_plane);
212}
213
214static int exynos_plane_set_property(struct drm_plane *plane,
215 struct drm_property *property,
216 uint64_t val)
217{
218 struct drm_device *dev = plane->dev;
219 struct exynos_plane *exynos_plane = to_exynos_plane(plane);
220 struct exynos_drm_private *dev_priv = dev->dev_private;
221
222 if (property == dev_priv->plane_zpos_property) {
223 exynos_plane->overlay.zpos = val;
224 return 0;
225 }
226
227 return -EINVAL;
228}
229
230static struct drm_plane_funcs exynos_plane_funcs = {
231 .update_plane = exynos_update_plane,
232 .disable_plane = exynos_disable_plane,
233 .destroy = exynos_plane_destroy,
234 .set_property = exynos_plane_set_property,
235};
236
237static void exynos_plane_attach_zpos_property(struct drm_plane *plane)
238{
239 struct drm_device *dev = plane->dev;
240 struct exynos_drm_private *dev_priv = dev->dev_private;
241 struct drm_property *prop;
242
243 prop = dev_priv->plane_zpos_property;
244 if (!prop) {
245 prop = drm_property_create_range(dev, 0, "zpos", 0,
246 MAX_PLANE - 1);
247 if (!prop)
248 return;
249
250 dev_priv->plane_zpos_property = prop;
251 }
252
253 drm_object_attach_property(&plane->base, prop, 0);
254}
255
256struct drm_plane *exynos_plane_init(struct drm_device *dev,
257 unsigned long possible_crtcs, bool priv)
258{
259 struct exynos_plane *exynos_plane;
260 int err;
261
262 exynos_plane = kzalloc(sizeof(struct exynos_plane), GFP_KERNEL);
263 if (!exynos_plane)
264 return NULL;
265
266 err = drm_plane_init(dev, &exynos_plane->base, possible_crtcs,
267 &exynos_plane_funcs, formats, ARRAY_SIZE(formats),
268 priv);
269 if (err) {
270 DRM_ERROR("failed to initialize plane\n");
271 kfree(exynos_plane);
272 return NULL;
273 }
274
275 if (priv)
276 exynos_plane->overlay.zpos = DEFAULT_ZPOS;
277 else
278 exynos_plane_attach_zpos_property(&exynos_plane->base);
279
280 return &exynos_plane->base;
281}