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1/*
2 * PATA driver for AT91SAM9260 Static Memory Controller
3 * with CompactFlash interface in True IDE mode
4 *
5 * Copyright (C) 2009 Matyukevich Sergey
6 * 2011 Igor Plyatov
7 *
8 * Based on:
9 * * generic platform driver by Paul Mundt: drivers/ata/pata_platform.c
10 * * pata_at32 driver by Kristoffer Nyborg Gregertsen
11 * * at91_ide driver by Stanislaw Gruszka
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License version 2
15 * as published by the Free Software Foundation.
16 *
17 */
18
19#include <linux/kernel.h>
20#include <linux/module.h>
21#include <linux/blkdev.h>
22#include <linux/gfp.h>
23#include <scsi/scsi_host.h>
24#include <linux/ata.h>
25#include <linux/clk.h>
26#include <linux/libata.h>
27#include <linux/platform_device.h>
28#include <linux/ata_platform.h>
29#include <linux/platform_data/atmel.h>
30
31#include <mach/at91sam9_smc.h>
32#include <asm/gpio.h>
33
34#define DRV_NAME "pata_at91"
35#define DRV_VERSION "0.3"
36
37#define CF_IDE_OFFSET 0x00c00000
38#define CF_ALT_IDE_OFFSET 0x00e00000
39#define CF_IDE_RES_SIZE 0x08
40#define CS_PULSE_MAXIMUM 319
41#define ER_SMC_CALC 1
42#define ER_SMC_RECALC 2
43
44struct at91_ide_info {
45 unsigned long mode;
46 unsigned int cs;
47 struct clk *mck;
48 void __iomem *ide_addr;
49 void __iomem *alt_addr;
50};
51
52/**
53 * struct smc_range - range of valid values for SMC register.
54 */
55struct smc_range {
56 int min;
57 int max;
58};
59
60/**
61 * adjust_smc_value - adjust value for one of SMC registers.
62 * @value: adjusted value
63 * @range: array of SMC ranges with valid values
64 * @size: SMC ranges array size
65 *
66 * This returns the difference between input and output value or negative
67 * in case of invalid input value.
68 * If negative returned, then output value = maximal possible from ranges.
69 */
70static int adjust_smc_value(int *value, struct smc_range *range, int size)
71{
72 int maximum = (range + size - 1)->max;
73 int remainder;
74
75 do {
76 if (*value < range->min) {
77 remainder = range->min - *value;
78 *value = range->min; /* nearest valid value */
79 return remainder;
80 } else if ((range->min <= *value) && (*value <= range->max))
81 return 0;
82
83 range++;
84 } while (--size);
85 *value = maximum;
86
87 return -1; /* invalid value */
88}
89
90/**
91 * calc_smc_vals - calculate SMC register values
92 * @dev: ATA device
93 * @setup: SMC_SETUP register value
94 * @pulse: SMC_PULSE register value
95 * @cycle: SMC_CYCLE register value
96 *
97 * This returns negative in case of invalid values for SMC registers:
98 * -ER_SMC_RECALC - recalculation required for SMC values,
99 * -ER_SMC_CALC - calculation failed (invalid input values).
100 *
101 * SMC use special coding scheme, see "Coding and Range of Timing
102 * Parameters" table from AT91SAM9 datasheets.
103 *
104 * SMC_SETUP = 128*setup[5] + setup[4:0]
105 * SMC_PULSE = 256*pulse[6] + pulse[5:0]
106 * SMC_CYCLE = 256*cycle[8:7] + cycle[6:0]
107 */
108static int calc_smc_vals(struct device *dev,
109 int *setup, int *pulse, int *cycle, int *cs_pulse)
110{
111 int ret_val;
112 int err = 0;
113 struct smc_range range_setup[] = { /* SMC_SETUP valid values */
114 {.min = 0, .max = 31}, /* first range */
115 {.min = 128, .max = 159} /* second range */
116 };
117 struct smc_range range_pulse[] = { /* SMC_PULSE valid values */
118 {.min = 0, .max = 63}, /* first range */
119 {.min = 256, .max = 319} /* second range */
120 };
121 struct smc_range range_cycle[] = { /* SMC_CYCLE valid values */
122 {.min = 0, .max = 127}, /* first range */
123 {.min = 256, .max = 383}, /* second range */
124 {.min = 512, .max = 639}, /* third range */
125 {.min = 768, .max = 895} /* fourth range */
126 };
127
128 ret_val = adjust_smc_value(setup, range_setup, ARRAY_SIZE(range_setup));
129 if (ret_val < 0)
130 dev_warn(dev, "maximal SMC Setup value\n");
131 else
132 *cycle += ret_val;
133
134 ret_val = adjust_smc_value(pulse, range_pulse, ARRAY_SIZE(range_pulse));
135 if (ret_val < 0)
136 dev_warn(dev, "maximal SMC Pulse value\n");
137 else
138 *cycle += ret_val;
139
140 ret_val = adjust_smc_value(cycle, range_cycle, ARRAY_SIZE(range_cycle));
141 if (ret_val < 0)
142 dev_warn(dev, "maximal SMC Cycle value\n");
143
144 *cs_pulse = *cycle;
145 if (*cs_pulse > CS_PULSE_MAXIMUM) {
146 dev_err(dev, "unable to calculate valid SMC settings\n");
147 return -ER_SMC_CALC;
148 }
149
150 ret_val = adjust_smc_value(cs_pulse, range_pulse,
151 ARRAY_SIZE(range_pulse));
152 if (ret_val < 0) {
153 dev_warn(dev, "maximal SMC CS Pulse value\n");
154 } else if (ret_val != 0) {
155 *cycle = *cs_pulse;
156 dev_warn(dev, "SMC Cycle extended\n");
157 err = -ER_SMC_RECALC;
158 }
159
160 return err;
161}
162
163/**
164 * to_smc_format - convert values into SMC format
165 * @setup: SETUP value of SMC Setup Register
166 * @pulse: PULSE value of SMC Pulse Register
167 * @cycle: CYCLE value of SMC Cycle Register
168 * @cs_pulse: NCS_PULSE value of SMC Pulse Register
169 */
170static void to_smc_format(int *setup, int *pulse, int *cycle, int *cs_pulse)
171{
172 *setup = (*setup & 0x1f) | ((*setup & 0x80) >> 2);
173 *pulse = (*pulse & 0x3f) | ((*pulse & 0x100) >> 2);
174 *cycle = (*cycle & 0x7f) | ((*cycle & 0x300) >> 1);
175 *cs_pulse = (*cs_pulse & 0x3f) | ((*cs_pulse & 0x100) >> 2);
176}
177
178static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
179{
180 unsigned long mul;
181
182 /*
183 * cycles = x [nsec] * f [Hz] / 10^9 [ns in sec] =
184 * x * (f / 1_000_000_000) =
185 * x * ((f * 65536) / 1_000_000_000) / 65536 =
186 * x * (((f / 10_000) * 65536) / 100_000) / 65536 =
187 */
188
189 mul = (mck_hz / 10000) << 16;
190 mul /= 100000;
191
192 return (ns * mul + 65536) >> 16; /* rounding */
193}
194
195/**
196 * set_smc_timing - SMC timings setup.
197 * @dev: device
198 * @info: AT91 IDE info
199 * @ata: ATA timings
200 *
201 * Its assumed that write timings are same as read timings,
202 * cs_setup = 0 and cs_pulse = cycle.
203 */
204static void set_smc_timing(struct device *dev, struct ata_device *adev,
205 struct at91_ide_info *info, const struct ata_timing *ata)
206{
207 int ret = 0;
208 int use_iordy;
209 struct sam9_smc_config smc;
210 unsigned int t6z; /* data tristate time in ns */
211 unsigned int cycle; /* SMC Cycle width in MCK ticks */
212 unsigned int setup; /* SMC Setup width in MCK ticks */
213 unsigned int pulse; /* CFIOR and CFIOW pulse width in MCK ticks */
214 unsigned int cs_pulse; /* CS4 or CS5 pulse width in MCK ticks*/
215 unsigned int tdf_cycles; /* SMC TDF MCK ticks */
216 unsigned long mck_hz; /* MCK frequency in Hz */
217
218 t6z = (ata->mode < XFER_PIO_5) ? 30 : 20;
219 mck_hz = clk_get_rate(info->mck);
220 cycle = calc_mck_cycles(ata->cyc8b, mck_hz);
221 setup = calc_mck_cycles(ata->setup, mck_hz);
222 pulse = calc_mck_cycles(ata->act8b, mck_hz);
223 tdf_cycles = calc_mck_cycles(t6z, mck_hz);
224
225 do {
226 ret = calc_smc_vals(dev, &setup, &pulse, &cycle, &cs_pulse);
227 } while (ret == -ER_SMC_RECALC);
228
229 if (ret == -ER_SMC_CALC)
230 dev_err(dev, "Interface may not operate correctly\n");
231
232 dev_dbg(dev, "SMC Setup=%u, Pulse=%u, Cycle=%u, CS Pulse=%u\n",
233 setup, pulse, cycle, cs_pulse);
234 to_smc_format(&setup, &pulse, &cycle, &cs_pulse);
235 /* disable or enable waiting for IORDY signal */
236 use_iordy = ata_pio_need_iordy(adev);
237 if (use_iordy)
238 info->mode |= AT91_SMC_EXNWMODE_READY;
239
240 if (tdf_cycles > 15) {
241 tdf_cycles = 15;
242 dev_warn(dev, "maximal SMC TDF Cycles value\n");
243 }
244
245 dev_dbg(dev, "Use IORDY=%u, TDF Cycles=%u\n", use_iordy, tdf_cycles);
246
247 /* SMC Setup Register */
248 smc.nwe_setup = smc.nrd_setup = setup;
249 smc.ncs_write_setup = smc.ncs_read_setup = 0;
250 /* SMC Pulse Register */
251 smc.nwe_pulse = smc.nrd_pulse = pulse;
252 smc.ncs_write_pulse = smc.ncs_read_pulse = cs_pulse;
253 /* SMC Cycle Register */
254 smc.write_cycle = smc.read_cycle = cycle;
255 /* SMC Mode Register*/
256 smc.tdf_cycles = tdf_cycles;
257 smc.mode = info->mode;
258
259 sam9_smc_configure(0, info->cs, &smc);
260}
261
262static void pata_at91_set_piomode(struct ata_port *ap, struct ata_device *adev)
263{
264 struct at91_ide_info *info = ap->host->private_data;
265 struct ata_timing timing;
266 int ret;
267
268 /* Compute ATA timing and set it to SMC */
269 ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
270 if (ret) {
271 dev_warn(ap->dev, "Failed to compute ATA timing %d, "
272 "set PIO_0 timing\n", ret);
273 timing = *ata_timing_find_mode(XFER_PIO_0);
274 }
275 set_smc_timing(ap->dev, adev, info, &timing);
276}
277
278static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
279 unsigned char *buf, unsigned int buflen, int rw)
280{
281 struct at91_ide_info *info = dev->link->ap->host->private_data;
282 unsigned int consumed;
283 unsigned long flags;
284 struct sam9_smc_config smc;
285
286 local_irq_save(flags);
287 sam9_smc_read_mode(0, info->cs, &smc);
288
289 /* set 16bit mode before writing data */
290 smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_16;
291 sam9_smc_write_mode(0, info->cs, &smc);
292
293 consumed = ata_sff_data_xfer(dev, buf, buflen, rw);
294
295 /* restore 8bit mode after data is written */
296 smc.mode = (smc.mode & ~AT91_SMC_DBW) | AT91_SMC_DBW_8;
297 sam9_smc_write_mode(0, info->cs, &smc);
298
299 local_irq_restore(flags);
300 return consumed;
301}
302
303static struct scsi_host_template pata_at91_sht = {
304 ATA_PIO_SHT(DRV_NAME),
305};
306
307static struct ata_port_operations pata_at91_port_ops = {
308 .inherits = &ata_sff_port_ops,
309
310 .sff_data_xfer = pata_at91_data_xfer_noirq,
311 .set_piomode = pata_at91_set_piomode,
312 .cable_detect = ata_cable_40wire,
313};
314
315static int pata_at91_probe(struct platform_device *pdev)
316{
317 struct at91_cf_data *board = dev_get_platdata(&pdev->dev);
318 struct device *dev = &pdev->dev;
319 struct at91_ide_info *info;
320 struct resource *mem_res;
321 struct ata_host *host;
322 struct ata_port *ap;
323
324 int irq_flags = 0;
325 int irq = 0;
326 int ret;
327
328 /* get platform resources: IO/CTL memories and irq/rst pins */
329
330 if (pdev->num_resources != 1) {
331 dev_err(&pdev->dev, "invalid number of resources\n");
332 return -EINVAL;
333 }
334
335 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
336
337 if (!mem_res) {
338 dev_err(dev, "failed to get mem resource\n");
339 return -EINVAL;
340 }
341
342 irq = board->irq_pin;
343
344 /* init ata host */
345
346 host = ata_host_alloc(dev, 1);
347
348 if (!host)
349 return -ENOMEM;
350
351 ap = host->ports[0];
352 ap->ops = &pata_at91_port_ops;
353 ap->flags |= ATA_FLAG_SLAVE_POSS;
354 ap->pio_mask = ATA_PIO4;
355
356 if (!gpio_is_valid(irq)) {
357 ap->flags |= ATA_FLAG_PIO_POLLING;
358 ata_port_desc(ap, "no IRQ, using PIO polling");
359 }
360
361 info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL);
362
363 if (!info) {
364 dev_err(dev, "failed to allocate memory for private data\n");
365 return -ENOMEM;
366 }
367
368 info->mck = clk_get(NULL, "mck");
369
370 if (IS_ERR(info->mck)) {
371 dev_err(dev, "failed to get access to mck clock\n");
372 return -ENODEV;
373 }
374
375 info->cs = board->chipselect;
376 info->mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
377 AT91_SMC_EXNWMODE_READY | AT91_SMC_BAT_SELECT |
378 AT91_SMC_DBW_8 | AT91_SMC_TDF_(0);
379
380 info->ide_addr = devm_ioremap(dev,
381 mem_res->start + CF_IDE_OFFSET, CF_IDE_RES_SIZE);
382
383 if (!info->ide_addr) {
384 dev_err(dev, "failed to map IO base\n");
385 ret = -ENOMEM;
386 goto err_put;
387 }
388
389 info->alt_addr = devm_ioremap(dev,
390 mem_res->start + CF_ALT_IDE_OFFSET, CF_IDE_RES_SIZE);
391
392 if (!info->alt_addr) {
393 dev_err(dev, "failed to map CTL base\n");
394 ret = -ENOMEM;
395 goto err_put;
396 }
397
398 ap->ioaddr.cmd_addr = info->ide_addr;
399 ap->ioaddr.ctl_addr = info->alt_addr + 0x06;
400 ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr;
401
402 ata_sff_std_ports(&ap->ioaddr);
403
404 ata_port_desc(ap, "mmio cmd 0x%llx ctl 0x%llx",
405 (unsigned long long)mem_res->start + CF_IDE_OFFSET,
406 (unsigned long long)mem_res->start + CF_ALT_IDE_OFFSET);
407
408 host->private_data = info;
409
410 ret = ata_host_activate(host, gpio_is_valid(irq) ? gpio_to_irq(irq) : 0,
411 gpio_is_valid(irq) ? ata_sff_interrupt : NULL,
412 irq_flags, &pata_at91_sht);
413 if (ret)
414 goto err_put;
415
416 return 0;
417
418err_put:
419 clk_put(info->mck);
420 return ret;
421}
422
423static int pata_at91_remove(struct platform_device *pdev)
424{
425 struct ata_host *host = platform_get_drvdata(pdev);
426 struct at91_ide_info *info;
427
428 if (!host)
429 return 0;
430 info = host->private_data;
431
432 ata_host_detach(host);
433
434 if (!info)
435 return 0;
436
437 clk_put(info->mck);
438
439 return 0;
440}
441
442static struct platform_driver pata_at91_driver = {
443 .probe = pata_at91_probe,
444 .remove = pata_at91_remove,
445 .driver = {
446 .name = DRV_NAME,
447 .owner = THIS_MODULE,
448 },
449};
450
451module_platform_driver(pata_at91_driver);
452
453MODULE_LICENSE("GPL");
454MODULE_DESCRIPTION("Driver for CF in True IDE mode on AT91SAM9260 SoC");
455MODULE_AUTHOR("Matyukevich Sergey");
456MODULE_VERSION(DRV_VERSION);
457