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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * S390 low-level entry points.
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 */
10
11#include <linux/export.h>
12#include <linux/init.h>
13#include <linux/linkage.h>
14#include <asm/asm-extable.h>
15#include <asm/alternative-asm.h>
16#include <asm/processor.h>
17#include <asm/cache.h>
18#include <asm/dwarf.h>
19#include <asm/errno.h>
20#include <asm/ptrace.h>
21#include <asm/thread_info.h>
22#include <asm/asm-offsets.h>
23#include <asm/unistd.h>
24#include <asm/page.h>
25#include <asm/sigp.h>
26#include <asm/irq.h>
27#include <asm/vx-insn.h>
28#include <asm/setup.h>
29#include <asm/nmi.h>
30#include <asm/nospec-insn.h>
31
32_LPP_OFFSET = __LC_LPP
33
34 .macro STBEAR address
35 ALTERNATIVE "nop", ".insn s,0xb2010000,\address", 193
36 .endm
37
38 .macro LBEAR address
39 ALTERNATIVE "nop", ".insn s,0xb2000000,\address", 193
40 .endm
41
42 .macro LPSWEY address,lpswe
43 ALTERNATIVE "b \lpswe; nopr", ".insn siy,0xeb0000000071,\address,0", 193
44 .endm
45
46 .macro MBEAR reg
47 ALTERNATIVE "brcl 0,0", __stringify(mvc __PT_LAST_BREAK(8,\reg),__LC_LAST_BREAK), 193
48 .endm
49
50 .macro CHECK_STACK savearea
51#ifdef CONFIG_CHECK_STACK
52 tml %r15,THREAD_SIZE - CONFIG_STACK_GUARD
53 lghi %r14,\savearea
54 jz stack_overflow
55#endif
56 .endm
57
58 .macro CHECK_VMAP_STACK savearea,oklabel
59#ifdef CONFIG_VMAP_STACK
60 lgr %r14,%r15
61 nill %r14,0x10000 - THREAD_SIZE
62 oill %r14,STACK_INIT_OFFSET
63 clg %r14,__LC_KERNEL_STACK
64 je \oklabel
65 clg %r14,__LC_ASYNC_STACK
66 je \oklabel
67 clg %r14,__LC_MCCK_STACK
68 je \oklabel
69 clg %r14,__LC_NODAT_STACK
70 je \oklabel
71 clg %r14,__LC_RESTART_STACK
72 je \oklabel
73 lghi %r14,\savearea
74 j stack_overflow
75#else
76 j \oklabel
77#endif
78 .endm
79
80 /*
81 * The TSTMSK macro generates a test-under-mask instruction by
82 * calculating the memory offset for the specified mask value.
83 * Mask value can be any constant. The macro shifts the mask
84 * value to calculate the memory offset for the test-under-mask
85 * instruction.
86 */
87 .macro TSTMSK addr, mask, size=8, bytepos=0
88 .if (\bytepos < \size) && (\mask >> 8)
89 .if (\mask & 0xff)
90 .error "Mask exceeds byte boundary"
91 .endif
92 TSTMSK \addr, "(\mask >> 8)", \size, "(\bytepos + 1)"
93 .exitm
94 .endif
95 .ifeq \mask
96 .error "Mask must not be zero"
97 .endif
98 off = \size - \bytepos - 1
99 tm off+\addr, \mask
100 .endm
101
102 .macro BPOFF
103 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,12,0", 82
104 .endm
105
106 .macro BPON
107 ALTERNATIVE "nop", ".insn rrf,0xb2e80000,0,0,13,0", 82
108 .endm
109
110 .macro BPENTER tif_ptr,tif_mask
111 ALTERNATIVE "TSTMSK \tif_ptr,\tif_mask; jz .+8; .insn rrf,0xb2e80000,0,0,13,0", \
112 "j .+12; nop; nop", 82
113 .endm
114
115 .macro BPEXIT tif_ptr,tif_mask
116 TSTMSK \tif_ptr,\tif_mask
117 ALTERNATIVE "jz .+8; .insn rrf,0xb2e80000,0,0,12,0", \
118 "jnz .+8; .insn rrf,0xb2e80000,0,0,13,0", 82
119 .endm
120
121#if IS_ENABLED(CONFIG_KVM)
122 /*
123 * The OUTSIDE macro jumps to the provided label in case the value
124 * in the provided register is outside of the provided range. The
125 * macro is useful for checking whether a PSW stored in a register
126 * pair points inside or outside of a block of instructions.
127 * @reg: register to check
128 * @start: start of the range
129 * @end: end of the range
130 * @outside_label: jump here if @reg is outside of [@start..@end)
131 */
132 .macro OUTSIDE reg,start,end,outside_label
133 lgr %r14,\reg
134 larl %r13,\start
135 slgr %r14,%r13
136 clgfrl %r14,.Lrange_size\@
137 jhe \outside_label
138 .section .rodata, "a"
139 .balign 4
140.Lrange_size\@:
141 .long \end - \start
142 .previous
143 .endm
144
145 .macro SIEEXIT
146 lg %r9,__SF_SIE_CONTROL(%r15) # get control block pointer
147 ni __SIE_PROG0C+3(%r9),0xfe # no longer in SIE
148 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
149 larl %r9,sie_exit # skip forward to sie_exit
150 .endm
151#endif
152
153 .macro STACKLEAK_ERASE
154#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
155 brasl %r14,stackleak_erase_on_task_stack
156#endif
157 .endm
158
159 GEN_BR_THUNK %r14
160
161 .section .kprobes.text, "ax"
162.Ldummy:
163 /*
164 * The following nop exists only in order to avoid that the next
165 * symbol starts at the beginning of the kprobes text section.
166 * In that case there would be several symbols at the same address.
167 * E.g. objdump would take an arbitrary symbol when disassembling
168 * the code.
169 * With the added nop in between this cannot happen.
170 */
171 nop 0
172
173/*
174 * Scheduler resume function, called by switch_to
175 * gpr2 = (task_struct *) prev
176 * gpr3 = (task_struct *) next
177 * Returns:
178 * gpr2 = prev
179 */
180SYM_FUNC_START(__switch_to)
181 stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
182 lghi %r4,__TASK_stack
183 lghi %r1,__TASK_thread
184 llill %r5,STACK_INIT_OFFSET
185 stg %r15,__THREAD_ksp(%r1,%r2) # store kernel stack of prev
186 lg %r15,0(%r4,%r3) # start of kernel stack of next
187 agr %r15,%r5 # end of kernel stack of next
188 stg %r3,__LC_CURRENT # store task struct of next
189 stg %r15,__LC_KERNEL_STACK # store end of kernel stack
190 lg %r15,__THREAD_ksp(%r1,%r3) # load kernel stack of next
191 aghi %r3,__TASK_pid
192 mvc __LC_CURRENT_PID(4,%r0),0(%r3) # store pid of next
193 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
194 ALTERNATIVE "nop", "lpp _LPP_OFFSET", 40
195 BR_EX %r14
196SYM_FUNC_END(__switch_to)
197
198#if IS_ENABLED(CONFIG_KVM)
199/*
200 * __sie64a calling convention:
201 * %r2 pointer to sie control block phys
202 * %r3 pointer to sie control block virt
203 * %r4 guest register save area
204 */
205SYM_FUNC_START(__sie64a)
206 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
207 lg %r12,__LC_CURRENT
208 stg %r2,__SF_SIE_CONTROL_PHYS(%r15) # save sie block physical..
209 stg %r3,__SF_SIE_CONTROL(%r15) # ...and virtual addresses
210 stg %r4,__SF_SIE_SAVEAREA(%r15) # save guest register save area
211 xc __SF_SIE_REASON(8,%r15),__SF_SIE_REASON(%r15) # reason code = 0
212 mvc __SF_SIE_FLAGS(8,%r15),__TI_flags(%r12) # copy thread flags
213 lmg %r0,%r13,0(%r4) # load guest gprs 0-13
214 lg %r14,__LC_GMAP # get gmap pointer
215 ltgr %r14,%r14
216 jz .Lsie_gmap
217 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
218.Lsie_gmap:
219 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
220 oi __SIE_PROG0C+3(%r14),1 # we are going into SIE now
221 tm __SIE_PROG20+3(%r14),3 # last exit...
222 jnz .Lsie_skip
223 TSTMSK __LC_CPU_FLAGS,_CIF_FPU
224 jo .Lsie_skip # exit if fp/vx regs changed
225 lg %r14,__SF_SIE_CONTROL_PHYS(%r15) # get sie block phys addr
226 BPEXIT __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST
227.Lsie_entry:
228 sie 0(%r14)
229# Let the next instruction be NOP to avoid triggering a machine check
230# and handling it in a guest as result of the instruction execution.
231 nopr 7
232.Lsie_leave:
233 BPOFF
234 BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST
235.Lsie_skip:
236 lg %r14,__SF_SIE_CONTROL(%r15) # get control block pointer
237 ni __SIE_PROG0C+3(%r14),0xfe # no longer in SIE
238 lctlg %c1,%c1,__LC_KERNEL_ASCE # load primary asce
239.Lsie_done:
240# some program checks are suppressing. C code (e.g. do_protection_exception)
241# will rewind the PSW by the ILC, which is often 4 bytes in case of SIE. There
242# are some corner cases (e.g. runtime instrumentation) where ILC is unpredictable.
243# Other instructions between __sie64a and .Lsie_done should not cause program
244# interrupts. So lets use 3 nops as a landing pad for all possible rewinds.
245.Lrewind_pad6:
246 nopr 7
247.Lrewind_pad4:
248 nopr 7
249.Lrewind_pad2:
250 nopr 7
251SYM_INNER_LABEL(sie_exit, SYM_L_GLOBAL)
252 lg %r14,__SF_SIE_SAVEAREA(%r15) # load guest register save area
253 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
254 xgr %r0,%r0 # clear guest registers to
255 xgr %r1,%r1 # prevent speculative use
256 xgr %r3,%r3
257 xgr %r4,%r4
258 xgr %r5,%r5
259 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
260 lg %r2,__SF_SIE_REASON(%r15) # return exit reason code
261 BR_EX %r14
262.Lsie_fault:
263 lghi %r14,-EFAULT
264 stg %r14,__SF_SIE_REASON(%r15) # set exit reason code
265 j sie_exit
266
267 EX_TABLE(.Lrewind_pad6,.Lsie_fault)
268 EX_TABLE(.Lrewind_pad4,.Lsie_fault)
269 EX_TABLE(.Lrewind_pad2,.Lsie_fault)
270 EX_TABLE(sie_exit,.Lsie_fault)
271SYM_FUNC_END(__sie64a)
272EXPORT_SYMBOL(__sie64a)
273EXPORT_SYMBOL(sie_exit)
274#endif
275
276/*
277 * SVC interrupt handler routine. System calls are synchronous events and
278 * are entered with interrupts disabled.
279 */
280
281SYM_CODE_START(system_call)
282 stpt __LC_SYS_ENTER_TIMER
283 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
284 BPOFF
285 lghi %r14,0
286.Lsysc_per:
287 STBEAR __LC_LAST_BREAK
288 lctlg %c1,%c1,__LC_KERNEL_ASCE
289 lg %r15,__LC_KERNEL_STACK
290 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
291 stmg %r0,%r7,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
292 # clear user controlled register to prevent speculative use
293 xgr %r0,%r0
294 xgr %r1,%r1
295 xgr %r4,%r4
296 xgr %r5,%r5
297 xgr %r6,%r6
298 xgr %r7,%r7
299 xgr %r8,%r8
300 xgr %r9,%r9
301 xgr %r10,%r10
302 xgr %r11,%r11
303 la %r2,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
304 mvc __PT_R8(64,%r2),__LC_SAVE_AREA_SYNC
305 MBEAR %r2
306 lgr %r3,%r14
307 brasl %r14,__do_syscall
308 STACKLEAK_ERASE
309 lctlg %c1,%c1,__LC_USER_ASCE
310 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
311 BPON
312 LBEAR STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15)
313 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
314 stpt __LC_EXIT_TIMER
315 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE
316SYM_CODE_END(system_call)
317
318#
319# a new process exits the kernel with ret_from_fork
320#
321SYM_CODE_START(ret_from_fork)
322 lgr %r3,%r11
323 brasl %r14,__ret_from_fork
324 STACKLEAK_ERASE
325 lctlg %c1,%c1,__LC_USER_ASCE
326 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
327 BPON
328 LBEAR STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15)
329 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
330 stpt __LC_EXIT_TIMER
331 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE
332SYM_CODE_END(ret_from_fork)
333
334/*
335 * Program check handler routine
336 */
337
338SYM_CODE_START(pgm_check_handler)
339 stpt __LC_SYS_ENTER_TIMER
340 BPOFF
341 stmg %r8,%r15,__LC_SAVE_AREA_SYNC
342 lghi %r10,0
343 lmg %r8,%r9,__LC_PGM_OLD_PSW
344 tmhh %r8,0x0001 # coming from user space?
345 jno .Lpgm_skip_asce
346 lctlg %c1,%c1,__LC_KERNEL_ASCE
347 j 3f # -> fault in user space
348.Lpgm_skip_asce:
349#if IS_ENABLED(CONFIG_KVM)
350 # cleanup critical section for program checks in __sie64a
351 OUTSIDE %r9,.Lsie_gmap,.Lsie_done,1f
352 BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST
353 SIEEXIT
354 lghi %r10,_PIF_GUEST_FAULT
355#endif
3561: tmhh %r8,0x4000 # PER bit set in old PSW ?
357 jnz 2f # -> enabled, can't be a double fault
358 tm __LC_PGM_ILC+3,0x80 # check for per exception
359 jnz .Lpgm_svcper # -> single stepped svc
3602: CHECK_STACK __LC_SAVE_AREA_SYNC
361 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
362 # CHECK_VMAP_STACK branches to stack_overflow or 4f
363 CHECK_VMAP_STACK __LC_SAVE_AREA_SYNC,4f
3643: lg %r15,__LC_KERNEL_STACK
3654: la %r11,STACK_FRAME_OVERHEAD(%r15)
366 stg %r10,__PT_FLAGS(%r11)
367 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
368 stmg %r0,%r7,__PT_R0(%r11)
369 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_SYNC
370 mvc __PT_LAST_BREAK(8,%r11),__LC_PGM_LAST_BREAK
371 stmg %r8,%r9,__PT_PSW(%r11)
372
373 # clear user controlled registers to prevent speculative use
374 xgr %r0,%r0
375 xgr %r1,%r1
376 xgr %r3,%r3
377 xgr %r4,%r4
378 xgr %r5,%r5
379 xgr %r6,%r6
380 xgr %r7,%r7
381 lgr %r2,%r11
382 brasl %r14,__do_pgm_check
383 tmhh %r8,0x0001 # returning to user space?
384 jno .Lpgm_exit_kernel
385 STACKLEAK_ERASE
386 lctlg %c1,%c1,__LC_USER_ASCE
387 BPON
388 stpt __LC_EXIT_TIMER
389.Lpgm_exit_kernel:
390 mvc __LC_RETURN_PSW(16),STACK_FRAME_OVERHEAD+__PT_PSW(%r15)
391 LBEAR STACK_FRAME_OVERHEAD+__PT_LAST_BREAK(%r15)
392 lmg %r0,%r15,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
393 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE
394
395#
396# single stepped system call
397#
398.Lpgm_svcper:
399 mvc __LC_RETURN_PSW(8),__LC_SVC_NEW_PSW
400 larl %r14,.Lsysc_per
401 stg %r14,__LC_RETURN_PSW+8
402 lghi %r14,1
403 LBEAR __LC_PGM_LAST_BREAK
404 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE # branch to .Lsysc_per
405SYM_CODE_END(pgm_check_handler)
406
407/*
408 * Interrupt handler macro used for external and IO interrupts.
409 */
410.macro INT_HANDLER name,lc_old_psw,handler
411SYM_CODE_START(\name)
412 stckf __LC_INT_CLOCK
413 stpt __LC_SYS_ENTER_TIMER
414 STBEAR __LC_LAST_BREAK
415 BPOFF
416 stmg %r8,%r15,__LC_SAVE_AREA_ASYNC
417 lmg %r8,%r9,\lc_old_psw
418 tmhh %r8,0x0001 # interrupting from user ?
419 jnz 1f
420#if IS_ENABLED(CONFIG_KVM)
421 OUTSIDE %r9,.Lsie_gmap,.Lsie_done,0f
422 BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST
423 SIEEXIT
424#endif
4250: CHECK_STACK __LC_SAVE_AREA_ASYNC
426 aghi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
427 j 2f
4281: lctlg %c1,%c1,__LC_KERNEL_ASCE
429 lg %r15,__LC_KERNEL_STACK
4302: xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
431 la %r11,STACK_FRAME_OVERHEAD(%r15)
432 stmg %r0,%r7,__PT_R0(%r11)
433 # clear user controlled registers to prevent speculative use
434 xgr %r0,%r0
435 xgr %r1,%r1
436 xgr %r3,%r3
437 xgr %r4,%r4
438 xgr %r5,%r5
439 xgr %r6,%r6
440 xgr %r7,%r7
441 xgr %r10,%r10
442 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
443 mvc __PT_R8(64,%r11),__LC_SAVE_AREA_ASYNC
444 MBEAR %r11
445 stmg %r8,%r9,__PT_PSW(%r11)
446 lgr %r2,%r11 # pass pointer to pt_regs
447 brasl %r14,\handler
448 mvc __LC_RETURN_PSW(16),__PT_PSW(%r11)
449 tmhh %r8,0x0001 # returning to user ?
450 jno 2f
451 STACKLEAK_ERASE
452 lctlg %c1,%c1,__LC_USER_ASCE
453 BPON
454 stpt __LC_EXIT_TIMER
4552: LBEAR __PT_LAST_BREAK(%r11)
456 lmg %r0,%r15,__PT_R0(%r11)
457 LPSWEY __LC_RETURN_PSW,__LC_RETURN_LPSWE
458SYM_CODE_END(\name)
459.endm
460
461INT_HANDLER ext_int_handler,__LC_EXT_OLD_PSW,do_ext_irq
462INT_HANDLER io_int_handler,__LC_IO_OLD_PSW,do_io_irq
463
464/*
465 * Load idle PSW.
466 */
467SYM_FUNC_START(psw_idle)
468 stg %r14,(__SF_GPRS+8*8)(%r15)
469 stg %r3,__SF_EMPTY(%r15)
470 larl %r1,psw_idle_exit
471 stg %r1,__SF_EMPTY+8(%r15)
472 larl %r1,smp_cpu_mtid
473 llgf %r1,0(%r1)
474 ltgr %r1,%r1
475 jz .Lpsw_idle_stcctm
476 .insn rsy,0xeb0000000017,%r1,5,__MT_CYCLES_ENTER(%r2)
477.Lpsw_idle_stcctm:
478 oi __LC_CPU_FLAGS+7,_CIF_ENABLED_WAIT
479 BPON
480 stckf __CLOCK_IDLE_ENTER(%r2)
481 stpt __TIMER_IDLE_ENTER(%r2)
482 lpswe __SF_EMPTY(%r15)
483SYM_INNER_LABEL(psw_idle_exit, SYM_L_GLOBAL)
484 BR_EX %r14
485SYM_FUNC_END(psw_idle)
486
487/*
488 * Machine check handler routines
489 */
490SYM_CODE_START(mcck_int_handler)
491 BPOFF
492 la %r1,4095 # validate r1
493 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # validate cpu timer
494 LBEAR __LC_LAST_BREAK_SAVE_AREA-4095(%r1) # validate bear
495 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA # validate gprs
496 lmg %r8,%r9,__LC_MCK_OLD_PSW
497 TSTMSK __LC_MCCK_CODE,MCCK_CODE_SYSTEM_DAMAGE
498 jo .Lmcck_panic # yes -> rest of mcck code invalid
499 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CR_VALID
500 jno .Lmcck_panic # control registers invalid -> panic
501 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA # validate ctl regs
502 ptlb
503 lghi %r14,__LC_CPU_TIMER_SAVE_AREA
504 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
505 TSTMSK __LC_MCCK_CODE,MCCK_CODE_CPU_TIMER_VALID
506 jo 3f
507 la %r14,__LC_SYS_ENTER_TIMER
508 clc 0(8,%r14),__LC_EXIT_TIMER
509 jl 1f
510 la %r14,__LC_EXIT_TIMER
5111: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
512 jl 2f
513 la %r14,__LC_LAST_UPDATE_TIMER
5142: spt 0(%r14)
515 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
5163: TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_MWP_VALID
517 jno .Lmcck_panic
518 tmhh %r8,0x0001 # interrupting from user ?
519 jnz .Lmcck_user
520 TSTMSK __LC_MCCK_CODE,MCCK_CODE_PSW_IA_VALID
521 jno .Lmcck_panic
522#if IS_ENABLED(CONFIG_KVM)
523 OUTSIDE %r9,.Lsie_gmap,.Lsie_done,.Lmcck_user
524 OUTSIDE %r9,.Lsie_entry,.Lsie_leave,4f
525 oi __LC_CPU_FLAGS+7, _CIF_MCCK_GUEST
5264: BPENTER __SF_SIE_FLAGS(%r15),_TIF_ISOLATE_BP_GUEST
527 SIEEXIT
528#endif
529.Lmcck_user:
530 lg %r15,__LC_MCCK_STACK
531 la %r11,STACK_FRAME_OVERHEAD(%r15)
532 stctg %c1,%c1,__PT_CR1(%r11)
533 lctlg %c1,%c1,__LC_KERNEL_ASCE
534 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
535 lghi %r14,__LC_GPREGS_SAVE_AREA+64
536 stmg %r0,%r7,__PT_R0(%r11)
537 # clear user controlled registers to prevent speculative use
538 xgr %r0,%r0
539 xgr %r1,%r1
540 xgr %r3,%r3
541 xgr %r4,%r4
542 xgr %r5,%r5
543 xgr %r6,%r6
544 xgr %r7,%r7
545 xgr %r10,%r10
546 mvc __PT_R8(64,%r11),0(%r14)
547 stmg %r8,%r9,__PT_PSW(%r11)
548 xc __PT_FLAGS(8,%r11),__PT_FLAGS(%r11)
549 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
550 lgr %r2,%r11 # pass pointer to pt_regs
551 brasl %r14,s390_do_machine_check
552 lctlg %c1,%c1,__PT_CR1(%r11)
553 lmg %r0,%r10,__PT_R0(%r11)
554 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
555 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
556 jno 0f
557 BPON
558 stpt __LC_EXIT_TIMER
5590: ALTERNATIVE "nop", __stringify(lghi %r12,__LC_LAST_BREAK_SAVE_AREA),193
560 LBEAR 0(%r12)
561 lmg %r11,%r15,__PT_R11(%r11)
562 LPSWEY __LC_RETURN_MCCK_PSW,__LC_RETURN_MCCK_LPSWE
563
564.Lmcck_panic:
565 /*
566 * Iterate over all possible CPU addresses in the range 0..0xffff
567 * and stop each CPU using signal processor. Use compare and swap
568 * to allow just one CPU-stopper and prevent concurrent CPUs from
569 * stopping each other while leaving the others running.
570 */
571 lhi %r5,0
572 lhi %r6,1
573 larl %r7,stop_lock
574 cs %r5,%r6,0(%r7) # single CPU-stopper only
575 jnz 4f
576 larl %r7,this_cpu
577 stap 0(%r7) # this CPU address
578 lh %r4,0(%r7)
579 nilh %r4,0
580 lhi %r0,1
581 sll %r0,16 # CPU counter
582 lhi %r3,0 # next CPU address
5830: cr %r3,%r4
584 je 2f
5851: sigp %r1,%r3,SIGP_STOP # stop next CPU
586 brc SIGP_CC_BUSY,1b
5872: ahi %r3,1
588 brct %r0,0b
5893: sigp %r1,%r4,SIGP_STOP # stop this CPU
590 brc SIGP_CC_BUSY,3b
5914: j 4b
592SYM_CODE_END(mcck_int_handler)
593
594SYM_CODE_START(restart_int_handler)
595 ALTERNATIVE "nop", "lpp _LPP_OFFSET", 40
596 stg %r15,__LC_SAVE_AREA_RESTART
597 TSTMSK __LC_RESTART_FLAGS,RESTART_FLAG_CTLREGS,4
598 jz 0f
599 lctlg %c0,%c15,__LC_CREGS_SAVE_AREA
6000: larl %r15,daton_psw
601 lpswe 0(%r15) # turn dat on, keep irqs off
602.Ldaton:
603 lg %r15,__LC_RESTART_STACK
604 xc STACK_FRAME_OVERHEAD(__PT_SIZE,%r15),STACK_FRAME_OVERHEAD(%r15)
605 stmg %r0,%r14,STACK_FRAME_OVERHEAD+__PT_R0(%r15)
606 mvc STACK_FRAME_OVERHEAD+__PT_R15(8,%r15),__LC_SAVE_AREA_RESTART
607 mvc STACK_FRAME_OVERHEAD+__PT_PSW(16,%r15),__LC_RST_OLD_PSW
608 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
609 lg %r1,__LC_RESTART_FN # load fn, parm & source cpu
610 lg %r2,__LC_RESTART_DATA
611 lgf %r3,__LC_RESTART_SOURCE
612 ltgr %r3,%r3 # test source cpu address
613 jm 1f # negative -> skip source stop
6140: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
615 brc 10,0b # wait for status stored
6161: basr %r14,%r1 # call function
617 stap __SF_EMPTY(%r15) # store cpu address
618 llgh %r3,__SF_EMPTY(%r15)
6192: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
620 brc 2,2b
6213: j 3b
622SYM_CODE_END(restart_int_handler)
623
624 .section .kprobes.text, "ax"
625
626#if defined(CONFIG_CHECK_STACK) || defined(CONFIG_VMAP_STACK)
627/*
628 * The synchronous or the asynchronous stack overflowed. We are dead.
629 * No need to properly save the registers, we are going to panic anyway.
630 * Setup a pt_regs so that show_trace can provide a good call trace.
631 */
632SYM_CODE_START(stack_overflow)
633 lg %r15,__LC_NODAT_STACK # change to panic stack
634 la %r11,STACK_FRAME_OVERHEAD(%r15)
635 stmg %r0,%r7,__PT_R0(%r11)
636 stmg %r8,%r9,__PT_PSW(%r11)
637 mvc __PT_R8(64,%r11),0(%r14)
638 stg %r10,__PT_ORIG_GPR2(%r11) # store last break to orig_gpr2
639 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
640 lgr %r2,%r11 # pass pointer to pt_regs
641 jg kernel_stack_overflow
642SYM_CODE_END(stack_overflow)
643#endif
644
645 .section .data, "aw"
646 .balign 4
647SYM_DATA_LOCAL(stop_lock, .long 0)
648SYM_DATA_LOCAL(this_cpu, .short 0)
649 .balign 8
650SYM_DATA_START_LOCAL(daton_psw)
651 .quad PSW_KERNEL_BITS
652 .quad .Ldaton
653SYM_DATA_END(daton_psw)
654
655 .section .rodata, "a"
656#define SYSCALL(esame,emu) .quad __s390x_ ## esame
657SYM_DATA_START(sys_call_table)
658#include "asm/syscall_table.h"
659SYM_DATA_END(sys_call_table)
660#undef SYSCALL
661
662#ifdef CONFIG_COMPAT
663
664#define SYSCALL(esame,emu) .quad __s390_ ## emu
665SYM_DATA_START(sys_call_table_emu)
666#include "asm/syscall_table.h"
667SYM_DATA_END(sys_call_table_emu)
668#undef SYSCALL
669#endif
1/*
2 * S390 low-level entry points.
3 *
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
6 * Hartmut Penner (hp@de.ibm.com),
7 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
8 * Heiko Carstens <heiko.carstens@de.ibm.com>
9 */
10
11#include <linux/init.h>
12#include <linux/linkage.h>
13#include <asm/cache.h>
14#include <asm/errno.h>
15#include <asm/ptrace.h>
16#include <asm/thread_info.h>
17#include <asm/asm-offsets.h>
18#include <asm/unistd.h>
19#include <asm/page.h>
20#include <asm/sigp.h>
21#include <asm/irq.h>
22
23__PT_R0 = __PT_GPRS
24__PT_R1 = __PT_GPRS + 4
25__PT_R2 = __PT_GPRS + 8
26__PT_R3 = __PT_GPRS + 12
27__PT_R4 = __PT_GPRS + 16
28__PT_R5 = __PT_GPRS + 20
29__PT_R6 = __PT_GPRS + 24
30__PT_R7 = __PT_GPRS + 28
31__PT_R8 = __PT_GPRS + 32
32__PT_R9 = __PT_GPRS + 36
33__PT_R10 = __PT_GPRS + 40
34__PT_R11 = __PT_GPRS + 44
35__PT_R12 = __PT_GPRS + 48
36__PT_R13 = __PT_GPRS + 524
37__PT_R14 = __PT_GPRS + 56
38__PT_R15 = __PT_GPRS + 60
39
40_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
41 _TIF_MCCK_PENDING | _TIF_PER_TRAP | _TIF_ASCE)
42_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
43 _TIF_MCCK_PENDING | _TIF_ASCE)
44_TIF_TRACE = (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | _TIF_SECCOMP | \
45 _TIF_SYSCALL_TRACEPOINT)
46_TIF_TRANSFER = (_TIF_MCCK_PENDING | _TIF_TLB_WAIT)
47
48STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
49STACK_SIZE = 1 << STACK_SHIFT
50STACK_INIT = STACK_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE
51
52#define BASED(name) name-system_call(%r13)
53
54 .macro TRACE_IRQS_ON
55#ifdef CONFIG_TRACE_IRQFLAGS
56 basr %r2,%r0
57 l %r1,BASED(.Lhardirqs_on)
58 basr %r14,%r1 # call trace_hardirqs_on_caller
59#endif
60 .endm
61
62 .macro TRACE_IRQS_OFF
63#ifdef CONFIG_TRACE_IRQFLAGS
64 basr %r2,%r0
65 l %r1,BASED(.Lhardirqs_off)
66 basr %r14,%r1 # call trace_hardirqs_off_caller
67#endif
68 .endm
69
70 .macro LOCKDEP_SYS_EXIT
71#ifdef CONFIG_LOCKDEP
72 tm __PT_PSW+1(%r11),0x01 # returning to user ?
73 jz .+10
74 l %r1,BASED(.Llockdep_sys_exit)
75 basr %r14,%r1 # call lockdep_sys_exit
76#endif
77 .endm
78
79 .macro CHECK_STACK stacksize,savearea
80#ifdef CONFIG_CHECK_STACK
81 tml %r15,\stacksize - CONFIG_STACK_GUARD
82 la %r14,\savearea
83 jz stack_overflow
84#endif
85 .endm
86
87 .macro SWITCH_ASYNC savearea,stack,shift
88 tmh %r8,0x0001 # interrupting from user ?
89 jnz 1f
90 lr %r14,%r9
91 sl %r14,BASED(.Lcritical_start)
92 cl %r14,BASED(.Lcritical_length)
93 jhe 0f
94 la %r11,\savearea # inside critical section, do cleanup
95 bras %r14,cleanup_critical
96 tmh %r8,0x0001 # retest problem state after cleanup
97 jnz 1f
980: l %r14,\stack # are we already on the target stack?
99 slr %r14,%r15
100 sra %r14,\shift
101 jnz 1f
102 CHECK_STACK 1<<\shift,\savearea
103 ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
104 j 2f
1051: l %r15,\stack # load target stack
1062: la %r11,STACK_FRAME_OVERHEAD(%r15)
107 .endm
108
109 .macro ADD64 high,low,timer
110 al \high,\timer
111 al \low,4+\timer
112 brc 12,.+8
113 ahi \high,1
114 .endm
115
116 .macro SUB64 high,low,timer
117 sl \high,\timer
118 sl \low,4+\timer
119 brc 3,.+8
120 ahi \high,-1
121 .endm
122
123 .macro UPDATE_VTIME high,low,enter_timer
124 lm \high,\low,__LC_EXIT_TIMER
125 SUB64 \high,\low,\enter_timer
126 ADD64 \high,\low,__LC_USER_TIMER
127 stm \high,\low,__LC_USER_TIMER
128 lm \high,\low,__LC_LAST_UPDATE_TIMER
129 SUB64 \high,\low,__LC_EXIT_TIMER
130 ADD64 \high,\low,__LC_SYSTEM_TIMER
131 stm \high,\low,__LC_SYSTEM_TIMER
132 mvc __LC_LAST_UPDATE_TIMER(8),\enter_timer
133 .endm
134
135 .macro REENABLE_IRQS
136 st %r8,__LC_RETURN_PSW
137 ni __LC_RETURN_PSW,0xbf
138 ssm __LC_RETURN_PSW
139 .endm
140
141 .section .kprobes.text, "ax"
142
143/*
144 * Scheduler resume function, called by switch_to
145 * gpr2 = (task_struct *) prev
146 * gpr3 = (task_struct *) next
147 * Returns:
148 * gpr2 = prev
149 */
150ENTRY(__switch_to)
151 stm %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
152 st %r15,__THREAD_ksp(%r2) # store kernel stack of prev
153 l %r4,__THREAD_info(%r2) # get thread_info of prev
154 l %r5,__THREAD_info(%r3) # get thread_info of next
155 lr %r15,%r5
156 ahi %r15,STACK_INIT # end of kernel stack of next
157 st %r3,__LC_CURRENT # store task struct of next
158 st %r5,__LC_THREAD_INFO # store thread info of next
159 st %r15,__LC_KERNEL_STACK # store end of kernel stack
160 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
161 mvc __LC_CURRENT_PID(4,%r0),__TASK_pid(%r3) # store pid of next
162 l %r15,__THREAD_ksp(%r3) # load kernel stack of next
163 lhi %r6,_TIF_TRANSFER # transfer TIF bits
164 n %r6,__TI_flags(%r4) # isolate TIF bits
165 jz 0f
166 o %r6,__TI_flags(%r5) # set TIF bits of next
167 st %r6,__TI_flags(%r5)
168 ni __TI_flags+3(%r4),255-_TIF_TRANSFER # clear TIF bits of prev
1690: lm %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
170 br %r14
171
172__critical_start:
173/*
174 * SVC interrupt handler routine. System calls are synchronous events and
175 * are executed with interrupts enabled.
176 */
177
178ENTRY(system_call)
179 stpt __LC_SYNC_ENTER_TIMER
180sysc_stm:
181 stm %r8,%r15,__LC_SAVE_AREA_SYNC
182 l %r12,__LC_THREAD_INFO
183 l %r13,__LC_SVC_NEW_PSW+4
184sysc_per:
185 l %r15,__LC_KERNEL_STACK
186 la %r11,STACK_FRAME_OVERHEAD(%r15) # pointer to pt_regs
187sysc_vtime:
188 UPDATE_VTIME %r8,%r9,__LC_SYNC_ENTER_TIMER
189 stm %r0,%r7,__PT_R0(%r11)
190 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_SYNC
191 mvc __PT_PSW(8,%r11),__LC_SVC_OLD_PSW
192 mvc __PT_INT_CODE(4,%r11),__LC_SVC_ILC
193sysc_do_svc:
194 oi __TI_flags+3(%r12),_TIF_SYSCALL
195 l %r10,__TI_sysc_table(%r12) # 31 bit system call table
196 lh %r8,__PT_INT_CODE+2(%r11)
197 sla %r8,2 # shift and test for svc0
198 jnz sysc_nr_ok
199 # svc 0: system call number in %r1
200 cl %r1,BASED(.Lnr_syscalls)
201 jnl sysc_nr_ok
202 sth %r1,__PT_INT_CODE+2(%r11)
203 lr %r8,%r1
204 sla %r8,2
205sysc_nr_ok:
206 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
207 st %r2,__PT_ORIG_GPR2(%r11)
208 st %r7,STACK_FRAME_OVERHEAD(%r15)
209 l %r9,0(%r8,%r10) # get system call addr.
210 tm __TI_flags+2(%r12),_TIF_TRACE >> 8
211 jnz sysc_tracesys
212 basr %r14,%r9 # call sys_xxxx
213 st %r2,__PT_R2(%r11) # store return value
214
215sysc_return:
216 LOCKDEP_SYS_EXIT
217sysc_tif:
218 tm __PT_PSW+1(%r11),0x01 # returning to user ?
219 jno sysc_restore
220 tm __TI_flags+3(%r12),_TIF_WORK_SVC
221 jnz sysc_work # check for work
222 ni __TI_flags+3(%r12),255-_TIF_SYSCALL
223sysc_restore:
224 mvc __LC_RETURN_PSW(8),__PT_PSW(%r11)
225 stpt __LC_EXIT_TIMER
226 lm %r0,%r15,__PT_R0(%r11)
227 lpsw __LC_RETURN_PSW
228sysc_done:
229
230#
231# One of the work bits is on. Find out which one.
232#
233sysc_work:
234 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
235 jo sysc_mcck_pending
236 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
237 jo sysc_reschedule
238 tm __TI_flags+3(%r12),_TIF_PER_TRAP
239 jo sysc_singlestep
240 tm __TI_flags+3(%r12),_TIF_SIGPENDING
241 jo sysc_sigpending
242 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
243 jo sysc_notify_resume
244 tm __TI_flags+3(%r12),_TIF_ASCE
245 jo sysc_uaccess
246 j sysc_return # beware of critical section cleanup
247
248#
249# _TIF_NEED_RESCHED is set, call schedule
250#
251sysc_reschedule:
252 l %r1,BASED(.Lschedule)
253 la %r14,BASED(sysc_return)
254 br %r1 # call schedule
255
256#
257# _TIF_MCCK_PENDING is set, call handler
258#
259sysc_mcck_pending:
260 l %r1,BASED(.Lhandle_mcck)
261 la %r14,BASED(sysc_return)
262 br %r1 # TIF bit will be cleared by handler
263
264#
265# _TIF_ASCE is set, load user space asce
266#
267sysc_uaccess:
268 ni __TI_flags+3(%r12),255-_TIF_ASCE
269 lctl %c1,%c1,__LC_USER_ASCE # load primary asce
270 j sysc_return
271
272#
273# _TIF_SIGPENDING is set, call do_signal
274#
275sysc_sigpending:
276 lr %r2,%r11 # pass pointer to pt_regs
277 l %r1,BASED(.Ldo_signal)
278 basr %r14,%r1 # call do_signal
279 tm __TI_flags+3(%r12),_TIF_SYSCALL
280 jno sysc_return
281 lm %r2,%r7,__PT_R2(%r11) # load svc arguments
282 l %r10,__TI_sysc_table(%r12) # 31 bit system call table
283 xr %r8,%r8 # svc 0 returns -ENOSYS
284 clc __PT_INT_CODE+2(2,%r11),BASED(.Lnr_syscalls+2)
285 jnl sysc_nr_ok # invalid svc number -> do svc 0
286 lh %r8,__PT_INT_CODE+2(%r11) # load new svc number
287 sla %r8,2
288 j sysc_nr_ok # restart svc
289
290#
291# _TIF_NOTIFY_RESUME is set, call do_notify_resume
292#
293sysc_notify_resume:
294 lr %r2,%r11 # pass pointer to pt_regs
295 l %r1,BASED(.Ldo_notify_resume)
296 la %r14,BASED(sysc_return)
297 br %r1 # call do_notify_resume
298
299#
300# _TIF_PER_TRAP is set, call do_per_trap
301#
302sysc_singlestep:
303 ni __TI_flags+3(%r12),255-_TIF_PER_TRAP
304 lr %r2,%r11 # pass pointer to pt_regs
305 l %r1,BASED(.Ldo_per_trap)
306 la %r14,BASED(sysc_return)
307 br %r1 # call do_per_trap
308
309#
310# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
311# and after the system call
312#
313sysc_tracesys:
314 l %r1,BASED(.Ltrace_enter)
315 lr %r2,%r11 # pass pointer to pt_regs
316 la %r3,0
317 xr %r0,%r0
318 icm %r0,3,__PT_INT_CODE+2(%r11)
319 st %r0,__PT_R2(%r11)
320 basr %r14,%r1 # call do_syscall_trace_enter
321 cl %r2,BASED(.Lnr_syscalls)
322 jnl sysc_tracenogo
323 lr %r8,%r2
324 sll %r8,2
325 l %r9,0(%r8,%r10)
326sysc_tracego:
327 lm %r3,%r7,__PT_R3(%r11)
328 st %r7,STACK_FRAME_OVERHEAD(%r15)
329 l %r2,__PT_ORIG_GPR2(%r11)
330 basr %r14,%r9 # call sys_xxx
331 st %r2,__PT_R2(%r11) # store return value
332sysc_tracenogo:
333 tm __TI_flags+2(%r12),_TIF_TRACE >> 8
334 jz sysc_return
335 l %r1,BASED(.Ltrace_exit)
336 lr %r2,%r11 # pass pointer to pt_regs
337 la %r14,BASED(sysc_return)
338 br %r1 # call do_syscall_trace_exit
339
340#
341# a new process exits the kernel with ret_from_fork
342#
343ENTRY(ret_from_fork)
344 la %r11,STACK_FRAME_OVERHEAD(%r15)
345 l %r12,__LC_THREAD_INFO
346 l %r13,__LC_SVC_NEW_PSW+4
347 l %r1,BASED(.Lschedule_tail)
348 basr %r14,%r1 # call schedule_tail
349 TRACE_IRQS_ON
350 ssm __LC_SVC_NEW_PSW # reenable interrupts
351 tm __PT_PSW+1(%r11),0x01 # forking a kernel thread ?
352 jne sysc_tracenogo
353 # it's a kernel thread
354 lm %r9,%r10,__PT_R9(%r11) # load gprs
355ENTRY(kernel_thread_starter)
356 la %r2,0(%r10)
357 basr %r14,%r9
358 j sysc_tracenogo
359
360/*
361 * Program check handler routine
362 */
363
364ENTRY(pgm_check_handler)
365 stpt __LC_SYNC_ENTER_TIMER
366 stm %r8,%r15,__LC_SAVE_AREA_SYNC
367 l %r12,__LC_THREAD_INFO
368 l %r13,__LC_SVC_NEW_PSW+4
369 lm %r8,%r9,__LC_PGM_OLD_PSW
370 tmh %r8,0x0001 # test problem state bit
371 jnz 1f # -> fault in user space
372 tmh %r8,0x4000 # PER bit set in old PSW ?
373 jnz 0f # -> enabled, can't be a double fault
374 tm __LC_PGM_ILC+3,0x80 # check for per exception
375 jnz pgm_svcper # -> single stepped svc
3760: CHECK_STACK STACK_SIZE,__LC_SAVE_AREA_SYNC
377 ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
378 j 2f
3791: UPDATE_VTIME %r14,%r15,__LC_SYNC_ENTER_TIMER
380 l %r15,__LC_KERNEL_STACK
3812: la %r11,STACK_FRAME_OVERHEAD(%r15)
382 stm %r0,%r7,__PT_R0(%r11)
383 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_SYNC
384 stm %r8,%r9,__PT_PSW(%r11)
385 mvc __PT_INT_CODE(4,%r11),__LC_PGM_ILC
386 mvc __PT_INT_PARM_LONG(4,%r11),__LC_TRANS_EXC_CODE
387 tm __LC_PGM_ILC+3,0x80 # check for per exception
388 jz 0f
389 l %r1,__TI_task(%r12)
390 tmh %r8,0x0001 # kernel per event ?
391 jz pgm_kprobe
392 oi __TI_flags+3(%r12),_TIF_PER_TRAP
393 mvc __THREAD_per_address(4,%r1),__LC_PER_ADDRESS
394 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE
395 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID
3960: REENABLE_IRQS
397 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
398 l %r1,BASED(.Ljump_table)
399 la %r10,0x7f
400 n %r10,__PT_INT_CODE(%r11)
401 je sysc_return
402 sll %r10,2
403 l %r1,0(%r10,%r1) # load address of handler routine
404 lr %r2,%r11 # pass pointer to pt_regs
405 basr %r14,%r1 # branch to interrupt-handler
406 j sysc_return
407
408#
409# PER event in supervisor state, must be kprobes
410#
411pgm_kprobe:
412 REENABLE_IRQS
413 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
414 l %r1,BASED(.Ldo_per_trap)
415 lr %r2,%r11 # pass pointer to pt_regs
416 basr %r14,%r1 # call do_per_trap
417 j sysc_return
418
419#
420# single stepped system call
421#
422pgm_svcper:
423 oi __TI_flags+3(%r12),_TIF_PER_TRAP
424 mvc __LC_RETURN_PSW(4),__LC_SVC_NEW_PSW
425 mvc __LC_RETURN_PSW+4(4),BASED(.Lsysc_per)
426 lpsw __LC_RETURN_PSW # branch to sysc_per and enable irqs
427
428/*
429 * IO interrupt handler routine
430 */
431
432ENTRY(io_int_handler)
433 stck __LC_INT_CLOCK
434 stpt __LC_ASYNC_ENTER_TIMER
435 stm %r8,%r15,__LC_SAVE_AREA_ASYNC
436 l %r12,__LC_THREAD_INFO
437 l %r13,__LC_SVC_NEW_PSW+4
438 lm %r8,%r9,__LC_IO_OLD_PSW
439 tmh %r8,0x0001 # interrupting from user ?
440 jz io_skip
441 UPDATE_VTIME %r14,%r15,__LC_ASYNC_ENTER_TIMER
442io_skip:
443 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT
444 stm %r0,%r7,__PT_R0(%r11)
445 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_ASYNC
446 stm %r8,%r9,__PT_PSW(%r11)
447 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
448 TRACE_IRQS_OFF
449 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
450io_loop:
451 l %r1,BASED(.Ldo_IRQ)
452 lr %r2,%r11 # pass pointer to pt_regs
453 lhi %r3,IO_INTERRUPT
454 tm __PT_INT_CODE+8(%r11),0x80 # adapter interrupt ?
455 jz io_call
456 lhi %r3,THIN_INTERRUPT
457io_call:
458 basr %r14,%r1 # call do_IRQ
459 tm __LC_MACHINE_FLAGS+2,0x10 # MACHINE_FLAG_LPAR
460 jz io_return
461 tpi 0
462 jz io_return
463 mvc __PT_INT_CODE(12,%r11),__LC_SUBCHANNEL_ID
464 j io_loop
465io_return:
466 LOCKDEP_SYS_EXIT
467 TRACE_IRQS_ON
468io_tif:
469 tm __TI_flags+3(%r12),_TIF_WORK_INT
470 jnz io_work # there is work to do (signals etc.)
471io_restore:
472 mvc __LC_RETURN_PSW(8),__PT_PSW(%r11)
473 stpt __LC_EXIT_TIMER
474 lm %r0,%r15,__PT_R0(%r11)
475 lpsw __LC_RETURN_PSW
476io_done:
477
478#
479# There is work todo, find out in which context we have been interrupted:
480# 1) if we return to user space we can do all _TIF_WORK_INT work
481# 2) if we return to kernel code and preemptive scheduling is enabled check
482# the preemption counter and if it is zero call preempt_schedule_irq
483# Before any work can be done, a switch to the kernel stack is required.
484#
485io_work:
486 tm __PT_PSW+1(%r11),0x01 # returning to user ?
487 jo io_work_user # yes -> do resched & signal
488#ifdef CONFIG_PREEMPT
489 # check for preemptive scheduling
490 icm %r0,15,__TI_precount(%r12)
491 jnz io_restore # preemption disabled
492 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
493 jno io_restore
494 # switch to kernel stack
495 l %r1,__PT_R15(%r11)
496 ahi %r1,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
497 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
498 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1)
499 la %r11,STACK_FRAME_OVERHEAD(%r1)
500 lr %r15,%r1
501 # TRACE_IRQS_ON already done at io_return, call
502 # TRACE_IRQS_OFF to keep things symmetrical
503 TRACE_IRQS_OFF
504 l %r1,BASED(.Lpreempt_irq)
505 basr %r14,%r1 # call preempt_schedule_irq
506 j io_return
507#else
508 j io_restore
509#endif
510
511#
512# Need to do work before returning to userspace, switch to kernel stack
513#
514io_work_user:
515 l %r1,__LC_KERNEL_STACK
516 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
517 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1)
518 la %r11,STACK_FRAME_OVERHEAD(%r1)
519 lr %r15,%r1
520
521#
522# One of the work bits is on. Find out which one.
523# Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
524# and _TIF_MCCK_PENDING
525#
526io_work_tif:
527 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
528 jo io_mcck_pending
529 tm __TI_flags+3(%r12),_TIF_NEED_RESCHED
530 jo io_reschedule
531 tm __TI_flags+3(%r12),_TIF_SIGPENDING
532 jo io_sigpending
533 tm __TI_flags+3(%r12),_TIF_NOTIFY_RESUME
534 jo io_notify_resume
535 tm __TI_flags+3(%r12),_TIF_ASCE
536 jo io_uaccess
537 j io_return # beware of critical section cleanup
538
539#
540# _TIF_MCCK_PENDING is set, call handler
541#
542io_mcck_pending:
543 # TRACE_IRQS_ON already done at io_return
544 l %r1,BASED(.Lhandle_mcck)
545 basr %r14,%r1 # TIF bit will be cleared by handler
546 TRACE_IRQS_OFF
547 j io_return
548
549#
550# _TIF_ASCE is set, load user space asce
551#
552io_uaccess:
553 ni __TI_flags+3(%r12),255-_TIF_ASCE
554 lctl %c1,%c1,__LC_USER_ASCE # load primary asce
555 j io_return
556
557#
558# _TIF_NEED_RESCHED is set, call schedule
559#
560io_reschedule:
561 # TRACE_IRQS_ON already done at io_return
562 l %r1,BASED(.Lschedule)
563 ssm __LC_SVC_NEW_PSW # reenable interrupts
564 basr %r14,%r1 # call scheduler
565 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
566 TRACE_IRQS_OFF
567 j io_return
568
569#
570# _TIF_SIGPENDING is set, call do_signal
571#
572io_sigpending:
573 # TRACE_IRQS_ON already done at io_return
574 l %r1,BASED(.Ldo_signal)
575 ssm __LC_SVC_NEW_PSW # reenable interrupts
576 lr %r2,%r11 # pass pointer to pt_regs
577 basr %r14,%r1 # call do_signal
578 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
579 TRACE_IRQS_OFF
580 j io_return
581
582#
583# _TIF_SIGPENDING is set, call do_signal
584#
585io_notify_resume:
586 # TRACE_IRQS_ON already done at io_return
587 l %r1,BASED(.Ldo_notify_resume)
588 ssm __LC_SVC_NEW_PSW # reenable interrupts
589 lr %r2,%r11 # pass pointer to pt_regs
590 basr %r14,%r1 # call do_notify_resume
591 ssm __LC_PGM_NEW_PSW # disable I/O and ext. interrupts
592 TRACE_IRQS_OFF
593 j io_return
594
595/*
596 * External interrupt handler routine
597 */
598
599ENTRY(ext_int_handler)
600 stck __LC_INT_CLOCK
601 stpt __LC_ASYNC_ENTER_TIMER
602 stm %r8,%r15,__LC_SAVE_AREA_ASYNC
603 l %r12,__LC_THREAD_INFO
604 l %r13,__LC_SVC_NEW_PSW+4
605 lm %r8,%r9,__LC_EXT_OLD_PSW
606 tmh %r8,0x0001 # interrupting from user ?
607 jz ext_skip
608 UPDATE_VTIME %r14,%r15,__LC_ASYNC_ENTER_TIMER
609ext_skip:
610 SWITCH_ASYNC __LC_SAVE_AREA_ASYNC,__LC_ASYNC_STACK,STACK_SHIFT
611 stm %r0,%r7,__PT_R0(%r11)
612 mvc __PT_R8(32,%r11),__LC_SAVE_AREA_ASYNC
613 stm %r8,%r9,__PT_PSW(%r11)
614 mvc __PT_INT_CODE(4,%r11),__LC_EXT_CPU_ADDR
615 mvc __PT_INT_PARM(4,%r11),__LC_EXT_PARAMS
616 TRACE_IRQS_OFF
617 l %r1,BASED(.Ldo_IRQ)
618 lr %r2,%r11 # pass pointer to pt_regs
619 lhi %r3,EXT_INTERRUPT
620 basr %r14,%r1 # call do_IRQ
621 j io_return
622
623/*
624 * Load idle PSW. The second "half" of this function is in cleanup_idle.
625 */
626ENTRY(psw_idle)
627 st %r3,__SF_EMPTY(%r15)
628 basr %r1,0
629 la %r1,psw_idle_lpsw+4-.(%r1)
630 st %r1,__SF_EMPTY+4(%r15)
631 oi __SF_EMPTY+4(%r15),0x80
632 stck __CLOCK_IDLE_ENTER(%r2)
633 stpt __TIMER_IDLE_ENTER(%r2)
634psw_idle_lpsw:
635 lpsw __SF_EMPTY(%r15)
636 br %r14
637psw_idle_end:
638
639__critical_end:
640
641/*
642 * Machine check handler routines
643 */
644
645ENTRY(mcck_int_handler)
646 stck __LC_MCCK_CLOCK
647 spt __LC_CPU_TIMER_SAVE_AREA # revalidate cpu timer
648 lm %r0,%r15,__LC_GPREGS_SAVE_AREA # revalidate gprs
649 l %r12,__LC_THREAD_INFO
650 l %r13,__LC_SVC_NEW_PSW+4
651 lm %r8,%r9,__LC_MCK_OLD_PSW
652 tm __LC_MCCK_CODE,0x80 # system damage?
653 jo mcck_panic # yes -> rest of mcck code invalid
654 la %r14,__LC_CPU_TIMER_SAVE_AREA
655 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
656 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
657 jo 3f
658 la %r14,__LC_SYNC_ENTER_TIMER
659 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
660 jl 0f
661 la %r14,__LC_ASYNC_ENTER_TIMER
6620: clc 0(8,%r14),__LC_EXIT_TIMER
663 jl 1f
664 la %r14,__LC_EXIT_TIMER
6651: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
666 jl 2f
667 la %r14,__LC_LAST_UPDATE_TIMER
6682: spt 0(%r14)
669 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
6703: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
671 jno mcck_panic # no -> skip cleanup critical
672 tm %r8,0x0001 # interrupting from user ?
673 jz mcck_skip
674 UPDATE_VTIME %r14,%r15,__LC_MCCK_ENTER_TIMER
675mcck_skip:
676 SWITCH_ASYNC __LC_GPREGS_SAVE_AREA+32,__LC_PANIC_STACK,PAGE_SHIFT
677 stm %r0,%r7,__PT_R0(%r11)
678 mvc __PT_R8(32,%r11),__LC_GPREGS_SAVE_AREA+32
679 stm %r8,%r9,__PT_PSW(%r11)
680 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
681 l %r1,BASED(.Ldo_machine_check)
682 lr %r2,%r11 # pass pointer to pt_regs
683 basr %r14,%r1 # call s390_do_machine_check
684 tm __PT_PSW+1(%r11),0x01 # returning to user ?
685 jno mcck_return
686 l %r1,__LC_KERNEL_STACK # switch to kernel stack
687 mvc STACK_FRAME_OVERHEAD(__PT_SIZE,%r1),0(%r11)
688 xc __SF_BACKCHAIN(4,%r1),__SF_BACKCHAIN(%r1)
689 la %r11,STACK_FRAME_OVERHEAD(%r15)
690 lr %r15,%r1
691 ssm __LC_PGM_NEW_PSW # turn dat on, keep irqs off
692 tm __TI_flags+3(%r12),_TIF_MCCK_PENDING
693 jno mcck_return
694 TRACE_IRQS_OFF
695 l %r1,BASED(.Lhandle_mcck)
696 basr %r14,%r1 # call s390_handle_mcck
697 TRACE_IRQS_ON
698mcck_return:
699 mvc __LC_RETURN_MCCK_PSW(8),__PT_PSW(%r11) # move return PSW
700 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
701 jno 0f
702 lm %r0,%r15,__PT_R0(%r11)
703 stpt __LC_EXIT_TIMER
704 lpsw __LC_RETURN_MCCK_PSW
7050: lm %r0,%r15,__PT_R0(%r11)
706 lpsw __LC_RETURN_MCCK_PSW
707
708mcck_panic:
709 l %r14,__LC_PANIC_STACK
710 slr %r14,%r15
711 sra %r14,PAGE_SHIFT
712 jz 0f
713 l %r15,__LC_PANIC_STACK
714 j mcck_skip
7150: ahi %r15,-(STACK_FRAME_OVERHEAD + __PT_SIZE)
716 j mcck_skip
717
718#
719# PSW restart interrupt handler
720#
721ENTRY(restart_int_handler)
722 st %r15,__LC_SAVE_AREA_RESTART
723 l %r15,__LC_RESTART_STACK
724 ahi %r15,-__PT_SIZE # create pt_regs on stack
725 xc 0(__PT_SIZE,%r15),0(%r15)
726 stm %r0,%r14,__PT_R0(%r15)
727 mvc __PT_R15(4,%r15),__LC_SAVE_AREA_RESTART
728 mvc __PT_PSW(8,%r15),__LC_RST_OLD_PSW # store restart old psw
729 ahi %r15,-STACK_FRAME_OVERHEAD # create stack frame on stack
730 xc 0(STACK_FRAME_OVERHEAD,%r15),0(%r15)
731 l %r1,__LC_RESTART_FN # load fn, parm & source cpu
732 l %r2,__LC_RESTART_DATA
733 l %r3,__LC_RESTART_SOURCE
734 ltr %r3,%r3 # test source cpu address
735 jm 1f # negative -> skip source stop
7360: sigp %r4,%r3,SIGP_SENSE # sigp sense to source cpu
737 brc 10,0b # wait for status stored
7381: basr %r14,%r1 # call function
739 stap __SF_EMPTY(%r15) # store cpu address
740 lh %r3,__SF_EMPTY(%r15)
7412: sigp %r4,%r3,SIGP_STOP # sigp stop to current cpu
742 brc 2,2b
7433: j 3b
744
745 .section .kprobes.text, "ax"
746
747#ifdef CONFIG_CHECK_STACK
748/*
749 * The synchronous or the asynchronous stack overflowed. We are dead.
750 * No need to properly save the registers, we are going to panic anyway.
751 * Setup a pt_regs so that show_trace can provide a good call trace.
752 */
753stack_overflow:
754 l %r15,__LC_PANIC_STACK # change to panic stack
755 la %r11,STACK_FRAME_OVERHEAD(%r15)
756 stm %r0,%r7,__PT_R0(%r11)
757 stm %r8,%r9,__PT_PSW(%r11)
758 mvc __PT_R8(32,%r11),0(%r14)
759 l %r1,BASED(1f)
760 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15)
761 lr %r2,%r11 # pass pointer to pt_regs
762 br %r1 # branch to kernel_stack_overflow
7631: .long kernel_stack_overflow
764#endif
765
766cleanup_table:
767 .long system_call + 0x80000000
768 .long sysc_do_svc + 0x80000000
769 .long sysc_tif + 0x80000000
770 .long sysc_restore + 0x80000000
771 .long sysc_done + 0x80000000
772 .long io_tif + 0x80000000
773 .long io_restore + 0x80000000
774 .long io_done + 0x80000000
775 .long psw_idle + 0x80000000
776 .long psw_idle_end + 0x80000000
777
778cleanup_critical:
779 cl %r9,BASED(cleanup_table) # system_call
780 jl 0f
781 cl %r9,BASED(cleanup_table+4) # sysc_do_svc
782 jl cleanup_system_call
783 cl %r9,BASED(cleanup_table+8) # sysc_tif
784 jl 0f
785 cl %r9,BASED(cleanup_table+12) # sysc_restore
786 jl cleanup_sysc_tif
787 cl %r9,BASED(cleanup_table+16) # sysc_done
788 jl cleanup_sysc_restore
789 cl %r9,BASED(cleanup_table+20) # io_tif
790 jl 0f
791 cl %r9,BASED(cleanup_table+24) # io_restore
792 jl cleanup_io_tif
793 cl %r9,BASED(cleanup_table+28) # io_done
794 jl cleanup_io_restore
795 cl %r9,BASED(cleanup_table+32) # psw_idle
796 jl 0f
797 cl %r9,BASED(cleanup_table+36) # psw_idle_end
798 jl cleanup_idle
7990: br %r14
800
801cleanup_system_call:
802 # check if stpt has been executed
803 cl %r9,BASED(cleanup_system_call_insn)
804 jh 0f
805 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
806 chi %r11,__LC_SAVE_AREA_ASYNC
807 je 0f
808 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
8090: # check if stm has been executed
810 cl %r9,BASED(cleanup_system_call_insn+4)
811 jh 0f
812 mvc __LC_SAVE_AREA_SYNC(32),0(%r11)
8130: # set up saved registers r12, and r13
814 st %r12,16(%r11) # r12 thread-info pointer
815 st %r13,20(%r11) # r13 literal-pool pointer
816 # check if the user time calculation has been done
817 cl %r9,BASED(cleanup_system_call_insn+8)
818 jh 0f
819 l %r10,__LC_EXIT_TIMER
820 l %r15,__LC_EXIT_TIMER+4
821 SUB64 %r10,%r15,__LC_SYNC_ENTER_TIMER
822 ADD64 %r10,%r15,__LC_USER_TIMER
823 st %r10,__LC_USER_TIMER
824 st %r15,__LC_USER_TIMER+4
8250: # check if the system time calculation has been done
826 cl %r9,BASED(cleanup_system_call_insn+12)
827 jh 0f
828 l %r10,__LC_LAST_UPDATE_TIMER
829 l %r15,__LC_LAST_UPDATE_TIMER+4
830 SUB64 %r10,%r15,__LC_EXIT_TIMER
831 ADD64 %r10,%r15,__LC_SYSTEM_TIMER
832 st %r10,__LC_SYSTEM_TIMER
833 st %r15,__LC_SYSTEM_TIMER+4
8340: # update accounting time stamp
835 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
836 # set up saved register 11
837 l %r15,__LC_KERNEL_STACK
838 la %r9,STACK_FRAME_OVERHEAD(%r15)
839 st %r9,12(%r11) # r11 pt_regs pointer
840 # fill pt_regs
841 mvc __PT_R8(32,%r9),__LC_SAVE_AREA_SYNC
842 stm %r0,%r7,__PT_R0(%r9)
843 mvc __PT_PSW(8,%r9),__LC_SVC_OLD_PSW
844 mvc __PT_INT_CODE(4,%r9),__LC_SVC_ILC
845 # setup saved register 15
846 st %r15,28(%r11) # r15 stack pointer
847 # set new psw address and exit
848 l %r9,BASED(cleanup_table+4) # sysc_do_svc + 0x80000000
849 br %r14
850cleanup_system_call_insn:
851 .long system_call + 0x80000000
852 .long sysc_stm + 0x80000000
853 .long sysc_vtime + 0x80000000 + 36
854 .long sysc_vtime + 0x80000000 + 76
855
856cleanup_sysc_tif:
857 l %r9,BASED(cleanup_table+8) # sysc_tif + 0x80000000
858 br %r14
859
860cleanup_sysc_restore:
861 cl %r9,BASED(cleanup_sysc_restore_insn)
862 jhe 0f
863 l %r9,12(%r11) # get saved pointer to pt_regs
864 mvc __LC_RETURN_PSW(8),__PT_PSW(%r9)
865 mvc 0(32,%r11),__PT_R8(%r9)
866 lm %r0,%r7,__PT_R0(%r9)
8670: lm %r8,%r9,__LC_RETURN_PSW
868 br %r14
869cleanup_sysc_restore_insn:
870 .long sysc_done - 4 + 0x80000000
871
872cleanup_io_tif:
873 l %r9,BASED(cleanup_table+20) # io_tif + 0x80000000
874 br %r14
875
876cleanup_io_restore:
877 cl %r9,BASED(cleanup_io_restore_insn)
878 jhe 0f
879 l %r9,12(%r11) # get saved r11 pointer to pt_regs
880 mvc __LC_RETURN_PSW(8),__PT_PSW(%r9)
881 mvc 0(32,%r11),__PT_R8(%r9)
882 lm %r0,%r7,__PT_R0(%r9)
8830: lm %r8,%r9,__LC_RETURN_PSW
884 br %r14
885cleanup_io_restore_insn:
886 .long io_done - 4 + 0x80000000
887
888cleanup_idle:
889 # copy interrupt clock & cpu timer
890 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_INT_CLOCK
891 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_ASYNC_ENTER_TIMER
892 chi %r11,__LC_SAVE_AREA_ASYNC
893 je 0f
894 mvc __CLOCK_IDLE_EXIT(8,%r2),__LC_MCCK_CLOCK
895 mvc __TIMER_IDLE_EXIT(8,%r2),__LC_MCCK_ENTER_TIMER
8960: # check if stck has been executed
897 cl %r9,BASED(cleanup_idle_insn)
898 jhe 1f
899 mvc __CLOCK_IDLE_ENTER(8,%r2),__CLOCK_IDLE_EXIT(%r2)
900 mvc __TIMER_IDLE_ENTER(8,%r2),__TIMER_IDLE_EXIT(%r3)
9011: # account system time going idle
902 lm %r9,%r10,__LC_STEAL_TIMER
903 ADD64 %r9,%r10,__CLOCK_IDLE_ENTER(%r2)
904 SUB64 %r9,%r10,__LC_LAST_UPDATE_CLOCK
905 stm %r9,%r10,__LC_STEAL_TIMER
906 mvc __LC_LAST_UPDATE_CLOCK(8),__CLOCK_IDLE_EXIT(%r2)
907 lm %r9,%r10,__LC_SYSTEM_TIMER
908 ADD64 %r9,%r10,__LC_LAST_UPDATE_TIMER
909 SUB64 %r9,%r10,__TIMER_IDLE_ENTER(%r2)
910 stm %r9,%r10,__LC_SYSTEM_TIMER
911 mvc __LC_LAST_UPDATE_TIMER(8),__TIMER_IDLE_EXIT(%r2)
912 # prepare return psw
913 n %r8,BASED(cleanup_idle_wait) # clear irq & wait state bits
914 l %r9,24(%r11) # return from psw_idle
915 br %r14
916cleanup_idle_insn:
917 .long psw_idle_lpsw + 0x80000000
918cleanup_idle_wait:
919 .long 0xfcfdffff
920
921/*
922 * Integer constants
923 */
924 .align 4
925.Lnr_syscalls:
926 .long NR_syscalls
927.Lvtimer_max:
928 .quad 0x7fffffffffffffff
929
930/*
931 * Symbol constants
932 */
933.Ldo_machine_check: .long s390_do_machine_check
934.Lhandle_mcck: .long s390_handle_mcck
935.Ldo_IRQ: .long do_IRQ
936.Ldo_signal: .long do_signal
937.Ldo_notify_resume: .long do_notify_resume
938.Ldo_per_trap: .long do_per_trap
939.Ljump_table: .long pgm_check_table
940.Lschedule: .long schedule
941#ifdef CONFIG_PREEMPT
942.Lpreempt_irq: .long preempt_schedule_irq
943#endif
944.Ltrace_enter: .long do_syscall_trace_enter
945.Ltrace_exit: .long do_syscall_trace_exit
946.Lschedule_tail: .long schedule_tail
947.Lsysc_per: .long sysc_per + 0x80000000
948#ifdef CONFIG_TRACE_IRQFLAGS
949.Lhardirqs_on: .long trace_hardirqs_on_caller
950.Lhardirqs_off: .long trace_hardirqs_off_caller
951#endif
952#ifdef CONFIG_LOCKDEP
953.Llockdep_sys_exit: .long lockdep_sys_exit
954#endif
955.Lcritical_start: .long __critical_start + 0x80000000
956.Lcritical_length: .long __critical_end - __critical_start
957
958 .section .rodata, "a"
959#define SYSCALL(esa,esame,emu) .long esa
960 .globl sys_call_table
961sys_call_table:
962#include "syscalls.S"
963#undef SYSCALL