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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 */
5
6#ifndef __ASM_ARC_SMP_H
7#define __ASM_ARC_SMP_H
8
9#ifdef CONFIG_SMP
10
11#include <linux/types.h>
12#include <linux/init.h>
13#include <linux/threads.h>
14
15#define raw_smp_processor_id() (current_thread_info()->cpu)
16
17/* including cpumask.h leads to cyclic deps hence this Forward declaration */
18struct cpumask;
19
20/*
21 * APIs provided by arch SMP code to generic code
22 */
23extern void arch_send_call_function_single_ipi(int cpu);
24extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
25
26/*
27 * APIs provided by arch SMP code to rest of arch code
28 */
29extern void __init smp_init_cpus(void);
30extern void first_lines_of_secondary(void);
31extern const char *arc_platform_smp_cpuinfo(void);
32extern void arc_platform_smp_wait_to_boot(int);
33extern void start_kernel_secondary(void);
34
35/*
36 * API expected BY platform smp code (FROM arch smp code)
37 *
38 * smp_ipi_irq_setup:
39 * Takes @cpu and @hwirq to which the arch-common ISR is hooked up
40 */
41extern int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq);
42
43/*
44 * struct plat_smp_ops - SMP callbacks provided by platform to ARC SMP
45 *
46 * @info: SoC SMP specific info for /proc/cpuinfo etc
47 * @init_early_smp: A SMP specific h/w block can init itself
48 * Could be common across platforms so not covered by
49 * mach_desc->init_early()
50 * @init_per_cpu: Called for each core so SMP h/w block driver can do
51 * any needed setup per cpu (e.g. IPI request)
52 * @cpu_kick: For Master to kickstart a cpu (optionally at a PC)
53 * @ipi_send: To send IPI to a @cpu
54 * @ips_clear: To clear IPI received at @irq
55 */
56struct plat_smp_ops {
57 const char *info;
58 void (*init_early_smp)(void);
59 void (*init_per_cpu)(int cpu);
60 void (*cpu_kick)(int cpu, unsigned long pc);
61 void (*ipi_send)(int cpu);
62 void (*ipi_clear)(int irq);
63};
64
65/* TBD: stop exporting it for direct population by platform */
66extern struct plat_smp_ops plat_smp_ops;
67
68#else /* CONFIG_SMP */
69
70static inline void smp_init_cpus(void) {}
71static inline const char *arc_platform_smp_cpuinfo(void)
72{
73 return "";
74}
75
76#endif /* !CONFIG_SMP */
77
78/*
79 * ARC700 doesn't support atomic Read-Modify-Write ops.
80 * Originally Interrupts had to be disabled around code to gaurantee atomicity.
81 * The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
82 * based on retry-if-irq-in-atomic (with hardware assist).
83 * However despite these, we provide the IRQ disabling variant
84 *
85 * (1) These insn were introduced only in 4.10 release. So for older released
86 * support needed.
87 *
88 * (2) In a SMP setup, the LLOCK/SCOND atomicity across CPUs needs to be
89 * gaurantted by the platform (not something which core handles).
90 * Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
91 * disabling for atomicity.
92 *
93 * However exported spinlock API is not usable due to cyclic hdr deps
94 * (even after system.h disintegration upstream)
95 * asm/bitops.h -> linux/spinlock.h -> linux/preempt.h
96 * -> linux/thread_info.h -> linux/bitops.h -> asm/bitops.h
97 *
98 * So the workaround is to use the lowest level arch spinlock API.
99 * The exported spinlock API is smart enough to be NOP for !CONFIG_SMP,
100 * but same is not true for ARCH backend, hence the need for 2 variants
101 */
102#ifndef CONFIG_ARC_HAS_LLSC
103
104#include <linux/irqflags.h>
105#ifdef CONFIG_SMP
106
107#include <asm/spinlock.h>
108
109extern arch_spinlock_t smp_atomic_ops_lock;
110
111#define atomic_ops_lock(flags) do { \
112 local_irq_save(flags); \
113 arch_spin_lock(&smp_atomic_ops_lock); \
114} while (0)
115
116#define atomic_ops_unlock(flags) do { \
117 arch_spin_unlock(&smp_atomic_ops_lock); \
118 local_irq_restore(flags); \
119} while (0)
120
121#else /* !CONFIG_SMP */
122
123#define atomic_ops_lock(flags) local_irq_save(flags)
124#define atomic_ops_unlock(flags) local_irq_restore(flags)
125
126#endif /* !CONFIG_SMP */
127
128#endif /* !CONFIG_ARC_HAS_LLSC */
129
130#endif
1/*
2 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_ARC_SMP_H
10#define __ASM_ARC_SMP_H
11
12#ifdef CONFIG_SMP
13
14#include <linux/types.h>
15#include <linux/init.h>
16#include <linux/threads.h>
17
18#define raw_smp_processor_id() (current_thread_info()->cpu)
19
20/* including cpumask.h leads to cyclic deps hence this Forward declaration */
21struct cpumask;
22
23/*
24 * APIs provided by arch SMP code to generic code
25 */
26extern void arch_send_call_function_single_ipi(int cpu);
27extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
28
29/*
30 * APIs provided by arch SMP code to rest of arch code
31 */
32extern void __init smp_init_cpus(void);
33extern void first_lines_of_secondary(void);
34extern const char *arc_platform_smp_cpuinfo(void);
35
36/*
37 * API expected BY platform smp code (FROM arch smp code)
38 *
39 * smp_ipi_irq_setup:
40 * Takes @cpu and @irq to which the arch-common ISR is hooked up
41 */
42extern int smp_ipi_irq_setup(int cpu, int irq);
43
44/*
45 * struct plat_smp_ops - SMP callbacks provided by platform to ARC SMP
46 *
47 * @info: SoC SMP specific info for /proc/cpuinfo etc
48 * @cpu_kick: For Master to kickstart a cpu (optionally at a PC)
49 * @ipi_send: To send IPI to a @cpu
50 * @ips_clear: To clear IPI received at @irq
51 */
52struct plat_smp_ops {
53 const char *info;
54 void (*cpu_kick)(int cpu, unsigned long pc);
55 void (*ipi_send)(int cpu);
56 void (*ipi_clear)(int irq);
57};
58
59/* TBD: stop exporting it for direct population by platform */
60extern struct plat_smp_ops plat_smp_ops;
61
62#endif /* CONFIG_SMP */
63
64/*
65 * ARC700 doesn't support atomic Read-Modify-Write ops.
66 * Originally Interrupts had to be disabled around code to gaurantee atomicity.
67 * The LLOCK/SCOND insns allow writing interrupt-hassle-free based atomic ops
68 * based on retry-if-irq-in-atomic (with hardware assist).
69 * However despite these, we provide the IRQ disabling variant
70 *
71 * (1) These insn were introduced only in 4.10 release. So for older released
72 * support needed.
73 *
74 * (2) In a SMP setup, the LLOCK/SCOND atomiticity across CPUs needs to be
75 * gaurantted by the platform (not something which core handles).
76 * Assuming a platform won't, SMP Linux needs to use spinlocks + local IRQ
77 * disabling for atomicity.
78 *
79 * However exported spinlock API is not usable due to cyclic hdr deps
80 * (even after system.h disintegration upstream)
81 * asm/bitops.h -> linux/spinlock.h -> linux/preempt.h
82 * -> linux/thread_info.h -> linux/bitops.h -> asm/bitops.h
83 *
84 * So the workaround is to use the lowest level arch spinlock API.
85 * The exported spinlock API is smart enough to be NOP for !CONFIG_SMP,
86 * but same is not true for ARCH backend, hence the need for 2 variants
87 */
88#ifndef CONFIG_ARC_HAS_LLSC
89
90#include <linux/irqflags.h>
91#ifdef CONFIG_SMP
92
93#include <asm/spinlock.h>
94
95extern arch_spinlock_t smp_atomic_ops_lock;
96extern arch_spinlock_t smp_bitops_lock;
97
98#define atomic_ops_lock(flags) do { \
99 local_irq_save(flags); \
100 arch_spin_lock(&smp_atomic_ops_lock); \
101} while (0)
102
103#define atomic_ops_unlock(flags) do { \
104 arch_spin_unlock(&smp_atomic_ops_lock); \
105 local_irq_restore(flags); \
106} while (0)
107
108#define bitops_lock(flags) do { \
109 local_irq_save(flags); \
110 arch_spin_lock(&smp_bitops_lock); \
111} while (0)
112
113#define bitops_unlock(flags) do { \
114 arch_spin_unlock(&smp_bitops_lock); \
115 local_irq_restore(flags); \
116} while (0)
117
118#else /* !CONFIG_SMP */
119
120#define atomic_ops_lock(flags) local_irq_save(flags)
121#define atomic_ops_unlock(flags) local_irq_restore(flags)
122
123#define bitops_lock(flags) local_irq_save(flags)
124#define bitops_unlock(flags) local_irq_restore(flags)
125
126#endif /* !CONFIG_SMP */
127
128#endif /* !CONFIG_ARC_HAS_LLSC */
129
130#endif