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v6.8
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Xtensa xtfpga SPI controller driver
  4 *
  5 * Copyright (c) 2014 Cadence Design Systems Inc.
 
 
 
 
  6 */
  7
  8#include <linux/delay.h>
  9#include <linux/io.h>
 10#include <linux/module.h>
 11#include <linux/of.h>
 12#include <linux/platform_device.h>
 13#include <linux/spi/spi.h>
 14#include <linux/spi/spi_bitbang.h>
 15
 16#define XTFPGA_SPI_NAME "xtfpga_spi"
 17
 18#define XTFPGA_SPI_START	0x0
 19#define XTFPGA_SPI_BUSY		0x4
 20#define XTFPGA_SPI_DATA		0x8
 21
 22#define BUSY_WAIT_US		100
 23
 24struct xtfpga_spi {
 25	struct spi_bitbang bitbang;
 26	void __iomem *regs;
 27	u32 data;
 28	unsigned data_sz;
 29};
 30
 31static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
 32				      unsigned addr, u32 val)
 33{
 34	__raw_writel(val, spi->regs + addr);
 35}
 36
 37static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
 38					     unsigned addr)
 39{
 40	return __raw_readl(spi->regs + addr);
 41}
 42
 43static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)
 44{
 45	unsigned i;
 46
 47	for (i = 0; xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY) &&
 48	     i < BUSY_WAIT_US; ++i)
 49		udelay(1);
 50	WARN_ON_ONCE(i == BUSY_WAIT_US);
 51}
 52
 53static u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs,
 54				u32 v, u8 bits, unsigned flags)
 55{
 56	struct xtfpga_spi *xspi = spi_controller_get_devdata(spi->controller);
 57
 58	xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0));
 59	xspi->data_sz += bits;
 60	if (xspi->data_sz >= 16) {
 61		xtfpga_spi_write32(xspi, XTFPGA_SPI_DATA,
 62				   xspi->data >> (xspi->data_sz - 16));
 63		xspi->data_sz -= 16;
 64		xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 1);
 65		xtfpga_spi_wait_busy(xspi);
 66		xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
 67	}
 68
 69	return 0;
 70}
 71
 72static void xtfpga_spi_chipselect(struct spi_device *spi, int is_on)
 73{
 74	struct xtfpga_spi *xspi = spi_controller_get_devdata(spi->controller);
 75
 76	WARN_ON(xspi->data_sz != 0);
 77	xspi->data_sz = 0;
 78}
 79
 80static int xtfpga_spi_probe(struct platform_device *pdev)
 81{
 82	struct xtfpga_spi *xspi;
 
 83	int ret;
 84	struct spi_controller *host;
 85
 86	host = devm_spi_alloc_host(&pdev->dev, sizeof(struct xtfpga_spi));
 87	if (!host)
 88		return -ENOMEM;
 89
 90	host->flags = SPI_CONTROLLER_NO_RX;
 91	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
 92	host->bus_num = pdev->dev.id;
 93	host->dev.of_node = pdev->dev.of_node;
 94
 95	xspi = spi_controller_get_devdata(host);
 96	xspi->bitbang.master = host;
 97	xspi->bitbang.chipselect = xtfpga_spi_chipselect;
 98	xspi->bitbang.txrx_word[SPI_MODE_0] = xtfpga_spi_txrx_word;
 99	xspi->regs = devm_platform_ioremap_resource(pdev, 0);
100	if (IS_ERR(xspi->regs))
101		return PTR_ERR(xspi->regs);
 
 
 
 
 
 
 
 
 
102
103	xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
104	usleep_range(1000, 2000);
105	if (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) {
106		dev_err(&pdev->dev, "Device stuck in busy state\n");
107		return -EBUSY;
 
108	}
109
110	ret = spi_bitbang_start(&xspi->bitbang);
111	if (ret < 0) {
112		dev_err(&pdev->dev, "spi_bitbang_start failed\n");
113		return ret;
114	}
115
116	platform_set_drvdata(pdev, host);
117	return 0;
 
 
 
118}
119
120static void xtfpga_spi_remove(struct platform_device *pdev)
121{
122	struct spi_controller *host = platform_get_drvdata(pdev);
123	struct xtfpga_spi *xspi = spi_controller_get_devdata(host);
124
125	spi_bitbang_stop(&xspi->bitbang);
126	spi_controller_put(host);
 
 
127}
128
129MODULE_ALIAS("platform:" XTFPGA_SPI_NAME);
130
131#ifdef CONFIG_OF
132static const struct of_device_id xtfpga_spi_of_match[] = {
133	{ .compatible = "cdns,xtfpga-spi", },
134	{}
135};
136MODULE_DEVICE_TABLE(of, xtfpga_spi_of_match);
137#endif
138
139static struct platform_driver xtfpga_spi_driver = {
140	.probe = xtfpga_spi_probe,
141	.remove_new = xtfpga_spi_remove,
142	.driver = {
143		.name = XTFPGA_SPI_NAME,
 
144		.of_match_table = of_match_ptr(xtfpga_spi_of_match),
145	},
146};
147module_platform_driver(xtfpga_spi_driver);
148
149MODULE_AUTHOR("Max Filippov <jcmvbkbc@gmail.com>");
150MODULE_DESCRIPTION("xtensa xtfpga SPI driver");
151MODULE_LICENSE("GPL");
v3.15
 
  1/*
  2 * Xtensa xtfpga SPI controller driver
  3 *
  4 * Copyright (c) 2014 Cadence Design Systems Inc.
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License version 2 as
  8 * published by the Free Software Foundation.
  9 */
 10
 11#include <linux/delay.h>
 12#include <linux/io.h>
 13#include <linux/module.h>
 14#include <linux/of.h>
 15#include <linux/platform_device.h>
 16#include <linux/spi/spi.h>
 17#include <linux/spi/spi_bitbang.h>
 18
 19#define XTFPGA_SPI_NAME "xtfpga_spi"
 20
 21#define XTFPGA_SPI_START	0x0
 22#define XTFPGA_SPI_BUSY		0x4
 23#define XTFPGA_SPI_DATA		0x8
 24
 25#define BUSY_WAIT_US		100
 26
 27struct xtfpga_spi {
 28	struct spi_bitbang bitbang;
 29	void __iomem *regs;
 30	u32 data;
 31	unsigned data_sz;
 32};
 33
 34static inline void xtfpga_spi_write32(const struct xtfpga_spi *spi,
 35				      unsigned addr, u32 val)
 36{
 37	iowrite32(val, spi->regs + addr);
 38}
 39
 40static inline unsigned int xtfpga_spi_read32(const struct xtfpga_spi *spi,
 41					     unsigned addr)
 42{
 43	return ioread32(spi->regs + addr);
 44}
 45
 46static inline void xtfpga_spi_wait_busy(struct xtfpga_spi *xspi)
 47{
 48	unsigned i;
 
 49	for (i = 0; xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY) &&
 50	     i < BUSY_WAIT_US; ++i)
 51		udelay(1);
 52	WARN_ON_ONCE(i == BUSY_WAIT_US);
 53}
 54
 55static u32 xtfpga_spi_txrx_word(struct spi_device *spi, unsigned nsecs,
 56				u32 v, u8 bits)
 57{
 58	struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master);
 59
 60	xspi->data = (xspi->data << bits) | (v & GENMASK(bits - 1, 0));
 61	xspi->data_sz += bits;
 62	if (xspi->data_sz >= 16) {
 63		xtfpga_spi_write32(xspi, XTFPGA_SPI_DATA,
 64				   xspi->data >> (xspi->data_sz - 16));
 65		xspi->data_sz -= 16;
 66		xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 1);
 67		xtfpga_spi_wait_busy(xspi);
 68		xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
 69	}
 70
 71	return 0;
 72}
 73
 74static void xtfpga_spi_chipselect(struct spi_device *spi, int is_on)
 75{
 76	struct xtfpga_spi *xspi = spi_master_get_devdata(spi->master);
 77
 78	WARN_ON(xspi->data_sz != 0);
 79	xspi->data_sz = 0;
 80}
 81
 82static int xtfpga_spi_probe(struct platform_device *pdev)
 83{
 84	struct xtfpga_spi *xspi;
 85	struct resource *mem;
 86	int ret;
 87	struct spi_master *master;
 88
 89	master = spi_alloc_master(&pdev->dev, sizeof(struct xtfpga_spi));
 90	if (!master)
 91		return -ENOMEM;
 92
 93	master->flags = SPI_MASTER_NO_RX;
 94	master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 16);
 95	master->bus_num = pdev->dev.id;
 96	master->dev.of_node = pdev->dev.of_node;
 97
 98	xspi = spi_master_get_devdata(master);
 99	xspi->bitbang.master = master;
100	xspi->bitbang.chipselect = xtfpga_spi_chipselect;
101	xspi->bitbang.txrx_word[SPI_MODE_0] = xtfpga_spi_txrx_word;
102
103	mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
104	if (!mem) {
105		dev_err(&pdev->dev, "No memory resource\n");
106		ret = -ENODEV;
107		goto err;
108	}
109	xspi->regs = devm_ioremap_resource(&pdev->dev, mem);
110	if (IS_ERR(xspi->regs)) {
111		ret = PTR_ERR(xspi->regs);
112		goto err;
113	}
114
115	xtfpga_spi_write32(xspi, XTFPGA_SPI_START, 0);
116	usleep_range(1000, 2000);
117	if (xtfpga_spi_read32(xspi, XTFPGA_SPI_BUSY)) {
118		dev_err(&pdev->dev, "Device stuck in busy state\n");
119		ret = -EBUSY;
120		goto err;
121	}
122
123	ret = spi_bitbang_start(&xspi->bitbang);
124	if (ret < 0) {
125		dev_err(&pdev->dev, "spi_bitbang_start failed\n");
126		goto err;
127	}
128
129	platform_set_drvdata(pdev, master);
130	return 0;
131err:
132	spi_master_put(master);
133	return ret;
134}
135
136static int xtfpga_spi_remove(struct platform_device *pdev)
137{
138	struct spi_master *master = platform_get_drvdata(pdev);
139	struct xtfpga_spi *xspi = spi_master_get_devdata(master);
140
141	spi_bitbang_stop(&xspi->bitbang);
142	spi_master_put(master);
143
144	return 0;
145}
146
147MODULE_ALIAS("platform:" XTFPGA_SPI_NAME);
148
149#ifdef CONFIG_OF
150static const struct of_device_id xtfpga_spi_of_match[] = {
151	{ .compatible = "cdns,xtfpga-spi", },
152	{}
153};
154MODULE_DEVICE_TABLE(of, xtfpga_spi_of_match);
155#endif
156
157static struct platform_driver xtfpga_spi_driver = {
158	.probe = xtfpga_spi_probe,
159	.remove = xtfpga_spi_remove,
160	.driver = {
161		.name = XTFPGA_SPI_NAME,
162		.owner = THIS_MODULE,
163		.of_match_table = of_match_ptr(xtfpga_spi_of_match),
164	},
165};
166module_platform_driver(xtfpga_spi_driver);
167
168MODULE_AUTHOR("Max Filippov <jcmvbkbc@gmail.com>");
169MODULE_DESCRIPTION("xtensa xtfpga SPI driver");
170MODULE_LICENSE("GPL");