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1// SPDX-License-Identifier: GPL-2.0-only
2/* esp_scsi.c: ESP SCSI driver.
3 *
4 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
5 */
6
7#include <linux/kernel.h>
8#include <linux/types.h>
9#include <linux/slab.h>
10#include <linux/delay.h>
11#include <linux/list.h>
12#include <linux/completion.h>
13#include <linux/kallsyms.h>
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/irqreturn.h>
18
19#include <asm/irq.h>
20#include <asm/io.h>
21#include <asm/dma.h>
22
23#include <scsi/scsi.h>
24#include <scsi/scsi_host.h>
25#include <scsi/scsi_cmnd.h>
26#include <scsi/scsi_device.h>
27#include <scsi/scsi_tcq.h>
28#include <scsi/scsi_dbg.h>
29#include <scsi/scsi_transport_spi.h>
30
31#include "esp_scsi.h"
32
33#define DRV_MODULE_NAME "esp"
34#define PFX DRV_MODULE_NAME ": "
35#define DRV_VERSION "2.000"
36#define DRV_MODULE_RELDATE "April 19, 2007"
37
38/* SCSI bus reset settle time in seconds. */
39static int esp_bus_reset_settle = 3;
40
41static u32 esp_debug;
42#define ESP_DEBUG_INTR 0x00000001
43#define ESP_DEBUG_SCSICMD 0x00000002
44#define ESP_DEBUG_RESET 0x00000004
45#define ESP_DEBUG_MSGIN 0x00000008
46#define ESP_DEBUG_MSGOUT 0x00000010
47#define ESP_DEBUG_CMDDONE 0x00000020
48#define ESP_DEBUG_DISCONNECT 0x00000040
49#define ESP_DEBUG_DATASTART 0x00000080
50#define ESP_DEBUG_DATADONE 0x00000100
51#define ESP_DEBUG_RECONNECT 0x00000200
52#define ESP_DEBUG_AUTOSENSE 0x00000400
53#define ESP_DEBUG_EVENT 0x00000800
54#define ESP_DEBUG_COMMAND 0x00001000
55
56#define esp_log_intr(f, a...) \
57do { if (esp_debug & ESP_DEBUG_INTR) \
58 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
59} while (0)
60
61#define esp_log_reset(f, a...) \
62do { if (esp_debug & ESP_DEBUG_RESET) \
63 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
64} while (0)
65
66#define esp_log_msgin(f, a...) \
67do { if (esp_debug & ESP_DEBUG_MSGIN) \
68 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
69} while (0)
70
71#define esp_log_msgout(f, a...) \
72do { if (esp_debug & ESP_DEBUG_MSGOUT) \
73 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
74} while (0)
75
76#define esp_log_cmddone(f, a...) \
77do { if (esp_debug & ESP_DEBUG_CMDDONE) \
78 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
79} while (0)
80
81#define esp_log_disconnect(f, a...) \
82do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
83 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
84} while (0)
85
86#define esp_log_datastart(f, a...) \
87do { if (esp_debug & ESP_DEBUG_DATASTART) \
88 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
89} while (0)
90
91#define esp_log_datadone(f, a...) \
92do { if (esp_debug & ESP_DEBUG_DATADONE) \
93 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
94} while (0)
95
96#define esp_log_reconnect(f, a...) \
97do { if (esp_debug & ESP_DEBUG_RECONNECT) \
98 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
99} while (0)
100
101#define esp_log_autosense(f, a...) \
102do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
103 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
104} while (0)
105
106#define esp_log_event(f, a...) \
107do { if (esp_debug & ESP_DEBUG_EVENT) \
108 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
109} while (0)
110
111#define esp_log_command(f, a...) \
112do { if (esp_debug & ESP_DEBUG_COMMAND) \
113 shost_printk(KERN_DEBUG, esp->host, f, ## a); \
114} while (0)
115
116#define esp_read8(REG) esp->ops->esp_read8(esp, REG)
117#define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
118
119static void esp_log_fill_regs(struct esp *esp,
120 struct esp_event_ent *p)
121{
122 p->sreg = esp->sreg;
123 p->seqreg = esp->seqreg;
124 p->sreg2 = esp->sreg2;
125 p->ireg = esp->ireg;
126 p->select_state = esp->select_state;
127 p->event = esp->event;
128}
129
130void scsi_esp_cmd(struct esp *esp, u8 val)
131{
132 struct esp_event_ent *p;
133 int idx = esp->esp_event_cur;
134
135 p = &esp->esp_event_log[idx];
136 p->type = ESP_EVENT_TYPE_CMD;
137 p->val = val;
138 esp_log_fill_regs(esp, p);
139
140 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
141
142 esp_log_command("cmd[%02x]\n", val);
143 esp_write8(val, ESP_CMD);
144}
145EXPORT_SYMBOL(scsi_esp_cmd);
146
147static void esp_send_dma_cmd(struct esp *esp, int len, int max_len, int cmd)
148{
149 if (esp->flags & ESP_FLAG_USE_FIFO) {
150 int i;
151
152 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
153 for (i = 0; i < len; i++)
154 esp_write8(esp->command_block[i], ESP_FDATA);
155 scsi_esp_cmd(esp, cmd);
156 } else {
157 if (esp->rev == FASHME)
158 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
159 cmd |= ESP_CMD_DMA;
160 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
161 len, max_len, 0, cmd);
162 }
163}
164
165static void esp_event(struct esp *esp, u8 val)
166{
167 struct esp_event_ent *p;
168 int idx = esp->esp_event_cur;
169
170 p = &esp->esp_event_log[idx];
171 p->type = ESP_EVENT_TYPE_EVENT;
172 p->val = val;
173 esp_log_fill_regs(esp, p);
174
175 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
176
177 esp->event = val;
178}
179
180static void esp_dump_cmd_log(struct esp *esp)
181{
182 int idx = esp->esp_event_cur;
183 int stop = idx;
184
185 shost_printk(KERN_INFO, esp->host, "Dumping command log\n");
186 do {
187 struct esp_event_ent *p = &esp->esp_event_log[idx];
188
189 shost_printk(KERN_INFO, esp->host,
190 "ent[%d] %s val[%02x] sreg[%02x] seqreg[%02x] "
191 "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
192 idx,
193 p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT",
194 p->val, p->sreg, p->seqreg,
195 p->sreg2, p->ireg, p->select_state, p->event);
196
197 idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
198 } while (idx != stop);
199}
200
201static void esp_flush_fifo(struct esp *esp)
202{
203 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
204 if (esp->rev == ESP236) {
205 int lim = 1000;
206
207 while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
208 if (--lim == 0) {
209 shost_printk(KERN_ALERT, esp->host,
210 "ESP_FF_BYTES will not clear!\n");
211 break;
212 }
213 udelay(1);
214 }
215 }
216}
217
218static void hme_read_fifo(struct esp *esp)
219{
220 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
221 int idx = 0;
222
223 while (fcnt--) {
224 esp->fifo[idx++] = esp_read8(ESP_FDATA);
225 esp->fifo[idx++] = esp_read8(ESP_FDATA);
226 }
227 if (esp->sreg2 & ESP_STAT2_F1BYTE) {
228 esp_write8(0, ESP_FDATA);
229 esp->fifo[idx++] = esp_read8(ESP_FDATA);
230 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
231 }
232 esp->fifo_cnt = idx;
233}
234
235static void esp_set_all_config3(struct esp *esp, u8 val)
236{
237 int i;
238
239 for (i = 0; i < ESP_MAX_TARGET; i++)
240 esp->target[i].esp_config3 = val;
241}
242
243/* Reset the ESP chip, _not_ the SCSI bus. */
244static void esp_reset_esp(struct esp *esp)
245{
246 /* Now reset the ESP chip */
247 scsi_esp_cmd(esp, ESP_CMD_RC);
248 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
249 if (esp->rev == FAST)
250 esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
251 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
252
253 /* This is the only point at which it is reliable to read
254 * the ID-code for a fast ESP chip variants.
255 */
256 esp->max_period = ((35 * esp->ccycle) / 1000);
257 if (esp->rev == FAST) {
258 u8 family_code = ESP_FAMILY(esp_read8(ESP_UID));
259
260 if (family_code == ESP_UID_F236) {
261 esp->rev = FAS236;
262 } else if (family_code == ESP_UID_HME) {
263 esp->rev = FASHME; /* Version is usually '5'. */
264 } else if (family_code == ESP_UID_FSC) {
265 esp->rev = FSC;
266 /* Enable Active Negation */
267 esp_write8(ESP_CONFIG4_RADE, ESP_CFG4);
268 } else {
269 esp->rev = FAS100A;
270 }
271 esp->min_period = ((4 * esp->ccycle) / 1000);
272 } else {
273 esp->min_period = ((5 * esp->ccycle) / 1000);
274 }
275 if (esp->rev == FAS236) {
276 /*
277 * The AM53c974 chip returns the same ID as FAS236;
278 * try to configure glitch eater.
279 */
280 u8 config4 = ESP_CONFIG4_GE1;
281 esp_write8(config4, ESP_CFG4);
282 config4 = esp_read8(ESP_CFG4);
283 if (config4 & ESP_CONFIG4_GE1) {
284 esp->rev = PCSCSI;
285 esp_write8(esp->config4, ESP_CFG4);
286 }
287 }
288 esp->max_period = (esp->max_period + 3)>>2;
289 esp->min_period = (esp->min_period + 3)>>2;
290
291 esp_write8(esp->config1, ESP_CFG1);
292 switch (esp->rev) {
293 case ESP100:
294 /* nothing to do */
295 break;
296
297 case ESP100A:
298 esp_write8(esp->config2, ESP_CFG2);
299 break;
300
301 case ESP236:
302 /* Slow 236 */
303 esp_write8(esp->config2, ESP_CFG2);
304 esp->prev_cfg3 = esp->target[0].esp_config3;
305 esp_write8(esp->prev_cfg3, ESP_CFG3);
306 break;
307
308 case FASHME:
309 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
310 fallthrough;
311
312 case FAS236:
313 case PCSCSI:
314 case FSC:
315 esp_write8(esp->config2, ESP_CFG2);
316 if (esp->rev == FASHME) {
317 u8 cfg3 = esp->target[0].esp_config3;
318
319 cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
320 if (esp->scsi_id >= 8)
321 cfg3 |= ESP_CONFIG3_IDBIT3;
322 esp_set_all_config3(esp, cfg3);
323 } else {
324 u32 cfg3 = esp->target[0].esp_config3;
325
326 cfg3 |= ESP_CONFIG3_FCLK;
327 esp_set_all_config3(esp, cfg3);
328 }
329 esp->prev_cfg3 = esp->target[0].esp_config3;
330 esp_write8(esp->prev_cfg3, ESP_CFG3);
331 if (esp->rev == FASHME) {
332 esp->radelay = 80;
333 } else {
334 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
335 esp->radelay = 0;
336 else
337 esp->radelay = 96;
338 }
339 break;
340
341 case FAS100A:
342 /* Fast 100a */
343 esp_write8(esp->config2, ESP_CFG2);
344 esp_set_all_config3(esp,
345 (esp->target[0].esp_config3 |
346 ESP_CONFIG3_FCLOCK));
347 esp->prev_cfg3 = esp->target[0].esp_config3;
348 esp_write8(esp->prev_cfg3, ESP_CFG3);
349 esp->radelay = 32;
350 break;
351
352 default:
353 break;
354 }
355
356 /* Reload the configuration registers */
357 esp_write8(esp->cfact, ESP_CFACT);
358
359 esp->prev_stp = 0;
360 esp_write8(esp->prev_stp, ESP_STP);
361
362 esp->prev_soff = 0;
363 esp_write8(esp->prev_soff, ESP_SOFF);
364
365 esp_write8(esp->neg_defp, ESP_TIMEO);
366
367 /* Eat any bitrot in the chip */
368 esp_read8(ESP_INTRPT);
369 udelay(100);
370}
371
372static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
373{
374 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
375 struct scatterlist *sg = scsi_sglist(cmd);
376 int total = 0, i;
377 struct scatterlist *s;
378
379 if (cmd->sc_data_direction == DMA_NONE)
380 return;
381
382 if (esp->flags & ESP_FLAG_NO_DMA_MAP) {
383 /*
384 * For pseudo DMA and PIO we need the virtual address instead of
385 * a dma address, so perform an identity mapping.
386 */
387 spriv->num_sg = scsi_sg_count(cmd);
388
389 scsi_for_each_sg(cmd, s, spriv->num_sg, i) {
390 s->dma_address = (uintptr_t)sg_virt(s);
391 total += sg_dma_len(s);
392 }
393 } else {
394 spriv->num_sg = scsi_dma_map(cmd);
395 scsi_for_each_sg(cmd, s, spriv->num_sg, i)
396 total += sg_dma_len(s);
397 }
398 spriv->cur_residue = sg_dma_len(sg);
399 spriv->prv_sg = NULL;
400 spriv->cur_sg = sg;
401 spriv->tot_residue = total;
402}
403
404static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
405 struct scsi_cmnd *cmd)
406{
407 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
408
409 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
410 return ent->sense_dma +
411 (ent->sense_ptr - cmd->sense_buffer);
412 }
413
414 return sg_dma_address(p->cur_sg) +
415 (sg_dma_len(p->cur_sg) -
416 p->cur_residue);
417}
418
419static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
420 struct scsi_cmnd *cmd)
421{
422 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
423
424 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
425 return SCSI_SENSE_BUFFERSIZE -
426 (ent->sense_ptr - cmd->sense_buffer);
427 }
428 return p->cur_residue;
429}
430
431static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
432 struct scsi_cmnd *cmd, unsigned int len)
433{
434 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
435
436 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
437 ent->sense_ptr += len;
438 return;
439 }
440
441 p->cur_residue -= len;
442 p->tot_residue -= len;
443 if (p->cur_residue < 0 || p->tot_residue < 0) {
444 shost_printk(KERN_ERR, esp->host,
445 "Data transfer overflow.\n");
446 shost_printk(KERN_ERR, esp->host,
447 "cur_residue[%d] tot_residue[%d] len[%u]\n",
448 p->cur_residue, p->tot_residue, len);
449 p->cur_residue = 0;
450 p->tot_residue = 0;
451 }
452 if (!p->cur_residue && p->tot_residue) {
453 p->prv_sg = p->cur_sg;
454 p->cur_sg = sg_next(p->cur_sg);
455 p->cur_residue = sg_dma_len(p->cur_sg);
456 }
457}
458
459static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
460{
461 if (!(esp->flags & ESP_FLAG_NO_DMA_MAP))
462 scsi_dma_unmap(cmd);
463}
464
465static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
466{
467 struct scsi_cmnd *cmd = ent->cmd;
468 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
469
470 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
471 ent->saved_sense_ptr = ent->sense_ptr;
472 return;
473 }
474 ent->saved_cur_residue = spriv->cur_residue;
475 ent->saved_prv_sg = spriv->prv_sg;
476 ent->saved_cur_sg = spriv->cur_sg;
477 ent->saved_tot_residue = spriv->tot_residue;
478}
479
480static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
481{
482 struct scsi_cmnd *cmd = ent->cmd;
483 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
484
485 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
486 ent->sense_ptr = ent->saved_sense_ptr;
487 return;
488 }
489 spriv->cur_residue = ent->saved_cur_residue;
490 spriv->prv_sg = ent->saved_prv_sg;
491 spriv->cur_sg = ent->saved_cur_sg;
492 spriv->tot_residue = ent->saved_tot_residue;
493}
494
495static void esp_write_tgt_config3(struct esp *esp, int tgt)
496{
497 if (esp->rev > ESP100A) {
498 u8 val = esp->target[tgt].esp_config3;
499
500 if (val != esp->prev_cfg3) {
501 esp->prev_cfg3 = val;
502 esp_write8(val, ESP_CFG3);
503 }
504 }
505}
506
507static void esp_write_tgt_sync(struct esp *esp, int tgt)
508{
509 u8 off = esp->target[tgt].esp_offset;
510 u8 per = esp->target[tgt].esp_period;
511
512 if (off != esp->prev_soff) {
513 esp->prev_soff = off;
514 esp_write8(off, ESP_SOFF);
515 }
516 if (per != esp->prev_stp) {
517 esp->prev_stp = per;
518 esp_write8(per, ESP_STP);
519 }
520}
521
522static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
523{
524 if (esp->rev == FASHME) {
525 /* Arbitrary segment boundaries, 24-bit counts. */
526 if (dma_len > (1U << 24))
527 dma_len = (1U << 24);
528 } else {
529 u32 base, end;
530
531 /* ESP chip limits other variants by 16-bits of transfer
532 * count. Actually on FAS100A and FAS236 we could get
533 * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
534 * in the ESP_CFG2 register but that causes other unwanted
535 * changes so we don't use it currently.
536 */
537 if (dma_len > (1U << 16))
538 dma_len = (1U << 16);
539
540 /* All of the DMA variants hooked up to these chips
541 * cannot handle crossing a 24-bit address boundary.
542 */
543 base = dma_addr & ((1U << 24) - 1U);
544 end = base + dma_len;
545 if (end > (1U << 24))
546 end = (1U <<24);
547 dma_len = end - base;
548 }
549 return dma_len;
550}
551
552static int esp_need_to_nego_wide(struct esp_target_data *tp)
553{
554 struct scsi_target *target = tp->starget;
555
556 return spi_width(target) != tp->nego_goal_width;
557}
558
559static int esp_need_to_nego_sync(struct esp_target_data *tp)
560{
561 struct scsi_target *target = tp->starget;
562
563 /* When offset is zero, period is "don't care". */
564 if (!spi_offset(target) && !tp->nego_goal_offset)
565 return 0;
566
567 if (spi_offset(target) == tp->nego_goal_offset &&
568 spi_period(target) == tp->nego_goal_period)
569 return 0;
570
571 return 1;
572}
573
574static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
575 struct esp_lun_data *lp)
576{
577 if (!ent->orig_tag[0]) {
578 /* Non-tagged, slot already taken? */
579 if (lp->non_tagged_cmd)
580 return -EBUSY;
581
582 if (lp->hold) {
583 /* We are being held by active tagged
584 * commands.
585 */
586 if (lp->num_tagged)
587 return -EBUSY;
588
589 /* Tagged commands completed, we can unplug
590 * the queue and run this untagged command.
591 */
592 lp->hold = 0;
593 } else if (lp->num_tagged) {
594 /* Plug the queue until num_tagged decreases
595 * to zero in esp_free_lun_tag.
596 */
597 lp->hold = 1;
598 return -EBUSY;
599 }
600
601 lp->non_tagged_cmd = ent;
602 return 0;
603 }
604
605 /* Tagged command. Check that it isn't blocked by a non-tagged one. */
606 if (lp->non_tagged_cmd || lp->hold)
607 return -EBUSY;
608
609 BUG_ON(lp->tagged_cmds[ent->orig_tag[1]]);
610
611 lp->tagged_cmds[ent->orig_tag[1]] = ent;
612 lp->num_tagged++;
613
614 return 0;
615}
616
617static void esp_free_lun_tag(struct esp_cmd_entry *ent,
618 struct esp_lun_data *lp)
619{
620 if (ent->orig_tag[0]) {
621 BUG_ON(lp->tagged_cmds[ent->orig_tag[1]] != ent);
622 lp->tagged_cmds[ent->orig_tag[1]] = NULL;
623 lp->num_tagged--;
624 } else {
625 BUG_ON(lp->non_tagged_cmd != ent);
626 lp->non_tagged_cmd = NULL;
627 }
628}
629
630static void esp_map_sense(struct esp *esp, struct esp_cmd_entry *ent)
631{
632 ent->sense_ptr = ent->cmd->sense_buffer;
633 if (esp->flags & ESP_FLAG_NO_DMA_MAP) {
634 ent->sense_dma = (uintptr_t)ent->sense_ptr;
635 return;
636 }
637
638 ent->sense_dma = dma_map_single(esp->dev, ent->sense_ptr,
639 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
640}
641
642static void esp_unmap_sense(struct esp *esp, struct esp_cmd_entry *ent)
643{
644 if (!(esp->flags & ESP_FLAG_NO_DMA_MAP))
645 dma_unmap_single(esp->dev, ent->sense_dma,
646 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
647 ent->sense_ptr = NULL;
648}
649
650/* When a contingent allegiance condition is created, we force feed a
651 * REQUEST_SENSE command to the device to fetch the sense data. I
652 * tried many other schemes, relying on the scsi error handling layer
653 * to send out the REQUEST_SENSE automatically, but this was difficult
654 * to get right especially in the presence of applications like smartd
655 * which use SG_IO to send out their own REQUEST_SENSE commands.
656 */
657static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
658{
659 struct scsi_cmnd *cmd = ent->cmd;
660 struct scsi_device *dev = cmd->device;
661 int tgt, lun;
662 u8 *p, val;
663
664 tgt = dev->id;
665 lun = dev->lun;
666
667
668 if (!ent->sense_ptr) {
669 esp_log_autosense("Doing auto-sense for tgt[%d] lun[%d]\n",
670 tgt, lun);
671 esp_map_sense(esp, ent);
672 }
673 ent->saved_sense_ptr = ent->sense_ptr;
674
675 esp->active_cmd = ent;
676
677 p = esp->command_block;
678 esp->msg_out_len = 0;
679
680 *p++ = IDENTIFY(0, lun);
681 *p++ = REQUEST_SENSE;
682 *p++ = ((dev->scsi_level <= SCSI_2) ?
683 (lun << 5) : 0);
684 *p++ = 0;
685 *p++ = 0;
686 *p++ = SCSI_SENSE_BUFFERSIZE;
687 *p++ = 0;
688
689 esp->select_state = ESP_SELECT_BASIC;
690
691 val = tgt;
692 if (esp->rev == FASHME)
693 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
694 esp_write8(val, ESP_BUSID);
695
696 esp_write_tgt_sync(esp, tgt);
697 esp_write_tgt_config3(esp, tgt);
698
699 val = (p - esp->command_block);
700
701 esp_send_dma_cmd(esp, val, 16, ESP_CMD_SELA);
702}
703
704static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
705{
706 struct esp_cmd_entry *ent;
707
708 list_for_each_entry(ent, &esp->queued_cmds, list) {
709 struct scsi_cmnd *cmd = ent->cmd;
710 struct scsi_device *dev = cmd->device;
711 struct esp_lun_data *lp = dev->hostdata;
712
713 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
714 ent->tag[0] = 0;
715 ent->tag[1] = 0;
716 return ent;
717 }
718
719 if (!spi_populate_tag_msg(&ent->tag[0], cmd)) {
720 ent->tag[0] = 0;
721 ent->tag[1] = 0;
722 }
723 ent->orig_tag[0] = ent->tag[0];
724 ent->orig_tag[1] = ent->tag[1];
725
726 if (esp_alloc_lun_tag(ent, lp) < 0)
727 continue;
728
729 return ent;
730 }
731
732 return NULL;
733}
734
735static void esp_maybe_execute_command(struct esp *esp)
736{
737 struct esp_target_data *tp;
738 struct scsi_device *dev;
739 struct scsi_cmnd *cmd;
740 struct esp_cmd_entry *ent;
741 bool select_and_stop = false;
742 int tgt, lun, i;
743 u32 val, start_cmd;
744 u8 *p;
745
746 if (esp->active_cmd ||
747 (esp->flags & ESP_FLAG_RESETTING))
748 return;
749
750 ent = find_and_prep_issuable_command(esp);
751 if (!ent)
752 return;
753
754 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
755 esp_autosense(esp, ent);
756 return;
757 }
758
759 cmd = ent->cmd;
760 dev = cmd->device;
761 tgt = dev->id;
762 lun = dev->lun;
763 tp = &esp->target[tgt];
764
765 list_move(&ent->list, &esp->active_cmds);
766
767 esp->active_cmd = ent;
768
769 esp_map_dma(esp, cmd);
770 esp_save_pointers(esp, ent);
771
772 if (!(cmd->cmd_len == 6 || cmd->cmd_len == 10 || cmd->cmd_len == 12))
773 select_and_stop = true;
774
775 p = esp->command_block;
776
777 esp->msg_out_len = 0;
778 if (tp->flags & ESP_TGT_CHECK_NEGO) {
779 /* Need to negotiate. If the target is broken
780 * go for synchronous transfers and non-wide.
781 */
782 if (tp->flags & ESP_TGT_BROKEN) {
783 tp->flags &= ~ESP_TGT_DISCONNECT;
784 tp->nego_goal_period = 0;
785 tp->nego_goal_offset = 0;
786 tp->nego_goal_width = 0;
787 tp->nego_goal_tags = 0;
788 }
789
790 /* If the settings are not changing, skip this. */
791 if (spi_width(tp->starget) == tp->nego_goal_width &&
792 spi_period(tp->starget) == tp->nego_goal_period &&
793 spi_offset(tp->starget) == tp->nego_goal_offset) {
794 tp->flags &= ~ESP_TGT_CHECK_NEGO;
795 goto build_identify;
796 }
797
798 if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
799 esp->msg_out_len =
800 spi_populate_width_msg(&esp->msg_out[0],
801 (tp->nego_goal_width ?
802 1 : 0));
803 tp->flags |= ESP_TGT_NEGO_WIDE;
804 } else if (esp_need_to_nego_sync(tp)) {
805 esp->msg_out_len =
806 spi_populate_sync_msg(&esp->msg_out[0],
807 tp->nego_goal_period,
808 tp->nego_goal_offset);
809 tp->flags |= ESP_TGT_NEGO_SYNC;
810 } else {
811 tp->flags &= ~ESP_TGT_CHECK_NEGO;
812 }
813
814 /* If there are multiple message bytes, use Select and Stop */
815 if (esp->msg_out_len)
816 select_and_stop = true;
817 }
818
819build_identify:
820 *p++ = IDENTIFY(tp->flags & ESP_TGT_DISCONNECT, lun);
821
822 if (ent->tag[0] && esp->rev == ESP100) {
823 /* ESP100 lacks select w/atn3 command, use select
824 * and stop instead.
825 */
826 select_and_stop = true;
827 }
828
829 if (select_and_stop) {
830 esp->cmd_bytes_left = cmd->cmd_len;
831 esp->cmd_bytes_ptr = &cmd->cmnd[0];
832
833 if (ent->tag[0]) {
834 for (i = esp->msg_out_len - 1;
835 i >= 0; i--)
836 esp->msg_out[i + 2] = esp->msg_out[i];
837 esp->msg_out[0] = ent->tag[0];
838 esp->msg_out[1] = ent->tag[1];
839 esp->msg_out_len += 2;
840 }
841
842 start_cmd = ESP_CMD_SELAS;
843 esp->select_state = ESP_SELECT_MSGOUT;
844 } else {
845 start_cmd = ESP_CMD_SELA;
846 if (ent->tag[0]) {
847 *p++ = ent->tag[0];
848 *p++ = ent->tag[1];
849
850 start_cmd = ESP_CMD_SA3;
851 }
852
853 for (i = 0; i < cmd->cmd_len; i++)
854 *p++ = cmd->cmnd[i];
855
856 esp->select_state = ESP_SELECT_BASIC;
857 }
858 val = tgt;
859 if (esp->rev == FASHME)
860 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
861 esp_write8(val, ESP_BUSID);
862
863 esp_write_tgt_sync(esp, tgt);
864 esp_write_tgt_config3(esp, tgt);
865
866 val = (p - esp->command_block);
867
868 if (esp_debug & ESP_DEBUG_SCSICMD) {
869 printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
870 for (i = 0; i < cmd->cmd_len; i++)
871 printk("%02x ", cmd->cmnd[i]);
872 printk("]\n");
873 }
874
875 esp_send_dma_cmd(esp, val, 16, start_cmd);
876}
877
878static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
879{
880 struct list_head *head = &esp->esp_cmd_pool;
881 struct esp_cmd_entry *ret;
882
883 if (list_empty(head)) {
884 ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
885 } else {
886 ret = list_entry(head->next, struct esp_cmd_entry, list);
887 list_del(&ret->list);
888 memset(ret, 0, sizeof(*ret));
889 }
890 return ret;
891}
892
893static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
894{
895 list_add(&ent->list, &esp->esp_cmd_pool);
896}
897
898static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
899 struct scsi_cmnd *cmd, unsigned char host_byte)
900{
901 struct scsi_device *dev = cmd->device;
902 int tgt = dev->id;
903 int lun = dev->lun;
904
905 esp->active_cmd = NULL;
906 esp_unmap_dma(esp, cmd);
907 esp_free_lun_tag(ent, dev->hostdata);
908 cmd->result = 0;
909 set_host_byte(cmd, host_byte);
910 if (host_byte == DID_OK)
911 set_status_byte(cmd, ent->status);
912
913 if (ent->eh_done) {
914 complete(ent->eh_done);
915 ent->eh_done = NULL;
916 }
917
918 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
919 esp_unmap_sense(esp, ent);
920
921 /* Restore the message/status bytes to what we actually
922 * saw originally. Also, report that we are providing
923 * the sense data.
924 */
925 cmd->result = SAM_STAT_CHECK_CONDITION;
926
927 ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
928 if (esp_debug & ESP_DEBUG_AUTOSENSE) {
929 int i;
930
931 printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
932 esp->host->unique_id, tgt, lun);
933 for (i = 0; i < 18; i++)
934 printk("%02x ", cmd->sense_buffer[i]);
935 printk("]\n");
936 }
937 }
938
939 scsi_done(cmd);
940
941 list_del(&ent->list);
942 esp_put_ent(esp, ent);
943
944 esp_maybe_execute_command(esp);
945}
946
947static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
948{
949 struct scsi_device *dev = ent->cmd->device;
950 struct esp_lun_data *lp = dev->hostdata;
951
952 scsi_track_queue_full(dev, lp->num_tagged - 1);
953}
954
955static int esp_queuecommand_lck(struct scsi_cmnd *cmd)
956{
957 struct scsi_device *dev = cmd->device;
958 struct esp *esp = shost_priv(dev->host);
959 struct esp_cmd_priv *spriv;
960 struct esp_cmd_entry *ent;
961
962 ent = esp_get_ent(esp);
963 if (!ent)
964 return SCSI_MLQUEUE_HOST_BUSY;
965
966 ent->cmd = cmd;
967
968 spriv = ESP_CMD_PRIV(cmd);
969 spriv->num_sg = 0;
970
971 list_add_tail(&ent->list, &esp->queued_cmds);
972
973 esp_maybe_execute_command(esp);
974
975 return 0;
976}
977
978static DEF_SCSI_QCMD(esp_queuecommand)
979
980static int esp_check_gross_error(struct esp *esp)
981{
982 if (esp->sreg & ESP_STAT_SPAM) {
983 /* Gross Error, could be one of:
984 * - top of fifo overwritten
985 * - top of command register overwritten
986 * - DMA programmed with wrong direction
987 * - improper phase change
988 */
989 shost_printk(KERN_ERR, esp->host,
990 "Gross error sreg[%02x]\n", esp->sreg);
991 /* XXX Reset the chip. XXX */
992 return 1;
993 }
994 return 0;
995}
996
997static int esp_check_spur_intr(struct esp *esp)
998{
999 switch (esp->rev) {
1000 case ESP100:
1001 case ESP100A:
1002 /* The interrupt pending bit of the status register cannot
1003 * be trusted on these revisions.
1004 */
1005 esp->sreg &= ~ESP_STAT_INTR;
1006 break;
1007
1008 default:
1009 if (!(esp->sreg & ESP_STAT_INTR)) {
1010 if (esp->ireg & ESP_INTR_SR)
1011 return 1;
1012
1013 /* If the DMA is indicating interrupt pending and the
1014 * ESP is not, the only possibility is a DMA error.
1015 */
1016 if (!esp->ops->dma_error(esp)) {
1017 shost_printk(KERN_ERR, esp->host,
1018 "Spurious irq, sreg=%02x.\n",
1019 esp->sreg);
1020 return -1;
1021 }
1022
1023 shost_printk(KERN_ERR, esp->host, "DMA error\n");
1024
1025 /* XXX Reset the chip. XXX */
1026 return -1;
1027 }
1028 break;
1029 }
1030
1031 return 0;
1032}
1033
1034static void esp_schedule_reset(struct esp *esp)
1035{
1036 esp_log_reset("esp_schedule_reset() from %ps\n",
1037 __builtin_return_address(0));
1038 esp->flags |= ESP_FLAG_RESETTING;
1039 esp_event(esp, ESP_EVENT_RESET);
1040}
1041
1042/* In order to avoid having to add a special half-reconnected state
1043 * into the driver we just sit here and poll through the rest of
1044 * the reselection process to get the tag message bytes.
1045 */
1046static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
1047 struct esp_lun_data *lp)
1048{
1049 struct esp_cmd_entry *ent;
1050 int i;
1051
1052 if (!lp->num_tagged) {
1053 shost_printk(KERN_ERR, esp->host,
1054 "Reconnect w/num_tagged==0\n");
1055 return NULL;
1056 }
1057
1058 esp_log_reconnect("reconnect tag, ");
1059
1060 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
1061 if (esp->ops->irq_pending(esp))
1062 break;
1063 }
1064 if (i == ESP_QUICKIRQ_LIMIT) {
1065 shost_printk(KERN_ERR, esp->host,
1066 "Reconnect IRQ1 timeout\n");
1067 return NULL;
1068 }
1069
1070 esp->sreg = esp_read8(ESP_STATUS);
1071 esp->ireg = esp_read8(ESP_INTRPT);
1072
1073 esp_log_reconnect("IRQ(%d:%x:%x), ",
1074 i, esp->ireg, esp->sreg);
1075
1076 if (esp->ireg & ESP_INTR_DC) {
1077 shost_printk(KERN_ERR, esp->host,
1078 "Reconnect, got disconnect.\n");
1079 return NULL;
1080 }
1081
1082 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
1083 shost_printk(KERN_ERR, esp->host,
1084 "Reconnect, not MIP sreg[%02x].\n", esp->sreg);
1085 return NULL;
1086 }
1087
1088 /* DMA in the tag bytes... */
1089 esp->command_block[0] = 0xff;
1090 esp->command_block[1] = 0xff;
1091 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
1092 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
1093
1094 /* ACK the message. */
1095 scsi_esp_cmd(esp, ESP_CMD_MOK);
1096
1097 for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
1098 if (esp->ops->irq_pending(esp)) {
1099 esp->sreg = esp_read8(ESP_STATUS);
1100 esp->ireg = esp_read8(ESP_INTRPT);
1101 if (esp->ireg & ESP_INTR_FDONE)
1102 break;
1103 }
1104 udelay(1);
1105 }
1106 if (i == ESP_RESELECT_TAG_LIMIT) {
1107 shost_printk(KERN_ERR, esp->host, "Reconnect IRQ2 timeout\n");
1108 return NULL;
1109 }
1110 esp->ops->dma_drain(esp);
1111 esp->ops->dma_invalidate(esp);
1112
1113 esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
1114 i, esp->ireg, esp->sreg,
1115 esp->command_block[0],
1116 esp->command_block[1]);
1117
1118 if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
1119 esp->command_block[0] > ORDERED_QUEUE_TAG) {
1120 shost_printk(KERN_ERR, esp->host,
1121 "Reconnect, bad tag type %02x.\n",
1122 esp->command_block[0]);
1123 return NULL;
1124 }
1125
1126 ent = lp->tagged_cmds[esp->command_block[1]];
1127 if (!ent) {
1128 shost_printk(KERN_ERR, esp->host,
1129 "Reconnect, no entry for tag %02x.\n",
1130 esp->command_block[1]);
1131 return NULL;
1132 }
1133
1134 return ent;
1135}
1136
1137static int esp_reconnect(struct esp *esp)
1138{
1139 struct esp_cmd_entry *ent;
1140 struct esp_target_data *tp;
1141 struct esp_lun_data *lp;
1142 struct scsi_device *dev;
1143 int target, lun;
1144
1145 BUG_ON(esp->active_cmd);
1146 if (esp->rev == FASHME) {
1147 /* FASHME puts the target and lun numbers directly
1148 * into the fifo.
1149 */
1150 target = esp->fifo[0];
1151 lun = esp->fifo[1] & 0x7;
1152 } else {
1153 u8 bits = esp_read8(ESP_FDATA);
1154
1155 /* Older chips put the lun directly into the fifo, but
1156 * the target is given as a sample of the arbitration
1157 * lines on the bus at reselection time. So we should
1158 * see the ID of the ESP and the one reconnecting target
1159 * set in the bitmap.
1160 */
1161 if (!(bits & esp->scsi_id_mask))
1162 goto do_reset;
1163 bits &= ~esp->scsi_id_mask;
1164 if (!bits || (bits & (bits - 1)))
1165 goto do_reset;
1166
1167 target = ffs(bits) - 1;
1168 lun = (esp_read8(ESP_FDATA) & 0x7);
1169
1170 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1171 if (esp->rev == ESP100) {
1172 u8 ireg = esp_read8(ESP_INTRPT);
1173 /* This chip has a bug during reselection that can
1174 * cause a spurious illegal-command interrupt, which
1175 * we simply ACK here. Another possibility is a bus
1176 * reset so we must check for that.
1177 */
1178 if (ireg & ESP_INTR_SR)
1179 goto do_reset;
1180 }
1181 scsi_esp_cmd(esp, ESP_CMD_NULL);
1182 }
1183
1184 esp_write_tgt_sync(esp, target);
1185 esp_write_tgt_config3(esp, target);
1186
1187 scsi_esp_cmd(esp, ESP_CMD_MOK);
1188
1189 if (esp->rev == FASHME)
1190 esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
1191 ESP_BUSID);
1192
1193 tp = &esp->target[target];
1194 dev = __scsi_device_lookup_by_target(tp->starget, lun);
1195 if (!dev) {
1196 shost_printk(KERN_ERR, esp->host,
1197 "Reconnect, no lp tgt[%u] lun[%u]\n",
1198 target, lun);
1199 goto do_reset;
1200 }
1201 lp = dev->hostdata;
1202
1203 ent = lp->non_tagged_cmd;
1204 if (!ent) {
1205 ent = esp_reconnect_with_tag(esp, lp);
1206 if (!ent)
1207 goto do_reset;
1208 }
1209
1210 esp->active_cmd = ent;
1211
1212 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1213 esp_restore_pointers(esp, ent);
1214 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1215 return 1;
1216
1217do_reset:
1218 esp_schedule_reset(esp);
1219 return 0;
1220}
1221
1222static int esp_finish_select(struct esp *esp)
1223{
1224 struct esp_cmd_entry *ent;
1225 struct scsi_cmnd *cmd;
1226
1227 /* No longer selecting. */
1228 esp->select_state = ESP_SELECT_NONE;
1229
1230 esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
1231 ent = esp->active_cmd;
1232 cmd = ent->cmd;
1233
1234 if (esp->ops->dma_error(esp)) {
1235 /* If we see a DMA error during or as a result of selection,
1236 * all bets are off.
1237 */
1238 esp_schedule_reset(esp);
1239 esp_cmd_is_done(esp, ent, cmd, DID_ERROR);
1240 return 0;
1241 }
1242
1243 esp->ops->dma_invalidate(esp);
1244
1245 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
1246 struct esp_target_data *tp = &esp->target[cmd->device->id];
1247
1248 /* Carefully back out of the selection attempt. Release
1249 * resources (such as DMA mapping & TAG) and reset state (such
1250 * as message out and command delivery variables).
1251 */
1252 if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1253 esp_unmap_dma(esp, cmd);
1254 esp_free_lun_tag(ent, cmd->device->hostdata);
1255 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
1256 esp->cmd_bytes_ptr = NULL;
1257 esp->cmd_bytes_left = 0;
1258 } else {
1259 esp_unmap_sense(esp, ent);
1260 }
1261
1262 /* Now that the state is unwound properly, put back onto
1263 * the issue queue. This command is no longer active.
1264 */
1265 list_move(&ent->list, &esp->queued_cmds);
1266 esp->active_cmd = NULL;
1267
1268 /* Return value ignored by caller, it directly invokes
1269 * esp_reconnect().
1270 */
1271 return 0;
1272 }
1273
1274 if (esp->ireg == ESP_INTR_DC) {
1275 struct scsi_device *dev = cmd->device;
1276
1277 /* Disconnect. Make sure we re-negotiate sync and
1278 * wide parameters if this target starts responding
1279 * again in the future.
1280 */
1281 esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
1282
1283 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1284 esp_cmd_is_done(esp, ent, cmd, DID_BAD_TARGET);
1285 return 1;
1286 }
1287
1288 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
1289 /* Selection successful. On pre-FAST chips we have
1290 * to do a NOP and possibly clean out the FIFO.
1291 */
1292 if (esp->rev <= ESP236) {
1293 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1294
1295 scsi_esp_cmd(esp, ESP_CMD_NULL);
1296
1297 if (!fcnt &&
1298 (!esp->prev_soff ||
1299 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
1300 esp_flush_fifo(esp);
1301 }
1302
1303 /* If we are doing a Select And Stop command, negotiation, etc.
1304 * we'll do the right thing as we transition to the next phase.
1305 */
1306 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1307 return 0;
1308 }
1309
1310 shost_printk(KERN_INFO, esp->host,
1311 "Unexpected selection completion ireg[%x]\n", esp->ireg);
1312 esp_schedule_reset(esp);
1313 return 0;
1314}
1315
1316static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
1317 struct scsi_cmnd *cmd)
1318{
1319 int fifo_cnt, ecount, bytes_sent, flush_fifo;
1320
1321 fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1322 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
1323 fifo_cnt <<= 1;
1324
1325 ecount = 0;
1326 if (!(esp->sreg & ESP_STAT_TCNT)) {
1327 ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
1328 (((unsigned int)esp_read8(ESP_TCMED)) << 8));
1329 if (esp->rev == FASHME)
1330 ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
1331 if (esp->rev == PCSCSI && (esp->config2 & ESP_CONFIG2_FENAB))
1332 ecount |= ((unsigned int)esp_read8(ESP_TCHI)) << 16;
1333 }
1334
1335 bytes_sent = esp->data_dma_len;
1336 bytes_sent -= ecount;
1337 bytes_sent -= esp->send_cmd_residual;
1338
1339 /*
1340 * The am53c974 has a DMA 'peculiarity'. The doc states:
1341 * In some odd byte conditions, one residual byte will
1342 * be left in the SCSI FIFO, and the FIFO Flags will
1343 * never count to '0 '. When this happens, the residual
1344 * byte should be retrieved via PIO following completion
1345 * of the BLAST operation.
1346 */
1347 if (fifo_cnt == 1 && ent->flags & ESP_CMD_FLAG_RESIDUAL) {
1348 size_t count = 1;
1349 size_t offset = bytes_sent;
1350 u8 bval = esp_read8(ESP_FDATA);
1351
1352 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE)
1353 ent->sense_ptr[bytes_sent] = bval;
1354 else {
1355 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
1356 u8 *ptr;
1357
1358 ptr = scsi_kmap_atomic_sg(p->cur_sg, p->num_sg,
1359 &offset, &count);
1360 if (likely(ptr)) {
1361 *(ptr + offset) = bval;
1362 scsi_kunmap_atomic_sg(ptr);
1363 }
1364 }
1365 bytes_sent += fifo_cnt;
1366 ent->flags &= ~ESP_CMD_FLAG_RESIDUAL;
1367 }
1368 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1369 bytes_sent -= fifo_cnt;
1370
1371 flush_fifo = 0;
1372 if (!esp->prev_soff) {
1373 /* Synchronous data transfer, always flush fifo. */
1374 flush_fifo = 1;
1375 } else {
1376 if (esp->rev == ESP100) {
1377 u32 fflags, phase;
1378
1379 /* ESP100 has a chip bug where in the synchronous data
1380 * phase it can mistake a final long REQ pulse from the
1381 * target as an extra data byte. Fun.
1382 *
1383 * To detect this case we resample the status register
1384 * and fifo flags. If we're still in a data phase and
1385 * we see spurious chunks in the fifo, we return error
1386 * to the caller which should reset and set things up
1387 * such that we only try future transfers to this
1388 * target in synchronous mode.
1389 */
1390 esp->sreg = esp_read8(ESP_STATUS);
1391 phase = esp->sreg & ESP_STAT_PMASK;
1392 fflags = esp_read8(ESP_FFLAGS);
1393
1394 if ((phase == ESP_DOP &&
1395 (fflags & ESP_FF_ONOTZERO)) ||
1396 (phase == ESP_DIP &&
1397 (fflags & ESP_FF_FBYTES)))
1398 return -1;
1399 }
1400 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1401 flush_fifo = 1;
1402 }
1403
1404 if (flush_fifo)
1405 esp_flush_fifo(esp);
1406
1407 return bytes_sent;
1408}
1409
1410static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
1411 u8 scsi_period, u8 scsi_offset,
1412 u8 esp_stp, u8 esp_soff)
1413{
1414 spi_period(tp->starget) = scsi_period;
1415 spi_offset(tp->starget) = scsi_offset;
1416 spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
1417
1418 if (esp_soff) {
1419 esp_stp &= 0x1f;
1420 esp_soff |= esp->radelay;
1421 if (esp->rev >= FAS236) {
1422 u8 bit = ESP_CONFIG3_FSCSI;
1423 if (esp->rev >= FAS100A)
1424 bit = ESP_CONFIG3_FAST;
1425
1426 if (scsi_period < 50) {
1427 if (esp->rev == FASHME)
1428 esp_soff &= ~esp->radelay;
1429 tp->esp_config3 |= bit;
1430 } else {
1431 tp->esp_config3 &= ~bit;
1432 }
1433 esp->prev_cfg3 = tp->esp_config3;
1434 esp_write8(esp->prev_cfg3, ESP_CFG3);
1435 }
1436 }
1437
1438 tp->esp_period = esp->prev_stp = esp_stp;
1439 tp->esp_offset = esp->prev_soff = esp_soff;
1440
1441 esp_write8(esp_soff, ESP_SOFF);
1442 esp_write8(esp_stp, ESP_STP);
1443
1444 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1445
1446 spi_display_xfer_agreement(tp->starget);
1447}
1448
1449static void esp_msgin_reject(struct esp *esp)
1450{
1451 struct esp_cmd_entry *ent = esp->active_cmd;
1452 struct scsi_cmnd *cmd = ent->cmd;
1453 struct esp_target_data *tp;
1454 int tgt;
1455
1456 tgt = cmd->device->id;
1457 tp = &esp->target[tgt];
1458
1459 if (tp->flags & ESP_TGT_NEGO_WIDE) {
1460 tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
1461
1462 if (!esp_need_to_nego_sync(tp)) {
1463 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1464 scsi_esp_cmd(esp, ESP_CMD_RATN);
1465 } else {
1466 esp->msg_out_len =
1467 spi_populate_sync_msg(&esp->msg_out[0],
1468 tp->nego_goal_period,
1469 tp->nego_goal_offset);
1470 tp->flags |= ESP_TGT_NEGO_SYNC;
1471 scsi_esp_cmd(esp, ESP_CMD_SATN);
1472 }
1473 return;
1474 }
1475
1476 if (tp->flags & ESP_TGT_NEGO_SYNC) {
1477 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1478 tp->esp_period = 0;
1479 tp->esp_offset = 0;
1480 esp_setsync(esp, tp, 0, 0, 0, 0);
1481 scsi_esp_cmd(esp, ESP_CMD_RATN);
1482 return;
1483 }
1484
1485 shost_printk(KERN_INFO, esp->host, "Unexpected MESSAGE REJECT\n");
1486 esp_schedule_reset(esp);
1487}
1488
1489static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
1490{
1491 u8 period = esp->msg_in[3];
1492 u8 offset = esp->msg_in[4];
1493 u8 stp;
1494
1495 if (!(tp->flags & ESP_TGT_NEGO_SYNC))
1496 goto do_reject;
1497
1498 if (offset > 15)
1499 goto do_reject;
1500
1501 if (offset) {
1502 int one_clock;
1503
1504 if (period > esp->max_period) {
1505 period = offset = 0;
1506 goto do_sdtr;
1507 }
1508 if (period < esp->min_period)
1509 goto do_reject;
1510
1511 one_clock = esp->ccycle / 1000;
1512 stp = DIV_ROUND_UP(period << 2, one_clock);
1513 if (stp && esp->rev >= FAS236) {
1514 if (stp >= 50)
1515 stp--;
1516 }
1517 } else {
1518 stp = 0;
1519 }
1520
1521 esp_setsync(esp, tp, period, offset, stp, offset);
1522 return;
1523
1524do_reject:
1525 esp->msg_out[0] = MESSAGE_REJECT;
1526 esp->msg_out_len = 1;
1527 scsi_esp_cmd(esp, ESP_CMD_SATN);
1528 return;
1529
1530do_sdtr:
1531 tp->nego_goal_period = period;
1532 tp->nego_goal_offset = offset;
1533 esp->msg_out_len =
1534 spi_populate_sync_msg(&esp->msg_out[0],
1535 tp->nego_goal_period,
1536 tp->nego_goal_offset);
1537 scsi_esp_cmd(esp, ESP_CMD_SATN);
1538}
1539
1540static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
1541{
1542 int size = 8 << esp->msg_in[3];
1543 u8 cfg3;
1544
1545 if (esp->rev != FASHME)
1546 goto do_reject;
1547
1548 if (size != 8 && size != 16)
1549 goto do_reject;
1550
1551 if (!(tp->flags & ESP_TGT_NEGO_WIDE))
1552 goto do_reject;
1553
1554 cfg3 = tp->esp_config3;
1555 if (size == 16) {
1556 tp->flags |= ESP_TGT_WIDE;
1557 cfg3 |= ESP_CONFIG3_EWIDE;
1558 } else {
1559 tp->flags &= ~ESP_TGT_WIDE;
1560 cfg3 &= ~ESP_CONFIG3_EWIDE;
1561 }
1562 tp->esp_config3 = cfg3;
1563 esp->prev_cfg3 = cfg3;
1564 esp_write8(cfg3, ESP_CFG3);
1565
1566 tp->flags &= ~ESP_TGT_NEGO_WIDE;
1567
1568 spi_period(tp->starget) = 0;
1569 spi_offset(tp->starget) = 0;
1570 if (!esp_need_to_nego_sync(tp)) {
1571 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1572 scsi_esp_cmd(esp, ESP_CMD_RATN);
1573 } else {
1574 esp->msg_out_len =
1575 spi_populate_sync_msg(&esp->msg_out[0],
1576 tp->nego_goal_period,
1577 tp->nego_goal_offset);
1578 tp->flags |= ESP_TGT_NEGO_SYNC;
1579 scsi_esp_cmd(esp, ESP_CMD_SATN);
1580 }
1581 return;
1582
1583do_reject:
1584 esp->msg_out[0] = MESSAGE_REJECT;
1585 esp->msg_out_len = 1;
1586 scsi_esp_cmd(esp, ESP_CMD_SATN);
1587}
1588
1589static void esp_msgin_extended(struct esp *esp)
1590{
1591 struct esp_cmd_entry *ent = esp->active_cmd;
1592 struct scsi_cmnd *cmd = ent->cmd;
1593 struct esp_target_data *tp;
1594 int tgt = cmd->device->id;
1595
1596 tp = &esp->target[tgt];
1597 if (esp->msg_in[2] == EXTENDED_SDTR) {
1598 esp_msgin_sdtr(esp, tp);
1599 return;
1600 }
1601 if (esp->msg_in[2] == EXTENDED_WDTR) {
1602 esp_msgin_wdtr(esp, tp);
1603 return;
1604 }
1605
1606 shost_printk(KERN_INFO, esp->host,
1607 "Unexpected extended msg type %x\n", esp->msg_in[2]);
1608
1609 esp->msg_out[0] = MESSAGE_REJECT;
1610 esp->msg_out_len = 1;
1611 scsi_esp_cmd(esp, ESP_CMD_SATN);
1612}
1613
1614/* Analyze msgin bytes received from target so far. Return non-zero
1615 * if there are more bytes needed to complete the message.
1616 */
1617static int esp_msgin_process(struct esp *esp)
1618{
1619 u8 msg0 = esp->msg_in[0];
1620 int len = esp->msg_in_len;
1621
1622 if (msg0 & 0x80) {
1623 /* Identify */
1624 shost_printk(KERN_INFO, esp->host,
1625 "Unexpected msgin identify\n");
1626 return 0;
1627 }
1628
1629 switch (msg0) {
1630 case EXTENDED_MESSAGE:
1631 if (len == 1)
1632 return 1;
1633 if (len < esp->msg_in[1] + 2)
1634 return 1;
1635 esp_msgin_extended(esp);
1636 return 0;
1637
1638 case IGNORE_WIDE_RESIDUE: {
1639 struct esp_cmd_entry *ent;
1640 struct esp_cmd_priv *spriv;
1641 if (len == 1)
1642 return 1;
1643
1644 if (esp->msg_in[1] != 1)
1645 goto do_reject;
1646
1647 ent = esp->active_cmd;
1648 spriv = ESP_CMD_PRIV(ent->cmd);
1649
1650 if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
1651 spriv->cur_sg = spriv->prv_sg;
1652 spriv->cur_residue = 1;
1653 } else
1654 spriv->cur_residue++;
1655 spriv->tot_residue++;
1656 return 0;
1657 }
1658 case NOP:
1659 return 0;
1660 case RESTORE_POINTERS:
1661 esp_restore_pointers(esp, esp->active_cmd);
1662 return 0;
1663 case SAVE_POINTERS:
1664 esp_save_pointers(esp, esp->active_cmd);
1665 return 0;
1666
1667 case COMMAND_COMPLETE:
1668 case DISCONNECT: {
1669 struct esp_cmd_entry *ent = esp->active_cmd;
1670
1671 ent->message = msg0;
1672 esp_event(esp, ESP_EVENT_FREE_BUS);
1673 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1674 return 0;
1675 }
1676 case MESSAGE_REJECT:
1677 esp_msgin_reject(esp);
1678 return 0;
1679
1680 default:
1681 do_reject:
1682 esp->msg_out[0] = MESSAGE_REJECT;
1683 esp->msg_out_len = 1;
1684 scsi_esp_cmd(esp, ESP_CMD_SATN);
1685 return 0;
1686 }
1687}
1688
1689static int esp_process_event(struct esp *esp)
1690{
1691 int write, i;
1692
1693again:
1694 write = 0;
1695 esp_log_event("process event %d phase %x\n",
1696 esp->event, esp->sreg & ESP_STAT_PMASK);
1697 switch (esp->event) {
1698 case ESP_EVENT_CHECK_PHASE:
1699 switch (esp->sreg & ESP_STAT_PMASK) {
1700 case ESP_DOP:
1701 esp_event(esp, ESP_EVENT_DATA_OUT);
1702 break;
1703 case ESP_DIP:
1704 esp_event(esp, ESP_EVENT_DATA_IN);
1705 break;
1706 case ESP_STATP:
1707 esp_flush_fifo(esp);
1708 scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
1709 esp_event(esp, ESP_EVENT_STATUS);
1710 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1711 return 1;
1712
1713 case ESP_MOP:
1714 esp_event(esp, ESP_EVENT_MSGOUT);
1715 break;
1716
1717 case ESP_MIP:
1718 esp_event(esp, ESP_EVENT_MSGIN);
1719 break;
1720
1721 case ESP_CMDP:
1722 esp_event(esp, ESP_EVENT_CMD_START);
1723 break;
1724
1725 default:
1726 shost_printk(KERN_INFO, esp->host,
1727 "Unexpected phase, sreg=%02x\n",
1728 esp->sreg);
1729 esp_schedule_reset(esp);
1730 return 0;
1731 }
1732 goto again;
1733
1734 case ESP_EVENT_DATA_IN:
1735 write = 1;
1736 fallthrough;
1737
1738 case ESP_EVENT_DATA_OUT: {
1739 struct esp_cmd_entry *ent = esp->active_cmd;
1740 struct scsi_cmnd *cmd = ent->cmd;
1741 dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
1742 unsigned int dma_len = esp_cur_dma_len(ent, cmd);
1743
1744 if (esp->rev == ESP100)
1745 scsi_esp_cmd(esp, ESP_CMD_NULL);
1746
1747 if (write)
1748 ent->flags |= ESP_CMD_FLAG_WRITE;
1749 else
1750 ent->flags &= ~ESP_CMD_FLAG_WRITE;
1751
1752 if (esp->ops->dma_length_limit)
1753 dma_len = esp->ops->dma_length_limit(esp, dma_addr,
1754 dma_len);
1755 else
1756 dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
1757
1758 esp->data_dma_len = dma_len;
1759
1760 if (!dma_len) {
1761 shost_printk(KERN_ERR, esp->host,
1762 "DMA length is zero!\n");
1763 shost_printk(KERN_ERR, esp->host,
1764 "cur adr[%08llx] len[%08x]\n",
1765 (unsigned long long)esp_cur_dma_addr(ent, cmd),
1766 esp_cur_dma_len(ent, cmd));
1767 esp_schedule_reset(esp);
1768 return 0;
1769 }
1770
1771 esp_log_datastart("start data addr[%08llx] len[%u] write(%d)\n",
1772 (unsigned long long)dma_addr, dma_len, write);
1773
1774 esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
1775 write, ESP_CMD_DMA | ESP_CMD_TI);
1776 esp_event(esp, ESP_EVENT_DATA_DONE);
1777 break;
1778 }
1779 case ESP_EVENT_DATA_DONE: {
1780 struct esp_cmd_entry *ent = esp->active_cmd;
1781 struct scsi_cmnd *cmd = ent->cmd;
1782 int bytes_sent;
1783
1784 if (esp->ops->dma_error(esp)) {
1785 shost_printk(KERN_INFO, esp->host,
1786 "data done, DMA error, resetting\n");
1787 esp_schedule_reset(esp);
1788 return 0;
1789 }
1790
1791 if (ent->flags & ESP_CMD_FLAG_WRITE) {
1792 /* XXX parity errors, etc. XXX */
1793
1794 esp->ops->dma_drain(esp);
1795 }
1796 esp->ops->dma_invalidate(esp);
1797
1798 if (esp->ireg != ESP_INTR_BSERV) {
1799 /* We should always see exactly a bus-service
1800 * interrupt at the end of a successful transfer.
1801 */
1802 shost_printk(KERN_INFO, esp->host,
1803 "data done, not BSERV, resetting\n");
1804 esp_schedule_reset(esp);
1805 return 0;
1806 }
1807
1808 bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
1809
1810 esp_log_datadone("data done flgs[%x] sent[%d]\n",
1811 ent->flags, bytes_sent);
1812
1813 if (bytes_sent < 0) {
1814 /* XXX force sync mode for this target XXX */
1815 esp_schedule_reset(esp);
1816 return 0;
1817 }
1818
1819 esp_advance_dma(esp, ent, cmd, bytes_sent);
1820 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1821 goto again;
1822 }
1823
1824 case ESP_EVENT_STATUS: {
1825 struct esp_cmd_entry *ent = esp->active_cmd;
1826
1827 if (esp->ireg & ESP_INTR_FDONE) {
1828 ent->status = esp_read8(ESP_FDATA);
1829 ent->message = esp_read8(ESP_FDATA);
1830 scsi_esp_cmd(esp, ESP_CMD_MOK);
1831 } else if (esp->ireg == ESP_INTR_BSERV) {
1832 ent->status = esp_read8(ESP_FDATA);
1833 ent->message = 0xff;
1834 esp_event(esp, ESP_EVENT_MSGIN);
1835 return 0;
1836 }
1837
1838 if (ent->message != COMMAND_COMPLETE) {
1839 shost_printk(KERN_INFO, esp->host,
1840 "Unexpected message %x in status\n",
1841 ent->message);
1842 esp_schedule_reset(esp);
1843 return 0;
1844 }
1845
1846 esp_event(esp, ESP_EVENT_FREE_BUS);
1847 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1848 break;
1849 }
1850 case ESP_EVENT_FREE_BUS: {
1851 struct esp_cmd_entry *ent = esp->active_cmd;
1852 struct scsi_cmnd *cmd = ent->cmd;
1853
1854 if (ent->message == COMMAND_COMPLETE ||
1855 ent->message == DISCONNECT)
1856 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1857
1858 if (ent->message == COMMAND_COMPLETE) {
1859 esp_log_cmddone("Command done status[%x] message[%x]\n",
1860 ent->status, ent->message);
1861 if (ent->status == SAM_STAT_TASK_SET_FULL)
1862 esp_event_queue_full(esp, ent);
1863
1864 if (ent->status == SAM_STAT_CHECK_CONDITION &&
1865 !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1866 ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
1867 esp_autosense(esp, ent);
1868 } else {
1869 esp_cmd_is_done(esp, ent, cmd, DID_OK);
1870 }
1871 } else if (ent->message == DISCONNECT) {
1872 esp_log_disconnect("Disconnecting tgt[%d] tag[%x:%x]\n",
1873 cmd->device->id,
1874 ent->tag[0], ent->tag[1]);
1875
1876 esp->active_cmd = NULL;
1877 esp_maybe_execute_command(esp);
1878 } else {
1879 shost_printk(KERN_INFO, esp->host,
1880 "Unexpected message %x in freebus\n",
1881 ent->message);
1882 esp_schedule_reset(esp);
1883 return 0;
1884 }
1885 if (esp->active_cmd)
1886 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1887 break;
1888 }
1889 case ESP_EVENT_MSGOUT: {
1890 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1891
1892 if (esp_debug & ESP_DEBUG_MSGOUT) {
1893 int i;
1894 printk("ESP: Sending message [ ");
1895 for (i = 0; i < esp->msg_out_len; i++)
1896 printk("%02x ", esp->msg_out[i]);
1897 printk("]\n");
1898 }
1899
1900 if (esp->rev == FASHME) {
1901 int i;
1902
1903 /* Always use the fifo. */
1904 for (i = 0; i < esp->msg_out_len; i++) {
1905 esp_write8(esp->msg_out[i], ESP_FDATA);
1906 esp_write8(0, ESP_FDATA);
1907 }
1908 scsi_esp_cmd(esp, ESP_CMD_TI);
1909 } else {
1910 if (esp->msg_out_len == 1) {
1911 esp_write8(esp->msg_out[0], ESP_FDATA);
1912 scsi_esp_cmd(esp, ESP_CMD_TI);
1913 } else if (esp->flags & ESP_FLAG_USE_FIFO) {
1914 for (i = 0; i < esp->msg_out_len; i++)
1915 esp_write8(esp->msg_out[i], ESP_FDATA);
1916 scsi_esp_cmd(esp, ESP_CMD_TI);
1917 } else {
1918 /* Use DMA. */
1919 memcpy(esp->command_block,
1920 esp->msg_out,
1921 esp->msg_out_len);
1922
1923 esp->ops->send_dma_cmd(esp,
1924 esp->command_block_dma,
1925 esp->msg_out_len,
1926 esp->msg_out_len,
1927 0,
1928 ESP_CMD_DMA|ESP_CMD_TI);
1929 }
1930 }
1931 esp_event(esp, ESP_EVENT_MSGOUT_DONE);
1932 break;
1933 }
1934 case ESP_EVENT_MSGOUT_DONE:
1935 if (esp->rev == FASHME) {
1936 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1937 } else {
1938 if (esp->msg_out_len > 1)
1939 esp->ops->dma_invalidate(esp);
1940
1941 /* XXX if the chip went into disconnected mode,
1942 * we can't run the phase state machine anyway.
1943 */
1944 if (!(esp->ireg & ESP_INTR_DC))
1945 scsi_esp_cmd(esp, ESP_CMD_NULL);
1946 }
1947
1948 esp->msg_out_len = 0;
1949
1950 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1951 goto again;
1952 case ESP_EVENT_MSGIN:
1953 if (esp->ireg & ESP_INTR_BSERV) {
1954 if (esp->rev == FASHME) {
1955 if (!(esp_read8(ESP_STATUS2) &
1956 ESP_STAT2_FEMPTY))
1957 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1958 } else {
1959 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1960 if (esp->rev == ESP100)
1961 scsi_esp_cmd(esp, ESP_CMD_NULL);
1962 }
1963 scsi_esp_cmd(esp, ESP_CMD_TI);
1964 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1965 return 1;
1966 }
1967 if (esp->ireg & ESP_INTR_FDONE) {
1968 u8 val;
1969
1970 if (esp->rev == FASHME)
1971 val = esp->fifo[0];
1972 else
1973 val = esp_read8(ESP_FDATA);
1974 esp->msg_in[esp->msg_in_len++] = val;
1975
1976 esp_log_msgin("Got msgin byte %x\n", val);
1977
1978 if (!esp_msgin_process(esp))
1979 esp->msg_in_len = 0;
1980
1981 if (esp->rev == FASHME)
1982 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1983
1984 scsi_esp_cmd(esp, ESP_CMD_MOK);
1985
1986 /* Check whether a bus reset is to be done next */
1987 if (esp->event == ESP_EVENT_RESET)
1988 return 0;
1989
1990 if (esp->event != ESP_EVENT_FREE_BUS)
1991 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1992 } else {
1993 shost_printk(KERN_INFO, esp->host,
1994 "MSGIN neither BSERV not FDON, resetting");
1995 esp_schedule_reset(esp);
1996 return 0;
1997 }
1998 break;
1999 case ESP_EVENT_CMD_START:
2000 memcpy(esp->command_block, esp->cmd_bytes_ptr,
2001 esp->cmd_bytes_left);
2002 esp_send_dma_cmd(esp, esp->cmd_bytes_left, 16, ESP_CMD_TI);
2003 esp_event(esp, ESP_EVENT_CMD_DONE);
2004 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
2005 break;
2006 case ESP_EVENT_CMD_DONE:
2007 esp->ops->dma_invalidate(esp);
2008 if (esp->ireg & ESP_INTR_BSERV) {
2009 esp_event(esp, ESP_EVENT_CHECK_PHASE);
2010 goto again;
2011 }
2012 esp_schedule_reset(esp);
2013 return 0;
2014
2015 case ESP_EVENT_RESET:
2016 scsi_esp_cmd(esp, ESP_CMD_RS);
2017 break;
2018
2019 default:
2020 shost_printk(KERN_INFO, esp->host,
2021 "Unexpected event %x, resetting\n", esp->event);
2022 esp_schedule_reset(esp);
2023 return 0;
2024 }
2025 return 1;
2026}
2027
2028static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
2029{
2030 struct scsi_cmnd *cmd = ent->cmd;
2031
2032 esp_unmap_dma(esp, cmd);
2033 esp_free_lun_tag(ent, cmd->device->hostdata);
2034 cmd->result = DID_RESET << 16;
2035
2036 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE)
2037 esp_unmap_sense(esp, ent);
2038
2039 scsi_done(cmd);
2040 list_del(&ent->list);
2041 esp_put_ent(esp, ent);
2042}
2043
2044static void esp_clear_hold(struct scsi_device *dev, void *data)
2045{
2046 struct esp_lun_data *lp = dev->hostdata;
2047
2048 BUG_ON(lp->num_tagged);
2049 lp->hold = 0;
2050}
2051
2052static void esp_reset_cleanup(struct esp *esp)
2053{
2054 struct esp_cmd_entry *ent, *tmp;
2055 int i;
2056
2057 list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
2058 struct scsi_cmnd *cmd = ent->cmd;
2059
2060 list_del(&ent->list);
2061 cmd->result = DID_RESET << 16;
2062 scsi_done(cmd);
2063 esp_put_ent(esp, ent);
2064 }
2065
2066 list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
2067 if (ent == esp->active_cmd)
2068 esp->active_cmd = NULL;
2069 esp_reset_cleanup_one(esp, ent);
2070 }
2071
2072 BUG_ON(esp->active_cmd != NULL);
2073
2074 /* Force renegotiation of sync/wide transfers. */
2075 for (i = 0; i < ESP_MAX_TARGET; i++) {
2076 struct esp_target_data *tp = &esp->target[i];
2077
2078 tp->esp_period = 0;
2079 tp->esp_offset = 0;
2080 tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
2081 ESP_CONFIG3_FSCSI |
2082 ESP_CONFIG3_FAST);
2083 tp->flags &= ~ESP_TGT_WIDE;
2084 tp->flags |= ESP_TGT_CHECK_NEGO;
2085
2086 if (tp->starget)
2087 __starget_for_each_device(tp->starget, NULL,
2088 esp_clear_hold);
2089 }
2090 esp->flags &= ~ESP_FLAG_RESETTING;
2091}
2092
2093/* Runs under host->lock */
2094static void __esp_interrupt(struct esp *esp)
2095{
2096 int finish_reset, intr_done;
2097 u8 phase;
2098
2099 /*
2100 * Once INTRPT is read STATUS and SSTEP are cleared.
2101 */
2102 esp->sreg = esp_read8(ESP_STATUS);
2103 esp->seqreg = esp_read8(ESP_SSTEP);
2104 esp->ireg = esp_read8(ESP_INTRPT);
2105
2106 if (esp->flags & ESP_FLAG_RESETTING) {
2107 finish_reset = 1;
2108 } else {
2109 if (esp_check_gross_error(esp))
2110 return;
2111
2112 finish_reset = esp_check_spur_intr(esp);
2113 if (finish_reset < 0)
2114 return;
2115 }
2116
2117 if (esp->ireg & ESP_INTR_SR)
2118 finish_reset = 1;
2119
2120 if (finish_reset) {
2121 esp_reset_cleanup(esp);
2122 if (esp->eh_reset) {
2123 complete(esp->eh_reset);
2124 esp->eh_reset = NULL;
2125 }
2126 return;
2127 }
2128
2129 phase = (esp->sreg & ESP_STAT_PMASK);
2130 if (esp->rev == FASHME) {
2131 if (((phase != ESP_DIP && phase != ESP_DOP) &&
2132 esp->select_state == ESP_SELECT_NONE &&
2133 esp->event != ESP_EVENT_STATUS &&
2134 esp->event != ESP_EVENT_DATA_DONE) ||
2135 (esp->ireg & ESP_INTR_RSEL)) {
2136 esp->sreg2 = esp_read8(ESP_STATUS2);
2137 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2138 (esp->sreg2 & ESP_STAT2_F1BYTE))
2139 hme_read_fifo(esp);
2140 }
2141 }
2142
2143 esp_log_intr("intr sreg[%02x] seqreg[%02x] "
2144 "sreg2[%02x] ireg[%02x]\n",
2145 esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
2146
2147 intr_done = 0;
2148
2149 if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
2150 shost_printk(KERN_INFO, esp->host,
2151 "unexpected IREG %02x\n", esp->ireg);
2152 if (esp->ireg & ESP_INTR_IC)
2153 esp_dump_cmd_log(esp);
2154
2155 esp_schedule_reset(esp);
2156 } else {
2157 if (esp->ireg & ESP_INTR_RSEL) {
2158 if (esp->active_cmd)
2159 (void) esp_finish_select(esp);
2160 intr_done = esp_reconnect(esp);
2161 } else {
2162 /* Some combination of FDONE, BSERV, DC. */
2163 if (esp->select_state != ESP_SELECT_NONE)
2164 intr_done = esp_finish_select(esp);
2165 }
2166 }
2167 while (!intr_done)
2168 intr_done = esp_process_event(esp);
2169}
2170
2171irqreturn_t scsi_esp_intr(int irq, void *dev_id)
2172{
2173 struct esp *esp = dev_id;
2174 unsigned long flags;
2175 irqreturn_t ret;
2176
2177 spin_lock_irqsave(esp->host->host_lock, flags);
2178 ret = IRQ_NONE;
2179 if (esp->ops->irq_pending(esp)) {
2180 ret = IRQ_HANDLED;
2181 for (;;) {
2182 int i;
2183
2184 __esp_interrupt(esp);
2185 if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
2186 break;
2187 esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
2188
2189 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
2190 if (esp->ops->irq_pending(esp))
2191 break;
2192 }
2193 if (i == ESP_QUICKIRQ_LIMIT)
2194 break;
2195 }
2196 }
2197 spin_unlock_irqrestore(esp->host->host_lock, flags);
2198
2199 return ret;
2200}
2201EXPORT_SYMBOL(scsi_esp_intr);
2202
2203static void esp_get_revision(struct esp *esp)
2204{
2205 u8 val;
2206
2207 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
2208 if (esp->config2 == 0) {
2209 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
2210 esp_write8(esp->config2, ESP_CFG2);
2211
2212 val = esp_read8(ESP_CFG2);
2213 val &= ~ESP_CONFIG2_MAGIC;
2214
2215 esp->config2 = 0;
2216 if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
2217 /*
2218 * If what we write to cfg2 does not come back,
2219 * cfg2 is not implemented.
2220 * Therefore this must be a plain esp100.
2221 */
2222 esp->rev = ESP100;
2223 return;
2224 }
2225 }
2226
2227 esp_set_all_config3(esp, 5);
2228 esp->prev_cfg3 = 5;
2229 esp_write8(esp->config2, ESP_CFG2);
2230 esp_write8(0, ESP_CFG3);
2231 esp_write8(esp->prev_cfg3, ESP_CFG3);
2232
2233 val = esp_read8(ESP_CFG3);
2234 if (val != 5) {
2235 /* The cfg2 register is implemented, however
2236 * cfg3 is not, must be esp100a.
2237 */
2238 esp->rev = ESP100A;
2239 } else {
2240 esp_set_all_config3(esp, 0);
2241 esp->prev_cfg3 = 0;
2242 esp_write8(esp->prev_cfg3, ESP_CFG3);
2243
2244 /* All of cfg{1,2,3} implemented, must be one of
2245 * the fas variants, figure out which one.
2246 */
2247 if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
2248 esp->rev = FAST;
2249 esp->sync_defp = SYNC_DEFP_FAST;
2250 } else {
2251 esp->rev = ESP236;
2252 }
2253 }
2254}
2255
2256static void esp_init_swstate(struct esp *esp)
2257{
2258 int i;
2259
2260 INIT_LIST_HEAD(&esp->queued_cmds);
2261 INIT_LIST_HEAD(&esp->active_cmds);
2262 INIT_LIST_HEAD(&esp->esp_cmd_pool);
2263
2264 /* Start with a clear state, domain validation (via ->slave_configure,
2265 * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
2266 * commands.
2267 */
2268 for (i = 0 ; i < ESP_MAX_TARGET; i++) {
2269 esp->target[i].flags = 0;
2270 esp->target[i].nego_goal_period = 0;
2271 esp->target[i].nego_goal_offset = 0;
2272 esp->target[i].nego_goal_width = 0;
2273 esp->target[i].nego_goal_tags = 0;
2274 }
2275}
2276
2277/* This places the ESP into a known state at boot time. */
2278static void esp_bootup_reset(struct esp *esp)
2279{
2280 u8 val;
2281
2282 /* Reset the DMA */
2283 esp->ops->reset_dma(esp);
2284
2285 /* Reset the ESP */
2286 esp_reset_esp(esp);
2287
2288 /* Reset the SCSI bus, but tell ESP not to generate an irq */
2289 val = esp_read8(ESP_CFG1);
2290 val |= ESP_CONFIG1_SRRDISAB;
2291 esp_write8(val, ESP_CFG1);
2292
2293 scsi_esp_cmd(esp, ESP_CMD_RS);
2294 udelay(400);
2295
2296 esp_write8(esp->config1, ESP_CFG1);
2297
2298 /* Eat any bitrot in the chip and we are done... */
2299 esp_read8(ESP_INTRPT);
2300}
2301
2302static void esp_set_clock_params(struct esp *esp)
2303{
2304 int fhz;
2305 u8 ccf;
2306
2307 /* This is getting messy but it has to be done correctly or else
2308 * you get weird behavior all over the place. We are trying to
2309 * basically figure out three pieces of information.
2310 *
2311 * a) Clock Conversion Factor
2312 *
2313 * This is a representation of the input crystal clock frequency
2314 * going into the ESP on this machine. Any operation whose timing
2315 * is longer than 400ns depends on this value being correct. For
2316 * example, you'll get blips for arbitration/selection during high
2317 * load or with multiple targets if this is not set correctly.
2318 *
2319 * b) Selection Time-Out
2320 *
2321 * The ESP isn't very bright and will arbitrate for the bus and try
2322 * to select a target forever if you let it. This value tells the
2323 * ESP when it has taken too long to negotiate and that it should
2324 * interrupt the CPU so we can see what happened. The value is
2325 * computed as follows (from NCR/Symbios chip docs).
2326 *
2327 * (Time Out Period) * (Input Clock)
2328 * STO = ----------------------------------
2329 * (8192) * (Clock Conversion Factor)
2330 *
2331 * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
2332 *
2333 * c) Imperical constants for synchronous offset and transfer period
2334 * register values
2335 *
2336 * This entails the smallest and largest sync period we could ever
2337 * handle on this ESP.
2338 */
2339 fhz = esp->cfreq;
2340
2341 ccf = ((fhz / 1000000) + 4) / 5;
2342 if (ccf == 1)
2343 ccf = 2;
2344
2345 /* If we can't find anything reasonable, just assume 20MHZ.
2346 * This is the clock frequency of the older sun4c's where I've
2347 * been unable to find the clock-frequency PROM property. All
2348 * other machines provide useful values it seems.
2349 */
2350 if (fhz <= 5000000 || ccf < 1 || ccf > 8) {
2351 fhz = 20000000;
2352 ccf = 4;
2353 }
2354
2355 esp->cfact = (ccf == 8 ? 0 : ccf);
2356 esp->cfreq = fhz;
2357 esp->ccycle = ESP_HZ_TO_CYCLE(fhz);
2358 esp->ctick = ESP_TICK(ccf, esp->ccycle);
2359 esp->neg_defp = ESP_NEG_DEFP(fhz, ccf);
2360 esp->sync_defp = SYNC_DEFP_SLOW;
2361}
2362
2363static const char *esp_chip_names[] = {
2364 "ESP100",
2365 "ESP100A",
2366 "ESP236",
2367 "FAS236",
2368 "AM53C974",
2369 "53CF9x-2",
2370 "FAS100A",
2371 "FAST",
2372 "FASHME",
2373};
2374
2375static struct scsi_transport_template *esp_transport_template;
2376
2377int scsi_esp_register(struct esp *esp)
2378{
2379 static int instance;
2380 int err;
2381
2382 if (!esp->num_tags)
2383 esp->num_tags = ESP_DEFAULT_TAGS;
2384 esp->host->transportt = esp_transport_template;
2385 esp->host->max_lun = ESP_MAX_LUN;
2386 esp->host->cmd_per_lun = 2;
2387 esp->host->unique_id = instance;
2388
2389 esp_set_clock_params(esp);
2390
2391 esp_get_revision(esp);
2392
2393 esp_init_swstate(esp);
2394
2395 esp_bootup_reset(esp);
2396
2397 dev_printk(KERN_INFO, esp->dev, "esp%u: regs[%1p:%1p] irq[%u]\n",
2398 esp->host->unique_id, esp->regs, esp->dma_regs,
2399 esp->host->irq);
2400 dev_printk(KERN_INFO, esp->dev,
2401 "esp%u: is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
2402 esp->host->unique_id, esp_chip_names[esp->rev],
2403 esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
2404
2405 /* Let the SCSI bus reset settle. */
2406 ssleep(esp_bus_reset_settle);
2407
2408 err = scsi_add_host(esp->host, esp->dev);
2409 if (err)
2410 return err;
2411
2412 instance++;
2413
2414 scsi_scan_host(esp->host);
2415
2416 return 0;
2417}
2418EXPORT_SYMBOL(scsi_esp_register);
2419
2420void scsi_esp_unregister(struct esp *esp)
2421{
2422 scsi_remove_host(esp->host);
2423}
2424EXPORT_SYMBOL(scsi_esp_unregister);
2425
2426static int esp_target_alloc(struct scsi_target *starget)
2427{
2428 struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
2429 struct esp_target_data *tp = &esp->target[starget->id];
2430
2431 tp->starget = starget;
2432
2433 return 0;
2434}
2435
2436static void esp_target_destroy(struct scsi_target *starget)
2437{
2438 struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
2439 struct esp_target_data *tp = &esp->target[starget->id];
2440
2441 tp->starget = NULL;
2442}
2443
2444static int esp_slave_alloc(struct scsi_device *dev)
2445{
2446 struct esp *esp = shost_priv(dev->host);
2447 struct esp_target_data *tp = &esp->target[dev->id];
2448 struct esp_lun_data *lp;
2449
2450 lp = kzalloc(sizeof(*lp), GFP_KERNEL);
2451 if (!lp)
2452 return -ENOMEM;
2453 dev->hostdata = lp;
2454
2455 spi_min_period(tp->starget) = esp->min_period;
2456 spi_max_offset(tp->starget) = 15;
2457
2458 if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
2459 spi_max_width(tp->starget) = 1;
2460 else
2461 spi_max_width(tp->starget) = 0;
2462
2463 return 0;
2464}
2465
2466static int esp_slave_configure(struct scsi_device *dev)
2467{
2468 struct esp *esp = shost_priv(dev->host);
2469 struct esp_target_data *tp = &esp->target[dev->id];
2470
2471 if (dev->tagged_supported)
2472 scsi_change_queue_depth(dev, esp->num_tags);
2473
2474 tp->flags |= ESP_TGT_DISCONNECT;
2475
2476 if (!spi_initial_dv(dev->sdev_target))
2477 spi_dv_device(dev);
2478
2479 return 0;
2480}
2481
2482static void esp_slave_destroy(struct scsi_device *dev)
2483{
2484 struct esp_lun_data *lp = dev->hostdata;
2485
2486 kfree(lp);
2487 dev->hostdata = NULL;
2488}
2489
2490static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
2491{
2492 struct esp *esp = shost_priv(cmd->device->host);
2493 struct esp_cmd_entry *ent, *tmp;
2494 struct completion eh_done;
2495 unsigned long flags;
2496
2497 /* XXX This helps a lot with debugging but might be a bit
2498 * XXX much for the final driver.
2499 */
2500 spin_lock_irqsave(esp->host->host_lock, flags);
2501 shost_printk(KERN_ERR, esp->host, "Aborting command [%p:%02x]\n",
2502 cmd, cmd->cmnd[0]);
2503 ent = esp->active_cmd;
2504 if (ent)
2505 shost_printk(KERN_ERR, esp->host,
2506 "Current command [%p:%02x]\n",
2507 ent->cmd, ent->cmd->cmnd[0]);
2508 list_for_each_entry(ent, &esp->queued_cmds, list) {
2509 shost_printk(KERN_ERR, esp->host, "Queued command [%p:%02x]\n",
2510 ent->cmd, ent->cmd->cmnd[0]);
2511 }
2512 list_for_each_entry(ent, &esp->active_cmds, list) {
2513 shost_printk(KERN_ERR, esp->host, " Active command [%p:%02x]\n",
2514 ent->cmd, ent->cmd->cmnd[0]);
2515 }
2516 esp_dump_cmd_log(esp);
2517 spin_unlock_irqrestore(esp->host->host_lock, flags);
2518
2519 spin_lock_irqsave(esp->host->host_lock, flags);
2520
2521 ent = NULL;
2522 list_for_each_entry(tmp, &esp->queued_cmds, list) {
2523 if (tmp->cmd == cmd) {
2524 ent = tmp;
2525 break;
2526 }
2527 }
2528
2529 if (ent) {
2530 /* Easiest case, we didn't even issue the command
2531 * yet so it is trivial to abort.
2532 */
2533 list_del(&ent->list);
2534
2535 cmd->result = DID_ABORT << 16;
2536 scsi_done(cmd);
2537
2538 esp_put_ent(esp, ent);
2539
2540 goto out_success;
2541 }
2542
2543 init_completion(&eh_done);
2544
2545 ent = esp->active_cmd;
2546 if (ent && ent->cmd == cmd) {
2547 /* Command is the currently active command on
2548 * the bus. If we already have an output message
2549 * pending, no dice.
2550 */
2551 if (esp->msg_out_len)
2552 goto out_failure;
2553
2554 /* Send out an abort, encouraging the target to
2555 * go to MSGOUT phase by asserting ATN.
2556 */
2557 esp->msg_out[0] = ABORT_TASK_SET;
2558 esp->msg_out_len = 1;
2559 ent->eh_done = &eh_done;
2560
2561 scsi_esp_cmd(esp, ESP_CMD_SATN);
2562 } else {
2563 /* The command is disconnected. This is not easy to
2564 * abort. For now we fail and let the scsi error
2565 * handling layer go try a scsi bus reset or host
2566 * reset.
2567 *
2568 * What we could do is put together a scsi command
2569 * solely for the purpose of sending an abort message
2570 * to the target. Coming up with all the code to
2571 * cook up scsi commands, special case them everywhere,
2572 * etc. is for questionable gain and it would be better
2573 * if the generic scsi error handling layer could do at
2574 * least some of that for us.
2575 *
2576 * Anyways this is an area for potential future improvement
2577 * in this driver.
2578 */
2579 goto out_failure;
2580 }
2581
2582 spin_unlock_irqrestore(esp->host->host_lock, flags);
2583
2584 if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
2585 spin_lock_irqsave(esp->host->host_lock, flags);
2586 ent->eh_done = NULL;
2587 spin_unlock_irqrestore(esp->host->host_lock, flags);
2588
2589 return FAILED;
2590 }
2591
2592 return SUCCESS;
2593
2594out_success:
2595 spin_unlock_irqrestore(esp->host->host_lock, flags);
2596 return SUCCESS;
2597
2598out_failure:
2599 /* XXX This might be a good location to set ESP_TGT_BROKEN
2600 * XXX since we know which target/lun in particular is
2601 * XXX causing trouble.
2602 */
2603 spin_unlock_irqrestore(esp->host->host_lock, flags);
2604 return FAILED;
2605}
2606
2607static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
2608{
2609 struct esp *esp = shost_priv(cmd->device->host);
2610 struct completion eh_reset;
2611 unsigned long flags;
2612
2613 init_completion(&eh_reset);
2614
2615 spin_lock_irqsave(esp->host->host_lock, flags);
2616
2617 esp->eh_reset = &eh_reset;
2618
2619 /* XXX This is too simple... We should add lots of
2620 * XXX checks here so that if we find that the chip is
2621 * XXX very wedged we return failure immediately so
2622 * XXX that we can perform a full chip reset.
2623 */
2624 esp->flags |= ESP_FLAG_RESETTING;
2625 scsi_esp_cmd(esp, ESP_CMD_RS);
2626
2627 spin_unlock_irqrestore(esp->host->host_lock, flags);
2628
2629 ssleep(esp_bus_reset_settle);
2630
2631 if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
2632 spin_lock_irqsave(esp->host->host_lock, flags);
2633 esp->eh_reset = NULL;
2634 spin_unlock_irqrestore(esp->host->host_lock, flags);
2635
2636 return FAILED;
2637 }
2638
2639 return SUCCESS;
2640}
2641
2642/* All bets are off, reset the entire device. */
2643static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
2644{
2645 struct esp *esp = shost_priv(cmd->device->host);
2646 unsigned long flags;
2647
2648 spin_lock_irqsave(esp->host->host_lock, flags);
2649 esp_bootup_reset(esp);
2650 esp_reset_cleanup(esp);
2651 spin_unlock_irqrestore(esp->host->host_lock, flags);
2652
2653 ssleep(esp_bus_reset_settle);
2654
2655 return SUCCESS;
2656}
2657
2658static const char *esp_info(struct Scsi_Host *host)
2659{
2660 return "esp";
2661}
2662
2663const struct scsi_host_template scsi_esp_template = {
2664 .module = THIS_MODULE,
2665 .name = "esp",
2666 .info = esp_info,
2667 .queuecommand = esp_queuecommand,
2668 .target_alloc = esp_target_alloc,
2669 .target_destroy = esp_target_destroy,
2670 .slave_alloc = esp_slave_alloc,
2671 .slave_configure = esp_slave_configure,
2672 .slave_destroy = esp_slave_destroy,
2673 .eh_abort_handler = esp_eh_abort_handler,
2674 .eh_bus_reset_handler = esp_eh_bus_reset_handler,
2675 .eh_host_reset_handler = esp_eh_host_reset_handler,
2676 .can_queue = 7,
2677 .this_id = 7,
2678 .sg_tablesize = SG_ALL,
2679 .max_sectors = 0xffff,
2680 .skip_settle_delay = 1,
2681 .cmd_size = sizeof(struct esp_cmd_priv),
2682};
2683EXPORT_SYMBOL(scsi_esp_template);
2684
2685static void esp_get_signalling(struct Scsi_Host *host)
2686{
2687 struct esp *esp = shost_priv(host);
2688 enum spi_signal_type type;
2689
2690 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
2691 type = SPI_SIGNAL_HVD;
2692 else
2693 type = SPI_SIGNAL_SE;
2694
2695 spi_signalling(host) = type;
2696}
2697
2698static void esp_set_offset(struct scsi_target *target, int offset)
2699{
2700 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2701 struct esp *esp = shost_priv(host);
2702 struct esp_target_data *tp = &esp->target[target->id];
2703
2704 if (esp->flags & ESP_FLAG_DISABLE_SYNC)
2705 tp->nego_goal_offset = 0;
2706 else
2707 tp->nego_goal_offset = offset;
2708 tp->flags |= ESP_TGT_CHECK_NEGO;
2709}
2710
2711static void esp_set_period(struct scsi_target *target, int period)
2712{
2713 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2714 struct esp *esp = shost_priv(host);
2715 struct esp_target_data *tp = &esp->target[target->id];
2716
2717 tp->nego_goal_period = period;
2718 tp->flags |= ESP_TGT_CHECK_NEGO;
2719}
2720
2721static void esp_set_width(struct scsi_target *target, int width)
2722{
2723 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2724 struct esp *esp = shost_priv(host);
2725 struct esp_target_data *tp = &esp->target[target->id];
2726
2727 tp->nego_goal_width = (width ? 1 : 0);
2728 tp->flags |= ESP_TGT_CHECK_NEGO;
2729}
2730
2731static struct spi_function_template esp_transport_ops = {
2732 .set_offset = esp_set_offset,
2733 .show_offset = 1,
2734 .set_period = esp_set_period,
2735 .show_period = 1,
2736 .set_width = esp_set_width,
2737 .show_width = 1,
2738 .get_signalling = esp_get_signalling,
2739};
2740
2741static int __init esp_init(void)
2742{
2743 esp_transport_template = spi_attach_transport(&esp_transport_ops);
2744 if (!esp_transport_template)
2745 return -ENODEV;
2746
2747 return 0;
2748}
2749
2750static void __exit esp_exit(void)
2751{
2752 spi_release_transport(esp_transport_template);
2753}
2754
2755MODULE_DESCRIPTION("ESP SCSI driver core");
2756MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
2757MODULE_LICENSE("GPL");
2758MODULE_VERSION(DRV_VERSION);
2759
2760module_param(esp_bus_reset_settle, int, 0);
2761MODULE_PARM_DESC(esp_bus_reset_settle,
2762 "ESP scsi bus reset delay in seconds");
2763
2764module_param(esp_debug, int, 0);
2765MODULE_PARM_DESC(esp_debug,
2766"ESP bitmapped debugging message enable value:\n"
2767" 0x00000001 Log interrupt events\n"
2768" 0x00000002 Log scsi commands\n"
2769" 0x00000004 Log resets\n"
2770" 0x00000008 Log message in events\n"
2771" 0x00000010 Log message out events\n"
2772" 0x00000020 Log command completion\n"
2773" 0x00000040 Log disconnects\n"
2774" 0x00000080 Log data start\n"
2775" 0x00000100 Log data done\n"
2776" 0x00000200 Log reconnects\n"
2777" 0x00000400 Log auto-sense data\n"
2778);
2779
2780module_init(esp_init);
2781module_exit(esp_exit);
2782
2783#ifdef CONFIG_SCSI_ESP_PIO
2784static inline unsigned int esp_wait_for_fifo(struct esp *esp)
2785{
2786 int i = 500000;
2787
2788 do {
2789 unsigned int fbytes = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
2790
2791 if (fbytes)
2792 return fbytes;
2793
2794 udelay(1);
2795 } while (--i);
2796
2797 shost_printk(KERN_ERR, esp->host, "FIFO is empty. sreg [%02x]\n",
2798 esp_read8(ESP_STATUS));
2799 return 0;
2800}
2801
2802static inline int esp_wait_for_intr(struct esp *esp)
2803{
2804 int i = 500000;
2805
2806 do {
2807 esp->sreg = esp_read8(ESP_STATUS);
2808 if (esp->sreg & ESP_STAT_INTR)
2809 return 0;
2810
2811 udelay(1);
2812 } while (--i);
2813
2814 shost_printk(KERN_ERR, esp->host, "IRQ timeout. sreg [%02x]\n",
2815 esp->sreg);
2816 return 1;
2817}
2818
2819#define ESP_FIFO_SIZE 16
2820
2821void esp_send_pio_cmd(struct esp *esp, u32 addr, u32 esp_count,
2822 u32 dma_count, int write, u8 cmd)
2823{
2824 u8 phase = esp->sreg & ESP_STAT_PMASK;
2825
2826 cmd &= ~ESP_CMD_DMA;
2827 esp->send_cmd_error = 0;
2828
2829 if (write) {
2830 u8 *dst = (u8 *)addr;
2831 u8 mask = ~(phase == ESP_MIP ? ESP_INTR_FDONE : ESP_INTR_BSERV);
2832
2833 scsi_esp_cmd(esp, cmd);
2834
2835 while (1) {
2836 if (!esp_wait_for_fifo(esp))
2837 break;
2838
2839 *dst++ = readb(esp->fifo_reg);
2840 --esp_count;
2841
2842 if (!esp_count)
2843 break;
2844
2845 if (esp_wait_for_intr(esp)) {
2846 esp->send_cmd_error = 1;
2847 break;
2848 }
2849
2850 if ((esp->sreg & ESP_STAT_PMASK) != phase)
2851 break;
2852
2853 esp->ireg = esp_read8(ESP_INTRPT);
2854 if (esp->ireg & mask) {
2855 esp->send_cmd_error = 1;
2856 break;
2857 }
2858
2859 if (phase == ESP_MIP)
2860 esp_write8(ESP_CMD_MOK, ESP_CMD);
2861
2862 esp_write8(ESP_CMD_TI, ESP_CMD);
2863 }
2864 } else {
2865 unsigned int n = ESP_FIFO_SIZE;
2866 u8 *src = (u8 *)addr;
2867
2868 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
2869
2870 if (n > esp_count)
2871 n = esp_count;
2872 writesb(esp->fifo_reg, src, n);
2873 src += n;
2874 esp_count -= n;
2875
2876 scsi_esp_cmd(esp, cmd);
2877
2878 while (esp_count) {
2879 if (esp_wait_for_intr(esp)) {
2880 esp->send_cmd_error = 1;
2881 break;
2882 }
2883
2884 if ((esp->sreg & ESP_STAT_PMASK) != phase)
2885 break;
2886
2887 esp->ireg = esp_read8(ESP_INTRPT);
2888 if (esp->ireg & ~ESP_INTR_BSERV) {
2889 esp->send_cmd_error = 1;
2890 break;
2891 }
2892
2893 n = ESP_FIFO_SIZE -
2894 (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES);
2895
2896 if (n > esp_count)
2897 n = esp_count;
2898 writesb(esp->fifo_reg, src, n);
2899 src += n;
2900 esp_count -= n;
2901
2902 esp_write8(ESP_CMD_TI, ESP_CMD);
2903 }
2904 }
2905
2906 esp->send_cmd_residual = esp_count;
2907}
2908EXPORT_SYMBOL(esp_send_pio_cmd);
2909#endif
1/* esp_scsi.c: ESP SCSI driver.
2 *
3 * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
4 */
5
6#include <linux/kernel.h>
7#include <linux/types.h>
8#include <linux/slab.h>
9#include <linux/delay.h>
10#include <linux/list.h>
11#include <linux/completion.h>
12#include <linux/kallsyms.h>
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/irqreturn.h>
17
18#include <asm/irq.h>
19#include <asm/io.h>
20#include <asm/dma.h>
21
22#include <scsi/scsi.h>
23#include <scsi/scsi_host.h>
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_device.h>
26#include <scsi/scsi_tcq.h>
27#include <scsi/scsi_dbg.h>
28#include <scsi/scsi_transport_spi.h>
29
30#include "esp_scsi.h"
31
32#define DRV_MODULE_NAME "esp"
33#define PFX DRV_MODULE_NAME ": "
34#define DRV_VERSION "2.000"
35#define DRV_MODULE_RELDATE "April 19, 2007"
36
37/* SCSI bus reset settle time in seconds. */
38static int esp_bus_reset_settle = 3;
39
40static u32 esp_debug;
41#define ESP_DEBUG_INTR 0x00000001
42#define ESP_DEBUG_SCSICMD 0x00000002
43#define ESP_DEBUG_RESET 0x00000004
44#define ESP_DEBUG_MSGIN 0x00000008
45#define ESP_DEBUG_MSGOUT 0x00000010
46#define ESP_DEBUG_CMDDONE 0x00000020
47#define ESP_DEBUG_DISCONNECT 0x00000040
48#define ESP_DEBUG_DATASTART 0x00000080
49#define ESP_DEBUG_DATADONE 0x00000100
50#define ESP_DEBUG_RECONNECT 0x00000200
51#define ESP_DEBUG_AUTOSENSE 0x00000400
52
53#define esp_log_intr(f, a...) \
54do { if (esp_debug & ESP_DEBUG_INTR) \
55 printk(f, ## a); \
56} while (0)
57
58#define esp_log_reset(f, a...) \
59do { if (esp_debug & ESP_DEBUG_RESET) \
60 printk(f, ## a); \
61} while (0)
62
63#define esp_log_msgin(f, a...) \
64do { if (esp_debug & ESP_DEBUG_MSGIN) \
65 printk(f, ## a); \
66} while (0)
67
68#define esp_log_msgout(f, a...) \
69do { if (esp_debug & ESP_DEBUG_MSGOUT) \
70 printk(f, ## a); \
71} while (0)
72
73#define esp_log_cmddone(f, a...) \
74do { if (esp_debug & ESP_DEBUG_CMDDONE) \
75 printk(f, ## a); \
76} while (0)
77
78#define esp_log_disconnect(f, a...) \
79do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
80 printk(f, ## a); \
81} while (0)
82
83#define esp_log_datastart(f, a...) \
84do { if (esp_debug & ESP_DEBUG_DATASTART) \
85 printk(f, ## a); \
86} while (0)
87
88#define esp_log_datadone(f, a...) \
89do { if (esp_debug & ESP_DEBUG_DATADONE) \
90 printk(f, ## a); \
91} while (0)
92
93#define esp_log_reconnect(f, a...) \
94do { if (esp_debug & ESP_DEBUG_RECONNECT) \
95 printk(f, ## a); \
96} while (0)
97
98#define esp_log_autosense(f, a...) \
99do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
100 printk(f, ## a); \
101} while (0)
102
103#define esp_read8(REG) esp->ops->esp_read8(esp, REG)
104#define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
105
106static void esp_log_fill_regs(struct esp *esp,
107 struct esp_event_ent *p)
108{
109 p->sreg = esp->sreg;
110 p->seqreg = esp->seqreg;
111 p->sreg2 = esp->sreg2;
112 p->ireg = esp->ireg;
113 p->select_state = esp->select_state;
114 p->event = esp->event;
115}
116
117void scsi_esp_cmd(struct esp *esp, u8 val)
118{
119 struct esp_event_ent *p;
120 int idx = esp->esp_event_cur;
121
122 p = &esp->esp_event_log[idx];
123 p->type = ESP_EVENT_TYPE_CMD;
124 p->val = val;
125 esp_log_fill_regs(esp, p);
126
127 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
128
129 esp_write8(val, ESP_CMD);
130}
131EXPORT_SYMBOL(scsi_esp_cmd);
132
133static void esp_event(struct esp *esp, u8 val)
134{
135 struct esp_event_ent *p;
136 int idx = esp->esp_event_cur;
137
138 p = &esp->esp_event_log[idx];
139 p->type = ESP_EVENT_TYPE_EVENT;
140 p->val = val;
141 esp_log_fill_regs(esp, p);
142
143 esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
144
145 esp->event = val;
146}
147
148static void esp_dump_cmd_log(struct esp *esp)
149{
150 int idx = esp->esp_event_cur;
151 int stop = idx;
152
153 printk(KERN_INFO PFX "esp%d: Dumping command log\n",
154 esp->host->unique_id);
155 do {
156 struct esp_event_ent *p = &esp->esp_event_log[idx];
157
158 printk(KERN_INFO PFX "esp%d: ent[%d] %s ",
159 esp->host->unique_id, idx,
160 p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT");
161
162 printk("val[%02x] sreg[%02x] seqreg[%02x] "
163 "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
164 p->val, p->sreg, p->seqreg,
165 p->sreg2, p->ireg, p->select_state, p->event);
166
167 idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
168 } while (idx != stop);
169}
170
171static void esp_flush_fifo(struct esp *esp)
172{
173 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
174 if (esp->rev == ESP236) {
175 int lim = 1000;
176
177 while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
178 if (--lim == 0) {
179 printk(KERN_ALERT PFX "esp%d: ESP_FF_BYTES "
180 "will not clear!\n",
181 esp->host->unique_id);
182 break;
183 }
184 udelay(1);
185 }
186 }
187}
188
189static void hme_read_fifo(struct esp *esp)
190{
191 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
192 int idx = 0;
193
194 while (fcnt--) {
195 esp->fifo[idx++] = esp_read8(ESP_FDATA);
196 esp->fifo[idx++] = esp_read8(ESP_FDATA);
197 }
198 if (esp->sreg2 & ESP_STAT2_F1BYTE) {
199 esp_write8(0, ESP_FDATA);
200 esp->fifo[idx++] = esp_read8(ESP_FDATA);
201 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
202 }
203 esp->fifo_cnt = idx;
204}
205
206static void esp_set_all_config3(struct esp *esp, u8 val)
207{
208 int i;
209
210 for (i = 0; i < ESP_MAX_TARGET; i++)
211 esp->target[i].esp_config3 = val;
212}
213
214/* Reset the ESP chip, _not_ the SCSI bus. */
215static void esp_reset_esp(struct esp *esp)
216{
217 u8 family_code, version;
218
219 /* Now reset the ESP chip */
220 scsi_esp_cmd(esp, ESP_CMD_RC);
221 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
222 if (esp->rev == FAST)
223 esp_write8(ESP_CONFIG2_FENAB, ESP_CFG2);
224 scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
225
226 /* This is the only point at which it is reliable to read
227 * the ID-code for a fast ESP chip variants.
228 */
229 esp->max_period = ((35 * esp->ccycle) / 1000);
230 if (esp->rev == FAST) {
231 version = esp_read8(ESP_UID);
232 family_code = (version & 0xf8) >> 3;
233 if (family_code == 0x02)
234 esp->rev = FAS236;
235 else if (family_code == 0x0a)
236 esp->rev = FASHME; /* Version is usually '5'. */
237 else
238 esp->rev = FAS100A;
239 esp->min_period = ((4 * esp->ccycle) / 1000);
240 } else {
241 esp->min_period = ((5 * esp->ccycle) / 1000);
242 }
243 esp->max_period = (esp->max_period + 3)>>2;
244 esp->min_period = (esp->min_period + 3)>>2;
245
246 esp_write8(esp->config1, ESP_CFG1);
247 switch (esp->rev) {
248 case ESP100:
249 /* nothing to do */
250 break;
251
252 case ESP100A:
253 esp_write8(esp->config2, ESP_CFG2);
254 break;
255
256 case ESP236:
257 /* Slow 236 */
258 esp_write8(esp->config2, ESP_CFG2);
259 esp->prev_cfg3 = esp->target[0].esp_config3;
260 esp_write8(esp->prev_cfg3, ESP_CFG3);
261 break;
262
263 case FASHME:
264 esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
265 /* fallthrough... */
266
267 case FAS236:
268 /* Fast 236 or HME */
269 esp_write8(esp->config2, ESP_CFG2);
270 if (esp->rev == FASHME) {
271 u8 cfg3 = esp->target[0].esp_config3;
272
273 cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
274 if (esp->scsi_id >= 8)
275 cfg3 |= ESP_CONFIG3_IDBIT3;
276 esp_set_all_config3(esp, cfg3);
277 } else {
278 u32 cfg3 = esp->target[0].esp_config3;
279
280 cfg3 |= ESP_CONFIG3_FCLK;
281 esp_set_all_config3(esp, cfg3);
282 }
283 esp->prev_cfg3 = esp->target[0].esp_config3;
284 esp_write8(esp->prev_cfg3, ESP_CFG3);
285 if (esp->rev == FASHME) {
286 esp->radelay = 80;
287 } else {
288 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
289 esp->radelay = 0;
290 else
291 esp->radelay = 96;
292 }
293 break;
294
295 case FAS100A:
296 /* Fast 100a */
297 esp_write8(esp->config2, ESP_CFG2);
298 esp_set_all_config3(esp,
299 (esp->target[0].esp_config3 |
300 ESP_CONFIG3_FCLOCK));
301 esp->prev_cfg3 = esp->target[0].esp_config3;
302 esp_write8(esp->prev_cfg3, ESP_CFG3);
303 esp->radelay = 32;
304 break;
305
306 default:
307 break;
308 }
309
310 /* Reload the configuration registers */
311 esp_write8(esp->cfact, ESP_CFACT);
312
313 esp->prev_stp = 0;
314 esp_write8(esp->prev_stp, ESP_STP);
315
316 esp->prev_soff = 0;
317 esp_write8(esp->prev_soff, ESP_SOFF);
318
319 esp_write8(esp->neg_defp, ESP_TIMEO);
320
321 /* Eat any bitrot in the chip */
322 esp_read8(ESP_INTRPT);
323 udelay(100);
324}
325
326static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
327{
328 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
329 struct scatterlist *sg = scsi_sglist(cmd);
330 int dir = cmd->sc_data_direction;
331 int total, i;
332
333 if (dir == DMA_NONE)
334 return;
335
336 spriv->u.num_sg = esp->ops->map_sg(esp, sg, scsi_sg_count(cmd), dir);
337 spriv->cur_residue = sg_dma_len(sg);
338 spriv->cur_sg = sg;
339
340 total = 0;
341 for (i = 0; i < spriv->u.num_sg; i++)
342 total += sg_dma_len(&sg[i]);
343 spriv->tot_residue = total;
344}
345
346static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
347 struct scsi_cmnd *cmd)
348{
349 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
350
351 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
352 return ent->sense_dma +
353 (ent->sense_ptr - cmd->sense_buffer);
354 }
355
356 return sg_dma_address(p->cur_sg) +
357 (sg_dma_len(p->cur_sg) -
358 p->cur_residue);
359}
360
361static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
362 struct scsi_cmnd *cmd)
363{
364 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
365
366 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
367 return SCSI_SENSE_BUFFERSIZE -
368 (ent->sense_ptr - cmd->sense_buffer);
369 }
370 return p->cur_residue;
371}
372
373static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
374 struct scsi_cmnd *cmd, unsigned int len)
375{
376 struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
377
378 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
379 ent->sense_ptr += len;
380 return;
381 }
382
383 p->cur_residue -= len;
384 p->tot_residue -= len;
385 if (p->cur_residue < 0 || p->tot_residue < 0) {
386 printk(KERN_ERR PFX "esp%d: Data transfer overflow.\n",
387 esp->host->unique_id);
388 printk(KERN_ERR PFX "esp%d: cur_residue[%d] tot_residue[%d] "
389 "len[%u]\n",
390 esp->host->unique_id,
391 p->cur_residue, p->tot_residue, len);
392 p->cur_residue = 0;
393 p->tot_residue = 0;
394 }
395 if (!p->cur_residue && p->tot_residue) {
396 p->cur_sg++;
397 p->cur_residue = sg_dma_len(p->cur_sg);
398 }
399}
400
401static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
402{
403 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
404 int dir = cmd->sc_data_direction;
405
406 if (dir == DMA_NONE)
407 return;
408
409 esp->ops->unmap_sg(esp, scsi_sglist(cmd), spriv->u.num_sg, dir);
410}
411
412static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
413{
414 struct scsi_cmnd *cmd = ent->cmd;
415 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
416
417 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
418 ent->saved_sense_ptr = ent->sense_ptr;
419 return;
420 }
421 ent->saved_cur_residue = spriv->cur_residue;
422 ent->saved_cur_sg = spriv->cur_sg;
423 ent->saved_tot_residue = spriv->tot_residue;
424}
425
426static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
427{
428 struct scsi_cmnd *cmd = ent->cmd;
429 struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
430
431 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
432 ent->sense_ptr = ent->saved_sense_ptr;
433 return;
434 }
435 spriv->cur_residue = ent->saved_cur_residue;
436 spriv->cur_sg = ent->saved_cur_sg;
437 spriv->tot_residue = ent->saved_tot_residue;
438}
439
440static void esp_check_command_len(struct esp *esp, struct scsi_cmnd *cmd)
441{
442 if (cmd->cmd_len == 6 ||
443 cmd->cmd_len == 10 ||
444 cmd->cmd_len == 12) {
445 esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
446 } else {
447 esp->flags |= ESP_FLAG_DOING_SLOWCMD;
448 }
449}
450
451static void esp_write_tgt_config3(struct esp *esp, int tgt)
452{
453 if (esp->rev > ESP100A) {
454 u8 val = esp->target[tgt].esp_config3;
455
456 if (val != esp->prev_cfg3) {
457 esp->prev_cfg3 = val;
458 esp_write8(val, ESP_CFG3);
459 }
460 }
461}
462
463static void esp_write_tgt_sync(struct esp *esp, int tgt)
464{
465 u8 off = esp->target[tgt].esp_offset;
466 u8 per = esp->target[tgt].esp_period;
467
468 if (off != esp->prev_soff) {
469 esp->prev_soff = off;
470 esp_write8(off, ESP_SOFF);
471 }
472 if (per != esp->prev_stp) {
473 esp->prev_stp = per;
474 esp_write8(per, ESP_STP);
475 }
476}
477
478static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
479{
480 if (esp->rev == FASHME) {
481 /* Arbitrary segment boundaries, 24-bit counts. */
482 if (dma_len > (1U << 24))
483 dma_len = (1U << 24);
484 } else {
485 u32 base, end;
486
487 /* ESP chip limits other variants by 16-bits of transfer
488 * count. Actually on FAS100A and FAS236 we could get
489 * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
490 * in the ESP_CFG2 register but that causes other unwanted
491 * changes so we don't use it currently.
492 */
493 if (dma_len > (1U << 16))
494 dma_len = (1U << 16);
495
496 /* All of the DMA variants hooked up to these chips
497 * cannot handle crossing a 24-bit address boundary.
498 */
499 base = dma_addr & ((1U << 24) - 1U);
500 end = base + dma_len;
501 if (end > (1U << 24))
502 end = (1U <<24);
503 dma_len = end - base;
504 }
505 return dma_len;
506}
507
508static int esp_need_to_nego_wide(struct esp_target_data *tp)
509{
510 struct scsi_target *target = tp->starget;
511
512 return spi_width(target) != tp->nego_goal_width;
513}
514
515static int esp_need_to_nego_sync(struct esp_target_data *tp)
516{
517 struct scsi_target *target = tp->starget;
518
519 /* When offset is zero, period is "don't care". */
520 if (!spi_offset(target) && !tp->nego_goal_offset)
521 return 0;
522
523 if (spi_offset(target) == tp->nego_goal_offset &&
524 spi_period(target) == tp->nego_goal_period)
525 return 0;
526
527 return 1;
528}
529
530static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
531 struct esp_lun_data *lp)
532{
533 if (!ent->orig_tag[0]) {
534 /* Non-tagged, slot already taken? */
535 if (lp->non_tagged_cmd)
536 return -EBUSY;
537
538 if (lp->hold) {
539 /* We are being held by active tagged
540 * commands.
541 */
542 if (lp->num_tagged)
543 return -EBUSY;
544
545 /* Tagged commands completed, we can unplug
546 * the queue and run this untagged command.
547 */
548 lp->hold = 0;
549 } else if (lp->num_tagged) {
550 /* Plug the queue until num_tagged decreases
551 * to zero in esp_free_lun_tag.
552 */
553 lp->hold = 1;
554 return -EBUSY;
555 }
556
557 lp->non_tagged_cmd = ent;
558 return 0;
559 } else {
560 /* Tagged command, see if blocked by a
561 * non-tagged one.
562 */
563 if (lp->non_tagged_cmd || lp->hold)
564 return -EBUSY;
565 }
566
567 BUG_ON(lp->tagged_cmds[ent->orig_tag[1]]);
568
569 lp->tagged_cmds[ent->orig_tag[1]] = ent;
570 lp->num_tagged++;
571
572 return 0;
573}
574
575static void esp_free_lun_tag(struct esp_cmd_entry *ent,
576 struct esp_lun_data *lp)
577{
578 if (ent->orig_tag[0]) {
579 BUG_ON(lp->tagged_cmds[ent->orig_tag[1]] != ent);
580 lp->tagged_cmds[ent->orig_tag[1]] = NULL;
581 lp->num_tagged--;
582 } else {
583 BUG_ON(lp->non_tagged_cmd != ent);
584 lp->non_tagged_cmd = NULL;
585 }
586}
587
588/* When a contingent allegiance conditon is created, we force feed a
589 * REQUEST_SENSE command to the device to fetch the sense data. I
590 * tried many other schemes, relying on the scsi error handling layer
591 * to send out the REQUEST_SENSE automatically, but this was difficult
592 * to get right especially in the presence of applications like smartd
593 * which use SG_IO to send out their own REQUEST_SENSE commands.
594 */
595static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
596{
597 struct scsi_cmnd *cmd = ent->cmd;
598 struct scsi_device *dev = cmd->device;
599 int tgt, lun;
600 u8 *p, val;
601
602 tgt = dev->id;
603 lun = dev->lun;
604
605
606 if (!ent->sense_ptr) {
607 esp_log_autosense("esp%d: Doing auto-sense for "
608 "tgt[%d] lun[%d]\n",
609 esp->host->unique_id, tgt, lun);
610
611 ent->sense_ptr = cmd->sense_buffer;
612 ent->sense_dma = esp->ops->map_single(esp,
613 ent->sense_ptr,
614 SCSI_SENSE_BUFFERSIZE,
615 DMA_FROM_DEVICE);
616 }
617 ent->saved_sense_ptr = ent->sense_ptr;
618
619 esp->active_cmd = ent;
620
621 p = esp->command_block;
622 esp->msg_out_len = 0;
623
624 *p++ = IDENTIFY(0, lun);
625 *p++ = REQUEST_SENSE;
626 *p++ = ((dev->scsi_level <= SCSI_2) ?
627 (lun << 5) : 0);
628 *p++ = 0;
629 *p++ = 0;
630 *p++ = SCSI_SENSE_BUFFERSIZE;
631 *p++ = 0;
632
633 esp->select_state = ESP_SELECT_BASIC;
634
635 val = tgt;
636 if (esp->rev == FASHME)
637 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
638 esp_write8(val, ESP_BUSID);
639
640 esp_write_tgt_sync(esp, tgt);
641 esp_write_tgt_config3(esp, tgt);
642
643 val = (p - esp->command_block);
644
645 if (esp->rev == FASHME)
646 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
647 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
648 val, 16, 0, ESP_CMD_DMA | ESP_CMD_SELA);
649}
650
651static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
652{
653 struct esp_cmd_entry *ent;
654
655 list_for_each_entry(ent, &esp->queued_cmds, list) {
656 struct scsi_cmnd *cmd = ent->cmd;
657 struct scsi_device *dev = cmd->device;
658 struct esp_lun_data *lp = dev->hostdata;
659
660 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
661 ent->tag[0] = 0;
662 ent->tag[1] = 0;
663 return ent;
664 }
665
666 if (!scsi_populate_tag_msg(cmd, &ent->tag[0])) {
667 ent->tag[0] = 0;
668 ent->tag[1] = 0;
669 }
670 ent->orig_tag[0] = ent->tag[0];
671 ent->orig_tag[1] = ent->tag[1];
672
673 if (esp_alloc_lun_tag(ent, lp) < 0)
674 continue;
675
676 return ent;
677 }
678
679 return NULL;
680}
681
682static void esp_maybe_execute_command(struct esp *esp)
683{
684 struct esp_target_data *tp;
685 struct esp_lun_data *lp;
686 struct scsi_device *dev;
687 struct scsi_cmnd *cmd;
688 struct esp_cmd_entry *ent;
689 int tgt, lun, i;
690 u32 val, start_cmd;
691 u8 *p;
692
693 if (esp->active_cmd ||
694 (esp->flags & ESP_FLAG_RESETTING))
695 return;
696
697 ent = find_and_prep_issuable_command(esp);
698 if (!ent)
699 return;
700
701 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
702 esp_autosense(esp, ent);
703 return;
704 }
705
706 cmd = ent->cmd;
707 dev = cmd->device;
708 tgt = dev->id;
709 lun = dev->lun;
710 tp = &esp->target[tgt];
711 lp = dev->hostdata;
712
713 list_move(&ent->list, &esp->active_cmds);
714
715 esp->active_cmd = ent;
716
717 esp_map_dma(esp, cmd);
718 esp_save_pointers(esp, ent);
719
720 esp_check_command_len(esp, cmd);
721
722 p = esp->command_block;
723
724 esp->msg_out_len = 0;
725 if (tp->flags & ESP_TGT_CHECK_NEGO) {
726 /* Need to negotiate. If the target is broken
727 * go for synchronous transfers and non-wide.
728 */
729 if (tp->flags & ESP_TGT_BROKEN) {
730 tp->flags &= ~ESP_TGT_DISCONNECT;
731 tp->nego_goal_period = 0;
732 tp->nego_goal_offset = 0;
733 tp->nego_goal_width = 0;
734 tp->nego_goal_tags = 0;
735 }
736
737 /* If the settings are not changing, skip this. */
738 if (spi_width(tp->starget) == tp->nego_goal_width &&
739 spi_period(tp->starget) == tp->nego_goal_period &&
740 spi_offset(tp->starget) == tp->nego_goal_offset) {
741 tp->flags &= ~ESP_TGT_CHECK_NEGO;
742 goto build_identify;
743 }
744
745 if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
746 esp->msg_out_len =
747 spi_populate_width_msg(&esp->msg_out[0],
748 (tp->nego_goal_width ?
749 1 : 0));
750 tp->flags |= ESP_TGT_NEGO_WIDE;
751 } else if (esp_need_to_nego_sync(tp)) {
752 esp->msg_out_len =
753 spi_populate_sync_msg(&esp->msg_out[0],
754 tp->nego_goal_period,
755 tp->nego_goal_offset);
756 tp->flags |= ESP_TGT_NEGO_SYNC;
757 } else {
758 tp->flags &= ~ESP_TGT_CHECK_NEGO;
759 }
760
761 /* Process it like a slow command. */
762 if (tp->flags & (ESP_TGT_NEGO_WIDE | ESP_TGT_NEGO_SYNC))
763 esp->flags |= ESP_FLAG_DOING_SLOWCMD;
764 }
765
766build_identify:
767 /* If we don't have a lun-data struct yet, we're probing
768 * so do not disconnect. Also, do not disconnect unless
769 * we have a tag on this command.
770 */
771 if (lp && (tp->flags & ESP_TGT_DISCONNECT) && ent->tag[0])
772 *p++ = IDENTIFY(1, lun);
773 else
774 *p++ = IDENTIFY(0, lun);
775
776 if (ent->tag[0] && esp->rev == ESP100) {
777 /* ESP100 lacks select w/atn3 command, use select
778 * and stop instead.
779 */
780 esp->flags |= ESP_FLAG_DOING_SLOWCMD;
781 }
782
783 if (!(esp->flags & ESP_FLAG_DOING_SLOWCMD)) {
784 start_cmd = ESP_CMD_DMA | ESP_CMD_SELA;
785 if (ent->tag[0]) {
786 *p++ = ent->tag[0];
787 *p++ = ent->tag[1];
788
789 start_cmd = ESP_CMD_DMA | ESP_CMD_SA3;
790 }
791
792 for (i = 0; i < cmd->cmd_len; i++)
793 *p++ = cmd->cmnd[i];
794
795 esp->select_state = ESP_SELECT_BASIC;
796 } else {
797 esp->cmd_bytes_left = cmd->cmd_len;
798 esp->cmd_bytes_ptr = &cmd->cmnd[0];
799
800 if (ent->tag[0]) {
801 for (i = esp->msg_out_len - 1;
802 i >= 0; i--)
803 esp->msg_out[i + 2] = esp->msg_out[i];
804 esp->msg_out[0] = ent->tag[0];
805 esp->msg_out[1] = ent->tag[1];
806 esp->msg_out_len += 2;
807 }
808
809 start_cmd = ESP_CMD_DMA | ESP_CMD_SELAS;
810 esp->select_state = ESP_SELECT_MSGOUT;
811 }
812 val = tgt;
813 if (esp->rev == FASHME)
814 val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
815 esp_write8(val, ESP_BUSID);
816
817 esp_write_tgt_sync(esp, tgt);
818 esp_write_tgt_config3(esp, tgt);
819
820 val = (p - esp->command_block);
821
822 if (esp_debug & ESP_DEBUG_SCSICMD) {
823 printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
824 for (i = 0; i < cmd->cmd_len; i++)
825 printk("%02x ", cmd->cmnd[i]);
826 printk("]\n");
827 }
828
829 if (esp->rev == FASHME)
830 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
831 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
832 val, 16, 0, start_cmd);
833}
834
835static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
836{
837 struct list_head *head = &esp->esp_cmd_pool;
838 struct esp_cmd_entry *ret;
839
840 if (list_empty(head)) {
841 ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
842 } else {
843 ret = list_entry(head->next, struct esp_cmd_entry, list);
844 list_del(&ret->list);
845 memset(ret, 0, sizeof(*ret));
846 }
847 return ret;
848}
849
850static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
851{
852 list_add(&ent->list, &esp->esp_cmd_pool);
853}
854
855static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
856 struct scsi_cmnd *cmd, unsigned int result)
857{
858 struct scsi_device *dev = cmd->device;
859 int tgt = dev->id;
860 int lun = dev->lun;
861
862 esp->active_cmd = NULL;
863 esp_unmap_dma(esp, cmd);
864 esp_free_lun_tag(ent, dev->hostdata);
865 cmd->result = result;
866
867 if (ent->eh_done) {
868 complete(ent->eh_done);
869 ent->eh_done = NULL;
870 }
871
872 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
873 esp->ops->unmap_single(esp, ent->sense_dma,
874 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
875 ent->sense_ptr = NULL;
876
877 /* Restore the message/status bytes to what we actually
878 * saw originally. Also, report that we are providing
879 * the sense data.
880 */
881 cmd->result = ((DRIVER_SENSE << 24) |
882 (DID_OK << 16) |
883 (COMMAND_COMPLETE << 8) |
884 (SAM_STAT_CHECK_CONDITION << 0));
885
886 ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
887 if (esp_debug & ESP_DEBUG_AUTOSENSE) {
888 int i;
889
890 printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
891 esp->host->unique_id, tgt, lun);
892 for (i = 0; i < 18; i++)
893 printk("%02x ", cmd->sense_buffer[i]);
894 printk("]\n");
895 }
896 }
897
898 cmd->scsi_done(cmd);
899
900 list_del(&ent->list);
901 esp_put_ent(esp, ent);
902
903 esp_maybe_execute_command(esp);
904}
905
906static unsigned int compose_result(unsigned int status, unsigned int message,
907 unsigned int driver_code)
908{
909 return (status | (message << 8) | (driver_code << 16));
910}
911
912static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
913{
914 struct scsi_device *dev = ent->cmd->device;
915 struct esp_lun_data *lp = dev->hostdata;
916
917 scsi_track_queue_full(dev, lp->num_tagged - 1);
918}
919
920static int esp_queuecommand_lck(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
921{
922 struct scsi_device *dev = cmd->device;
923 struct esp *esp = shost_priv(dev->host);
924 struct esp_cmd_priv *spriv;
925 struct esp_cmd_entry *ent;
926
927 ent = esp_get_ent(esp);
928 if (!ent)
929 return SCSI_MLQUEUE_HOST_BUSY;
930
931 ent->cmd = cmd;
932
933 cmd->scsi_done = done;
934
935 spriv = ESP_CMD_PRIV(cmd);
936 spriv->u.dma_addr = ~(dma_addr_t)0x0;
937
938 list_add_tail(&ent->list, &esp->queued_cmds);
939
940 esp_maybe_execute_command(esp);
941
942 return 0;
943}
944
945static DEF_SCSI_QCMD(esp_queuecommand)
946
947static int esp_check_gross_error(struct esp *esp)
948{
949 if (esp->sreg & ESP_STAT_SPAM) {
950 /* Gross Error, could be one of:
951 * - top of fifo overwritten
952 * - top of command register overwritten
953 * - DMA programmed with wrong direction
954 * - improper phase change
955 */
956 printk(KERN_ERR PFX "esp%d: Gross error sreg[%02x]\n",
957 esp->host->unique_id, esp->sreg);
958 /* XXX Reset the chip. XXX */
959 return 1;
960 }
961 return 0;
962}
963
964static int esp_check_spur_intr(struct esp *esp)
965{
966 switch (esp->rev) {
967 case ESP100:
968 case ESP100A:
969 /* The interrupt pending bit of the status register cannot
970 * be trusted on these revisions.
971 */
972 esp->sreg &= ~ESP_STAT_INTR;
973 break;
974
975 default:
976 if (!(esp->sreg & ESP_STAT_INTR)) {
977 esp->ireg = esp_read8(ESP_INTRPT);
978 if (esp->ireg & ESP_INTR_SR)
979 return 1;
980
981 /* If the DMA is indicating interrupt pending and the
982 * ESP is not, the only possibility is a DMA error.
983 */
984 if (!esp->ops->dma_error(esp)) {
985 printk(KERN_ERR PFX "esp%d: Spurious irq, "
986 "sreg=%02x.\n",
987 esp->host->unique_id, esp->sreg);
988 return -1;
989 }
990
991 printk(KERN_ERR PFX "esp%d: DMA error\n",
992 esp->host->unique_id);
993
994 /* XXX Reset the chip. XXX */
995 return -1;
996 }
997 break;
998 }
999
1000 return 0;
1001}
1002
1003static void esp_schedule_reset(struct esp *esp)
1004{
1005 esp_log_reset("ESP: esp_schedule_reset() from %pf\n",
1006 __builtin_return_address(0));
1007 esp->flags |= ESP_FLAG_RESETTING;
1008 esp_event(esp, ESP_EVENT_RESET);
1009}
1010
1011/* In order to avoid having to add a special half-reconnected state
1012 * into the driver we just sit here and poll through the rest of
1013 * the reselection process to get the tag message bytes.
1014 */
1015static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
1016 struct esp_lun_data *lp)
1017{
1018 struct esp_cmd_entry *ent;
1019 int i;
1020
1021 if (!lp->num_tagged) {
1022 printk(KERN_ERR PFX "esp%d: Reconnect w/num_tagged==0\n",
1023 esp->host->unique_id);
1024 return NULL;
1025 }
1026
1027 esp_log_reconnect("ESP: reconnect tag, ");
1028
1029 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
1030 if (esp->ops->irq_pending(esp))
1031 break;
1032 }
1033 if (i == ESP_QUICKIRQ_LIMIT) {
1034 printk(KERN_ERR PFX "esp%d: Reconnect IRQ1 timeout\n",
1035 esp->host->unique_id);
1036 return NULL;
1037 }
1038
1039 esp->sreg = esp_read8(ESP_STATUS);
1040 esp->ireg = esp_read8(ESP_INTRPT);
1041
1042 esp_log_reconnect("IRQ(%d:%x:%x), ",
1043 i, esp->ireg, esp->sreg);
1044
1045 if (esp->ireg & ESP_INTR_DC) {
1046 printk(KERN_ERR PFX "esp%d: Reconnect, got disconnect.\n",
1047 esp->host->unique_id);
1048 return NULL;
1049 }
1050
1051 if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
1052 printk(KERN_ERR PFX "esp%d: Reconnect, not MIP sreg[%02x].\n",
1053 esp->host->unique_id, esp->sreg);
1054 return NULL;
1055 }
1056
1057 /* DMA in the tag bytes... */
1058 esp->command_block[0] = 0xff;
1059 esp->command_block[1] = 0xff;
1060 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
1061 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
1062
1063 /* ACK the message. */
1064 scsi_esp_cmd(esp, ESP_CMD_MOK);
1065
1066 for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
1067 if (esp->ops->irq_pending(esp)) {
1068 esp->sreg = esp_read8(ESP_STATUS);
1069 esp->ireg = esp_read8(ESP_INTRPT);
1070 if (esp->ireg & ESP_INTR_FDONE)
1071 break;
1072 }
1073 udelay(1);
1074 }
1075 if (i == ESP_RESELECT_TAG_LIMIT) {
1076 printk(KERN_ERR PFX "esp%d: Reconnect IRQ2 timeout\n",
1077 esp->host->unique_id);
1078 return NULL;
1079 }
1080 esp->ops->dma_drain(esp);
1081 esp->ops->dma_invalidate(esp);
1082
1083 esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
1084 i, esp->ireg, esp->sreg,
1085 esp->command_block[0],
1086 esp->command_block[1]);
1087
1088 if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
1089 esp->command_block[0] > ORDERED_QUEUE_TAG) {
1090 printk(KERN_ERR PFX "esp%d: Reconnect, bad tag "
1091 "type %02x.\n",
1092 esp->host->unique_id, esp->command_block[0]);
1093 return NULL;
1094 }
1095
1096 ent = lp->tagged_cmds[esp->command_block[1]];
1097 if (!ent) {
1098 printk(KERN_ERR PFX "esp%d: Reconnect, no entry for "
1099 "tag %02x.\n",
1100 esp->host->unique_id, esp->command_block[1]);
1101 return NULL;
1102 }
1103
1104 return ent;
1105}
1106
1107static int esp_reconnect(struct esp *esp)
1108{
1109 struct esp_cmd_entry *ent;
1110 struct esp_target_data *tp;
1111 struct esp_lun_data *lp;
1112 struct scsi_device *dev;
1113 int target, lun;
1114
1115 BUG_ON(esp->active_cmd);
1116 if (esp->rev == FASHME) {
1117 /* FASHME puts the target and lun numbers directly
1118 * into the fifo.
1119 */
1120 target = esp->fifo[0];
1121 lun = esp->fifo[1] & 0x7;
1122 } else {
1123 u8 bits = esp_read8(ESP_FDATA);
1124
1125 /* Older chips put the lun directly into the fifo, but
1126 * the target is given as a sample of the arbitration
1127 * lines on the bus at reselection time. So we should
1128 * see the ID of the ESP and the one reconnecting target
1129 * set in the bitmap.
1130 */
1131 if (!(bits & esp->scsi_id_mask))
1132 goto do_reset;
1133 bits &= ~esp->scsi_id_mask;
1134 if (!bits || (bits & (bits - 1)))
1135 goto do_reset;
1136
1137 target = ffs(bits) - 1;
1138 lun = (esp_read8(ESP_FDATA) & 0x7);
1139
1140 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1141 if (esp->rev == ESP100) {
1142 u8 ireg = esp_read8(ESP_INTRPT);
1143 /* This chip has a bug during reselection that can
1144 * cause a spurious illegal-command interrupt, which
1145 * we simply ACK here. Another possibility is a bus
1146 * reset so we must check for that.
1147 */
1148 if (ireg & ESP_INTR_SR)
1149 goto do_reset;
1150 }
1151 scsi_esp_cmd(esp, ESP_CMD_NULL);
1152 }
1153
1154 esp_write_tgt_sync(esp, target);
1155 esp_write_tgt_config3(esp, target);
1156
1157 scsi_esp_cmd(esp, ESP_CMD_MOK);
1158
1159 if (esp->rev == FASHME)
1160 esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
1161 ESP_BUSID);
1162
1163 tp = &esp->target[target];
1164 dev = __scsi_device_lookup_by_target(tp->starget, lun);
1165 if (!dev) {
1166 printk(KERN_ERR PFX "esp%d: Reconnect, no lp "
1167 "tgt[%u] lun[%u]\n",
1168 esp->host->unique_id, target, lun);
1169 goto do_reset;
1170 }
1171 lp = dev->hostdata;
1172
1173 ent = lp->non_tagged_cmd;
1174 if (!ent) {
1175 ent = esp_reconnect_with_tag(esp, lp);
1176 if (!ent)
1177 goto do_reset;
1178 }
1179
1180 esp->active_cmd = ent;
1181
1182 if (ent->flags & ESP_CMD_FLAG_ABORT) {
1183 esp->msg_out[0] = ABORT_TASK_SET;
1184 esp->msg_out_len = 1;
1185 scsi_esp_cmd(esp, ESP_CMD_SATN);
1186 }
1187
1188 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1189 esp_restore_pointers(esp, ent);
1190 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1191 return 1;
1192
1193do_reset:
1194 esp_schedule_reset(esp);
1195 return 0;
1196}
1197
1198static int esp_finish_select(struct esp *esp)
1199{
1200 struct esp_cmd_entry *ent;
1201 struct scsi_cmnd *cmd;
1202 u8 orig_select_state;
1203
1204 orig_select_state = esp->select_state;
1205
1206 /* No longer selecting. */
1207 esp->select_state = ESP_SELECT_NONE;
1208
1209 esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
1210 ent = esp->active_cmd;
1211 cmd = ent->cmd;
1212
1213 if (esp->ops->dma_error(esp)) {
1214 /* If we see a DMA error during or as a result of selection,
1215 * all bets are off.
1216 */
1217 esp_schedule_reset(esp);
1218 esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
1219 return 0;
1220 }
1221
1222 esp->ops->dma_invalidate(esp);
1223
1224 if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
1225 struct esp_target_data *tp = &esp->target[cmd->device->id];
1226
1227 /* Carefully back out of the selection attempt. Release
1228 * resources (such as DMA mapping & TAG) and reset state (such
1229 * as message out and command delivery variables).
1230 */
1231 if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1232 esp_unmap_dma(esp, cmd);
1233 esp_free_lun_tag(ent, cmd->device->hostdata);
1234 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
1235 esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
1236 esp->cmd_bytes_ptr = NULL;
1237 esp->cmd_bytes_left = 0;
1238 } else {
1239 esp->ops->unmap_single(esp, ent->sense_dma,
1240 SCSI_SENSE_BUFFERSIZE,
1241 DMA_FROM_DEVICE);
1242 ent->sense_ptr = NULL;
1243 }
1244
1245 /* Now that the state is unwound properly, put back onto
1246 * the issue queue. This command is no longer active.
1247 */
1248 list_move(&ent->list, &esp->queued_cmds);
1249 esp->active_cmd = NULL;
1250
1251 /* Return value ignored by caller, it directly invokes
1252 * esp_reconnect().
1253 */
1254 return 0;
1255 }
1256
1257 if (esp->ireg == ESP_INTR_DC) {
1258 struct scsi_device *dev = cmd->device;
1259
1260 /* Disconnect. Make sure we re-negotiate sync and
1261 * wide parameters if this target starts responding
1262 * again in the future.
1263 */
1264 esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
1265
1266 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1267 esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
1268 return 1;
1269 }
1270
1271 if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
1272 /* Selection successful. On pre-FAST chips we have
1273 * to do a NOP and possibly clean out the FIFO.
1274 */
1275 if (esp->rev <= ESP236) {
1276 int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1277
1278 scsi_esp_cmd(esp, ESP_CMD_NULL);
1279
1280 if (!fcnt &&
1281 (!esp->prev_soff ||
1282 ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
1283 esp_flush_fifo(esp);
1284 }
1285
1286 /* If we are doing a slow command, negotiation, etc.
1287 * we'll do the right thing as we transition to the
1288 * next phase.
1289 */
1290 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1291 return 0;
1292 }
1293
1294 printk("ESP: Unexpected selection completion ireg[%x].\n",
1295 esp->ireg);
1296 esp_schedule_reset(esp);
1297 return 0;
1298}
1299
1300static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
1301 struct scsi_cmnd *cmd)
1302{
1303 int fifo_cnt, ecount, bytes_sent, flush_fifo;
1304
1305 fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
1306 if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
1307 fifo_cnt <<= 1;
1308
1309 ecount = 0;
1310 if (!(esp->sreg & ESP_STAT_TCNT)) {
1311 ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
1312 (((unsigned int)esp_read8(ESP_TCMED)) << 8));
1313 if (esp->rev == FASHME)
1314 ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
1315 }
1316
1317 bytes_sent = esp->data_dma_len;
1318 bytes_sent -= ecount;
1319
1320 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1321 bytes_sent -= fifo_cnt;
1322
1323 flush_fifo = 0;
1324 if (!esp->prev_soff) {
1325 /* Synchronous data transfer, always flush fifo. */
1326 flush_fifo = 1;
1327 } else {
1328 if (esp->rev == ESP100) {
1329 u32 fflags, phase;
1330
1331 /* ESP100 has a chip bug where in the synchronous data
1332 * phase it can mistake a final long REQ pulse from the
1333 * target as an extra data byte. Fun.
1334 *
1335 * To detect this case we resample the status register
1336 * and fifo flags. If we're still in a data phase and
1337 * we see spurious chunks in the fifo, we return error
1338 * to the caller which should reset and set things up
1339 * such that we only try future transfers to this
1340 * target in synchronous mode.
1341 */
1342 esp->sreg = esp_read8(ESP_STATUS);
1343 phase = esp->sreg & ESP_STAT_PMASK;
1344 fflags = esp_read8(ESP_FFLAGS);
1345
1346 if ((phase == ESP_DOP &&
1347 (fflags & ESP_FF_ONOTZERO)) ||
1348 (phase == ESP_DIP &&
1349 (fflags & ESP_FF_FBYTES)))
1350 return -1;
1351 }
1352 if (!(ent->flags & ESP_CMD_FLAG_WRITE))
1353 flush_fifo = 1;
1354 }
1355
1356 if (flush_fifo)
1357 esp_flush_fifo(esp);
1358
1359 return bytes_sent;
1360}
1361
1362static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
1363 u8 scsi_period, u8 scsi_offset,
1364 u8 esp_stp, u8 esp_soff)
1365{
1366 spi_period(tp->starget) = scsi_period;
1367 spi_offset(tp->starget) = scsi_offset;
1368 spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
1369
1370 if (esp_soff) {
1371 esp_stp &= 0x1f;
1372 esp_soff |= esp->radelay;
1373 if (esp->rev >= FAS236) {
1374 u8 bit = ESP_CONFIG3_FSCSI;
1375 if (esp->rev >= FAS100A)
1376 bit = ESP_CONFIG3_FAST;
1377
1378 if (scsi_period < 50) {
1379 if (esp->rev == FASHME)
1380 esp_soff &= ~esp->radelay;
1381 tp->esp_config3 |= bit;
1382 } else {
1383 tp->esp_config3 &= ~bit;
1384 }
1385 esp->prev_cfg3 = tp->esp_config3;
1386 esp_write8(esp->prev_cfg3, ESP_CFG3);
1387 }
1388 }
1389
1390 tp->esp_period = esp->prev_stp = esp_stp;
1391 tp->esp_offset = esp->prev_soff = esp_soff;
1392
1393 esp_write8(esp_soff, ESP_SOFF);
1394 esp_write8(esp_stp, ESP_STP);
1395
1396 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1397
1398 spi_display_xfer_agreement(tp->starget);
1399}
1400
1401static void esp_msgin_reject(struct esp *esp)
1402{
1403 struct esp_cmd_entry *ent = esp->active_cmd;
1404 struct scsi_cmnd *cmd = ent->cmd;
1405 struct esp_target_data *tp;
1406 int tgt;
1407
1408 tgt = cmd->device->id;
1409 tp = &esp->target[tgt];
1410
1411 if (tp->flags & ESP_TGT_NEGO_WIDE) {
1412 tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
1413
1414 if (!esp_need_to_nego_sync(tp)) {
1415 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1416 scsi_esp_cmd(esp, ESP_CMD_RATN);
1417 } else {
1418 esp->msg_out_len =
1419 spi_populate_sync_msg(&esp->msg_out[0],
1420 tp->nego_goal_period,
1421 tp->nego_goal_offset);
1422 tp->flags |= ESP_TGT_NEGO_SYNC;
1423 scsi_esp_cmd(esp, ESP_CMD_SATN);
1424 }
1425 return;
1426 }
1427
1428 if (tp->flags & ESP_TGT_NEGO_SYNC) {
1429 tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
1430 tp->esp_period = 0;
1431 tp->esp_offset = 0;
1432 esp_setsync(esp, tp, 0, 0, 0, 0);
1433 scsi_esp_cmd(esp, ESP_CMD_RATN);
1434 return;
1435 }
1436
1437 esp->msg_out[0] = ABORT_TASK_SET;
1438 esp->msg_out_len = 1;
1439 scsi_esp_cmd(esp, ESP_CMD_SATN);
1440}
1441
1442static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
1443{
1444 u8 period = esp->msg_in[3];
1445 u8 offset = esp->msg_in[4];
1446 u8 stp;
1447
1448 if (!(tp->flags & ESP_TGT_NEGO_SYNC))
1449 goto do_reject;
1450
1451 if (offset > 15)
1452 goto do_reject;
1453
1454 if (offset) {
1455 int one_clock;
1456
1457 if (period > esp->max_period) {
1458 period = offset = 0;
1459 goto do_sdtr;
1460 }
1461 if (period < esp->min_period)
1462 goto do_reject;
1463
1464 one_clock = esp->ccycle / 1000;
1465 stp = DIV_ROUND_UP(period << 2, one_clock);
1466 if (stp && esp->rev >= FAS236) {
1467 if (stp >= 50)
1468 stp--;
1469 }
1470 } else {
1471 stp = 0;
1472 }
1473
1474 esp_setsync(esp, tp, period, offset, stp, offset);
1475 return;
1476
1477do_reject:
1478 esp->msg_out[0] = MESSAGE_REJECT;
1479 esp->msg_out_len = 1;
1480 scsi_esp_cmd(esp, ESP_CMD_SATN);
1481 return;
1482
1483do_sdtr:
1484 tp->nego_goal_period = period;
1485 tp->nego_goal_offset = offset;
1486 esp->msg_out_len =
1487 spi_populate_sync_msg(&esp->msg_out[0],
1488 tp->nego_goal_period,
1489 tp->nego_goal_offset);
1490 scsi_esp_cmd(esp, ESP_CMD_SATN);
1491}
1492
1493static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
1494{
1495 int size = 8 << esp->msg_in[3];
1496 u8 cfg3;
1497
1498 if (esp->rev != FASHME)
1499 goto do_reject;
1500
1501 if (size != 8 && size != 16)
1502 goto do_reject;
1503
1504 if (!(tp->flags & ESP_TGT_NEGO_WIDE))
1505 goto do_reject;
1506
1507 cfg3 = tp->esp_config3;
1508 if (size == 16) {
1509 tp->flags |= ESP_TGT_WIDE;
1510 cfg3 |= ESP_CONFIG3_EWIDE;
1511 } else {
1512 tp->flags &= ~ESP_TGT_WIDE;
1513 cfg3 &= ~ESP_CONFIG3_EWIDE;
1514 }
1515 tp->esp_config3 = cfg3;
1516 esp->prev_cfg3 = cfg3;
1517 esp_write8(cfg3, ESP_CFG3);
1518
1519 tp->flags &= ~ESP_TGT_NEGO_WIDE;
1520
1521 spi_period(tp->starget) = 0;
1522 spi_offset(tp->starget) = 0;
1523 if (!esp_need_to_nego_sync(tp)) {
1524 tp->flags &= ~ESP_TGT_CHECK_NEGO;
1525 scsi_esp_cmd(esp, ESP_CMD_RATN);
1526 } else {
1527 esp->msg_out_len =
1528 spi_populate_sync_msg(&esp->msg_out[0],
1529 tp->nego_goal_period,
1530 tp->nego_goal_offset);
1531 tp->flags |= ESP_TGT_NEGO_SYNC;
1532 scsi_esp_cmd(esp, ESP_CMD_SATN);
1533 }
1534 return;
1535
1536do_reject:
1537 esp->msg_out[0] = MESSAGE_REJECT;
1538 esp->msg_out_len = 1;
1539 scsi_esp_cmd(esp, ESP_CMD_SATN);
1540}
1541
1542static void esp_msgin_extended(struct esp *esp)
1543{
1544 struct esp_cmd_entry *ent = esp->active_cmd;
1545 struct scsi_cmnd *cmd = ent->cmd;
1546 struct esp_target_data *tp;
1547 int tgt = cmd->device->id;
1548
1549 tp = &esp->target[tgt];
1550 if (esp->msg_in[2] == EXTENDED_SDTR) {
1551 esp_msgin_sdtr(esp, tp);
1552 return;
1553 }
1554 if (esp->msg_in[2] == EXTENDED_WDTR) {
1555 esp_msgin_wdtr(esp, tp);
1556 return;
1557 }
1558
1559 printk("ESP: Unexpected extended msg type %x\n",
1560 esp->msg_in[2]);
1561
1562 esp->msg_out[0] = ABORT_TASK_SET;
1563 esp->msg_out_len = 1;
1564 scsi_esp_cmd(esp, ESP_CMD_SATN);
1565}
1566
1567/* Analyze msgin bytes received from target so far. Return non-zero
1568 * if there are more bytes needed to complete the message.
1569 */
1570static int esp_msgin_process(struct esp *esp)
1571{
1572 u8 msg0 = esp->msg_in[0];
1573 int len = esp->msg_in_len;
1574
1575 if (msg0 & 0x80) {
1576 /* Identify */
1577 printk("ESP: Unexpected msgin identify\n");
1578 return 0;
1579 }
1580
1581 switch (msg0) {
1582 case EXTENDED_MESSAGE:
1583 if (len == 1)
1584 return 1;
1585 if (len < esp->msg_in[1] + 2)
1586 return 1;
1587 esp_msgin_extended(esp);
1588 return 0;
1589
1590 case IGNORE_WIDE_RESIDUE: {
1591 struct esp_cmd_entry *ent;
1592 struct esp_cmd_priv *spriv;
1593 if (len == 1)
1594 return 1;
1595
1596 if (esp->msg_in[1] != 1)
1597 goto do_reject;
1598
1599 ent = esp->active_cmd;
1600 spriv = ESP_CMD_PRIV(ent->cmd);
1601
1602 if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
1603 spriv->cur_sg--;
1604 spriv->cur_residue = 1;
1605 } else
1606 spriv->cur_residue++;
1607 spriv->tot_residue++;
1608 return 0;
1609 }
1610 case NOP:
1611 return 0;
1612 case RESTORE_POINTERS:
1613 esp_restore_pointers(esp, esp->active_cmd);
1614 return 0;
1615 case SAVE_POINTERS:
1616 esp_save_pointers(esp, esp->active_cmd);
1617 return 0;
1618
1619 case COMMAND_COMPLETE:
1620 case DISCONNECT: {
1621 struct esp_cmd_entry *ent = esp->active_cmd;
1622
1623 ent->message = msg0;
1624 esp_event(esp, ESP_EVENT_FREE_BUS);
1625 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1626 return 0;
1627 }
1628 case MESSAGE_REJECT:
1629 esp_msgin_reject(esp);
1630 return 0;
1631
1632 default:
1633 do_reject:
1634 esp->msg_out[0] = MESSAGE_REJECT;
1635 esp->msg_out_len = 1;
1636 scsi_esp_cmd(esp, ESP_CMD_SATN);
1637 return 0;
1638 }
1639}
1640
1641static int esp_process_event(struct esp *esp)
1642{
1643 int write;
1644
1645again:
1646 write = 0;
1647 switch (esp->event) {
1648 case ESP_EVENT_CHECK_PHASE:
1649 switch (esp->sreg & ESP_STAT_PMASK) {
1650 case ESP_DOP:
1651 esp_event(esp, ESP_EVENT_DATA_OUT);
1652 break;
1653 case ESP_DIP:
1654 esp_event(esp, ESP_EVENT_DATA_IN);
1655 break;
1656 case ESP_STATP:
1657 esp_flush_fifo(esp);
1658 scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
1659 esp_event(esp, ESP_EVENT_STATUS);
1660 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1661 return 1;
1662
1663 case ESP_MOP:
1664 esp_event(esp, ESP_EVENT_MSGOUT);
1665 break;
1666
1667 case ESP_MIP:
1668 esp_event(esp, ESP_EVENT_MSGIN);
1669 break;
1670
1671 case ESP_CMDP:
1672 esp_event(esp, ESP_EVENT_CMD_START);
1673 break;
1674
1675 default:
1676 printk("ESP: Unexpected phase, sreg=%02x\n",
1677 esp->sreg);
1678 esp_schedule_reset(esp);
1679 return 0;
1680 }
1681 goto again;
1682 break;
1683
1684 case ESP_EVENT_DATA_IN:
1685 write = 1;
1686 /* fallthru */
1687
1688 case ESP_EVENT_DATA_OUT: {
1689 struct esp_cmd_entry *ent = esp->active_cmd;
1690 struct scsi_cmnd *cmd = ent->cmd;
1691 dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
1692 unsigned int dma_len = esp_cur_dma_len(ent, cmd);
1693
1694 if (esp->rev == ESP100)
1695 scsi_esp_cmd(esp, ESP_CMD_NULL);
1696
1697 if (write)
1698 ent->flags |= ESP_CMD_FLAG_WRITE;
1699 else
1700 ent->flags &= ~ESP_CMD_FLAG_WRITE;
1701
1702 if (esp->ops->dma_length_limit)
1703 dma_len = esp->ops->dma_length_limit(esp, dma_addr,
1704 dma_len);
1705 else
1706 dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
1707
1708 esp->data_dma_len = dma_len;
1709
1710 if (!dma_len) {
1711 printk(KERN_ERR PFX "esp%d: DMA length is zero!\n",
1712 esp->host->unique_id);
1713 printk(KERN_ERR PFX "esp%d: cur adr[%08llx] len[%08x]\n",
1714 esp->host->unique_id,
1715 (unsigned long long)esp_cur_dma_addr(ent, cmd),
1716 esp_cur_dma_len(ent, cmd));
1717 esp_schedule_reset(esp);
1718 return 0;
1719 }
1720
1721 esp_log_datastart("ESP: start data addr[%08llx] len[%u] "
1722 "write(%d)\n",
1723 (unsigned long long)dma_addr, dma_len, write);
1724
1725 esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
1726 write, ESP_CMD_DMA | ESP_CMD_TI);
1727 esp_event(esp, ESP_EVENT_DATA_DONE);
1728 break;
1729 }
1730 case ESP_EVENT_DATA_DONE: {
1731 struct esp_cmd_entry *ent = esp->active_cmd;
1732 struct scsi_cmnd *cmd = ent->cmd;
1733 int bytes_sent;
1734
1735 if (esp->ops->dma_error(esp)) {
1736 printk("ESP: data done, DMA error, resetting\n");
1737 esp_schedule_reset(esp);
1738 return 0;
1739 }
1740
1741 if (ent->flags & ESP_CMD_FLAG_WRITE) {
1742 /* XXX parity errors, etc. XXX */
1743
1744 esp->ops->dma_drain(esp);
1745 }
1746 esp->ops->dma_invalidate(esp);
1747
1748 if (esp->ireg != ESP_INTR_BSERV) {
1749 /* We should always see exactly a bus-service
1750 * interrupt at the end of a successful transfer.
1751 */
1752 printk("ESP: data done, not BSERV, resetting\n");
1753 esp_schedule_reset(esp);
1754 return 0;
1755 }
1756
1757 bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
1758
1759 esp_log_datadone("ESP: data done flgs[%x] sent[%d]\n",
1760 ent->flags, bytes_sent);
1761
1762 if (bytes_sent < 0) {
1763 /* XXX force sync mode for this target XXX */
1764 esp_schedule_reset(esp);
1765 return 0;
1766 }
1767
1768 esp_advance_dma(esp, ent, cmd, bytes_sent);
1769 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1770 goto again;
1771 }
1772
1773 case ESP_EVENT_STATUS: {
1774 struct esp_cmd_entry *ent = esp->active_cmd;
1775
1776 if (esp->ireg & ESP_INTR_FDONE) {
1777 ent->status = esp_read8(ESP_FDATA);
1778 ent->message = esp_read8(ESP_FDATA);
1779 scsi_esp_cmd(esp, ESP_CMD_MOK);
1780 } else if (esp->ireg == ESP_INTR_BSERV) {
1781 ent->status = esp_read8(ESP_FDATA);
1782 ent->message = 0xff;
1783 esp_event(esp, ESP_EVENT_MSGIN);
1784 return 0;
1785 }
1786
1787 if (ent->message != COMMAND_COMPLETE) {
1788 printk("ESP: Unexpected message %x in status\n",
1789 ent->message);
1790 esp_schedule_reset(esp);
1791 return 0;
1792 }
1793
1794 esp_event(esp, ESP_EVENT_FREE_BUS);
1795 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1796 break;
1797 }
1798 case ESP_EVENT_FREE_BUS: {
1799 struct esp_cmd_entry *ent = esp->active_cmd;
1800 struct scsi_cmnd *cmd = ent->cmd;
1801
1802 if (ent->message == COMMAND_COMPLETE ||
1803 ent->message == DISCONNECT)
1804 scsi_esp_cmd(esp, ESP_CMD_ESEL);
1805
1806 if (ent->message == COMMAND_COMPLETE) {
1807 esp_log_cmddone("ESP: Command done status[%x] "
1808 "message[%x]\n",
1809 ent->status, ent->message);
1810 if (ent->status == SAM_STAT_TASK_SET_FULL)
1811 esp_event_queue_full(esp, ent);
1812
1813 if (ent->status == SAM_STAT_CHECK_CONDITION &&
1814 !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
1815 ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
1816 esp_autosense(esp, ent);
1817 } else {
1818 esp_cmd_is_done(esp, ent, cmd,
1819 compose_result(ent->status,
1820 ent->message,
1821 DID_OK));
1822 }
1823 } else if (ent->message == DISCONNECT) {
1824 esp_log_disconnect("ESP: Disconnecting tgt[%d] "
1825 "tag[%x:%x]\n",
1826 cmd->device->id,
1827 ent->tag[0], ent->tag[1]);
1828
1829 esp->active_cmd = NULL;
1830 esp_maybe_execute_command(esp);
1831 } else {
1832 printk("ESP: Unexpected message %x in freebus\n",
1833 ent->message);
1834 esp_schedule_reset(esp);
1835 return 0;
1836 }
1837 if (esp->active_cmd)
1838 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1839 break;
1840 }
1841 case ESP_EVENT_MSGOUT: {
1842 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1843
1844 if (esp_debug & ESP_DEBUG_MSGOUT) {
1845 int i;
1846 printk("ESP: Sending message [ ");
1847 for (i = 0; i < esp->msg_out_len; i++)
1848 printk("%02x ", esp->msg_out[i]);
1849 printk("]\n");
1850 }
1851
1852 if (esp->rev == FASHME) {
1853 int i;
1854
1855 /* Always use the fifo. */
1856 for (i = 0; i < esp->msg_out_len; i++) {
1857 esp_write8(esp->msg_out[i], ESP_FDATA);
1858 esp_write8(0, ESP_FDATA);
1859 }
1860 scsi_esp_cmd(esp, ESP_CMD_TI);
1861 } else {
1862 if (esp->msg_out_len == 1) {
1863 esp_write8(esp->msg_out[0], ESP_FDATA);
1864 scsi_esp_cmd(esp, ESP_CMD_TI);
1865 } else {
1866 /* Use DMA. */
1867 memcpy(esp->command_block,
1868 esp->msg_out,
1869 esp->msg_out_len);
1870
1871 esp->ops->send_dma_cmd(esp,
1872 esp->command_block_dma,
1873 esp->msg_out_len,
1874 esp->msg_out_len,
1875 0,
1876 ESP_CMD_DMA|ESP_CMD_TI);
1877 }
1878 }
1879 esp_event(esp, ESP_EVENT_MSGOUT_DONE);
1880 break;
1881 }
1882 case ESP_EVENT_MSGOUT_DONE:
1883 if (esp->rev == FASHME) {
1884 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1885 } else {
1886 if (esp->msg_out_len > 1)
1887 esp->ops->dma_invalidate(esp);
1888 }
1889
1890 if (!(esp->ireg & ESP_INTR_DC)) {
1891 if (esp->rev != FASHME)
1892 scsi_esp_cmd(esp, ESP_CMD_NULL);
1893 }
1894 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1895 goto again;
1896 case ESP_EVENT_MSGIN:
1897 if (esp->ireg & ESP_INTR_BSERV) {
1898 if (esp->rev == FASHME) {
1899 if (!(esp_read8(ESP_STATUS2) &
1900 ESP_STAT2_FEMPTY))
1901 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1902 } else {
1903 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1904 if (esp->rev == ESP100)
1905 scsi_esp_cmd(esp, ESP_CMD_NULL);
1906 }
1907 scsi_esp_cmd(esp, ESP_CMD_TI);
1908 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1909 return 1;
1910 }
1911 if (esp->ireg & ESP_INTR_FDONE) {
1912 u8 val;
1913
1914 if (esp->rev == FASHME)
1915 val = esp->fifo[0];
1916 else
1917 val = esp_read8(ESP_FDATA);
1918 esp->msg_in[esp->msg_in_len++] = val;
1919
1920 esp_log_msgin("ESP: Got msgin byte %x\n", val);
1921
1922 if (!esp_msgin_process(esp))
1923 esp->msg_in_len = 0;
1924
1925 if (esp->rev == FASHME)
1926 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1927
1928 scsi_esp_cmd(esp, ESP_CMD_MOK);
1929
1930 if (esp->event != ESP_EVENT_FREE_BUS)
1931 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1932 } else {
1933 printk("ESP: MSGIN neither BSERV not FDON, resetting");
1934 esp_schedule_reset(esp);
1935 return 0;
1936 }
1937 break;
1938 case ESP_EVENT_CMD_START:
1939 memcpy(esp->command_block, esp->cmd_bytes_ptr,
1940 esp->cmd_bytes_left);
1941 if (esp->rev == FASHME)
1942 scsi_esp_cmd(esp, ESP_CMD_FLUSH);
1943 esp->ops->send_dma_cmd(esp, esp->command_block_dma,
1944 esp->cmd_bytes_left, 16, 0,
1945 ESP_CMD_DMA | ESP_CMD_TI);
1946 esp_event(esp, ESP_EVENT_CMD_DONE);
1947 esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
1948 break;
1949 case ESP_EVENT_CMD_DONE:
1950 esp->ops->dma_invalidate(esp);
1951 if (esp->ireg & ESP_INTR_BSERV) {
1952 esp_event(esp, ESP_EVENT_CHECK_PHASE);
1953 goto again;
1954 }
1955 esp_schedule_reset(esp);
1956 return 0;
1957 break;
1958
1959 case ESP_EVENT_RESET:
1960 scsi_esp_cmd(esp, ESP_CMD_RS);
1961 break;
1962
1963 default:
1964 printk("ESP: Unexpected event %x, resetting\n",
1965 esp->event);
1966 esp_schedule_reset(esp);
1967 return 0;
1968 break;
1969 }
1970 return 1;
1971}
1972
1973static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
1974{
1975 struct scsi_cmnd *cmd = ent->cmd;
1976
1977 esp_unmap_dma(esp, cmd);
1978 esp_free_lun_tag(ent, cmd->device->hostdata);
1979 cmd->result = DID_RESET << 16;
1980
1981 if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
1982 esp->ops->unmap_single(esp, ent->sense_dma,
1983 SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
1984 ent->sense_ptr = NULL;
1985 }
1986
1987 cmd->scsi_done(cmd);
1988 list_del(&ent->list);
1989 esp_put_ent(esp, ent);
1990}
1991
1992static void esp_clear_hold(struct scsi_device *dev, void *data)
1993{
1994 struct esp_lun_data *lp = dev->hostdata;
1995
1996 BUG_ON(lp->num_tagged);
1997 lp->hold = 0;
1998}
1999
2000static void esp_reset_cleanup(struct esp *esp)
2001{
2002 struct esp_cmd_entry *ent, *tmp;
2003 int i;
2004
2005 list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
2006 struct scsi_cmnd *cmd = ent->cmd;
2007
2008 list_del(&ent->list);
2009 cmd->result = DID_RESET << 16;
2010 cmd->scsi_done(cmd);
2011 esp_put_ent(esp, ent);
2012 }
2013
2014 list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
2015 if (ent == esp->active_cmd)
2016 esp->active_cmd = NULL;
2017 esp_reset_cleanup_one(esp, ent);
2018 }
2019
2020 BUG_ON(esp->active_cmd != NULL);
2021
2022 /* Force renegotiation of sync/wide transfers. */
2023 for (i = 0; i < ESP_MAX_TARGET; i++) {
2024 struct esp_target_data *tp = &esp->target[i];
2025
2026 tp->esp_period = 0;
2027 tp->esp_offset = 0;
2028 tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
2029 ESP_CONFIG3_FSCSI |
2030 ESP_CONFIG3_FAST);
2031 tp->flags &= ~ESP_TGT_WIDE;
2032 tp->flags |= ESP_TGT_CHECK_NEGO;
2033
2034 if (tp->starget)
2035 __starget_for_each_device(tp->starget, NULL,
2036 esp_clear_hold);
2037 }
2038 esp->flags &= ~ESP_FLAG_RESETTING;
2039}
2040
2041/* Runs under host->lock */
2042static void __esp_interrupt(struct esp *esp)
2043{
2044 int finish_reset, intr_done;
2045 u8 phase;
2046
2047 esp->sreg = esp_read8(ESP_STATUS);
2048
2049 if (esp->flags & ESP_FLAG_RESETTING) {
2050 finish_reset = 1;
2051 } else {
2052 if (esp_check_gross_error(esp))
2053 return;
2054
2055 finish_reset = esp_check_spur_intr(esp);
2056 if (finish_reset < 0)
2057 return;
2058 }
2059
2060 esp->ireg = esp_read8(ESP_INTRPT);
2061
2062 if (esp->ireg & ESP_INTR_SR)
2063 finish_reset = 1;
2064
2065 if (finish_reset) {
2066 esp_reset_cleanup(esp);
2067 if (esp->eh_reset) {
2068 complete(esp->eh_reset);
2069 esp->eh_reset = NULL;
2070 }
2071 return;
2072 }
2073
2074 phase = (esp->sreg & ESP_STAT_PMASK);
2075 if (esp->rev == FASHME) {
2076 if (((phase != ESP_DIP && phase != ESP_DOP) &&
2077 esp->select_state == ESP_SELECT_NONE &&
2078 esp->event != ESP_EVENT_STATUS &&
2079 esp->event != ESP_EVENT_DATA_DONE) ||
2080 (esp->ireg & ESP_INTR_RSEL)) {
2081 esp->sreg2 = esp_read8(ESP_STATUS2);
2082 if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
2083 (esp->sreg2 & ESP_STAT2_F1BYTE))
2084 hme_read_fifo(esp);
2085 }
2086 }
2087
2088 esp_log_intr("ESP: intr sreg[%02x] seqreg[%02x] "
2089 "sreg2[%02x] ireg[%02x]\n",
2090 esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
2091
2092 intr_done = 0;
2093
2094 if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
2095 printk("ESP: unexpected IREG %02x\n", esp->ireg);
2096 if (esp->ireg & ESP_INTR_IC)
2097 esp_dump_cmd_log(esp);
2098
2099 esp_schedule_reset(esp);
2100 } else {
2101 if (!(esp->ireg & ESP_INTR_RSEL)) {
2102 /* Some combination of FDONE, BSERV, DC. */
2103 if (esp->select_state != ESP_SELECT_NONE)
2104 intr_done = esp_finish_select(esp);
2105 } else if (esp->ireg & ESP_INTR_RSEL) {
2106 if (esp->active_cmd)
2107 (void) esp_finish_select(esp);
2108 intr_done = esp_reconnect(esp);
2109 }
2110 }
2111 while (!intr_done)
2112 intr_done = esp_process_event(esp);
2113}
2114
2115irqreturn_t scsi_esp_intr(int irq, void *dev_id)
2116{
2117 struct esp *esp = dev_id;
2118 unsigned long flags;
2119 irqreturn_t ret;
2120
2121 spin_lock_irqsave(esp->host->host_lock, flags);
2122 ret = IRQ_NONE;
2123 if (esp->ops->irq_pending(esp)) {
2124 ret = IRQ_HANDLED;
2125 for (;;) {
2126 int i;
2127
2128 __esp_interrupt(esp);
2129 if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
2130 break;
2131 esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
2132
2133 for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
2134 if (esp->ops->irq_pending(esp))
2135 break;
2136 }
2137 if (i == ESP_QUICKIRQ_LIMIT)
2138 break;
2139 }
2140 }
2141 spin_unlock_irqrestore(esp->host->host_lock, flags);
2142
2143 return ret;
2144}
2145EXPORT_SYMBOL(scsi_esp_intr);
2146
2147static void esp_get_revision(struct esp *esp)
2148{
2149 u8 val;
2150
2151 esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
2152 esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
2153 esp_write8(esp->config2, ESP_CFG2);
2154
2155 val = esp_read8(ESP_CFG2);
2156 val &= ~ESP_CONFIG2_MAGIC;
2157 if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
2158 /* If what we write to cfg2 does not come back, cfg2 is not
2159 * implemented, therefore this must be a plain esp100.
2160 */
2161 esp->rev = ESP100;
2162 } else {
2163 esp->config2 = 0;
2164 esp_set_all_config3(esp, 5);
2165 esp->prev_cfg3 = 5;
2166 esp_write8(esp->config2, ESP_CFG2);
2167 esp_write8(0, ESP_CFG3);
2168 esp_write8(esp->prev_cfg3, ESP_CFG3);
2169
2170 val = esp_read8(ESP_CFG3);
2171 if (val != 5) {
2172 /* The cfg2 register is implemented, however
2173 * cfg3 is not, must be esp100a.
2174 */
2175 esp->rev = ESP100A;
2176 } else {
2177 esp_set_all_config3(esp, 0);
2178 esp->prev_cfg3 = 0;
2179 esp_write8(esp->prev_cfg3, ESP_CFG3);
2180
2181 /* All of cfg{1,2,3} implemented, must be one of
2182 * the fas variants, figure out which one.
2183 */
2184 if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
2185 esp->rev = FAST;
2186 esp->sync_defp = SYNC_DEFP_FAST;
2187 } else {
2188 esp->rev = ESP236;
2189 }
2190 esp->config2 = 0;
2191 esp_write8(esp->config2, ESP_CFG2);
2192 }
2193 }
2194}
2195
2196static void esp_init_swstate(struct esp *esp)
2197{
2198 int i;
2199
2200 INIT_LIST_HEAD(&esp->queued_cmds);
2201 INIT_LIST_HEAD(&esp->active_cmds);
2202 INIT_LIST_HEAD(&esp->esp_cmd_pool);
2203
2204 /* Start with a clear state, domain validation (via ->slave_configure,
2205 * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
2206 * commands.
2207 */
2208 for (i = 0 ; i < ESP_MAX_TARGET; i++) {
2209 esp->target[i].flags = 0;
2210 esp->target[i].nego_goal_period = 0;
2211 esp->target[i].nego_goal_offset = 0;
2212 esp->target[i].nego_goal_width = 0;
2213 esp->target[i].nego_goal_tags = 0;
2214 }
2215}
2216
2217/* This places the ESP into a known state at boot time. */
2218static void esp_bootup_reset(struct esp *esp)
2219{
2220 u8 val;
2221
2222 /* Reset the DMA */
2223 esp->ops->reset_dma(esp);
2224
2225 /* Reset the ESP */
2226 esp_reset_esp(esp);
2227
2228 /* Reset the SCSI bus, but tell ESP not to generate an irq */
2229 val = esp_read8(ESP_CFG1);
2230 val |= ESP_CONFIG1_SRRDISAB;
2231 esp_write8(val, ESP_CFG1);
2232
2233 scsi_esp_cmd(esp, ESP_CMD_RS);
2234 udelay(400);
2235
2236 esp_write8(esp->config1, ESP_CFG1);
2237
2238 /* Eat any bitrot in the chip and we are done... */
2239 esp_read8(ESP_INTRPT);
2240}
2241
2242static void esp_set_clock_params(struct esp *esp)
2243{
2244 int fhz;
2245 u8 ccf;
2246
2247 /* This is getting messy but it has to be done correctly or else
2248 * you get weird behavior all over the place. We are trying to
2249 * basically figure out three pieces of information.
2250 *
2251 * a) Clock Conversion Factor
2252 *
2253 * This is a representation of the input crystal clock frequency
2254 * going into the ESP on this machine. Any operation whose timing
2255 * is longer than 400ns depends on this value being correct. For
2256 * example, you'll get blips for arbitration/selection during high
2257 * load or with multiple targets if this is not set correctly.
2258 *
2259 * b) Selection Time-Out
2260 *
2261 * The ESP isn't very bright and will arbitrate for the bus and try
2262 * to select a target forever if you let it. This value tells the
2263 * ESP when it has taken too long to negotiate and that it should
2264 * interrupt the CPU so we can see what happened. The value is
2265 * computed as follows (from NCR/Symbios chip docs).
2266 *
2267 * (Time Out Period) * (Input Clock)
2268 * STO = ----------------------------------
2269 * (8192) * (Clock Conversion Factor)
2270 *
2271 * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
2272 *
2273 * c) Imperical constants for synchronous offset and transfer period
2274 * register values
2275 *
2276 * This entails the smallest and largest sync period we could ever
2277 * handle on this ESP.
2278 */
2279 fhz = esp->cfreq;
2280
2281 ccf = ((fhz / 1000000) + 4) / 5;
2282 if (ccf == 1)
2283 ccf = 2;
2284
2285 /* If we can't find anything reasonable, just assume 20MHZ.
2286 * This is the clock frequency of the older sun4c's where I've
2287 * been unable to find the clock-frequency PROM property. All
2288 * other machines provide useful values it seems.
2289 */
2290 if (fhz <= 5000000 || ccf < 1 || ccf > 8) {
2291 fhz = 20000000;
2292 ccf = 4;
2293 }
2294
2295 esp->cfact = (ccf == 8 ? 0 : ccf);
2296 esp->cfreq = fhz;
2297 esp->ccycle = ESP_HZ_TO_CYCLE(fhz);
2298 esp->ctick = ESP_TICK(ccf, esp->ccycle);
2299 esp->neg_defp = ESP_NEG_DEFP(fhz, ccf);
2300 esp->sync_defp = SYNC_DEFP_SLOW;
2301}
2302
2303static const char *esp_chip_names[] = {
2304 "ESP100",
2305 "ESP100A",
2306 "ESP236",
2307 "FAS236",
2308 "FAS100A",
2309 "FAST",
2310 "FASHME",
2311};
2312
2313static struct scsi_transport_template *esp_transport_template;
2314
2315int scsi_esp_register(struct esp *esp, struct device *dev)
2316{
2317 static int instance;
2318 int err;
2319
2320 esp->host->transportt = esp_transport_template;
2321 esp->host->max_lun = ESP_MAX_LUN;
2322 esp->host->cmd_per_lun = 2;
2323 esp->host->unique_id = instance;
2324
2325 esp_set_clock_params(esp);
2326
2327 esp_get_revision(esp);
2328
2329 esp_init_swstate(esp);
2330
2331 esp_bootup_reset(esp);
2332
2333 printk(KERN_INFO PFX "esp%u, regs[%1p:%1p] irq[%u]\n",
2334 esp->host->unique_id, esp->regs, esp->dma_regs,
2335 esp->host->irq);
2336 printk(KERN_INFO PFX "esp%u is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
2337 esp->host->unique_id, esp_chip_names[esp->rev],
2338 esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
2339
2340 /* Let the SCSI bus reset settle. */
2341 ssleep(esp_bus_reset_settle);
2342
2343 err = scsi_add_host(esp->host, dev);
2344 if (err)
2345 return err;
2346
2347 instance++;
2348
2349 scsi_scan_host(esp->host);
2350
2351 return 0;
2352}
2353EXPORT_SYMBOL(scsi_esp_register);
2354
2355void scsi_esp_unregister(struct esp *esp)
2356{
2357 scsi_remove_host(esp->host);
2358}
2359EXPORT_SYMBOL(scsi_esp_unregister);
2360
2361static int esp_target_alloc(struct scsi_target *starget)
2362{
2363 struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
2364 struct esp_target_data *tp = &esp->target[starget->id];
2365
2366 tp->starget = starget;
2367
2368 return 0;
2369}
2370
2371static void esp_target_destroy(struct scsi_target *starget)
2372{
2373 struct esp *esp = shost_priv(dev_to_shost(&starget->dev));
2374 struct esp_target_data *tp = &esp->target[starget->id];
2375
2376 tp->starget = NULL;
2377}
2378
2379static int esp_slave_alloc(struct scsi_device *dev)
2380{
2381 struct esp *esp = shost_priv(dev->host);
2382 struct esp_target_data *tp = &esp->target[dev->id];
2383 struct esp_lun_data *lp;
2384
2385 lp = kzalloc(sizeof(*lp), GFP_KERNEL);
2386 if (!lp)
2387 return -ENOMEM;
2388 dev->hostdata = lp;
2389
2390 spi_min_period(tp->starget) = esp->min_period;
2391 spi_max_offset(tp->starget) = 15;
2392
2393 if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
2394 spi_max_width(tp->starget) = 1;
2395 else
2396 spi_max_width(tp->starget) = 0;
2397
2398 return 0;
2399}
2400
2401static int esp_slave_configure(struct scsi_device *dev)
2402{
2403 struct esp *esp = shost_priv(dev->host);
2404 struct esp_target_data *tp = &esp->target[dev->id];
2405 int goal_tags, queue_depth;
2406
2407 goal_tags = 0;
2408
2409 if (dev->tagged_supported) {
2410 /* XXX make this configurable somehow XXX */
2411 goal_tags = ESP_DEFAULT_TAGS;
2412
2413 if (goal_tags > ESP_MAX_TAG)
2414 goal_tags = ESP_MAX_TAG;
2415 }
2416
2417 queue_depth = goal_tags;
2418 if (queue_depth < dev->host->cmd_per_lun)
2419 queue_depth = dev->host->cmd_per_lun;
2420
2421 if (goal_tags) {
2422 scsi_set_tag_type(dev, MSG_ORDERED_TAG);
2423 scsi_activate_tcq(dev, queue_depth);
2424 } else {
2425 scsi_deactivate_tcq(dev, queue_depth);
2426 }
2427 tp->flags |= ESP_TGT_DISCONNECT;
2428
2429 if (!spi_initial_dv(dev->sdev_target))
2430 spi_dv_device(dev);
2431
2432 return 0;
2433}
2434
2435static void esp_slave_destroy(struct scsi_device *dev)
2436{
2437 struct esp_lun_data *lp = dev->hostdata;
2438
2439 kfree(lp);
2440 dev->hostdata = NULL;
2441}
2442
2443static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
2444{
2445 struct esp *esp = shost_priv(cmd->device->host);
2446 struct esp_cmd_entry *ent, *tmp;
2447 struct completion eh_done;
2448 unsigned long flags;
2449
2450 /* XXX This helps a lot with debugging but might be a bit
2451 * XXX much for the final driver.
2452 */
2453 spin_lock_irqsave(esp->host->host_lock, flags);
2454 printk(KERN_ERR PFX "esp%d: Aborting command [%p:%02x]\n",
2455 esp->host->unique_id, cmd, cmd->cmnd[0]);
2456 ent = esp->active_cmd;
2457 if (ent)
2458 printk(KERN_ERR PFX "esp%d: Current command [%p:%02x]\n",
2459 esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
2460 list_for_each_entry(ent, &esp->queued_cmds, list) {
2461 printk(KERN_ERR PFX "esp%d: Queued command [%p:%02x]\n",
2462 esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
2463 }
2464 list_for_each_entry(ent, &esp->active_cmds, list) {
2465 printk(KERN_ERR PFX "esp%d: Active command [%p:%02x]\n",
2466 esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
2467 }
2468 esp_dump_cmd_log(esp);
2469 spin_unlock_irqrestore(esp->host->host_lock, flags);
2470
2471 spin_lock_irqsave(esp->host->host_lock, flags);
2472
2473 ent = NULL;
2474 list_for_each_entry(tmp, &esp->queued_cmds, list) {
2475 if (tmp->cmd == cmd) {
2476 ent = tmp;
2477 break;
2478 }
2479 }
2480
2481 if (ent) {
2482 /* Easiest case, we didn't even issue the command
2483 * yet so it is trivial to abort.
2484 */
2485 list_del(&ent->list);
2486
2487 cmd->result = DID_ABORT << 16;
2488 cmd->scsi_done(cmd);
2489
2490 esp_put_ent(esp, ent);
2491
2492 goto out_success;
2493 }
2494
2495 init_completion(&eh_done);
2496
2497 ent = esp->active_cmd;
2498 if (ent && ent->cmd == cmd) {
2499 /* Command is the currently active command on
2500 * the bus. If we already have an output message
2501 * pending, no dice.
2502 */
2503 if (esp->msg_out_len)
2504 goto out_failure;
2505
2506 /* Send out an abort, encouraging the target to
2507 * go to MSGOUT phase by asserting ATN.
2508 */
2509 esp->msg_out[0] = ABORT_TASK_SET;
2510 esp->msg_out_len = 1;
2511 ent->eh_done = &eh_done;
2512
2513 scsi_esp_cmd(esp, ESP_CMD_SATN);
2514 } else {
2515 /* The command is disconnected. This is not easy to
2516 * abort. For now we fail and let the scsi error
2517 * handling layer go try a scsi bus reset or host
2518 * reset.
2519 *
2520 * What we could do is put together a scsi command
2521 * solely for the purpose of sending an abort message
2522 * to the target. Coming up with all the code to
2523 * cook up scsi commands, special case them everywhere,
2524 * etc. is for questionable gain and it would be better
2525 * if the generic scsi error handling layer could do at
2526 * least some of that for us.
2527 *
2528 * Anyways this is an area for potential future improvement
2529 * in this driver.
2530 */
2531 goto out_failure;
2532 }
2533
2534 spin_unlock_irqrestore(esp->host->host_lock, flags);
2535
2536 if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
2537 spin_lock_irqsave(esp->host->host_lock, flags);
2538 ent->eh_done = NULL;
2539 spin_unlock_irqrestore(esp->host->host_lock, flags);
2540
2541 return FAILED;
2542 }
2543
2544 return SUCCESS;
2545
2546out_success:
2547 spin_unlock_irqrestore(esp->host->host_lock, flags);
2548 return SUCCESS;
2549
2550out_failure:
2551 /* XXX This might be a good location to set ESP_TGT_BROKEN
2552 * XXX since we know which target/lun in particular is
2553 * XXX causing trouble.
2554 */
2555 spin_unlock_irqrestore(esp->host->host_lock, flags);
2556 return FAILED;
2557}
2558
2559static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
2560{
2561 struct esp *esp = shost_priv(cmd->device->host);
2562 struct completion eh_reset;
2563 unsigned long flags;
2564
2565 init_completion(&eh_reset);
2566
2567 spin_lock_irqsave(esp->host->host_lock, flags);
2568
2569 esp->eh_reset = &eh_reset;
2570
2571 /* XXX This is too simple... We should add lots of
2572 * XXX checks here so that if we find that the chip is
2573 * XXX very wedged we return failure immediately so
2574 * XXX that we can perform a full chip reset.
2575 */
2576 esp->flags |= ESP_FLAG_RESETTING;
2577 scsi_esp_cmd(esp, ESP_CMD_RS);
2578
2579 spin_unlock_irqrestore(esp->host->host_lock, flags);
2580
2581 ssleep(esp_bus_reset_settle);
2582
2583 if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
2584 spin_lock_irqsave(esp->host->host_lock, flags);
2585 esp->eh_reset = NULL;
2586 spin_unlock_irqrestore(esp->host->host_lock, flags);
2587
2588 return FAILED;
2589 }
2590
2591 return SUCCESS;
2592}
2593
2594/* All bets are off, reset the entire device. */
2595static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
2596{
2597 struct esp *esp = shost_priv(cmd->device->host);
2598 unsigned long flags;
2599
2600 spin_lock_irqsave(esp->host->host_lock, flags);
2601 esp_bootup_reset(esp);
2602 esp_reset_cleanup(esp);
2603 spin_unlock_irqrestore(esp->host->host_lock, flags);
2604
2605 ssleep(esp_bus_reset_settle);
2606
2607 return SUCCESS;
2608}
2609
2610static const char *esp_info(struct Scsi_Host *host)
2611{
2612 return "esp";
2613}
2614
2615struct scsi_host_template scsi_esp_template = {
2616 .module = THIS_MODULE,
2617 .name = "esp",
2618 .info = esp_info,
2619 .queuecommand = esp_queuecommand,
2620 .target_alloc = esp_target_alloc,
2621 .target_destroy = esp_target_destroy,
2622 .slave_alloc = esp_slave_alloc,
2623 .slave_configure = esp_slave_configure,
2624 .slave_destroy = esp_slave_destroy,
2625 .eh_abort_handler = esp_eh_abort_handler,
2626 .eh_bus_reset_handler = esp_eh_bus_reset_handler,
2627 .eh_host_reset_handler = esp_eh_host_reset_handler,
2628 .can_queue = 7,
2629 .this_id = 7,
2630 .sg_tablesize = SG_ALL,
2631 .use_clustering = ENABLE_CLUSTERING,
2632 .max_sectors = 0xffff,
2633 .skip_settle_delay = 1,
2634};
2635EXPORT_SYMBOL(scsi_esp_template);
2636
2637static void esp_get_signalling(struct Scsi_Host *host)
2638{
2639 struct esp *esp = shost_priv(host);
2640 enum spi_signal_type type;
2641
2642 if (esp->flags & ESP_FLAG_DIFFERENTIAL)
2643 type = SPI_SIGNAL_HVD;
2644 else
2645 type = SPI_SIGNAL_SE;
2646
2647 spi_signalling(host) = type;
2648}
2649
2650static void esp_set_offset(struct scsi_target *target, int offset)
2651{
2652 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2653 struct esp *esp = shost_priv(host);
2654 struct esp_target_data *tp = &esp->target[target->id];
2655
2656 if (esp->flags & ESP_FLAG_DISABLE_SYNC)
2657 tp->nego_goal_offset = 0;
2658 else
2659 tp->nego_goal_offset = offset;
2660 tp->flags |= ESP_TGT_CHECK_NEGO;
2661}
2662
2663static void esp_set_period(struct scsi_target *target, int period)
2664{
2665 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2666 struct esp *esp = shost_priv(host);
2667 struct esp_target_data *tp = &esp->target[target->id];
2668
2669 tp->nego_goal_period = period;
2670 tp->flags |= ESP_TGT_CHECK_NEGO;
2671}
2672
2673static void esp_set_width(struct scsi_target *target, int width)
2674{
2675 struct Scsi_Host *host = dev_to_shost(target->dev.parent);
2676 struct esp *esp = shost_priv(host);
2677 struct esp_target_data *tp = &esp->target[target->id];
2678
2679 tp->nego_goal_width = (width ? 1 : 0);
2680 tp->flags |= ESP_TGT_CHECK_NEGO;
2681}
2682
2683static struct spi_function_template esp_transport_ops = {
2684 .set_offset = esp_set_offset,
2685 .show_offset = 1,
2686 .set_period = esp_set_period,
2687 .show_period = 1,
2688 .set_width = esp_set_width,
2689 .show_width = 1,
2690 .get_signalling = esp_get_signalling,
2691};
2692
2693static int __init esp_init(void)
2694{
2695 BUILD_BUG_ON(sizeof(struct scsi_pointer) <
2696 sizeof(struct esp_cmd_priv));
2697
2698 esp_transport_template = spi_attach_transport(&esp_transport_ops);
2699 if (!esp_transport_template)
2700 return -ENODEV;
2701
2702 return 0;
2703}
2704
2705static void __exit esp_exit(void)
2706{
2707 spi_release_transport(esp_transport_template);
2708}
2709
2710MODULE_DESCRIPTION("ESP SCSI driver core");
2711MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
2712MODULE_LICENSE("GPL");
2713MODULE_VERSION(DRV_VERSION);
2714
2715module_param(esp_bus_reset_settle, int, 0);
2716MODULE_PARM_DESC(esp_bus_reset_settle,
2717 "ESP scsi bus reset delay in seconds");
2718
2719module_param(esp_debug, int, 0);
2720MODULE_PARM_DESC(esp_debug,
2721"ESP bitmapped debugging message enable value:\n"
2722" 0x00000001 Log interrupt events\n"
2723" 0x00000002 Log scsi commands\n"
2724" 0x00000004 Log resets\n"
2725" 0x00000008 Log message in events\n"
2726" 0x00000010 Log message out events\n"
2727" 0x00000020 Log command completion\n"
2728" 0x00000040 Log disconnects\n"
2729" 0x00000080 Log data start\n"
2730" 0x00000100 Log data done\n"
2731" 0x00000200 Log reconnects\n"
2732" 0x00000400 Log auto-sense data\n"
2733);
2734
2735module_init(esp_init);
2736module_exit(esp_exit);