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1// SPDX-License-Identifier: GPL-2.0
2
3#include <linux/cpumask.h>
4#include <linux/acpi.h>
5
6#include "local.h"
7
8int x2apic_phys;
9
10static struct apic apic_x2apic_phys;
11u32 x2apic_max_apicid __ro_after_init = UINT_MAX;
12
13void __init x2apic_set_max_apicid(u32 apicid)
14{
15 x2apic_max_apicid = apicid;
16 if (apic->x2apic_set_max_apicid)
17 apic->max_apic_id = apicid;
18}
19
20static int __init set_x2apic_phys_mode(char *arg)
21{
22 x2apic_phys = 1;
23 return 0;
24}
25early_param("x2apic_phys", set_x2apic_phys_mode);
26
27static bool x2apic_fadt_phys(void)
28{
29#ifdef CONFIG_ACPI
30 if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
31 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
32 printk(KERN_DEBUG "System requires x2apic physical mode\n");
33 return true;
34 }
35#endif
36 return false;
37}
38
39static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
40{
41 return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
42}
43
44static void x2apic_send_IPI(int cpu, int vector)
45{
46 u32 dest = per_cpu(x86_cpu_to_apicid, cpu);
47
48 /* x2apic MSRs are special and need a special fence: */
49 weak_wrmsr_fence();
50 __x2apic_send_IPI_dest(dest, vector, APIC_DEST_PHYSICAL);
51}
52
53static void
54__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
55{
56 unsigned long query_cpu;
57 unsigned long this_cpu;
58 unsigned long flags;
59
60 /* x2apic MSRs are special and need a special fence: */
61 weak_wrmsr_fence();
62
63 local_irq_save(flags);
64
65 this_cpu = smp_processor_id();
66 for_each_cpu(query_cpu, mask) {
67 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
68 continue;
69 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
70 vector, APIC_DEST_PHYSICAL);
71 }
72 local_irq_restore(flags);
73}
74
75static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
76{
77 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
78}
79
80static void
81 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
82{
83 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
84}
85
86static void __x2apic_send_IPI_shorthand(int vector, u32 which)
87{
88 unsigned long cfg = __prepare_ICR(which, vector, 0);
89
90 /* x2apic MSRs are special and need a special fence: */
91 weak_wrmsr_fence();
92 native_x2apic_icr_write(cfg, 0);
93}
94
95void x2apic_send_IPI_allbutself(int vector)
96{
97 __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLBUT);
98}
99
100void x2apic_send_IPI_all(int vector)
101{
102 __x2apic_send_IPI_shorthand(vector, APIC_DEST_ALLINC);
103}
104
105void x2apic_send_IPI_self(int vector)
106{
107 apic_write(APIC_SELF_IPI, vector);
108}
109
110void __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)
111{
112 unsigned long cfg = __prepare_ICR(0, vector, dest);
113 native_x2apic_icr_write(cfg, apicid);
114}
115
116static int x2apic_phys_probe(void)
117{
118 if (!x2apic_mode)
119 return 0;
120
121 if (x2apic_phys || x2apic_fadt_phys())
122 return 1;
123
124 return apic == &apic_x2apic_phys;
125}
126
127u32 x2apic_get_apic_id(u32 id)
128{
129 return id;
130}
131
132u32 x2apic_set_apic_id(u32 id)
133{
134 return id;
135}
136
137u32 x2apic_phys_pkg_id(u32 initial_apicid, int index_msb)
138{
139 return initial_apicid >> index_msb;
140}
141
142static struct apic apic_x2apic_phys __ro_after_init = {
143
144 .name = "physical x2apic",
145 .probe = x2apic_phys_probe,
146 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
147
148 .dest_mode_logical = false,
149
150 .disable_esr = 0,
151
152 .cpu_present_to_apicid = default_cpu_present_to_apicid,
153 .phys_pkg_id = x2apic_phys_pkg_id,
154
155 .max_apic_id = UINT_MAX,
156 .x2apic_set_max_apicid = true,
157 .get_apic_id = x2apic_get_apic_id,
158 .set_apic_id = x2apic_set_apic_id,
159
160 .calc_dest_apicid = apic_default_calc_apicid,
161
162 .send_IPI = x2apic_send_IPI,
163 .send_IPI_mask = x2apic_send_IPI_mask,
164 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
165 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
166 .send_IPI_all = x2apic_send_IPI_all,
167 .send_IPI_self = x2apic_send_IPI_self,
168 .nmi_to_offline_cpu = true,
169
170 .read = native_apic_msr_read,
171 .write = native_apic_msr_write,
172 .eoi = native_apic_msr_eoi,
173 .icr_read = native_x2apic_icr_read,
174 .icr_write = native_x2apic_icr_write,
175};
176
177apic_driver(apic_x2apic_phys);
1#include <linux/threads.h>
2#include <linux/cpumask.h>
3#include <linux/string.h>
4#include <linux/kernel.h>
5#include <linux/ctype.h>
6#include <linux/dmar.h>
7
8#include <asm/smp.h>
9#include <asm/x2apic.h>
10
11int x2apic_phys;
12
13static struct apic apic_x2apic_phys;
14
15static int set_x2apic_phys_mode(char *arg)
16{
17 x2apic_phys = 1;
18 return 0;
19}
20early_param("x2apic_phys", set_x2apic_phys_mode);
21
22static bool x2apic_fadt_phys(void)
23{
24 if ((acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) &&
25 (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
26 printk(KERN_DEBUG "System requires x2apic physical mode\n");
27 return true;
28 }
29 return false;
30}
31
32static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
33{
34 return x2apic_enabled() && (x2apic_phys || x2apic_fadt_phys());
35}
36
37static void
38__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)
39{
40 unsigned long query_cpu;
41 unsigned long this_cpu;
42 unsigned long flags;
43
44 x2apic_wrmsr_fence();
45
46 local_irq_save(flags);
47
48 this_cpu = smp_processor_id();
49 for_each_cpu(query_cpu, mask) {
50 if (apic_dest == APIC_DEST_ALLBUT && this_cpu == query_cpu)
51 continue;
52 __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
53 vector, APIC_DEST_PHYSICAL);
54 }
55 local_irq_restore(flags);
56}
57
58static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
59{
60 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLINC);
61}
62
63static void
64 x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
65{
66 __x2apic_send_IPI_mask(mask, vector, APIC_DEST_ALLBUT);
67}
68
69static void x2apic_send_IPI_allbutself(int vector)
70{
71 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLBUT);
72}
73
74static void x2apic_send_IPI_all(int vector)
75{
76 __x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);
77}
78
79static void init_x2apic_ldr(void)
80{
81}
82
83static int x2apic_phys_probe(void)
84{
85 if (x2apic_mode && (x2apic_phys || x2apic_fadt_phys()))
86 return 1;
87
88 return apic == &apic_x2apic_phys;
89}
90
91static struct apic apic_x2apic_phys = {
92
93 .name = "physical x2apic",
94 .probe = x2apic_phys_probe,
95 .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
96 .apic_id_valid = x2apic_apic_id_valid,
97 .apic_id_registered = x2apic_apic_id_registered,
98
99 .irq_delivery_mode = dest_Fixed,
100 .irq_dest_mode = 0, /* physical */
101
102 .target_cpus = online_target_cpus,
103 .disable_esr = 0,
104 .dest_logical = 0,
105 .check_apicid_used = NULL,
106 .check_apicid_present = NULL,
107
108 .vector_allocation_domain = default_vector_allocation_domain,
109 .init_apic_ldr = init_x2apic_ldr,
110
111 .ioapic_phys_id_map = NULL,
112 .setup_apic_routing = NULL,
113 .multi_timer_check = NULL,
114 .cpu_present_to_apicid = default_cpu_present_to_apicid,
115 .apicid_to_cpu_present = NULL,
116 .setup_portio_remap = NULL,
117 .check_phys_apicid_present = default_check_phys_apicid_present,
118 .enable_apic_mode = NULL,
119 .phys_pkg_id = x2apic_phys_pkg_id,
120 .mps_oem_check = NULL,
121
122 .get_apic_id = x2apic_get_apic_id,
123 .set_apic_id = x2apic_set_apic_id,
124 .apic_id_mask = 0xFFFFFFFFu,
125
126 .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
127
128 .send_IPI_mask = x2apic_send_IPI_mask,
129 .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
130 .send_IPI_allbutself = x2apic_send_IPI_allbutself,
131 .send_IPI_all = x2apic_send_IPI_all,
132 .send_IPI_self = x2apic_send_IPI_self,
133
134 .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
135 .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
136 .wait_for_init_deassert = false,
137 .smp_callin_clear_local_apic = NULL,
138 .inquire_remote_apic = NULL,
139
140 .read = native_apic_msr_read,
141 .write = native_apic_msr_write,
142 .eoi_write = native_apic_msr_eoi_write,
143 .icr_read = native_x2apic_icr_read,
144 .icr_write = native_x2apic_icr_write,
145 .wait_icr_idle = native_x2apic_wait_icr_idle,
146 .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
147};
148
149apic_driver(apic_x2apic_phys);