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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * timbuart.c timberdale FPGA UART driver
4 * Copyright (c) 2009 Intel Corporation
5 */
6
7/* Supports:
8 * Timberdale FPGA UART
9 */
10
11#include <linux/pci.h>
12#include <linux/interrupt.h>
13#include <linux/serial_core.h>
14#include <linux/tty.h>
15#include <linux/tty_flip.h>
16#include <linux/kernel.h>
17#include <linux/platform_device.h>
18#include <linux/ioport.h>
19#include <linux/slab.h>
20#include <linux/module.h>
21
22#include "timbuart.h"
23
24struct timbuart_port {
25 struct uart_port port;
26 struct tasklet_struct tasklet;
27 int usedma;
28 u32 last_ier;
29 struct platform_device *dev;
30};
31
32static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
33 921600, 1843200, 3250000};
34
35static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
36
37static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
38
39static void timbuart_stop_rx(struct uart_port *port)
40{
41 /* spin lock held by upper layer, disable all RX interrupts */
42 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
43 iowrite32(ier, port->membase + TIMBUART_IER);
44}
45
46static void timbuart_stop_tx(struct uart_port *port)
47{
48 /* spinlock held by upper layer, disable TX interrupt */
49 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
50 iowrite32(ier, port->membase + TIMBUART_IER);
51}
52
53static void timbuart_start_tx(struct uart_port *port)
54{
55 struct timbuart_port *uart =
56 container_of(port, struct timbuart_port, port);
57
58 /* do not transfer anything here -> fire off the tasklet */
59 tasklet_schedule(&uart->tasklet);
60}
61
62static unsigned int timbuart_tx_empty(struct uart_port *port)
63{
64 u32 isr = ioread32(port->membase + TIMBUART_ISR);
65
66 return (isr & TXBE) ? TIOCSER_TEMT : 0;
67}
68
69static void timbuart_flush_buffer(struct uart_port *port)
70{
71 if (!timbuart_tx_empty(port)) {
72 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
73 TIMBUART_CTRL_FLSHTX;
74
75 iowrite8(ctl, port->membase + TIMBUART_CTRL);
76 iowrite32(TXBF, port->membase + TIMBUART_ISR);
77 }
78}
79
80static void timbuart_rx_chars(struct uart_port *port)
81{
82 struct tty_port *tport = &port->state->port;
83
84 while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
85 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
86 port->icount.rx++;
87 tty_insert_flip_char(tport, ch, TTY_NORMAL);
88 }
89
90 tty_flip_buffer_push(tport);
91
92 dev_dbg(port->dev, "%s - total read %d bytes\n",
93 __func__, port->icount.rx);
94}
95
96static void timbuart_tx_chars(struct uart_port *port)
97{
98 struct circ_buf *xmit = &port->state->xmit;
99
100 while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
101 !uart_circ_empty(xmit)) {
102 iowrite8(xmit->buf[xmit->tail],
103 port->membase + TIMBUART_TXFIFO);
104 uart_xmit_advance(port, 1);
105 }
106
107 dev_dbg(port->dev,
108 "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
109 __func__,
110 port->icount.tx,
111 ioread8(port->membase + TIMBUART_CTRL),
112 port->mctrl & TIOCM_RTS,
113 ioread8(port->membase + TIMBUART_BAUDRATE));
114}
115
116static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
117{
118 struct timbuart_port *uart =
119 container_of(port, struct timbuart_port, port);
120 struct circ_buf *xmit = &port->state->xmit;
121
122 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
123 return;
124
125 if (port->x_char)
126 return;
127
128 if (isr & TXFLAGS) {
129 timbuart_tx_chars(port);
130 /* clear all TX interrupts */
131 iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
132
133 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
134 uart_write_wakeup(port);
135 } else
136 /* Re-enable any tx interrupt */
137 *ier |= uart->last_ier & TXFLAGS;
138
139 /* enable interrupts if there are chars in the transmit buffer,
140 * Or if we delivered some bytes and want the almost empty interrupt
141 * we wake up the upper layer later when we got the interrupt
142 * to give it some time to go out...
143 */
144 if (!uart_circ_empty(xmit))
145 *ier |= TXBAE;
146
147 dev_dbg(port->dev, "%s - leaving\n", __func__);
148}
149
150static void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
151{
152 if (isr & RXFLAGS) {
153 /* Some RX status is set */
154 if (isr & RXBF) {
155 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
156 TIMBUART_CTRL_FLSHRX;
157 iowrite8(ctl, port->membase + TIMBUART_CTRL);
158 port->icount.overrun++;
159 } else if (isr & (RXDP))
160 timbuart_rx_chars(port);
161
162 /* ack all RX interrupts */
163 iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
164 }
165
166 /* always have the RX interrupts enabled */
167 *ier |= RXBAF | RXBF | RXTT;
168
169 dev_dbg(port->dev, "%s - leaving\n", __func__);
170}
171
172static void timbuart_tasklet(struct tasklet_struct *t)
173{
174 struct timbuart_port *uart = from_tasklet(uart, t, tasklet);
175 u32 isr, ier = 0;
176
177 uart_port_lock(&uart->port);
178
179 isr = ioread32(uart->port.membase + TIMBUART_ISR);
180 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
181
182 if (!uart->usedma)
183 timbuart_handle_tx_port(&uart->port, isr, &ier);
184
185 timbuart_mctrl_check(&uart->port, isr, &ier);
186
187 if (!uart->usedma)
188 timbuart_handle_rx_port(&uart->port, isr, &ier);
189
190 iowrite32(ier, uart->port.membase + TIMBUART_IER);
191
192 uart_port_unlock(&uart->port);
193 dev_dbg(uart->port.dev, "%s leaving\n", __func__);
194}
195
196static unsigned int timbuart_get_mctrl(struct uart_port *port)
197{
198 u8 cts = ioread8(port->membase + TIMBUART_CTRL);
199 dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
200
201 if (cts & TIMBUART_CTRL_CTS)
202 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
203 else
204 return TIOCM_DSR | TIOCM_CAR;
205}
206
207static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
208{
209 dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
210
211 if (mctrl & TIOCM_RTS)
212 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
213 else
214 iowrite8(0, port->membase + TIMBUART_CTRL);
215}
216
217static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
218{
219 unsigned int cts;
220
221 if (isr & CTS_DELTA) {
222 /* ack */
223 iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
224 cts = timbuart_get_mctrl(port);
225 uart_handle_cts_change(port, cts & TIOCM_CTS);
226 wake_up_interruptible(&port->state->port.delta_msr_wait);
227 }
228
229 *ier |= CTS_DELTA;
230}
231
232static void timbuart_break_ctl(struct uart_port *port, int ctl)
233{
234 /* N/A */
235}
236
237static int timbuart_startup(struct uart_port *port)
238{
239 struct timbuart_port *uart =
240 container_of(port, struct timbuart_port, port);
241
242 dev_dbg(port->dev, "%s\n", __func__);
243
244 iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
245 iowrite32(0x1ff, port->membase + TIMBUART_ISR);
246 /* Enable all but TX interrupts */
247 iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
248 port->membase + TIMBUART_IER);
249
250 return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
251 "timb-uart", uart);
252}
253
254static void timbuart_shutdown(struct uart_port *port)
255{
256 struct timbuart_port *uart =
257 container_of(port, struct timbuart_port, port);
258 dev_dbg(port->dev, "%s\n", __func__);
259 free_irq(port->irq, uart);
260 iowrite32(0, port->membase + TIMBUART_IER);
261
262 timbuart_flush_buffer(port);
263}
264
265static int get_bindex(int baud)
266{
267 int i;
268
269 for (i = 0; i < ARRAY_SIZE(baudrates); i++)
270 if (baud <= baudrates[i])
271 return i;
272
273 return -1;
274}
275
276static void timbuart_set_termios(struct uart_port *port,
277 struct ktermios *termios,
278 const struct ktermios *old)
279{
280 unsigned int baud;
281 short bindex;
282 unsigned long flags;
283
284 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
285 bindex = get_bindex(baud);
286 dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
287
288 if (bindex < 0)
289 bindex = 0;
290 baud = baudrates[bindex];
291
292 /* The serial layer calls into this once with old = NULL when setting
293 up initially */
294 if (old)
295 tty_termios_copy_hw(termios, old);
296 tty_termios_encode_baud_rate(termios, baud, baud);
297
298 uart_port_lock_irqsave(port, &flags);
299 iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
300 uart_update_timeout(port, termios->c_cflag, baud);
301 uart_port_unlock_irqrestore(port, flags);
302}
303
304static const char *timbuart_type(struct uart_port *port)
305{
306 return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
307}
308
309/* We do not request/release mappings of the registers here,
310 * currently it's done in the proble function.
311 */
312static void timbuart_release_port(struct uart_port *port)
313{
314 struct platform_device *pdev = to_platform_device(port->dev);
315 int size =
316 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
317
318 if (port->flags & UPF_IOREMAP) {
319 iounmap(port->membase);
320 port->membase = NULL;
321 }
322
323 release_mem_region(port->mapbase, size);
324}
325
326static int timbuart_request_port(struct uart_port *port)
327{
328 struct platform_device *pdev = to_platform_device(port->dev);
329 int size =
330 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
331
332 if (!request_mem_region(port->mapbase, size, "timb-uart"))
333 return -EBUSY;
334
335 if (port->flags & UPF_IOREMAP) {
336 port->membase = ioremap(port->mapbase, size);
337 if (port->membase == NULL) {
338 release_mem_region(port->mapbase, size);
339 return -ENOMEM;
340 }
341 }
342
343 return 0;
344}
345
346static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
347{
348 struct timbuart_port *uart = (struct timbuart_port *)devid;
349
350 if (ioread8(uart->port.membase + TIMBUART_IPR)) {
351 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
352
353 /* disable interrupts, the tasklet enables them again */
354 iowrite32(0, uart->port.membase + TIMBUART_IER);
355
356 /* fire off bottom half */
357 tasklet_schedule(&uart->tasklet);
358
359 return IRQ_HANDLED;
360 } else
361 return IRQ_NONE;
362}
363
364/*
365 * Configure/autoconfigure the port.
366 */
367static void timbuart_config_port(struct uart_port *port, int flags)
368{
369 if (flags & UART_CONFIG_TYPE) {
370 port->type = PORT_TIMBUART;
371 timbuart_request_port(port);
372 }
373}
374
375static int timbuart_verify_port(struct uart_port *port,
376 struct serial_struct *ser)
377{
378 /* we don't want the core code to modify any port params */
379 return -EINVAL;
380}
381
382static const struct uart_ops timbuart_ops = {
383 .tx_empty = timbuart_tx_empty,
384 .set_mctrl = timbuart_set_mctrl,
385 .get_mctrl = timbuart_get_mctrl,
386 .stop_tx = timbuart_stop_tx,
387 .start_tx = timbuart_start_tx,
388 .flush_buffer = timbuart_flush_buffer,
389 .stop_rx = timbuart_stop_rx,
390 .break_ctl = timbuart_break_ctl,
391 .startup = timbuart_startup,
392 .shutdown = timbuart_shutdown,
393 .set_termios = timbuart_set_termios,
394 .type = timbuart_type,
395 .release_port = timbuart_release_port,
396 .request_port = timbuart_request_port,
397 .config_port = timbuart_config_port,
398 .verify_port = timbuart_verify_port
399};
400
401static struct uart_driver timbuart_driver = {
402 .owner = THIS_MODULE,
403 .driver_name = "timberdale_uart",
404 .dev_name = "ttyTU",
405 .major = TIMBUART_MAJOR,
406 .minor = TIMBUART_MINOR,
407 .nr = 1
408};
409
410static int timbuart_probe(struct platform_device *dev)
411{
412 int err, irq;
413 struct timbuart_port *uart;
414 struct resource *iomem;
415
416 dev_dbg(&dev->dev, "%s\n", __func__);
417
418 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
419 if (!uart) {
420 err = -EINVAL;
421 goto err_mem;
422 }
423
424 uart->usedma = 0;
425
426 uart->port.uartclk = 3250000 * 16;
427 uart->port.fifosize = TIMBUART_FIFO_SIZE;
428 uart->port.regshift = 2;
429 uart->port.iotype = UPIO_MEM;
430 uart->port.ops = &timbuart_ops;
431 uart->port.irq = 0;
432 uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
433 uart->port.line = 0;
434 uart->port.dev = &dev->dev;
435
436 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
437 if (!iomem) {
438 err = -ENOMEM;
439 goto err_register;
440 }
441 uart->port.mapbase = iomem->start;
442 uart->port.membase = NULL;
443
444 irq = platform_get_irq(dev, 0);
445 if (irq < 0) {
446 err = -EINVAL;
447 goto err_register;
448 }
449 uart->port.irq = irq;
450
451 tasklet_setup(&uart->tasklet, timbuart_tasklet);
452
453 err = uart_register_driver(&timbuart_driver);
454 if (err)
455 goto err_register;
456
457 err = uart_add_one_port(&timbuart_driver, &uart->port);
458 if (err)
459 goto err_add_port;
460
461 platform_set_drvdata(dev, uart);
462
463 return 0;
464
465err_add_port:
466 uart_unregister_driver(&timbuart_driver);
467err_register:
468 kfree(uart);
469err_mem:
470 printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
471 err);
472
473 return err;
474}
475
476static void timbuart_remove(struct platform_device *dev)
477{
478 struct timbuart_port *uart = platform_get_drvdata(dev);
479
480 tasklet_kill(&uart->tasklet);
481 uart_remove_one_port(&timbuart_driver, &uart->port);
482 uart_unregister_driver(&timbuart_driver);
483 kfree(uart);
484}
485
486static struct platform_driver timbuart_platform_driver = {
487 .driver = {
488 .name = "timb-uart",
489 },
490 .probe = timbuart_probe,
491 .remove_new = timbuart_remove,
492};
493
494module_platform_driver(timbuart_platform_driver);
495
496MODULE_DESCRIPTION("Timberdale UART driver");
497MODULE_LICENSE("GPL v2");
498MODULE_ALIAS("platform:timb-uart");
499
1/*
2 * timbuart.c timberdale FPGA UART driver
3 * Copyright (c) 2009 Intel Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19/* Supports:
20 * Timberdale FPGA UART
21 */
22
23#include <linux/pci.h>
24#include <linux/interrupt.h>
25#include <linux/serial_core.h>
26#include <linux/kernel.h>
27#include <linux/platform_device.h>
28#include <linux/ioport.h>
29#include <linux/slab.h>
30
31#include "timbuart.h"
32
33struct timbuart_port {
34 struct uart_port port;
35 struct tasklet_struct tasklet;
36 int usedma;
37 u32 last_ier;
38 struct platform_device *dev;
39};
40
41static int baudrates[] = {9600, 19200, 38400, 57600, 115200, 230400, 460800,
42 921600, 1843200, 3250000};
43
44static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier);
45
46static irqreturn_t timbuart_handleinterrupt(int irq, void *devid);
47
48static void timbuart_stop_rx(struct uart_port *port)
49{
50 /* spin lock held by upper layer, disable all RX interrupts */
51 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~RXFLAGS;
52 iowrite32(ier, port->membase + TIMBUART_IER);
53}
54
55static void timbuart_stop_tx(struct uart_port *port)
56{
57 /* spinlock held by upper layer, disable TX interrupt */
58 u32 ier = ioread32(port->membase + TIMBUART_IER) & ~TXBAE;
59 iowrite32(ier, port->membase + TIMBUART_IER);
60}
61
62static void timbuart_start_tx(struct uart_port *port)
63{
64 struct timbuart_port *uart =
65 container_of(port, struct timbuart_port, port);
66
67 /* do not transfer anything here -> fire off the tasklet */
68 tasklet_schedule(&uart->tasklet);
69}
70
71static unsigned int timbuart_tx_empty(struct uart_port *port)
72{
73 u32 isr = ioread32(port->membase + TIMBUART_ISR);
74
75 return (isr & TXBE) ? TIOCSER_TEMT : 0;
76}
77
78static void timbuart_flush_buffer(struct uart_port *port)
79{
80 if (!timbuart_tx_empty(port)) {
81 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
82 TIMBUART_CTRL_FLSHTX;
83
84 iowrite8(ctl, port->membase + TIMBUART_CTRL);
85 iowrite32(TXBF, port->membase + TIMBUART_ISR);
86 }
87}
88
89static void timbuart_rx_chars(struct uart_port *port)
90{
91 struct tty_struct *tty = port->state->port.tty;
92
93 while (ioread32(port->membase + TIMBUART_ISR) & RXDP) {
94 u8 ch = ioread8(port->membase + TIMBUART_RXFIFO);
95 port->icount.rx++;
96 tty_insert_flip_char(tty, ch, TTY_NORMAL);
97 }
98
99 spin_unlock(&port->lock);
100 tty_flip_buffer_push(port->state->port.tty);
101 spin_lock(&port->lock);
102
103 dev_dbg(port->dev, "%s - total read %d bytes\n",
104 __func__, port->icount.rx);
105}
106
107static void timbuart_tx_chars(struct uart_port *port)
108{
109 struct circ_buf *xmit = &port->state->xmit;
110
111 while (!(ioread32(port->membase + TIMBUART_ISR) & TXBF) &&
112 !uart_circ_empty(xmit)) {
113 iowrite8(xmit->buf[xmit->tail],
114 port->membase + TIMBUART_TXFIFO);
115 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
116 port->icount.tx++;
117 }
118
119 dev_dbg(port->dev,
120 "%s - total written %d bytes, CTL: %x, RTS: %x, baud: %x\n",
121 __func__,
122 port->icount.tx,
123 ioread8(port->membase + TIMBUART_CTRL),
124 port->mctrl & TIOCM_RTS,
125 ioread8(port->membase + TIMBUART_BAUDRATE));
126}
127
128static void timbuart_handle_tx_port(struct uart_port *port, u32 isr, u32 *ier)
129{
130 struct timbuart_port *uart =
131 container_of(port, struct timbuart_port, port);
132 struct circ_buf *xmit = &port->state->xmit;
133
134 if (uart_circ_empty(xmit) || uart_tx_stopped(port))
135 return;
136
137 if (port->x_char)
138 return;
139
140 if (isr & TXFLAGS) {
141 timbuart_tx_chars(port);
142 /* clear all TX interrupts */
143 iowrite32(TXFLAGS, port->membase + TIMBUART_ISR);
144
145 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
146 uart_write_wakeup(port);
147 } else
148 /* Re-enable any tx interrupt */
149 *ier |= uart->last_ier & TXFLAGS;
150
151 /* enable interrupts if there are chars in the transmit buffer,
152 * Or if we delivered some bytes and want the almost empty interrupt
153 * we wake up the upper layer later when we got the interrupt
154 * to give it some time to go out...
155 */
156 if (!uart_circ_empty(xmit))
157 *ier |= TXBAE;
158
159 dev_dbg(port->dev, "%s - leaving\n", __func__);
160}
161
162void timbuart_handle_rx_port(struct uart_port *port, u32 isr, u32 *ier)
163{
164 if (isr & RXFLAGS) {
165 /* Some RX status is set */
166 if (isr & RXBF) {
167 u8 ctl = ioread8(port->membase + TIMBUART_CTRL) |
168 TIMBUART_CTRL_FLSHRX;
169 iowrite8(ctl, port->membase + TIMBUART_CTRL);
170 port->icount.overrun++;
171 } else if (isr & (RXDP))
172 timbuart_rx_chars(port);
173
174 /* ack all RX interrupts */
175 iowrite32(RXFLAGS, port->membase + TIMBUART_ISR);
176 }
177
178 /* always have the RX interrupts enabled */
179 *ier |= RXBAF | RXBF | RXTT;
180
181 dev_dbg(port->dev, "%s - leaving\n", __func__);
182}
183
184void timbuart_tasklet(unsigned long arg)
185{
186 struct timbuart_port *uart = (struct timbuart_port *)arg;
187 u32 isr, ier = 0;
188
189 spin_lock(&uart->port.lock);
190
191 isr = ioread32(uart->port.membase + TIMBUART_ISR);
192 dev_dbg(uart->port.dev, "%s ISR: %x\n", __func__, isr);
193
194 if (!uart->usedma)
195 timbuart_handle_tx_port(&uart->port, isr, &ier);
196
197 timbuart_mctrl_check(&uart->port, isr, &ier);
198
199 if (!uart->usedma)
200 timbuart_handle_rx_port(&uart->port, isr, &ier);
201
202 iowrite32(ier, uart->port.membase + TIMBUART_IER);
203
204 spin_unlock(&uart->port.lock);
205 dev_dbg(uart->port.dev, "%s leaving\n", __func__);
206}
207
208static unsigned int timbuart_get_mctrl(struct uart_port *port)
209{
210 u8 cts = ioread8(port->membase + TIMBUART_CTRL);
211 dev_dbg(port->dev, "%s - cts %x\n", __func__, cts);
212
213 if (cts & TIMBUART_CTRL_CTS)
214 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
215 else
216 return TIOCM_DSR | TIOCM_CAR;
217}
218
219static void timbuart_set_mctrl(struct uart_port *port, unsigned int mctrl)
220{
221 dev_dbg(port->dev, "%s - %x\n", __func__, mctrl);
222
223 if (mctrl & TIOCM_RTS)
224 iowrite8(TIMBUART_CTRL_RTS, port->membase + TIMBUART_CTRL);
225 else
226 iowrite8(0, port->membase + TIMBUART_CTRL);
227}
228
229static void timbuart_mctrl_check(struct uart_port *port, u32 isr, u32 *ier)
230{
231 unsigned int cts;
232
233 if (isr & CTS_DELTA) {
234 /* ack */
235 iowrite32(CTS_DELTA, port->membase + TIMBUART_ISR);
236 cts = timbuart_get_mctrl(port);
237 uart_handle_cts_change(port, cts & TIOCM_CTS);
238 wake_up_interruptible(&port->state->port.delta_msr_wait);
239 }
240
241 *ier |= CTS_DELTA;
242}
243
244static void timbuart_enable_ms(struct uart_port *port)
245{
246 /* N/A */
247}
248
249static void timbuart_break_ctl(struct uart_port *port, int ctl)
250{
251 /* N/A */
252}
253
254static int timbuart_startup(struct uart_port *port)
255{
256 struct timbuart_port *uart =
257 container_of(port, struct timbuart_port, port);
258
259 dev_dbg(port->dev, "%s\n", __func__);
260
261 iowrite8(TIMBUART_CTRL_FLSHRX, port->membase + TIMBUART_CTRL);
262 iowrite32(0x1ff, port->membase + TIMBUART_ISR);
263 /* Enable all but TX interrupts */
264 iowrite32(RXBAF | RXBF | RXTT | CTS_DELTA,
265 port->membase + TIMBUART_IER);
266
267 return request_irq(port->irq, timbuart_handleinterrupt, IRQF_SHARED,
268 "timb-uart", uart);
269}
270
271static void timbuart_shutdown(struct uart_port *port)
272{
273 struct timbuart_port *uart =
274 container_of(port, struct timbuart_port, port);
275 dev_dbg(port->dev, "%s\n", __func__);
276 free_irq(port->irq, uart);
277 iowrite32(0, port->membase + TIMBUART_IER);
278}
279
280static int get_bindex(int baud)
281{
282 int i;
283
284 for (i = 0; i < ARRAY_SIZE(baudrates); i++)
285 if (baud <= baudrates[i])
286 return i;
287
288 return -1;
289}
290
291static void timbuart_set_termios(struct uart_port *port,
292 struct ktermios *termios,
293 struct ktermios *old)
294{
295 unsigned int baud;
296 short bindex;
297 unsigned long flags;
298
299 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
300 bindex = get_bindex(baud);
301 dev_dbg(port->dev, "%s - bindex %d\n", __func__, bindex);
302
303 if (bindex < 0)
304 bindex = 0;
305 baud = baudrates[bindex];
306
307 /* The serial layer calls into this once with old = NULL when setting
308 up initially */
309 if (old)
310 tty_termios_copy_hw(termios, old);
311 tty_termios_encode_baud_rate(termios, baud, baud);
312
313 spin_lock_irqsave(&port->lock, flags);
314 iowrite8((u8)bindex, port->membase + TIMBUART_BAUDRATE);
315 uart_update_timeout(port, termios->c_cflag, baud);
316 spin_unlock_irqrestore(&port->lock, flags);
317}
318
319static const char *timbuart_type(struct uart_port *port)
320{
321 return port->type == PORT_UNKNOWN ? "timbuart" : NULL;
322}
323
324/* We do not request/release mappings of the registers here,
325 * currently it's done in the proble function.
326 */
327static void timbuart_release_port(struct uart_port *port)
328{
329 struct platform_device *pdev = to_platform_device(port->dev);
330 int size =
331 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
332
333 if (port->flags & UPF_IOREMAP) {
334 iounmap(port->membase);
335 port->membase = NULL;
336 }
337
338 release_mem_region(port->mapbase, size);
339}
340
341static int timbuart_request_port(struct uart_port *port)
342{
343 struct platform_device *pdev = to_platform_device(port->dev);
344 int size =
345 resource_size(platform_get_resource(pdev, IORESOURCE_MEM, 0));
346
347 if (!request_mem_region(port->mapbase, size, "timb-uart"))
348 return -EBUSY;
349
350 if (port->flags & UPF_IOREMAP) {
351 port->membase = ioremap(port->mapbase, size);
352 if (port->membase == NULL) {
353 release_mem_region(port->mapbase, size);
354 return -ENOMEM;
355 }
356 }
357
358 return 0;
359}
360
361static irqreturn_t timbuart_handleinterrupt(int irq, void *devid)
362{
363 struct timbuart_port *uart = (struct timbuart_port *)devid;
364
365 if (ioread8(uart->port.membase + TIMBUART_IPR)) {
366 uart->last_ier = ioread32(uart->port.membase + TIMBUART_IER);
367
368 /* disable interrupts, the tasklet enables them again */
369 iowrite32(0, uart->port.membase + TIMBUART_IER);
370
371 /* fire off bottom half */
372 tasklet_schedule(&uart->tasklet);
373
374 return IRQ_HANDLED;
375 } else
376 return IRQ_NONE;
377}
378
379/*
380 * Configure/autoconfigure the port.
381 */
382static void timbuart_config_port(struct uart_port *port, int flags)
383{
384 if (flags & UART_CONFIG_TYPE) {
385 port->type = PORT_TIMBUART;
386 timbuart_request_port(port);
387 }
388}
389
390static int timbuart_verify_port(struct uart_port *port,
391 struct serial_struct *ser)
392{
393 /* we don't want the core code to modify any port params */
394 return -EINVAL;
395}
396
397static struct uart_ops timbuart_ops = {
398 .tx_empty = timbuart_tx_empty,
399 .set_mctrl = timbuart_set_mctrl,
400 .get_mctrl = timbuart_get_mctrl,
401 .stop_tx = timbuart_stop_tx,
402 .start_tx = timbuart_start_tx,
403 .flush_buffer = timbuart_flush_buffer,
404 .stop_rx = timbuart_stop_rx,
405 .enable_ms = timbuart_enable_ms,
406 .break_ctl = timbuart_break_ctl,
407 .startup = timbuart_startup,
408 .shutdown = timbuart_shutdown,
409 .set_termios = timbuart_set_termios,
410 .type = timbuart_type,
411 .release_port = timbuart_release_port,
412 .request_port = timbuart_request_port,
413 .config_port = timbuart_config_port,
414 .verify_port = timbuart_verify_port
415};
416
417static struct uart_driver timbuart_driver = {
418 .owner = THIS_MODULE,
419 .driver_name = "timberdale_uart",
420 .dev_name = "ttyTU",
421 .major = TIMBUART_MAJOR,
422 .minor = TIMBUART_MINOR,
423 .nr = 1
424};
425
426static int __devinit timbuart_probe(struct platform_device *dev)
427{
428 int err, irq;
429 struct timbuart_port *uart;
430 struct resource *iomem;
431
432 dev_dbg(&dev->dev, "%s\n", __func__);
433
434 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
435 if (!uart) {
436 err = -EINVAL;
437 goto err_mem;
438 }
439
440 uart->usedma = 0;
441
442 uart->port.uartclk = 3250000 * 16;
443 uart->port.fifosize = TIMBUART_FIFO_SIZE;
444 uart->port.regshift = 2;
445 uart->port.iotype = UPIO_MEM;
446 uart->port.ops = &timbuart_ops;
447 uart->port.irq = 0;
448 uart->port.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP;
449 uart->port.line = 0;
450 uart->port.dev = &dev->dev;
451
452 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
453 if (!iomem) {
454 err = -ENOMEM;
455 goto err_register;
456 }
457 uart->port.mapbase = iomem->start;
458 uart->port.membase = NULL;
459
460 irq = platform_get_irq(dev, 0);
461 if (irq < 0) {
462 err = -EINVAL;
463 goto err_register;
464 }
465 uart->port.irq = irq;
466
467 tasklet_init(&uart->tasklet, timbuart_tasklet, (unsigned long)uart);
468
469 err = uart_register_driver(&timbuart_driver);
470 if (err)
471 goto err_register;
472
473 err = uart_add_one_port(&timbuart_driver, &uart->port);
474 if (err)
475 goto err_add_port;
476
477 platform_set_drvdata(dev, uart);
478
479 return 0;
480
481err_add_port:
482 uart_unregister_driver(&timbuart_driver);
483err_register:
484 kfree(uart);
485err_mem:
486 printk(KERN_ERR "timberdale: Failed to register Timberdale UART: %d\n",
487 err);
488
489 return err;
490}
491
492static int __devexit timbuart_remove(struct platform_device *dev)
493{
494 struct timbuart_port *uart = platform_get_drvdata(dev);
495
496 tasklet_kill(&uart->tasklet);
497 uart_remove_one_port(&timbuart_driver, &uart->port);
498 uart_unregister_driver(&timbuart_driver);
499 kfree(uart);
500
501 return 0;
502}
503
504static struct platform_driver timbuart_platform_driver = {
505 .driver = {
506 .name = "timb-uart",
507 .owner = THIS_MODULE,
508 },
509 .probe = timbuart_probe,
510 .remove = __devexit_p(timbuart_remove),
511};
512
513/*--------------------------------------------------------------------------*/
514
515static int __init timbuart_init(void)
516{
517 return platform_driver_register(&timbuart_platform_driver);
518}
519
520static void __exit timbuart_exit(void)
521{
522 platform_driver_unregister(&timbuart_platform_driver);
523}
524
525module_init(timbuart_init);
526module_exit(timbuart_exit);
527
528MODULE_DESCRIPTION("Timberdale UART driver");
529MODULE_LICENSE("GPL v2");
530MODULE_ALIAS("platform:timb-uart");
531