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1/*
2 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
3 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
4 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
5 <http://rt2x00.serialmonkey.com>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc.,
20 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
21 */
22
23/*
24 Module: rt2x00lib
25 Abstract: rt2x00 queue specific routines.
26 */
27
28#include <linux/slab.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/dma-mapping.h>
32
33#include "rt2x00.h"
34#include "rt2x00lib.h"
35
36struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry)
37{
38 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
39 struct sk_buff *skb;
40 struct skb_frame_desc *skbdesc;
41 unsigned int frame_size;
42 unsigned int head_size = 0;
43 unsigned int tail_size = 0;
44
45 /*
46 * The frame size includes descriptor size, because the
47 * hardware directly receive the frame into the skbuffer.
48 */
49 frame_size = entry->queue->data_size + entry->queue->desc_size;
50
51 /*
52 * The payload should be aligned to a 4-byte boundary,
53 * this means we need at least 3 bytes for moving the frame
54 * into the correct offset.
55 */
56 head_size = 4;
57
58 /*
59 * For IV/EIV/ICV assembly we must make sure there is
60 * at least 8 bytes bytes available in headroom for IV/EIV
61 * and 8 bytes for ICV data as tailroon.
62 */
63 if (test_bit(CAPABILITY_HW_CRYPTO, &rt2x00dev->cap_flags)) {
64 head_size += 8;
65 tail_size += 8;
66 }
67
68 /*
69 * Allocate skbuffer.
70 */
71 skb = dev_alloc_skb(frame_size + head_size + tail_size);
72 if (!skb)
73 return NULL;
74
75 /*
76 * Make sure we not have a frame with the requested bytes
77 * available in the head and tail.
78 */
79 skb_reserve(skb, head_size);
80 skb_put(skb, frame_size);
81
82 /*
83 * Populate skbdesc.
84 */
85 skbdesc = get_skb_frame_desc(skb);
86 memset(skbdesc, 0, sizeof(*skbdesc));
87 skbdesc->entry = entry;
88
89 if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags)) {
90 skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
91 skb->data,
92 skb->len,
93 DMA_FROM_DEVICE);
94 skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
95 }
96
97 return skb;
98}
99
100void rt2x00queue_map_txskb(struct queue_entry *entry)
101{
102 struct device *dev = entry->queue->rt2x00dev->dev;
103 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
104
105 skbdesc->skb_dma =
106 dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
107 skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
108}
109EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
110
111void rt2x00queue_unmap_skb(struct queue_entry *entry)
112{
113 struct device *dev = entry->queue->rt2x00dev->dev;
114 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
115
116 if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
117 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
118 DMA_FROM_DEVICE);
119 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
120 } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
121 dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
122 DMA_TO_DEVICE);
123 skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
124 }
125}
126EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
127
128void rt2x00queue_free_skb(struct queue_entry *entry)
129{
130 if (!entry->skb)
131 return;
132
133 rt2x00queue_unmap_skb(entry);
134 dev_kfree_skb_any(entry->skb);
135 entry->skb = NULL;
136}
137
138void rt2x00queue_align_frame(struct sk_buff *skb)
139{
140 unsigned int frame_length = skb->len;
141 unsigned int align = ALIGN_SIZE(skb, 0);
142
143 if (!align)
144 return;
145
146 skb_push(skb, align);
147 memmove(skb->data, skb->data + align, frame_length);
148 skb_trim(skb, frame_length);
149}
150
151void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int header_length)
152{
153 unsigned int payload_length = skb->len - header_length;
154 unsigned int header_align = ALIGN_SIZE(skb, 0);
155 unsigned int payload_align = ALIGN_SIZE(skb, header_length);
156 unsigned int l2pad = payload_length ? L2PAD_SIZE(header_length) : 0;
157
158 /*
159 * Adjust the header alignment if the payload needs to be moved more
160 * than the header.
161 */
162 if (payload_align > header_align)
163 header_align += 4;
164
165 /* There is nothing to do if no alignment is needed */
166 if (!header_align)
167 return;
168
169 /* Reserve the amount of space needed in front of the frame */
170 skb_push(skb, header_align);
171
172 /*
173 * Move the header.
174 */
175 memmove(skb->data, skb->data + header_align, header_length);
176
177 /* Move the payload, if present and if required */
178 if (payload_length && payload_align)
179 memmove(skb->data + header_length + l2pad,
180 skb->data + header_length + l2pad + payload_align,
181 payload_length);
182
183 /* Trim the skb to the correct size */
184 skb_trim(skb, header_length + l2pad + payload_length);
185}
186
187void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
188{
189 /*
190 * L2 padding is only present if the skb contains more than just the
191 * IEEE 802.11 header.
192 */
193 unsigned int l2pad = (skb->len > header_length) ?
194 L2PAD_SIZE(header_length) : 0;
195
196 if (!l2pad)
197 return;
198
199 memmove(skb->data + l2pad, skb->data, header_length);
200 skb_pull(skb, l2pad);
201}
202
203static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
204 struct sk_buff *skb,
205 struct txentry_desc *txdesc)
206{
207 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
208 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
209 struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
210
211 if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
212 return;
213
214 __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
215
216 if (!test_bit(REQUIRE_SW_SEQNO, &rt2x00dev->cap_flags))
217 return;
218
219 /*
220 * The hardware is not able to insert a sequence number. Assign a
221 * software generated one here.
222 *
223 * This is wrong because beacons are not getting sequence
224 * numbers assigned properly.
225 *
226 * A secondary problem exists for drivers that cannot toggle
227 * sequence counting per-frame, since those will override the
228 * sequence counter given by mac80211.
229 */
230 spin_lock(&intf->seqlock);
231
232 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
233 intf->seqno += 0x10;
234 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
235 hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
236
237 spin_unlock(&intf->seqlock);
238
239}
240
241static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
242 struct sk_buff *skb,
243 struct txentry_desc *txdesc,
244 const struct rt2x00_rate *hwrate)
245{
246 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
247 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
248 unsigned int data_length;
249 unsigned int duration;
250 unsigned int residual;
251
252 /*
253 * Determine with what IFS priority this frame should be send.
254 * Set ifs to IFS_SIFS when the this is not the first fragment,
255 * or this fragment came after RTS/CTS.
256 */
257 if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
258 txdesc->u.plcp.ifs = IFS_BACKOFF;
259 else
260 txdesc->u.plcp.ifs = IFS_SIFS;
261
262 /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
263 data_length = skb->len + 4;
264 data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
265
266 /*
267 * PLCP setup
268 * Length calculation depends on OFDM/CCK rate.
269 */
270 txdesc->u.plcp.signal = hwrate->plcp;
271 txdesc->u.plcp.service = 0x04;
272
273 if (hwrate->flags & DEV_RATE_OFDM) {
274 txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
275 txdesc->u.plcp.length_low = data_length & 0x3f;
276 } else {
277 /*
278 * Convert length to microseconds.
279 */
280 residual = GET_DURATION_RES(data_length, hwrate->bitrate);
281 duration = GET_DURATION(data_length, hwrate->bitrate);
282
283 if (residual != 0) {
284 duration++;
285
286 /*
287 * Check if we need to set the Length Extension
288 */
289 if (hwrate->bitrate == 110 && residual <= 30)
290 txdesc->u.plcp.service |= 0x80;
291 }
292
293 txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
294 txdesc->u.plcp.length_low = duration & 0xff;
295
296 /*
297 * When preamble is enabled we should set the
298 * preamble bit for the signal.
299 */
300 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
301 txdesc->u.plcp.signal |= 0x08;
302 }
303}
304
305static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
306 struct sk_buff *skb,
307 struct txentry_desc *txdesc,
308 const struct rt2x00_rate *hwrate)
309{
310 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
311 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
312 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
313
314 if (tx_info->control.sta)
315 txdesc->u.ht.mpdu_density =
316 tx_info->control.sta->ht_cap.ampdu_density;
317
318 txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
319
320 /*
321 * Only one STBC stream is supported for now.
322 */
323 if (tx_info->flags & IEEE80211_TX_CTL_STBC)
324 txdesc->u.ht.stbc = 1;
325
326 /*
327 * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
328 * mcs rate to be used
329 */
330 if (txrate->flags & IEEE80211_TX_RC_MCS) {
331 txdesc->u.ht.mcs = txrate->idx;
332
333 /*
334 * MIMO PS should be set to 1 for STA's using dynamic SM PS
335 * when using more then one tx stream (>MCS7).
336 */
337 if (tx_info->control.sta && txdesc->u.ht.mcs > 7 &&
338 ((tx_info->control.sta->ht_cap.cap &
339 IEEE80211_HT_CAP_SM_PS) >>
340 IEEE80211_HT_CAP_SM_PS_SHIFT) ==
341 WLAN_HT_CAP_SM_PS_DYNAMIC)
342 __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
343 } else {
344 txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
345 if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
346 txdesc->u.ht.mcs |= 0x08;
347 }
348
349 /*
350 * This frame is eligible for an AMPDU, however, don't aggregate
351 * frames that are intended to probe a specific tx rate.
352 */
353 if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
354 !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
355 __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
356
357 /*
358 * Set 40Mhz mode if necessary (for legacy rates this will
359 * duplicate the frame to both channels).
360 */
361 if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
362 txrate->flags & IEEE80211_TX_RC_DUP_DATA)
363 __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
364 if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
365 __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
366
367 /*
368 * Determine IFS values
369 * - Use TXOP_BACKOFF for management frames except beacons
370 * - Use TXOP_SIFS for fragment bursts
371 * - Use TXOP_HTTXOP for everything else
372 *
373 * Note: rt2800 devices won't use CTS protection (if used)
374 * for frames not transmitted with TXOP_HTTXOP
375 */
376 if (ieee80211_is_mgmt(hdr->frame_control) &&
377 !ieee80211_is_beacon(hdr->frame_control))
378 txdesc->u.ht.txop = TXOP_BACKOFF;
379 else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
380 txdesc->u.ht.txop = TXOP_SIFS;
381 else
382 txdesc->u.ht.txop = TXOP_HTTXOP;
383}
384
385static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
386 struct sk_buff *skb,
387 struct txentry_desc *txdesc)
388{
389 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
390 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
391 struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
392 struct ieee80211_rate *rate;
393 const struct rt2x00_rate *hwrate = NULL;
394
395 memset(txdesc, 0, sizeof(*txdesc));
396
397 /*
398 * Header and frame information.
399 */
400 txdesc->length = skb->len;
401 txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
402
403 /*
404 * Check whether this frame is to be acked.
405 */
406 if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
407 __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
408
409 /*
410 * Check if this is a RTS/CTS frame
411 */
412 if (ieee80211_is_rts(hdr->frame_control) ||
413 ieee80211_is_cts(hdr->frame_control)) {
414 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
415 if (ieee80211_is_rts(hdr->frame_control))
416 __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
417 else
418 __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
419 if (tx_info->control.rts_cts_rate_idx >= 0)
420 rate =
421 ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
422 }
423
424 /*
425 * Determine retry information.
426 */
427 txdesc->retry_limit = tx_info->control.rates[0].count - 1;
428 if (txdesc->retry_limit >= rt2x00dev->long_retry)
429 __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
430
431 /*
432 * Check if more fragments are pending
433 */
434 if (ieee80211_has_morefrags(hdr->frame_control)) {
435 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
436 __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
437 }
438
439 /*
440 * Check if more frames (!= fragments) are pending
441 */
442 if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
443 __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
444
445 /*
446 * Beacons and probe responses require the tsf timestamp
447 * to be inserted into the frame.
448 */
449 if (ieee80211_is_beacon(hdr->frame_control) ||
450 ieee80211_is_probe_resp(hdr->frame_control))
451 __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
452
453 if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
454 !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
455 __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
456
457 /*
458 * Determine rate modulation.
459 */
460 if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
461 txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
462 else if (txrate->flags & IEEE80211_TX_RC_MCS)
463 txdesc->rate_mode = RATE_MODE_HT_MIX;
464 else {
465 rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
466 hwrate = rt2x00_get_rate(rate->hw_value);
467 if (hwrate->flags & DEV_RATE_OFDM)
468 txdesc->rate_mode = RATE_MODE_OFDM;
469 else
470 txdesc->rate_mode = RATE_MODE_CCK;
471 }
472
473 /*
474 * Apply TX descriptor handling by components
475 */
476 rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
477 rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
478
479 if (test_bit(REQUIRE_HT_TX_DESC, &rt2x00dev->cap_flags))
480 rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
481 hwrate);
482 else
483 rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
484 hwrate);
485}
486
487static int rt2x00queue_write_tx_data(struct queue_entry *entry,
488 struct txentry_desc *txdesc)
489{
490 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
491
492 /*
493 * This should not happen, we already checked the entry
494 * was ours. When the hardware disagrees there has been
495 * a queue corruption!
496 */
497 if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
498 rt2x00dev->ops->lib->get_entry_state(entry))) {
499 ERROR(rt2x00dev,
500 "Corrupt queue %d, accessing entry which is not ours.\n"
501 "Please file bug report to %s.\n",
502 entry->queue->qid, DRV_PROJECT);
503 return -EINVAL;
504 }
505
506 /*
507 * Add the requested extra tx headroom in front of the skb.
508 */
509 skb_push(entry->skb, rt2x00dev->ops->extra_tx_headroom);
510 memset(entry->skb->data, 0, rt2x00dev->ops->extra_tx_headroom);
511
512 /*
513 * Call the driver's write_tx_data function, if it exists.
514 */
515 if (rt2x00dev->ops->lib->write_tx_data)
516 rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
517
518 /*
519 * Map the skb to DMA.
520 */
521 if (test_bit(REQUIRE_DMA, &rt2x00dev->cap_flags))
522 rt2x00queue_map_txskb(entry);
523
524 return 0;
525}
526
527static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
528 struct txentry_desc *txdesc)
529{
530 struct data_queue *queue = entry->queue;
531
532 queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
533
534 /*
535 * All processing on the frame has been completed, this means
536 * it is now ready to be dumped to userspace through debugfs.
537 */
538 rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry->skb);
539}
540
541static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
542 struct txentry_desc *txdesc)
543{
544 /*
545 * Check if we need to kick the queue, there are however a few rules
546 * 1) Don't kick unless this is the last in frame in a burst.
547 * When the burst flag is set, this frame is always followed
548 * by another frame which in some way are related to eachother.
549 * This is true for fragments, RTS or CTS-to-self frames.
550 * 2) Rule 1 can be broken when the available entries
551 * in the queue are less then a certain threshold.
552 */
553 if (rt2x00queue_threshold(queue) ||
554 !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
555 queue->rt2x00dev->ops->lib->kick_queue(queue);
556}
557
558int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
559 bool local)
560{
561 struct ieee80211_tx_info *tx_info;
562 struct queue_entry *entry;
563 struct txentry_desc txdesc;
564 struct skb_frame_desc *skbdesc;
565 u8 rate_idx, rate_flags;
566 int ret = 0;
567
568 /*
569 * Copy all TX descriptor information into txdesc,
570 * after that we are free to use the skb->cb array
571 * for our information.
572 */
573 rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc);
574
575 /*
576 * All information is retrieved from the skb->cb array,
577 * now we should claim ownership of the driver part of that
578 * array, preserving the bitrate index and flags.
579 */
580 tx_info = IEEE80211_SKB_CB(skb);
581 rate_idx = tx_info->control.rates[0].idx;
582 rate_flags = tx_info->control.rates[0].flags;
583 skbdesc = get_skb_frame_desc(skb);
584 memset(skbdesc, 0, sizeof(*skbdesc));
585 skbdesc->tx_rate_idx = rate_idx;
586 skbdesc->tx_rate_flags = rate_flags;
587
588 if (local)
589 skbdesc->flags |= SKBDESC_NOT_MAC80211;
590
591 /*
592 * When hardware encryption is supported, and this frame
593 * is to be encrypted, we should strip the IV/EIV data from
594 * the frame so we can provide it to the driver separately.
595 */
596 if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
597 !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
598 if (test_bit(REQUIRE_COPY_IV, &queue->rt2x00dev->cap_flags))
599 rt2x00crypto_tx_copy_iv(skb, &txdesc);
600 else
601 rt2x00crypto_tx_remove_iv(skb, &txdesc);
602 }
603
604 /*
605 * When DMA allocation is required we should guarantee to the
606 * driver that the DMA is aligned to a 4-byte boundary.
607 * However some drivers require L2 padding to pad the payload
608 * rather then the header. This could be a requirement for
609 * PCI and USB devices, while header alignment only is valid
610 * for PCI devices.
611 */
612 if (test_bit(REQUIRE_L2PAD, &queue->rt2x00dev->cap_flags))
613 rt2x00queue_insert_l2pad(skb, txdesc.header_length);
614 else if (test_bit(REQUIRE_DMA, &queue->rt2x00dev->cap_flags))
615 rt2x00queue_align_frame(skb);
616
617 spin_lock(&queue->tx_lock);
618
619 if (unlikely(rt2x00queue_full(queue))) {
620 ERROR(queue->rt2x00dev,
621 "Dropping frame due to full tx queue %d.\n", queue->qid);
622 ret = -ENOBUFS;
623 goto out;
624 }
625
626 entry = rt2x00queue_get_entry(queue, Q_INDEX);
627
628 if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
629 &entry->flags))) {
630 ERROR(queue->rt2x00dev,
631 "Arrived at non-free entry in the non-full queue %d.\n"
632 "Please file bug report to %s.\n",
633 queue->qid, DRV_PROJECT);
634 ret = -EINVAL;
635 goto out;
636 }
637
638 skbdesc->entry = entry;
639 entry->skb = skb;
640
641 /*
642 * It could be possible that the queue was corrupted and this
643 * call failed. Since we always return NETDEV_TX_OK to mac80211,
644 * this frame will simply be dropped.
645 */
646 if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
647 clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
648 entry->skb = NULL;
649 ret = -EIO;
650 goto out;
651 }
652
653 set_bit(ENTRY_DATA_PENDING, &entry->flags);
654
655 rt2x00queue_index_inc(entry, Q_INDEX);
656 rt2x00queue_write_tx_descriptor(entry, &txdesc);
657 rt2x00queue_kick_tx_queue(queue, &txdesc);
658
659out:
660 spin_unlock(&queue->tx_lock);
661 return ret;
662}
663
664int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
665 struct ieee80211_vif *vif)
666{
667 struct rt2x00_intf *intf = vif_to_intf(vif);
668
669 if (unlikely(!intf->beacon))
670 return -ENOBUFS;
671
672 mutex_lock(&intf->beacon_skb_mutex);
673
674 /*
675 * Clean up the beacon skb.
676 */
677 rt2x00queue_free_skb(intf->beacon);
678
679 /*
680 * Clear beacon (single bssid devices don't need to clear the beacon
681 * since the beacon queue will get stopped anyway).
682 */
683 if (rt2x00dev->ops->lib->clear_beacon)
684 rt2x00dev->ops->lib->clear_beacon(intf->beacon);
685
686 mutex_unlock(&intf->beacon_skb_mutex);
687
688 return 0;
689}
690
691int rt2x00queue_update_beacon_locked(struct rt2x00_dev *rt2x00dev,
692 struct ieee80211_vif *vif)
693{
694 struct rt2x00_intf *intf = vif_to_intf(vif);
695 struct skb_frame_desc *skbdesc;
696 struct txentry_desc txdesc;
697
698 if (unlikely(!intf->beacon))
699 return -ENOBUFS;
700
701 /*
702 * Clean up the beacon skb.
703 */
704 rt2x00queue_free_skb(intf->beacon);
705
706 intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
707 if (!intf->beacon->skb)
708 return -ENOMEM;
709
710 /*
711 * Copy all TX descriptor information into txdesc,
712 * after that we are free to use the skb->cb array
713 * for our information.
714 */
715 rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc);
716
717 /*
718 * Fill in skb descriptor
719 */
720 skbdesc = get_skb_frame_desc(intf->beacon->skb);
721 memset(skbdesc, 0, sizeof(*skbdesc));
722 skbdesc->entry = intf->beacon;
723
724 /*
725 * Send beacon to hardware.
726 */
727 rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
728
729 return 0;
730
731}
732
733int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
734 struct ieee80211_vif *vif)
735{
736 struct rt2x00_intf *intf = vif_to_intf(vif);
737 int ret;
738
739 mutex_lock(&intf->beacon_skb_mutex);
740 ret = rt2x00queue_update_beacon_locked(rt2x00dev, vif);
741 mutex_unlock(&intf->beacon_skb_mutex);
742
743 return ret;
744}
745
746bool rt2x00queue_for_each_entry(struct data_queue *queue,
747 enum queue_index start,
748 enum queue_index end,
749 void *data,
750 bool (*fn)(struct queue_entry *entry,
751 void *data))
752{
753 unsigned long irqflags;
754 unsigned int index_start;
755 unsigned int index_end;
756 unsigned int i;
757
758 if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
759 ERROR(queue->rt2x00dev,
760 "Entry requested from invalid index range (%d - %d)\n",
761 start, end);
762 return true;
763 }
764
765 /*
766 * Only protect the range we are going to loop over,
767 * if during our loop a extra entry is set to pending
768 * it should not be kicked during this run, since it
769 * is part of another TX operation.
770 */
771 spin_lock_irqsave(&queue->index_lock, irqflags);
772 index_start = queue->index[start];
773 index_end = queue->index[end];
774 spin_unlock_irqrestore(&queue->index_lock, irqflags);
775
776 /*
777 * Start from the TX done pointer, this guarantees that we will
778 * send out all frames in the correct order.
779 */
780 if (index_start < index_end) {
781 for (i = index_start; i < index_end; i++) {
782 if (fn(&queue->entries[i], data))
783 return true;
784 }
785 } else {
786 for (i = index_start; i < queue->limit; i++) {
787 if (fn(&queue->entries[i], data))
788 return true;
789 }
790
791 for (i = 0; i < index_end; i++) {
792 if (fn(&queue->entries[i], data))
793 return true;
794 }
795 }
796
797 return false;
798}
799EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
800
801struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
802 enum queue_index index)
803{
804 struct queue_entry *entry;
805 unsigned long irqflags;
806
807 if (unlikely(index >= Q_INDEX_MAX)) {
808 ERROR(queue->rt2x00dev,
809 "Entry requested from invalid index type (%d)\n", index);
810 return NULL;
811 }
812
813 spin_lock_irqsave(&queue->index_lock, irqflags);
814
815 entry = &queue->entries[queue->index[index]];
816
817 spin_unlock_irqrestore(&queue->index_lock, irqflags);
818
819 return entry;
820}
821EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
822
823void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
824{
825 struct data_queue *queue = entry->queue;
826 unsigned long irqflags;
827
828 if (unlikely(index >= Q_INDEX_MAX)) {
829 ERROR(queue->rt2x00dev,
830 "Index change on invalid index type (%d)\n", index);
831 return;
832 }
833
834 spin_lock_irqsave(&queue->index_lock, irqflags);
835
836 queue->index[index]++;
837 if (queue->index[index] >= queue->limit)
838 queue->index[index] = 0;
839
840 entry->last_action = jiffies;
841
842 if (index == Q_INDEX) {
843 queue->length++;
844 } else if (index == Q_INDEX_DONE) {
845 queue->length--;
846 queue->count++;
847 }
848
849 spin_unlock_irqrestore(&queue->index_lock, irqflags);
850}
851
852void rt2x00queue_pause_queue(struct data_queue *queue)
853{
854 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
855 !test_bit(QUEUE_STARTED, &queue->flags) ||
856 test_and_set_bit(QUEUE_PAUSED, &queue->flags))
857 return;
858
859 switch (queue->qid) {
860 case QID_AC_VO:
861 case QID_AC_VI:
862 case QID_AC_BE:
863 case QID_AC_BK:
864 /*
865 * For TX queues, we have to disable the queue
866 * inside mac80211.
867 */
868 ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
869 break;
870 default:
871 break;
872 }
873}
874EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
875
876void rt2x00queue_unpause_queue(struct data_queue *queue)
877{
878 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
879 !test_bit(QUEUE_STARTED, &queue->flags) ||
880 !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
881 return;
882
883 switch (queue->qid) {
884 case QID_AC_VO:
885 case QID_AC_VI:
886 case QID_AC_BE:
887 case QID_AC_BK:
888 /*
889 * For TX queues, we have to enable the queue
890 * inside mac80211.
891 */
892 ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
893 break;
894 case QID_RX:
895 /*
896 * For RX we need to kick the queue now in order to
897 * receive frames.
898 */
899 queue->rt2x00dev->ops->lib->kick_queue(queue);
900 default:
901 break;
902 }
903}
904EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
905
906void rt2x00queue_start_queue(struct data_queue *queue)
907{
908 mutex_lock(&queue->status_lock);
909
910 if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
911 test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
912 mutex_unlock(&queue->status_lock);
913 return;
914 }
915
916 set_bit(QUEUE_PAUSED, &queue->flags);
917
918 queue->rt2x00dev->ops->lib->start_queue(queue);
919
920 rt2x00queue_unpause_queue(queue);
921
922 mutex_unlock(&queue->status_lock);
923}
924EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
925
926void rt2x00queue_stop_queue(struct data_queue *queue)
927{
928 mutex_lock(&queue->status_lock);
929
930 if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
931 mutex_unlock(&queue->status_lock);
932 return;
933 }
934
935 rt2x00queue_pause_queue(queue);
936
937 queue->rt2x00dev->ops->lib->stop_queue(queue);
938
939 mutex_unlock(&queue->status_lock);
940}
941EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
942
943void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
944{
945 bool started;
946 bool tx_queue =
947 (queue->qid == QID_AC_VO) ||
948 (queue->qid == QID_AC_VI) ||
949 (queue->qid == QID_AC_BE) ||
950 (queue->qid == QID_AC_BK);
951
952 mutex_lock(&queue->status_lock);
953
954 /*
955 * If the queue has been started, we must stop it temporarily
956 * to prevent any new frames to be queued on the device. If
957 * we are not dropping the pending frames, the queue must
958 * only be stopped in the software and not the hardware,
959 * otherwise the queue will never become empty on its own.
960 */
961 started = test_bit(QUEUE_STARTED, &queue->flags);
962 if (started) {
963 /*
964 * Pause the queue
965 */
966 rt2x00queue_pause_queue(queue);
967
968 /*
969 * If we are not supposed to drop any pending
970 * frames, this means we must force a start (=kick)
971 * to the queue to make sure the hardware will
972 * start transmitting.
973 */
974 if (!drop && tx_queue)
975 queue->rt2x00dev->ops->lib->kick_queue(queue);
976 }
977
978 /*
979 * Check if driver supports flushing, if that is the case we can
980 * defer the flushing to the driver. Otherwise we must use the
981 * alternative which just waits for the queue to become empty.
982 */
983 if (likely(queue->rt2x00dev->ops->lib->flush_queue))
984 queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
985
986 /*
987 * The queue flush has failed...
988 */
989 if (unlikely(!rt2x00queue_empty(queue)))
990 WARNING(queue->rt2x00dev, "Queue %d failed to flush\n", queue->qid);
991
992 /*
993 * Restore the queue to the previous status
994 */
995 if (started)
996 rt2x00queue_unpause_queue(queue);
997
998 mutex_unlock(&queue->status_lock);
999}
1000EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
1001
1002void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
1003{
1004 struct data_queue *queue;
1005
1006 /*
1007 * rt2x00queue_start_queue will call ieee80211_wake_queue
1008 * for each queue after is has been properly initialized.
1009 */
1010 tx_queue_for_each(rt2x00dev, queue)
1011 rt2x00queue_start_queue(queue);
1012
1013 rt2x00queue_start_queue(rt2x00dev->rx);
1014}
1015EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
1016
1017void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
1018{
1019 struct data_queue *queue;
1020
1021 /*
1022 * rt2x00queue_stop_queue will call ieee80211_stop_queue
1023 * as well, but we are completely shutting doing everything
1024 * now, so it is much safer to stop all TX queues at once,
1025 * and use rt2x00queue_stop_queue for cleaning up.
1026 */
1027 ieee80211_stop_queues(rt2x00dev->hw);
1028
1029 tx_queue_for_each(rt2x00dev, queue)
1030 rt2x00queue_stop_queue(queue);
1031
1032 rt2x00queue_stop_queue(rt2x00dev->rx);
1033}
1034EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
1035
1036void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
1037{
1038 struct data_queue *queue;
1039
1040 tx_queue_for_each(rt2x00dev, queue)
1041 rt2x00queue_flush_queue(queue, drop);
1042
1043 rt2x00queue_flush_queue(rt2x00dev->rx, drop);
1044}
1045EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
1046
1047static void rt2x00queue_reset(struct data_queue *queue)
1048{
1049 unsigned long irqflags;
1050 unsigned int i;
1051
1052 spin_lock_irqsave(&queue->index_lock, irqflags);
1053
1054 queue->count = 0;
1055 queue->length = 0;
1056
1057 for (i = 0; i < Q_INDEX_MAX; i++)
1058 queue->index[i] = 0;
1059
1060 spin_unlock_irqrestore(&queue->index_lock, irqflags);
1061}
1062
1063void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
1064{
1065 struct data_queue *queue;
1066 unsigned int i;
1067
1068 queue_for_each(rt2x00dev, queue) {
1069 rt2x00queue_reset(queue);
1070
1071 for (i = 0; i < queue->limit; i++)
1072 rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
1073 }
1074}
1075
1076static int rt2x00queue_alloc_entries(struct data_queue *queue,
1077 const struct data_queue_desc *qdesc)
1078{
1079 struct queue_entry *entries;
1080 unsigned int entry_size;
1081 unsigned int i;
1082
1083 rt2x00queue_reset(queue);
1084
1085 queue->limit = qdesc->entry_num;
1086 queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
1087 queue->data_size = qdesc->data_size;
1088 queue->desc_size = qdesc->desc_size;
1089
1090 /*
1091 * Allocate all queue entries.
1092 */
1093 entry_size = sizeof(*entries) + qdesc->priv_size;
1094 entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
1095 if (!entries)
1096 return -ENOMEM;
1097
1098#define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
1099 (((char *)(__base)) + ((__limit) * (__esize)) + \
1100 ((__index) * (__psize)))
1101
1102 for (i = 0; i < queue->limit; i++) {
1103 entries[i].flags = 0;
1104 entries[i].queue = queue;
1105 entries[i].skb = NULL;
1106 entries[i].entry_idx = i;
1107 entries[i].priv_data =
1108 QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
1109 sizeof(*entries), qdesc->priv_size);
1110 }
1111
1112#undef QUEUE_ENTRY_PRIV_OFFSET
1113
1114 queue->entries = entries;
1115
1116 return 0;
1117}
1118
1119static void rt2x00queue_free_skbs(struct data_queue *queue)
1120{
1121 unsigned int i;
1122
1123 if (!queue->entries)
1124 return;
1125
1126 for (i = 0; i < queue->limit; i++) {
1127 rt2x00queue_free_skb(&queue->entries[i]);
1128 }
1129}
1130
1131static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
1132{
1133 unsigned int i;
1134 struct sk_buff *skb;
1135
1136 for (i = 0; i < queue->limit; i++) {
1137 skb = rt2x00queue_alloc_rxskb(&queue->entries[i]);
1138 if (!skb)
1139 return -ENOMEM;
1140 queue->entries[i].skb = skb;
1141 }
1142
1143 return 0;
1144}
1145
1146int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
1147{
1148 struct data_queue *queue;
1149 int status;
1150
1151 status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
1152 if (status)
1153 goto exit;
1154
1155 tx_queue_for_each(rt2x00dev, queue) {
1156 status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
1157 if (status)
1158 goto exit;
1159 }
1160
1161 status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
1162 if (status)
1163 goto exit;
1164
1165 if (test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags)) {
1166 status = rt2x00queue_alloc_entries(rt2x00dev->atim,
1167 rt2x00dev->ops->atim);
1168 if (status)
1169 goto exit;
1170 }
1171
1172 status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
1173 if (status)
1174 goto exit;
1175
1176 return 0;
1177
1178exit:
1179 ERROR(rt2x00dev, "Queue entries allocation failed.\n");
1180
1181 rt2x00queue_uninitialize(rt2x00dev);
1182
1183 return status;
1184}
1185
1186void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
1187{
1188 struct data_queue *queue;
1189
1190 rt2x00queue_free_skbs(rt2x00dev->rx);
1191
1192 queue_for_each(rt2x00dev, queue) {
1193 kfree(queue->entries);
1194 queue->entries = NULL;
1195 }
1196}
1197
1198static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
1199 struct data_queue *queue, enum data_queue_qid qid)
1200{
1201 mutex_init(&queue->status_lock);
1202 spin_lock_init(&queue->tx_lock);
1203 spin_lock_init(&queue->index_lock);
1204
1205 queue->rt2x00dev = rt2x00dev;
1206 queue->qid = qid;
1207 queue->txop = 0;
1208 queue->aifs = 2;
1209 queue->cw_min = 5;
1210 queue->cw_max = 10;
1211}
1212
1213int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
1214{
1215 struct data_queue *queue;
1216 enum data_queue_qid qid;
1217 unsigned int req_atim =
1218 !!test_bit(REQUIRE_ATIM_QUEUE, &rt2x00dev->cap_flags);
1219
1220 /*
1221 * We need the following queues:
1222 * RX: 1
1223 * TX: ops->tx_queues
1224 * Beacon: 1
1225 * Atim: 1 (if required)
1226 */
1227 rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
1228
1229 queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
1230 if (!queue) {
1231 ERROR(rt2x00dev, "Queue allocation failed.\n");
1232 return -ENOMEM;
1233 }
1234
1235 /*
1236 * Initialize pointers
1237 */
1238 rt2x00dev->rx = queue;
1239 rt2x00dev->tx = &queue[1];
1240 rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
1241 rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
1242
1243 /*
1244 * Initialize queue parameters.
1245 * RX: qid = QID_RX
1246 * TX: qid = QID_AC_VO + index
1247 * TX: cw_min: 2^5 = 32.
1248 * TX: cw_max: 2^10 = 1024.
1249 * BCN: qid = QID_BEACON
1250 * ATIM: qid = QID_ATIM
1251 */
1252 rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
1253
1254 qid = QID_AC_VO;
1255 tx_queue_for_each(rt2x00dev, queue)
1256 rt2x00queue_init(rt2x00dev, queue, qid++);
1257
1258 rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
1259 if (req_atim)
1260 rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
1261
1262 return 0;
1263}
1264
1265void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
1266{
1267 kfree(rt2x00dev->rx);
1268 rt2x00dev->rx = NULL;
1269 rt2x00dev->tx = NULL;
1270 rt2x00dev->bcn = NULL;
1271}