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1/*
2 * Faraday FTMAC100 10/100 Ethernet
3 *
4 * (C) Copyright 2009-2011 Faraday Technology
5 * Po-Yu Chuang <ratbert@faraday-tech.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <linux/dma-mapping.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/init.h>
28#include <linux/io.h>
29#include <linux/mii.h>
30#include <linux/module.h>
31#include <linux/netdevice.h>
32#include <linux/platform_device.h>
33
34#include "ftmac100.h"
35
36#define DRV_NAME "ftmac100"
37#define DRV_VERSION "0.2"
38
39#define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
40#define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
41
42#define MAX_PKT_SIZE 1518
43#define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
44
45#if MAX_PKT_SIZE > 0x7ff
46#error invalid MAX_PKT_SIZE
47#endif
48
49#if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
50#error invalid RX_BUF_SIZE
51#endif
52
53/******************************************************************************
54 * private data
55 *****************************************************************************/
56struct ftmac100_descs {
57 struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
58 struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
59};
60
61struct ftmac100 {
62 struct resource *res;
63 void __iomem *base;
64 int irq;
65
66 struct ftmac100_descs *descs;
67 dma_addr_t descs_dma_addr;
68
69 unsigned int rx_pointer;
70 unsigned int tx_clean_pointer;
71 unsigned int tx_pointer;
72 unsigned int tx_pending;
73
74 spinlock_t tx_lock;
75
76 struct net_device *netdev;
77 struct device *dev;
78 struct napi_struct napi;
79
80 struct mii_if_info mii;
81};
82
83static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
84 struct ftmac100_rxdes *rxdes, gfp_t gfp);
85
86/******************************************************************************
87 * internal functions (hardware register access)
88 *****************************************************************************/
89#define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
90 FTMAC100_INT_NORXBUF | \
91 FTMAC100_INT_XPKT_OK | \
92 FTMAC100_INT_XPKT_LOST | \
93 FTMAC100_INT_RPKT_LOST | \
94 FTMAC100_INT_AHB_ERR | \
95 FTMAC100_INT_PHYSTS_CHG)
96
97#define INT_MASK_ALL_DISABLED 0
98
99static void ftmac100_enable_all_int(struct ftmac100 *priv)
100{
101 iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
102}
103
104static void ftmac100_disable_all_int(struct ftmac100 *priv)
105{
106 iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
107}
108
109static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
110{
111 iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
112}
113
114static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
115{
116 iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
117}
118
119static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
120{
121 iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
122}
123
124static int ftmac100_reset(struct ftmac100 *priv)
125{
126 struct net_device *netdev = priv->netdev;
127 int i;
128
129 /* NOTE: reset clears all registers */
130 iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
131
132 for (i = 0; i < 5; i++) {
133 unsigned int maccr;
134
135 maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
136 if (!(maccr & FTMAC100_MACCR_SW_RST)) {
137 /*
138 * FTMAC100_MACCR_SW_RST cleared does not indicate
139 * that hardware reset completed (what the f*ck).
140 * We still need to wait for a while.
141 */
142 udelay(500);
143 return 0;
144 }
145
146 udelay(1000);
147 }
148
149 netdev_err(netdev, "software reset failed\n");
150 return -EIO;
151}
152
153static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
154{
155 unsigned int maddr = mac[0] << 8 | mac[1];
156 unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
157
158 iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
159 iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
160}
161
162#define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
163 FTMAC100_MACCR_RCV_EN | \
164 FTMAC100_MACCR_XDMA_EN | \
165 FTMAC100_MACCR_RDMA_EN | \
166 FTMAC100_MACCR_CRC_APD | \
167 FTMAC100_MACCR_FULLDUP | \
168 FTMAC100_MACCR_RX_RUNT | \
169 FTMAC100_MACCR_RX_BROADPKT)
170
171static int ftmac100_start_hw(struct ftmac100 *priv)
172{
173 struct net_device *netdev = priv->netdev;
174
175 if (ftmac100_reset(priv))
176 return -EIO;
177
178 /* setup ring buffer base registers */
179 ftmac100_set_rx_ring_base(priv,
180 priv->descs_dma_addr +
181 offsetof(struct ftmac100_descs, rxdes));
182 ftmac100_set_tx_ring_base(priv,
183 priv->descs_dma_addr +
184 offsetof(struct ftmac100_descs, txdes));
185
186 iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
187
188 ftmac100_set_mac(priv, netdev->dev_addr);
189
190 iowrite32(MACCR_ENABLE_ALL, priv->base + FTMAC100_OFFSET_MACCR);
191 return 0;
192}
193
194static void ftmac100_stop_hw(struct ftmac100 *priv)
195{
196 iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
197}
198
199/******************************************************************************
200 * internal functions (receive descriptor)
201 *****************************************************************************/
202static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
203{
204 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
205}
206
207static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
208{
209 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
210}
211
212static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
213{
214 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
215}
216
217static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
218{
219 /* clear status bits */
220 rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
221}
222
223static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
224{
225 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
226}
227
228static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
229{
230 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
231}
232
233static bool ftmac100_rxdes_frame_too_long(struct ftmac100_rxdes *rxdes)
234{
235 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FTL);
236}
237
238static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
239{
240 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
241}
242
243static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
244{
245 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
246}
247
248static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
249{
250 return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
251}
252
253static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
254{
255 return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
256}
257
258static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
259 unsigned int size)
260{
261 rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
262 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
263}
264
265static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
266{
267 rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
268}
269
270static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
271 dma_addr_t addr)
272{
273 rxdes->rxdes2 = cpu_to_le32(addr);
274}
275
276static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
277{
278 return le32_to_cpu(rxdes->rxdes2);
279}
280
281/*
282 * rxdes3 is not used by hardware. We use it to keep track of page.
283 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
284 */
285static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
286{
287 rxdes->rxdes3 = (unsigned int)page;
288}
289
290static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
291{
292 return (struct page *)rxdes->rxdes3;
293}
294
295/******************************************************************************
296 * internal functions (receive)
297 *****************************************************************************/
298static int ftmac100_next_rx_pointer(int pointer)
299{
300 return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
301}
302
303static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
304{
305 priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
306}
307
308static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
309{
310 return &priv->descs->rxdes[priv->rx_pointer];
311}
312
313static struct ftmac100_rxdes *
314ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
315{
316 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
317
318 while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
319 if (ftmac100_rxdes_first_segment(rxdes))
320 return rxdes;
321
322 ftmac100_rxdes_set_dma_own(rxdes);
323 ftmac100_rx_pointer_advance(priv);
324 rxdes = ftmac100_current_rxdes(priv);
325 }
326
327 return NULL;
328}
329
330static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
331 struct ftmac100_rxdes *rxdes)
332{
333 struct net_device *netdev = priv->netdev;
334 bool error = false;
335
336 if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
337 if (net_ratelimit())
338 netdev_info(netdev, "rx err\n");
339
340 netdev->stats.rx_errors++;
341 error = true;
342 }
343
344 if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
345 if (net_ratelimit())
346 netdev_info(netdev, "rx crc err\n");
347
348 netdev->stats.rx_crc_errors++;
349 error = true;
350 }
351
352 if (unlikely(ftmac100_rxdes_frame_too_long(rxdes))) {
353 if (net_ratelimit())
354 netdev_info(netdev, "rx frame too long\n");
355
356 netdev->stats.rx_length_errors++;
357 error = true;
358 } else if (unlikely(ftmac100_rxdes_runt(rxdes))) {
359 if (net_ratelimit())
360 netdev_info(netdev, "rx runt\n");
361
362 netdev->stats.rx_length_errors++;
363 error = true;
364 } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
365 if (net_ratelimit())
366 netdev_info(netdev, "rx odd nibble\n");
367
368 netdev->stats.rx_length_errors++;
369 error = true;
370 }
371
372 return error;
373}
374
375static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
376{
377 struct net_device *netdev = priv->netdev;
378 struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
379 bool done = false;
380
381 if (net_ratelimit())
382 netdev_dbg(netdev, "drop packet %p\n", rxdes);
383
384 do {
385 if (ftmac100_rxdes_last_segment(rxdes))
386 done = true;
387
388 ftmac100_rxdes_set_dma_own(rxdes);
389 ftmac100_rx_pointer_advance(priv);
390 rxdes = ftmac100_current_rxdes(priv);
391 } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
392
393 netdev->stats.rx_dropped++;
394}
395
396static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
397{
398 struct net_device *netdev = priv->netdev;
399 struct ftmac100_rxdes *rxdes;
400 struct sk_buff *skb;
401 struct page *page;
402 dma_addr_t map;
403 int length;
404
405 rxdes = ftmac100_rx_locate_first_segment(priv);
406 if (!rxdes)
407 return false;
408
409 if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
410 ftmac100_rx_drop_packet(priv);
411 return true;
412 }
413
414 /*
415 * It is impossible to get multi-segment packets
416 * because we always provide big enough receive buffers.
417 */
418 if (unlikely(!ftmac100_rxdes_last_segment(rxdes)))
419 BUG();
420
421 /* start processing */
422 skb = netdev_alloc_skb_ip_align(netdev, 128);
423 if (unlikely(!skb)) {
424 if (net_ratelimit())
425 netdev_err(netdev, "rx skb alloc failed\n");
426
427 ftmac100_rx_drop_packet(priv);
428 return true;
429 }
430
431 if (unlikely(ftmac100_rxdes_multicast(rxdes)))
432 netdev->stats.multicast++;
433
434 map = ftmac100_rxdes_get_dma_addr(rxdes);
435 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
436
437 length = ftmac100_rxdes_frame_length(rxdes);
438 page = ftmac100_rxdes_get_page(rxdes);
439 skb_fill_page_desc(skb, 0, page, 0, length);
440 skb->len += length;
441 skb->data_len += length;
442 skb->truesize += length;
443 __pskb_pull_tail(skb, min(length, 64));
444
445 ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
446
447 ftmac100_rx_pointer_advance(priv);
448
449 skb->protocol = eth_type_trans(skb, netdev);
450
451 netdev->stats.rx_packets++;
452 netdev->stats.rx_bytes += skb->len;
453
454 /* push packet to protocol stack */
455 netif_receive_skb(skb);
456
457 (*processed)++;
458 return true;
459}
460
461/******************************************************************************
462 * internal functions (transmit descriptor)
463 *****************************************************************************/
464static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
465{
466 /* clear all except end of ring bit */
467 txdes->txdes0 = 0;
468 txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
469 txdes->txdes2 = 0;
470 txdes->txdes3 = 0;
471}
472
473static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
474{
475 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
476}
477
478static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
479{
480 /*
481 * Make sure dma own bit will not be set before any other
482 * descriptor fields.
483 */
484 wmb();
485 txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
486}
487
488static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
489{
490 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
491}
492
493static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
494{
495 return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
496}
497
498static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
499{
500 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
501}
502
503static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
504{
505 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
506}
507
508static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
509{
510 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
511}
512
513static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
514{
515 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
516}
517
518static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
519 unsigned int len)
520{
521 txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
522}
523
524static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
525 dma_addr_t addr)
526{
527 txdes->txdes2 = cpu_to_le32(addr);
528}
529
530static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
531{
532 return le32_to_cpu(txdes->txdes2);
533}
534
535/*
536 * txdes3 is not used by hardware. We use it to keep track of socket buffer.
537 * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
538 */
539static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
540{
541 txdes->txdes3 = (unsigned int)skb;
542}
543
544static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
545{
546 return (struct sk_buff *)txdes->txdes3;
547}
548
549/******************************************************************************
550 * internal functions (transmit)
551 *****************************************************************************/
552static int ftmac100_next_tx_pointer(int pointer)
553{
554 return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
555}
556
557static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
558{
559 priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
560}
561
562static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
563{
564 priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
565}
566
567static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
568{
569 return &priv->descs->txdes[priv->tx_pointer];
570}
571
572static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
573{
574 return &priv->descs->txdes[priv->tx_clean_pointer];
575}
576
577static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
578{
579 struct net_device *netdev = priv->netdev;
580 struct ftmac100_txdes *txdes;
581 struct sk_buff *skb;
582 dma_addr_t map;
583
584 if (priv->tx_pending == 0)
585 return false;
586
587 txdes = ftmac100_current_clean_txdes(priv);
588
589 if (ftmac100_txdes_owned_by_dma(txdes))
590 return false;
591
592 skb = ftmac100_txdes_get_skb(txdes);
593 map = ftmac100_txdes_get_dma_addr(txdes);
594
595 if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
596 ftmac100_txdes_late_collision(txdes))) {
597 /*
598 * packet transmitted to ethernet lost due to late collision
599 * or excessive collision
600 */
601 netdev->stats.tx_aborted_errors++;
602 } else {
603 netdev->stats.tx_packets++;
604 netdev->stats.tx_bytes += skb->len;
605 }
606
607 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
608 dev_kfree_skb(skb);
609
610 ftmac100_txdes_reset(txdes);
611
612 ftmac100_tx_clean_pointer_advance(priv);
613
614 spin_lock(&priv->tx_lock);
615 priv->tx_pending--;
616 spin_unlock(&priv->tx_lock);
617 netif_wake_queue(netdev);
618
619 return true;
620}
621
622static void ftmac100_tx_complete(struct ftmac100 *priv)
623{
624 while (ftmac100_tx_complete_packet(priv))
625 ;
626}
627
628static int ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
629 dma_addr_t map)
630{
631 struct net_device *netdev = priv->netdev;
632 struct ftmac100_txdes *txdes;
633 unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
634
635 txdes = ftmac100_current_txdes(priv);
636 ftmac100_tx_pointer_advance(priv);
637
638 /* setup TX descriptor */
639 ftmac100_txdes_set_skb(txdes, skb);
640 ftmac100_txdes_set_dma_addr(txdes, map);
641
642 ftmac100_txdes_set_first_segment(txdes);
643 ftmac100_txdes_set_last_segment(txdes);
644 ftmac100_txdes_set_txint(txdes);
645 ftmac100_txdes_set_buffer_size(txdes, len);
646
647 spin_lock(&priv->tx_lock);
648 priv->tx_pending++;
649 if (priv->tx_pending == TX_QUEUE_ENTRIES)
650 netif_stop_queue(netdev);
651
652 /* start transmit */
653 ftmac100_txdes_set_dma_own(txdes);
654 spin_unlock(&priv->tx_lock);
655
656 ftmac100_txdma_start_polling(priv);
657 return NETDEV_TX_OK;
658}
659
660/******************************************************************************
661 * internal functions (buffer)
662 *****************************************************************************/
663static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
664 struct ftmac100_rxdes *rxdes, gfp_t gfp)
665{
666 struct net_device *netdev = priv->netdev;
667 struct page *page;
668 dma_addr_t map;
669
670 page = alloc_page(gfp);
671 if (!page) {
672 if (net_ratelimit())
673 netdev_err(netdev, "failed to allocate rx page\n");
674 return -ENOMEM;
675 }
676
677 map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
678 if (unlikely(dma_mapping_error(priv->dev, map))) {
679 if (net_ratelimit())
680 netdev_err(netdev, "failed to map rx page\n");
681 __free_page(page);
682 return -ENOMEM;
683 }
684
685 ftmac100_rxdes_set_page(rxdes, page);
686 ftmac100_rxdes_set_dma_addr(rxdes, map);
687 ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
688 ftmac100_rxdes_set_dma_own(rxdes);
689 return 0;
690}
691
692static void ftmac100_free_buffers(struct ftmac100 *priv)
693{
694 int i;
695
696 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
697 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
698 struct page *page = ftmac100_rxdes_get_page(rxdes);
699 dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
700
701 if (!page)
702 continue;
703
704 dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
705 __free_page(page);
706 }
707
708 for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
709 struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
710 struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
711 dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
712
713 if (!skb)
714 continue;
715
716 dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
717 dev_kfree_skb(skb);
718 }
719
720 dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
721 priv->descs, priv->descs_dma_addr);
722}
723
724static int ftmac100_alloc_buffers(struct ftmac100 *priv)
725{
726 int i;
727
728 priv->descs = dma_alloc_coherent(priv->dev, sizeof(struct ftmac100_descs),
729 &priv->descs_dma_addr, GFP_KERNEL);
730 if (!priv->descs)
731 return -ENOMEM;
732
733 memset(priv->descs, 0, sizeof(struct ftmac100_descs));
734
735 /* initialize RX ring */
736 ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
737
738 for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
739 struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
740
741 if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
742 goto err;
743 }
744
745 /* initialize TX ring */
746 ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
747 return 0;
748
749err:
750 ftmac100_free_buffers(priv);
751 return -ENOMEM;
752}
753
754/******************************************************************************
755 * struct mii_if_info functions
756 *****************************************************************************/
757static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
758{
759 struct ftmac100 *priv = netdev_priv(netdev);
760 unsigned int phycr;
761 int i;
762
763 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
764 FTMAC100_PHYCR_REGAD(reg) |
765 FTMAC100_PHYCR_MIIRD;
766
767 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
768
769 for (i = 0; i < 10; i++) {
770 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
771
772 if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
773 return phycr & FTMAC100_PHYCR_MIIRDATA;
774
775 udelay(100);
776 }
777
778 netdev_err(netdev, "mdio read timed out\n");
779 return 0;
780}
781
782static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
783 int data)
784{
785 struct ftmac100 *priv = netdev_priv(netdev);
786 unsigned int phycr;
787 int i;
788
789 phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
790 FTMAC100_PHYCR_REGAD(reg) |
791 FTMAC100_PHYCR_MIIWR;
792
793 data = FTMAC100_PHYWDATA_MIIWDATA(data);
794
795 iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
796 iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
797
798 for (i = 0; i < 10; i++) {
799 phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
800
801 if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
802 return;
803
804 udelay(100);
805 }
806
807 netdev_err(netdev, "mdio write timed out\n");
808}
809
810/******************************************************************************
811 * struct ethtool_ops functions
812 *****************************************************************************/
813static void ftmac100_get_drvinfo(struct net_device *netdev,
814 struct ethtool_drvinfo *info)
815{
816 strcpy(info->driver, DRV_NAME);
817 strcpy(info->version, DRV_VERSION);
818 strcpy(info->bus_info, dev_name(&netdev->dev));
819}
820
821static int ftmac100_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
822{
823 struct ftmac100 *priv = netdev_priv(netdev);
824 return mii_ethtool_gset(&priv->mii, cmd);
825}
826
827static int ftmac100_set_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
828{
829 struct ftmac100 *priv = netdev_priv(netdev);
830 return mii_ethtool_sset(&priv->mii, cmd);
831}
832
833static int ftmac100_nway_reset(struct net_device *netdev)
834{
835 struct ftmac100 *priv = netdev_priv(netdev);
836 return mii_nway_restart(&priv->mii);
837}
838
839static u32 ftmac100_get_link(struct net_device *netdev)
840{
841 struct ftmac100 *priv = netdev_priv(netdev);
842 return mii_link_ok(&priv->mii);
843}
844
845static const struct ethtool_ops ftmac100_ethtool_ops = {
846 .set_settings = ftmac100_set_settings,
847 .get_settings = ftmac100_get_settings,
848 .get_drvinfo = ftmac100_get_drvinfo,
849 .nway_reset = ftmac100_nway_reset,
850 .get_link = ftmac100_get_link,
851};
852
853/******************************************************************************
854 * interrupt handler
855 *****************************************************************************/
856static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
857{
858 struct net_device *netdev = dev_id;
859 struct ftmac100 *priv = netdev_priv(netdev);
860
861 if (likely(netif_running(netdev))) {
862 /* Disable interrupts for polling */
863 ftmac100_disable_all_int(priv);
864 napi_schedule(&priv->napi);
865 }
866
867 return IRQ_HANDLED;
868}
869
870/******************************************************************************
871 * struct napi_struct functions
872 *****************************************************************************/
873static int ftmac100_poll(struct napi_struct *napi, int budget)
874{
875 struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
876 struct net_device *netdev = priv->netdev;
877 unsigned int status;
878 bool completed = true;
879 int rx = 0;
880
881 status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
882
883 if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
884 /*
885 * FTMAC100_INT_RPKT_FINISH:
886 * RX DMA has received packets into RX buffer successfully
887 *
888 * FTMAC100_INT_NORXBUF:
889 * RX buffer unavailable
890 */
891 bool retry;
892
893 do {
894 retry = ftmac100_rx_packet(priv, &rx);
895 } while (retry && rx < budget);
896
897 if (retry && rx == budget)
898 completed = false;
899 }
900
901 if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
902 /*
903 * FTMAC100_INT_XPKT_OK:
904 * packet transmitted to ethernet successfully
905 *
906 * FTMAC100_INT_XPKT_LOST:
907 * packet transmitted to ethernet lost due to late
908 * collision or excessive collision
909 */
910 ftmac100_tx_complete(priv);
911 }
912
913 if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
914 FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
915 if (net_ratelimit())
916 netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
917 status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
918 status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
919 status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
920 status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
921
922 if (status & FTMAC100_INT_NORXBUF) {
923 /* RX buffer unavailable */
924 netdev->stats.rx_over_errors++;
925 }
926
927 if (status & FTMAC100_INT_RPKT_LOST) {
928 /* received packet lost due to RX FIFO full */
929 netdev->stats.rx_fifo_errors++;
930 }
931
932 if (status & FTMAC100_INT_PHYSTS_CHG) {
933 /* PHY link status change */
934 mii_check_link(&priv->mii);
935 }
936 }
937
938 if (completed) {
939 /* stop polling */
940 napi_complete(napi);
941 ftmac100_enable_all_int(priv);
942 }
943
944 return rx;
945}
946
947/******************************************************************************
948 * struct net_device_ops functions
949 *****************************************************************************/
950static int ftmac100_open(struct net_device *netdev)
951{
952 struct ftmac100 *priv = netdev_priv(netdev);
953 int err;
954
955 err = ftmac100_alloc_buffers(priv);
956 if (err) {
957 netdev_err(netdev, "failed to allocate buffers\n");
958 goto err_alloc;
959 }
960
961 err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
962 if (err) {
963 netdev_err(netdev, "failed to request irq %d\n", priv->irq);
964 goto err_irq;
965 }
966
967 priv->rx_pointer = 0;
968 priv->tx_clean_pointer = 0;
969 priv->tx_pointer = 0;
970 priv->tx_pending = 0;
971
972 err = ftmac100_start_hw(priv);
973 if (err)
974 goto err_hw;
975
976 napi_enable(&priv->napi);
977 netif_start_queue(netdev);
978
979 ftmac100_enable_all_int(priv);
980
981 return 0;
982
983err_hw:
984 free_irq(priv->irq, netdev);
985err_irq:
986 ftmac100_free_buffers(priv);
987err_alloc:
988 return err;
989}
990
991static int ftmac100_stop(struct net_device *netdev)
992{
993 struct ftmac100 *priv = netdev_priv(netdev);
994
995 ftmac100_disable_all_int(priv);
996 netif_stop_queue(netdev);
997 napi_disable(&priv->napi);
998 ftmac100_stop_hw(priv);
999 free_irq(priv->irq, netdev);
1000 ftmac100_free_buffers(priv);
1001
1002 return 0;
1003}
1004
1005static int ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1006{
1007 struct ftmac100 *priv = netdev_priv(netdev);
1008 dma_addr_t map;
1009
1010 if (unlikely(skb->len > MAX_PKT_SIZE)) {
1011 if (net_ratelimit())
1012 netdev_dbg(netdev, "tx packet too big\n");
1013
1014 netdev->stats.tx_dropped++;
1015 dev_kfree_skb(skb);
1016 return NETDEV_TX_OK;
1017 }
1018
1019 map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
1020 if (unlikely(dma_mapping_error(priv->dev, map))) {
1021 /* drop packet */
1022 if (net_ratelimit())
1023 netdev_err(netdev, "map socket buffer failed\n");
1024
1025 netdev->stats.tx_dropped++;
1026 dev_kfree_skb(skb);
1027 return NETDEV_TX_OK;
1028 }
1029
1030 return ftmac100_xmit(priv, skb, map);
1031}
1032
1033/* optional */
1034static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1035{
1036 struct ftmac100 *priv = netdev_priv(netdev);
1037 struct mii_ioctl_data *data = if_mii(ifr);
1038
1039 return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
1040}
1041
1042static const struct net_device_ops ftmac100_netdev_ops = {
1043 .ndo_open = ftmac100_open,
1044 .ndo_stop = ftmac100_stop,
1045 .ndo_start_xmit = ftmac100_hard_start_xmit,
1046 .ndo_set_mac_address = eth_mac_addr,
1047 .ndo_validate_addr = eth_validate_addr,
1048 .ndo_do_ioctl = ftmac100_do_ioctl,
1049};
1050
1051/******************************************************************************
1052 * struct platform_driver functions
1053 *****************************************************************************/
1054static int ftmac100_probe(struct platform_device *pdev)
1055{
1056 struct resource *res;
1057 int irq;
1058 struct net_device *netdev;
1059 struct ftmac100 *priv;
1060 int err;
1061
1062 if (!pdev)
1063 return -ENODEV;
1064
1065 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1066 if (!res)
1067 return -ENXIO;
1068
1069 irq = platform_get_irq(pdev, 0);
1070 if (irq < 0)
1071 return irq;
1072
1073 /* setup net_device */
1074 netdev = alloc_etherdev(sizeof(*priv));
1075 if (!netdev) {
1076 err = -ENOMEM;
1077 goto err_alloc_etherdev;
1078 }
1079
1080 SET_NETDEV_DEV(netdev, &pdev->dev);
1081 SET_ETHTOOL_OPS(netdev, &ftmac100_ethtool_ops);
1082 netdev->netdev_ops = &ftmac100_netdev_ops;
1083
1084 platform_set_drvdata(pdev, netdev);
1085
1086 /* setup private data */
1087 priv = netdev_priv(netdev);
1088 priv->netdev = netdev;
1089 priv->dev = &pdev->dev;
1090
1091 spin_lock_init(&priv->tx_lock);
1092
1093 /* initialize NAPI */
1094 netif_napi_add(netdev, &priv->napi, ftmac100_poll, 64);
1095
1096 /* map io memory */
1097 priv->res = request_mem_region(res->start, resource_size(res),
1098 dev_name(&pdev->dev));
1099 if (!priv->res) {
1100 dev_err(&pdev->dev, "Could not reserve memory region\n");
1101 err = -ENOMEM;
1102 goto err_req_mem;
1103 }
1104
1105 priv->base = ioremap(res->start, resource_size(res));
1106 if (!priv->base) {
1107 dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
1108 err = -EIO;
1109 goto err_ioremap;
1110 }
1111
1112 priv->irq = irq;
1113
1114 /* initialize struct mii_if_info */
1115 priv->mii.phy_id = 0;
1116 priv->mii.phy_id_mask = 0x1f;
1117 priv->mii.reg_num_mask = 0x1f;
1118 priv->mii.dev = netdev;
1119 priv->mii.mdio_read = ftmac100_mdio_read;
1120 priv->mii.mdio_write = ftmac100_mdio_write;
1121
1122 /* register network device */
1123 err = register_netdev(netdev);
1124 if (err) {
1125 dev_err(&pdev->dev, "Failed to register netdev\n");
1126 goto err_register_netdev;
1127 }
1128
1129 netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
1130
1131 if (!is_valid_ether_addr(netdev->dev_addr)) {
1132 random_ether_addr(netdev->dev_addr);
1133 netdev_info(netdev, "generated random MAC address %pM\n",
1134 netdev->dev_addr);
1135 }
1136
1137 return 0;
1138
1139err_register_netdev:
1140 iounmap(priv->base);
1141err_ioremap:
1142 release_resource(priv->res);
1143err_req_mem:
1144 netif_napi_del(&priv->napi);
1145 platform_set_drvdata(pdev, NULL);
1146 free_netdev(netdev);
1147err_alloc_etherdev:
1148 return err;
1149}
1150
1151static int __exit ftmac100_remove(struct platform_device *pdev)
1152{
1153 struct net_device *netdev;
1154 struct ftmac100 *priv;
1155
1156 netdev = platform_get_drvdata(pdev);
1157 priv = netdev_priv(netdev);
1158
1159 unregister_netdev(netdev);
1160
1161 iounmap(priv->base);
1162 release_resource(priv->res);
1163
1164 netif_napi_del(&priv->napi);
1165 platform_set_drvdata(pdev, NULL);
1166 free_netdev(netdev);
1167 return 0;
1168}
1169
1170static struct platform_driver ftmac100_driver = {
1171 .probe = ftmac100_probe,
1172 .remove = __exit_p(ftmac100_remove),
1173 .driver = {
1174 .name = DRV_NAME,
1175 .owner = THIS_MODULE,
1176 },
1177};
1178
1179/******************************************************************************
1180 * initialization / finalization
1181 *****************************************************************************/
1182static int __init ftmac100_init(void)
1183{
1184 pr_info("Loading version " DRV_VERSION " ...\n");
1185 return platform_driver_register(&ftmac100_driver);
1186}
1187
1188static void __exit ftmac100_exit(void)
1189{
1190 platform_driver_unregister(&ftmac100_driver);
1191}
1192
1193module_init(ftmac100_init);
1194module_exit(ftmac100_exit);
1195
1196MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
1197MODULE_DESCRIPTION("FTMAC100 driver");
1198MODULE_LICENSE("GPL");