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   1/*******************************************************************************
   2
   3  Intel PRO/1000 Linux driver
   4  Copyright(c) 1999 - 2011 Intel Corporation.
   5
   6  This program is free software; you can redistribute it and/or modify it
   7  under the terms and conditions of the GNU General Public License,
   8  version 2, as published by the Free Software Foundation.
   9
  10  This program is distributed in the hope it will be useful, but WITHOUT
  11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13  more details.
  14
  15  You should have received a copy of the GNU General Public License along with
  16  this program; if not, write to the Free Software Foundation, Inc.,
  17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19  The full GNU General Public License is included in this distribution in
  20  the file called "COPYING".
  21
  22  Contact Information:
  23  Linux NICS <linux.nics@intel.com>
  24  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27*******************************************************************************/
  28
  29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30
  31#include <linux/module.h>
  32#include <linux/types.h>
  33#include <linux/init.h>
  34#include <linux/pci.h>
  35#include <linux/vmalloc.h>
  36#include <linux/pagemap.h>
  37#include <linux/delay.h>
  38#include <linux/netdevice.h>
  39#include <linux/interrupt.h>
  40#include <linux/tcp.h>
  41#include <linux/ipv6.h>
  42#include <linux/slab.h>
  43#include <net/checksum.h>
  44#include <net/ip6_checksum.h>
  45#include <linux/mii.h>
  46#include <linux/ethtool.h>
  47#include <linux/if_vlan.h>
  48#include <linux/cpu.h>
  49#include <linux/smp.h>
  50#include <linux/pm_qos_params.h>
  51#include <linux/pm_runtime.h>
  52#include <linux/aer.h>
  53#include <linux/prefetch.h>
  54
  55#include "e1000.h"
  56
  57#define DRV_EXTRAVERSION "-k"
  58
  59#define DRV_VERSION "1.4.4" DRV_EXTRAVERSION
  60char e1000e_driver_name[] = "e1000e";
  61const char e1000e_driver_version[] = DRV_VERSION;
  62
  63static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
  64
  65static const struct e1000_info *e1000_info_tbl[] = {
  66	[board_82571]		= &e1000_82571_info,
  67	[board_82572]		= &e1000_82572_info,
  68	[board_82573]		= &e1000_82573_info,
  69	[board_82574]		= &e1000_82574_info,
  70	[board_82583]		= &e1000_82583_info,
  71	[board_80003es2lan]	= &e1000_es2_info,
  72	[board_ich8lan]		= &e1000_ich8_info,
  73	[board_ich9lan]		= &e1000_ich9_info,
  74	[board_ich10lan]	= &e1000_ich10_info,
  75	[board_pchlan]		= &e1000_pch_info,
  76	[board_pch2lan]		= &e1000_pch2_info,
  77};
  78
  79struct e1000_reg_info {
  80	u32 ofs;
  81	char *name;
  82};
  83
  84#define E1000_RDFH	0x02410	/* Rx Data FIFO Head - RW */
  85#define E1000_RDFT	0x02418	/* Rx Data FIFO Tail - RW */
  86#define E1000_RDFHS	0x02420	/* Rx Data FIFO Head Saved - RW */
  87#define E1000_RDFTS	0x02428	/* Rx Data FIFO Tail Saved - RW */
  88#define E1000_RDFPC	0x02430	/* Rx Data FIFO Packet Count - RW */
  89
  90#define E1000_TDFH	0x03410	/* Tx Data FIFO Head - RW */
  91#define E1000_TDFT	0x03418	/* Tx Data FIFO Tail - RW */
  92#define E1000_TDFHS	0x03420	/* Tx Data FIFO Head Saved - RW */
  93#define E1000_TDFTS	0x03428	/* Tx Data FIFO Tail Saved - RW */
  94#define E1000_TDFPC	0x03430	/* Tx Data FIFO Packet Count - RW */
  95
  96static const struct e1000_reg_info e1000_reg_info_tbl[] = {
  97
  98	/* General Registers */
  99	{E1000_CTRL, "CTRL"},
 100	{E1000_STATUS, "STATUS"},
 101	{E1000_CTRL_EXT, "CTRL_EXT"},
 102
 103	/* Interrupt Registers */
 104	{E1000_ICR, "ICR"},
 105
 106	/* Rx Registers */
 107	{E1000_RCTL, "RCTL"},
 108	{E1000_RDLEN, "RDLEN"},
 109	{E1000_RDH, "RDH"},
 110	{E1000_RDT, "RDT"},
 111	{E1000_RDTR, "RDTR"},
 112	{E1000_RXDCTL(0), "RXDCTL"},
 113	{E1000_ERT, "ERT"},
 114	{E1000_RDBAL, "RDBAL"},
 115	{E1000_RDBAH, "RDBAH"},
 116	{E1000_RDFH, "RDFH"},
 117	{E1000_RDFT, "RDFT"},
 118	{E1000_RDFHS, "RDFHS"},
 119	{E1000_RDFTS, "RDFTS"},
 120	{E1000_RDFPC, "RDFPC"},
 121
 122	/* Tx Registers */
 123	{E1000_TCTL, "TCTL"},
 124	{E1000_TDBAL, "TDBAL"},
 125	{E1000_TDBAH, "TDBAH"},
 126	{E1000_TDLEN, "TDLEN"},
 127	{E1000_TDH, "TDH"},
 128	{E1000_TDT, "TDT"},
 129	{E1000_TIDV, "TIDV"},
 130	{E1000_TXDCTL(0), "TXDCTL"},
 131	{E1000_TADV, "TADV"},
 132	{E1000_TARC(0), "TARC"},
 133	{E1000_TDFH, "TDFH"},
 134	{E1000_TDFT, "TDFT"},
 135	{E1000_TDFHS, "TDFHS"},
 136	{E1000_TDFTS, "TDFTS"},
 137	{E1000_TDFPC, "TDFPC"},
 138
 139	/* List Terminator */
 140	{}
 141};
 142
 143/*
 144 * e1000_regdump - register printout routine
 145 */
 146static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
 147{
 148	int n = 0;
 149	char rname[16];
 150	u32 regs[8];
 151
 152	switch (reginfo->ofs) {
 153	case E1000_RXDCTL(0):
 154		for (n = 0; n < 2; n++)
 155			regs[n] = __er32(hw, E1000_RXDCTL(n));
 156		break;
 157	case E1000_TXDCTL(0):
 158		for (n = 0; n < 2; n++)
 159			regs[n] = __er32(hw, E1000_TXDCTL(n));
 160		break;
 161	case E1000_TARC(0):
 162		for (n = 0; n < 2; n++)
 163			regs[n] = __er32(hw, E1000_TARC(n));
 164		break;
 165	default:
 166		printk(KERN_INFO "%-15s %08x\n",
 167		       reginfo->name, __er32(hw, reginfo->ofs));
 168		return;
 169	}
 170
 171	snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
 172	printk(KERN_INFO "%-15s ", rname);
 173	for (n = 0; n < 2; n++)
 174		printk(KERN_CONT "%08x ", regs[n]);
 175	printk(KERN_CONT "\n");
 176}
 177
 178/*
 179 * e1000e_dump - Print registers, Tx-ring and Rx-ring
 180 */
 181static void e1000e_dump(struct e1000_adapter *adapter)
 182{
 183	struct net_device *netdev = adapter->netdev;
 184	struct e1000_hw *hw = &adapter->hw;
 185	struct e1000_reg_info *reginfo;
 186	struct e1000_ring *tx_ring = adapter->tx_ring;
 187	struct e1000_tx_desc *tx_desc;
 188	struct my_u0 {
 189		u64 a;
 190		u64 b;
 191	} *u0;
 192	struct e1000_buffer *buffer_info;
 193	struct e1000_ring *rx_ring = adapter->rx_ring;
 194	union e1000_rx_desc_packet_split *rx_desc_ps;
 195	struct e1000_rx_desc *rx_desc;
 196	struct my_u1 {
 197		u64 a;
 198		u64 b;
 199		u64 c;
 200		u64 d;
 201	} *u1;
 202	u32 staterr;
 203	int i = 0;
 204
 205	if (!netif_msg_hw(adapter))
 206		return;
 207
 208	/* Print netdevice Info */
 209	if (netdev) {
 210		dev_info(&adapter->pdev->dev, "Net device Info\n");
 211		printk(KERN_INFO "Device Name     state            "
 212		       "trans_start      last_rx\n");
 213		printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
 214		       netdev->name, netdev->state, netdev->trans_start,
 215		       netdev->last_rx);
 216	}
 217
 218	/* Print Registers */
 219	dev_info(&adapter->pdev->dev, "Register Dump\n");
 220	printk(KERN_INFO " Register Name   Value\n");
 221	for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
 222	     reginfo->name; reginfo++) {
 223		e1000_regdump(hw, reginfo);
 224	}
 225
 226	/* Print Tx Ring Summary */
 227	if (!netdev || !netif_running(netdev))
 228		goto exit;
 229
 230	dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
 231	printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma  ]"
 232	       " leng ntw timestamp\n");
 233	buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
 234	printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
 235	       0, tx_ring->next_to_use, tx_ring->next_to_clean,
 236	       (unsigned long long)buffer_info->dma,
 237	       buffer_info->length,
 238	       buffer_info->next_to_watch,
 239	       (unsigned long long)buffer_info->time_stamp);
 240
 241	/* Print Tx Ring */
 242	if (!netif_msg_tx_done(adapter))
 243		goto rx_ring_summary;
 244
 245	dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
 246
 247	/* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
 248	 *
 249	 * Legacy Transmit Descriptor
 250	 *   +--------------------------------------------------------------+
 251	 * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
 252	 *   +--------------------------------------------------------------+
 253	 * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
 254	 *   +--------------------------------------------------------------+
 255	 *   63       48 47        36 35    32 31     24 23    16 15        0
 256	 *
 257	 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
 258	 *   63      48 47    40 39       32 31             16 15    8 7      0
 259	 *   +----------------------------------------------------------------+
 260	 * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
 261	 *   +----------------------------------------------------------------+
 262	 * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
 263	 *   +----------------------------------------------------------------+
 264	 *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
 265	 *
 266	 * Extended Data Descriptor (DTYP=0x1)
 267	 *   +----------------------------------------------------------------+
 268	 * 0 |                     Buffer Address [63:0]                      |
 269	 *   +----------------------------------------------------------------+
 270	 * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
 271	 *   +----------------------------------------------------------------+
 272	 *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
 273	 */
 274	printk(KERN_INFO "Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen]"
 275	       " [bi->dma       ] leng  ntw timestamp        bi->skb "
 276	       "<-- Legacy format\n");
 277	printk(KERN_INFO "Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
 278	       " [bi->dma       ] leng  ntw timestamp        bi->skb "
 279	       "<-- Ext Context format\n");
 280	printk(KERN_INFO "Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen]"
 281	       " [bi->dma       ] leng  ntw timestamp        bi->skb "
 282	       "<-- Ext Data format\n");
 283	for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
 284		tx_desc = E1000_TX_DESC(*tx_ring, i);
 285		buffer_info = &tx_ring->buffer_info[i];
 286		u0 = (struct my_u0 *)tx_desc;
 287		printk(KERN_INFO "T%c[0x%03X]    %016llX %016llX %016llX "
 288		       "%04X  %3X %016llX %p",
 289		       (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
 290			((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')), i,
 291		       (unsigned long long)le64_to_cpu(u0->a),
 292		       (unsigned long long)le64_to_cpu(u0->b),
 293		       (unsigned long long)buffer_info->dma,
 294		       buffer_info->length, buffer_info->next_to_watch,
 295		       (unsigned long long)buffer_info->time_stamp,
 296		       buffer_info->skb);
 297		if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
 298			printk(KERN_CONT " NTC/U\n");
 299		else if (i == tx_ring->next_to_use)
 300			printk(KERN_CONT " NTU\n");
 301		else if (i == tx_ring->next_to_clean)
 302			printk(KERN_CONT " NTC\n");
 303		else
 304			printk(KERN_CONT "\n");
 305
 306		if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
 307			print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
 308				       16, 1, phys_to_virt(buffer_info->dma),
 309				       buffer_info->length, true);
 310	}
 311
 312	/* Print Rx Ring Summary */
 313rx_ring_summary:
 314	dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
 315	printk(KERN_INFO "Queue [NTU] [NTC]\n");
 316	printk(KERN_INFO " %5d %5X %5X\n", 0,
 317	       rx_ring->next_to_use, rx_ring->next_to_clean);
 318
 319	/* Print Rx Ring */
 320	if (!netif_msg_rx_status(adapter))
 321		goto exit;
 322
 323	dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
 324	switch (adapter->rx_ps_pages) {
 325	case 1:
 326	case 2:
 327	case 3:
 328		/* [Extended] Packet Split Receive Descriptor Format
 329		 *
 330		 *    +-----------------------------------------------------+
 331		 *  0 |                Buffer Address 0 [63:0]              |
 332		 *    +-----------------------------------------------------+
 333		 *  8 |                Buffer Address 1 [63:0]              |
 334		 *    +-----------------------------------------------------+
 335		 * 16 |                Buffer Address 2 [63:0]              |
 336		 *    +-----------------------------------------------------+
 337		 * 24 |                Buffer Address 3 [63:0]              |
 338		 *    +-----------------------------------------------------+
 339		 */
 340		printk(KERN_INFO "R  [desc]      [buffer 0 63:0 ] "
 341		       "[buffer 1 63:0 ] "
 342		       "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] "
 343		       "[bi->skb] <-- Ext Pkt Split format\n");
 344		/* [Extended] Receive Descriptor (Write-Back) Format
 345		 *
 346		 *   63       48 47    32 31     13 12    8 7    4 3        0
 347		 *   +------------------------------------------------------+
 348		 * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
 349		 *   | Checksum | Ident  |         | Queue |      |  Type   |
 350		 *   +------------------------------------------------------+
 351		 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
 352		 *   +------------------------------------------------------+
 353		 *   63       48 47    32 31            20 19               0
 354		 */
 355		printk(KERN_INFO "RWB[desc]      [ck ipid mrqhsh] "
 356		       "[vl   l0 ee  es] "
 357		       "[ l3  l2  l1 hs] [reserved      ] ---------------- "
 358		       "[bi->skb] <-- Ext Rx Write-Back format\n");
 359		for (i = 0; i < rx_ring->count; i++) {
 360			buffer_info = &rx_ring->buffer_info[i];
 361			rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
 362			u1 = (struct my_u1 *)rx_desc_ps;
 363			staterr =
 364			    le32_to_cpu(rx_desc_ps->wb.middle.status_error);
 365			if (staterr & E1000_RXD_STAT_DD) {
 366				/* Descriptor Done */
 367				printk(KERN_INFO "RWB[0x%03X]     %016llX "
 368				       "%016llX %016llX %016llX "
 369				       "---------------- %p", i,
 370				       (unsigned long long)le64_to_cpu(u1->a),
 371				       (unsigned long long)le64_to_cpu(u1->b),
 372				       (unsigned long long)le64_to_cpu(u1->c),
 373				       (unsigned long long)le64_to_cpu(u1->d),
 374				       buffer_info->skb);
 375			} else {
 376				printk(KERN_INFO "R  [0x%03X]     %016llX "
 377				       "%016llX %016llX %016llX %016llX %p", i,
 378				       (unsigned long long)le64_to_cpu(u1->a),
 379				       (unsigned long long)le64_to_cpu(u1->b),
 380				       (unsigned long long)le64_to_cpu(u1->c),
 381				       (unsigned long long)le64_to_cpu(u1->d),
 382				       (unsigned long long)buffer_info->dma,
 383				       buffer_info->skb);
 384
 385				if (netif_msg_pktdata(adapter))
 386					print_hex_dump(KERN_INFO, "",
 387						DUMP_PREFIX_ADDRESS, 16, 1,
 388						phys_to_virt(buffer_info->dma),
 389						adapter->rx_ps_bsize0, true);
 390			}
 391
 392			if (i == rx_ring->next_to_use)
 393				printk(KERN_CONT " NTU\n");
 394			else if (i == rx_ring->next_to_clean)
 395				printk(KERN_CONT " NTC\n");
 396			else
 397				printk(KERN_CONT "\n");
 398		}
 399		break;
 400	default:
 401	case 0:
 402		/* Legacy Receive Descriptor Format
 403		 *
 404		 * +-----------------------------------------------------+
 405		 * |                Buffer Address [63:0]                |
 406		 * +-----------------------------------------------------+
 407		 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
 408		 * +-----------------------------------------------------+
 409		 * 63       48 47    40 39      32 31         16 15      0
 410		 */
 411		printk(KERN_INFO "Rl[desc]     [address 63:0  ] "
 412		       "[vl er S cks ln] [bi->dma       ] [bi->skb] "
 413		       "<-- Legacy format\n");
 414		for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
 415			rx_desc = E1000_RX_DESC(*rx_ring, i);
 416			buffer_info = &rx_ring->buffer_info[i];
 417			u0 = (struct my_u0 *)rx_desc;
 418			printk(KERN_INFO "Rl[0x%03X]    %016llX %016llX "
 419			       "%016llX %p", i,
 420			       (unsigned long long)le64_to_cpu(u0->a),
 421			       (unsigned long long)le64_to_cpu(u0->b),
 422			       (unsigned long long)buffer_info->dma,
 423			       buffer_info->skb);
 424			if (i == rx_ring->next_to_use)
 425				printk(KERN_CONT " NTU\n");
 426			else if (i == rx_ring->next_to_clean)
 427				printk(KERN_CONT " NTC\n");
 428			else
 429				printk(KERN_CONT "\n");
 430
 431			if (netif_msg_pktdata(adapter))
 432				print_hex_dump(KERN_INFO, "",
 433					       DUMP_PREFIX_ADDRESS,
 434					       16, 1,
 435					       phys_to_virt(buffer_info->dma),
 436					       adapter->rx_buffer_len, true);
 437		}
 438	}
 439
 440exit:
 441	return;
 442}
 443
 444/**
 445 * e1000_desc_unused - calculate if we have unused descriptors
 446 **/
 447static int e1000_desc_unused(struct e1000_ring *ring)
 448{
 449	if (ring->next_to_clean > ring->next_to_use)
 450		return ring->next_to_clean - ring->next_to_use - 1;
 451
 452	return ring->count + ring->next_to_clean - ring->next_to_use - 1;
 453}
 454
 455/**
 456 * e1000_receive_skb - helper function to handle Rx indications
 457 * @adapter: board private structure
 458 * @status: descriptor status field as written by hardware
 459 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
 460 * @skb: pointer to sk_buff to be indicated to stack
 461 **/
 462static void e1000_receive_skb(struct e1000_adapter *adapter,
 463			      struct net_device *netdev, struct sk_buff *skb,
 464			      u8 status, __le16 vlan)
 465{
 466	u16 tag = le16_to_cpu(vlan);
 467	skb->protocol = eth_type_trans(skb, netdev);
 468
 469	if (status & E1000_RXD_STAT_VP)
 470		__vlan_hwaccel_put_tag(skb, tag);
 471
 472	napi_gro_receive(&adapter->napi, skb);
 473}
 474
 475/**
 476 * e1000_rx_checksum - Receive Checksum Offload
 477 * @adapter:     board private structure
 478 * @status_err:  receive descriptor status and error fields
 479 * @csum:	receive descriptor csum field
 480 * @sk_buff:     socket buffer with received data
 481 **/
 482static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
 483			      u32 csum, struct sk_buff *skb)
 484{
 485	u16 status = (u16)status_err;
 486	u8 errors = (u8)(status_err >> 24);
 487
 488	skb_checksum_none_assert(skb);
 489
 490	/* Ignore Checksum bit is set */
 491	if (status & E1000_RXD_STAT_IXSM)
 492		return;
 493	/* TCP/UDP checksum error bit is set */
 494	if (errors & E1000_RXD_ERR_TCPE) {
 495		/* let the stack verify checksum errors */
 496		adapter->hw_csum_err++;
 497		return;
 498	}
 499
 500	/* TCP/UDP Checksum has not been calculated */
 501	if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
 502		return;
 503
 504	/* It must be a TCP or UDP packet with a valid checksum */
 505	if (status & E1000_RXD_STAT_TCPCS) {
 506		/* TCP checksum is good */
 507		skb->ip_summed = CHECKSUM_UNNECESSARY;
 508	} else {
 509		/*
 510		 * IP fragment with UDP payload
 511		 * Hardware complements the payload checksum, so we undo it
 512		 * and then put the value in host order for further stack use.
 513		 */
 514		__sum16 sum = (__force __sum16)htons(csum);
 515		skb->csum = csum_unfold(~sum);
 516		skb->ip_summed = CHECKSUM_COMPLETE;
 517	}
 518	adapter->hw_csum_good++;
 519}
 520
 521/**
 522 * e1000e_update_tail_wa - helper function for e1000e_update_[rt]dt_wa()
 523 * @hw: pointer to the HW structure
 524 * @tail: address of tail descriptor register
 525 * @i: value to write to tail descriptor register
 526 *
 527 * When updating the tail register, the ME could be accessing Host CSR
 528 * registers at the same time.  Normally, this is handled in h/w by an
 529 * arbiter but on some parts there is a bug that acknowledges Host accesses
 530 * later than it should which could result in the descriptor register to
 531 * have an incorrect value.  Workaround this by checking the FWSM register
 532 * which has bit 24 set while ME is accessing Host CSR registers, wait
 533 * if it is set and try again a number of times.
 534 **/
 535static inline s32 e1000e_update_tail_wa(struct e1000_hw *hw, u8 __iomem * tail,
 536					unsigned int i)
 537{
 538	unsigned int j = 0;
 539
 540	while ((j++ < E1000_ICH_FWSM_PCIM2PCI_COUNT) &&
 541	       (er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI))
 542		udelay(50);
 543
 544	writel(i, tail);
 545
 546	if ((j == E1000_ICH_FWSM_PCIM2PCI_COUNT) && (i != readl(tail)))
 547		return E1000_ERR_SWFW_SYNC;
 548
 549	return 0;
 550}
 551
 552static void e1000e_update_rdt_wa(struct e1000_adapter *adapter, unsigned int i)
 553{
 554	u8 __iomem *tail = (adapter->hw.hw_addr + adapter->rx_ring->tail);
 555	struct e1000_hw *hw = &adapter->hw;
 556
 557	if (e1000e_update_tail_wa(hw, tail, i)) {
 558		u32 rctl = er32(RCTL);
 559		ew32(RCTL, rctl & ~E1000_RCTL_EN);
 560		e_err("ME firmware caused invalid RDT - resetting\n");
 561		schedule_work(&adapter->reset_task);
 562	}
 563}
 564
 565static void e1000e_update_tdt_wa(struct e1000_adapter *adapter, unsigned int i)
 566{
 567	u8 __iomem *tail = (adapter->hw.hw_addr + adapter->tx_ring->tail);
 568	struct e1000_hw *hw = &adapter->hw;
 569
 570	if (e1000e_update_tail_wa(hw, tail, i)) {
 571		u32 tctl = er32(TCTL);
 572		ew32(TCTL, tctl & ~E1000_TCTL_EN);
 573		e_err("ME firmware caused invalid TDT - resetting\n");
 574		schedule_work(&adapter->reset_task);
 575	}
 576}
 577
 578/**
 579 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
 580 * @adapter: address of board private structure
 581 **/
 582static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
 583				   int cleaned_count, gfp_t gfp)
 584{
 585	struct net_device *netdev = adapter->netdev;
 586	struct pci_dev *pdev = adapter->pdev;
 587	struct e1000_ring *rx_ring = adapter->rx_ring;
 588	struct e1000_rx_desc *rx_desc;
 589	struct e1000_buffer *buffer_info;
 590	struct sk_buff *skb;
 591	unsigned int i;
 592	unsigned int bufsz = adapter->rx_buffer_len;
 593
 594	i = rx_ring->next_to_use;
 595	buffer_info = &rx_ring->buffer_info[i];
 596
 597	while (cleaned_count--) {
 598		skb = buffer_info->skb;
 599		if (skb) {
 600			skb_trim(skb, 0);
 601			goto map_skb;
 602		}
 603
 604		skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 605		if (!skb) {
 606			/* Better luck next round */
 607			adapter->alloc_rx_buff_failed++;
 608			break;
 609		}
 610
 611		buffer_info->skb = skb;
 612map_skb:
 613		buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 614						  adapter->rx_buffer_len,
 615						  DMA_FROM_DEVICE);
 616		if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 617			dev_err(&pdev->dev, "Rx DMA map failed\n");
 618			adapter->rx_dma_failed++;
 619			break;
 620		}
 621
 622		rx_desc = E1000_RX_DESC(*rx_ring, i);
 623		rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
 624
 625		if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 626			/*
 627			 * Force memory writes to complete before letting h/w
 628			 * know there are new descriptors to fetch.  (Only
 629			 * applicable for weak-ordered memory model archs,
 630			 * such as IA-64).
 631			 */
 632			wmb();
 633			if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 634				e1000e_update_rdt_wa(adapter, i);
 635			else
 636				writel(i, adapter->hw.hw_addr + rx_ring->tail);
 637		}
 638		i++;
 639		if (i == rx_ring->count)
 640			i = 0;
 641		buffer_info = &rx_ring->buffer_info[i];
 642	}
 643
 644	rx_ring->next_to_use = i;
 645}
 646
 647/**
 648 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
 649 * @adapter: address of board private structure
 650 **/
 651static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
 652				      int cleaned_count, gfp_t gfp)
 653{
 654	struct net_device *netdev = adapter->netdev;
 655	struct pci_dev *pdev = adapter->pdev;
 656	union e1000_rx_desc_packet_split *rx_desc;
 657	struct e1000_ring *rx_ring = adapter->rx_ring;
 658	struct e1000_buffer *buffer_info;
 659	struct e1000_ps_page *ps_page;
 660	struct sk_buff *skb;
 661	unsigned int i, j;
 662
 663	i = rx_ring->next_to_use;
 664	buffer_info = &rx_ring->buffer_info[i];
 665
 666	while (cleaned_count--) {
 667		rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
 668
 669		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
 670			ps_page = &buffer_info->ps_pages[j];
 671			if (j >= adapter->rx_ps_pages) {
 672				/* all unused desc entries get hw null ptr */
 673				rx_desc->read.buffer_addr[j + 1] =
 674				    ~cpu_to_le64(0);
 675				continue;
 676			}
 677			if (!ps_page->page) {
 678				ps_page->page = alloc_page(gfp);
 679				if (!ps_page->page) {
 680					adapter->alloc_rx_buff_failed++;
 681					goto no_buffers;
 682				}
 683				ps_page->dma = dma_map_page(&pdev->dev,
 684							    ps_page->page,
 685							    0, PAGE_SIZE,
 686							    DMA_FROM_DEVICE);
 687				if (dma_mapping_error(&pdev->dev,
 688						      ps_page->dma)) {
 689					dev_err(&adapter->pdev->dev,
 690						"Rx DMA page map failed\n");
 691					adapter->rx_dma_failed++;
 692					goto no_buffers;
 693				}
 694			}
 695			/*
 696			 * Refresh the desc even if buffer_addrs
 697			 * didn't change because each write-back
 698			 * erases this info.
 699			 */
 700			rx_desc->read.buffer_addr[j + 1] =
 701			    cpu_to_le64(ps_page->dma);
 702		}
 703
 704		skb = __netdev_alloc_skb_ip_align(netdev,
 705						  adapter->rx_ps_bsize0,
 706						  gfp);
 707
 708		if (!skb) {
 709			adapter->alloc_rx_buff_failed++;
 710			break;
 711		}
 712
 713		buffer_info->skb = skb;
 714		buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
 715						  adapter->rx_ps_bsize0,
 716						  DMA_FROM_DEVICE);
 717		if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
 718			dev_err(&pdev->dev, "Rx DMA map failed\n");
 719			adapter->rx_dma_failed++;
 720			/* cleanup skb */
 721			dev_kfree_skb_any(skb);
 722			buffer_info->skb = NULL;
 723			break;
 724		}
 725
 726		rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
 727
 728		if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
 729			/*
 730			 * Force memory writes to complete before letting h/w
 731			 * know there are new descriptors to fetch.  (Only
 732			 * applicable for weak-ordered memory model archs,
 733			 * such as IA-64).
 734			 */
 735			wmb();
 736			if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 737				e1000e_update_rdt_wa(adapter, i << 1);
 738			else
 739				writel(i << 1,
 740				       adapter->hw.hw_addr + rx_ring->tail);
 741		}
 742
 743		i++;
 744		if (i == rx_ring->count)
 745			i = 0;
 746		buffer_info = &rx_ring->buffer_info[i];
 747	}
 748
 749no_buffers:
 750	rx_ring->next_to_use = i;
 751}
 752
 753/**
 754 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
 755 * @adapter: address of board private structure
 756 * @cleaned_count: number of buffers to allocate this pass
 757 **/
 758
 759static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
 760					 int cleaned_count, gfp_t gfp)
 761{
 762	struct net_device *netdev = adapter->netdev;
 763	struct pci_dev *pdev = adapter->pdev;
 764	struct e1000_rx_desc *rx_desc;
 765	struct e1000_ring *rx_ring = adapter->rx_ring;
 766	struct e1000_buffer *buffer_info;
 767	struct sk_buff *skb;
 768	unsigned int i;
 769	unsigned int bufsz = 256 - 16 /* for skb_reserve */;
 770
 771	i = rx_ring->next_to_use;
 772	buffer_info = &rx_ring->buffer_info[i];
 773
 774	while (cleaned_count--) {
 775		skb = buffer_info->skb;
 776		if (skb) {
 777			skb_trim(skb, 0);
 778			goto check_page;
 779		}
 780
 781		skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
 782		if (unlikely(!skb)) {
 783			/* Better luck next round */
 784			adapter->alloc_rx_buff_failed++;
 785			break;
 786		}
 787
 788		buffer_info->skb = skb;
 789check_page:
 790		/* allocate a new page if necessary */
 791		if (!buffer_info->page) {
 792			buffer_info->page = alloc_page(gfp);
 793			if (unlikely(!buffer_info->page)) {
 794				adapter->alloc_rx_buff_failed++;
 795				break;
 796			}
 797		}
 798
 799		if (!buffer_info->dma)
 800			buffer_info->dma = dma_map_page(&pdev->dev,
 801			                                buffer_info->page, 0,
 802			                                PAGE_SIZE,
 803							DMA_FROM_DEVICE);
 804
 805		rx_desc = E1000_RX_DESC(*rx_ring, i);
 806		rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
 807
 808		if (unlikely(++i == rx_ring->count))
 809			i = 0;
 810		buffer_info = &rx_ring->buffer_info[i];
 811	}
 812
 813	if (likely(rx_ring->next_to_use != i)) {
 814		rx_ring->next_to_use = i;
 815		if (unlikely(i-- == 0))
 816			i = (rx_ring->count - 1);
 817
 818		/* Force memory writes to complete before letting h/w
 819		 * know there are new descriptors to fetch.  (Only
 820		 * applicable for weak-ordered memory model archs,
 821		 * such as IA-64). */
 822		wmb();
 823		if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
 824			e1000e_update_rdt_wa(adapter, i);
 825		else
 826			writel(i, adapter->hw.hw_addr + rx_ring->tail);
 827	}
 828}
 829
 830/**
 831 * e1000_clean_rx_irq - Send received data up the network stack; legacy
 832 * @adapter: board private structure
 833 *
 834 * the return value indicates whether actual cleaning was done, there
 835 * is no guarantee that everything was cleaned
 836 **/
 837static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
 838			       int *work_done, int work_to_do)
 839{
 840	struct net_device *netdev = adapter->netdev;
 841	struct pci_dev *pdev = adapter->pdev;
 842	struct e1000_hw *hw = &adapter->hw;
 843	struct e1000_ring *rx_ring = adapter->rx_ring;
 844	struct e1000_rx_desc *rx_desc, *next_rxd;
 845	struct e1000_buffer *buffer_info, *next_buffer;
 846	u32 length;
 847	unsigned int i;
 848	int cleaned_count = 0;
 849	bool cleaned = 0;
 850	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
 851
 852	i = rx_ring->next_to_clean;
 853	rx_desc = E1000_RX_DESC(*rx_ring, i);
 854	buffer_info = &rx_ring->buffer_info[i];
 855
 856	while (rx_desc->status & E1000_RXD_STAT_DD) {
 857		struct sk_buff *skb;
 858		u8 status;
 859
 860		if (*work_done >= work_to_do)
 861			break;
 862		(*work_done)++;
 863		rmb();	/* read descriptor and rx_buffer_info after status DD */
 864
 865		status = rx_desc->status;
 866		skb = buffer_info->skb;
 867		buffer_info->skb = NULL;
 868
 869		prefetch(skb->data - NET_IP_ALIGN);
 870
 871		i++;
 872		if (i == rx_ring->count)
 873			i = 0;
 874		next_rxd = E1000_RX_DESC(*rx_ring, i);
 875		prefetch(next_rxd);
 876
 877		next_buffer = &rx_ring->buffer_info[i];
 878
 879		cleaned = 1;
 880		cleaned_count++;
 881		dma_unmap_single(&pdev->dev,
 882				 buffer_info->dma,
 883				 adapter->rx_buffer_len,
 884				 DMA_FROM_DEVICE);
 885		buffer_info->dma = 0;
 886
 887		length = le16_to_cpu(rx_desc->length);
 888
 889		/*
 890		 * !EOP means multiple descriptors were used to store a single
 891		 * packet, if that's the case we need to toss it.  In fact, we
 892		 * need to toss every packet with the EOP bit clear and the
 893		 * next frame that _does_ have the EOP bit set, as it is by
 894		 * definition only a frame fragment
 895		 */
 896		if (unlikely(!(status & E1000_RXD_STAT_EOP)))
 897			adapter->flags2 |= FLAG2_IS_DISCARDING;
 898
 899		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
 900			/* All receives must fit into a single buffer */
 901			e_dbg("Receive packet consumed multiple buffers\n");
 902			/* recycle */
 903			buffer_info->skb = skb;
 904			if (status & E1000_RXD_STAT_EOP)
 905				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
 906			goto next_desc;
 907		}
 908
 909		if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
 910			/* recycle */
 911			buffer_info->skb = skb;
 912			goto next_desc;
 913		}
 914
 915		/* adjust length to remove Ethernet CRC */
 916		if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
 917			length -= 4;
 918
 919		total_rx_bytes += length;
 920		total_rx_packets++;
 921
 922		/*
 923		 * code added for copybreak, this should improve
 924		 * performance for small packets with large amounts
 925		 * of reassembly being done in the stack
 926		 */
 927		if (length < copybreak) {
 928			struct sk_buff *new_skb =
 929			    netdev_alloc_skb_ip_align(netdev, length);
 930			if (new_skb) {
 931				skb_copy_to_linear_data_offset(new_skb,
 932							       -NET_IP_ALIGN,
 933							       (skb->data -
 934								NET_IP_ALIGN),
 935							       (length +
 936								NET_IP_ALIGN));
 937				/* save the skb in buffer_info as good */
 938				buffer_info->skb = skb;
 939				skb = new_skb;
 940			}
 941			/* else just continue with the old one */
 942		}
 943		/* end copybreak code */
 944		skb_put(skb, length);
 945
 946		/* Receive Checksum Offload */
 947		e1000_rx_checksum(adapter,
 948				  (u32)(status) |
 949				  ((u32)(rx_desc->errors) << 24),
 950				  le16_to_cpu(rx_desc->csum), skb);
 951
 952		e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
 953
 954next_desc:
 955		rx_desc->status = 0;
 956
 957		/* return some buffers to hardware, one at a time is too slow */
 958		if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
 959			adapter->alloc_rx_buf(adapter, cleaned_count,
 960					      GFP_ATOMIC);
 961			cleaned_count = 0;
 962		}
 963
 964		/* use prefetched values */
 965		rx_desc = next_rxd;
 966		buffer_info = next_buffer;
 967	}
 968	rx_ring->next_to_clean = i;
 969
 970	cleaned_count = e1000_desc_unused(rx_ring);
 971	if (cleaned_count)
 972		adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC);
 973
 974	adapter->total_rx_bytes += total_rx_bytes;
 975	adapter->total_rx_packets += total_rx_packets;
 976	return cleaned;
 977}
 978
 979static void e1000_put_txbuf(struct e1000_adapter *adapter,
 980			     struct e1000_buffer *buffer_info)
 981{
 982	if (buffer_info->dma) {
 983		if (buffer_info->mapped_as_page)
 984			dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
 985				       buffer_info->length, DMA_TO_DEVICE);
 986		else
 987			dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
 988					 buffer_info->length, DMA_TO_DEVICE);
 989		buffer_info->dma = 0;
 990	}
 991	if (buffer_info->skb) {
 992		dev_kfree_skb_any(buffer_info->skb);
 993		buffer_info->skb = NULL;
 994	}
 995	buffer_info->time_stamp = 0;
 996}
 997
 998static void e1000_print_hw_hang(struct work_struct *work)
 999{
1000	struct e1000_adapter *adapter = container_of(work,
1001	                                             struct e1000_adapter,
1002	                                             print_hang_task);
1003	struct e1000_ring *tx_ring = adapter->tx_ring;
1004	unsigned int i = tx_ring->next_to_clean;
1005	unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1006	struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1007	struct e1000_hw *hw = &adapter->hw;
1008	u16 phy_status, phy_1000t_status, phy_ext_status;
1009	u16 pci_status;
1010
1011	if (test_bit(__E1000_DOWN, &adapter->state))
1012		return;
1013
1014	e1e_rphy(hw, PHY_STATUS, &phy_status);
1015	e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
1016	e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
1017
1018	pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1019
1020	/* detected Hardware unit hang */
1021	e_err("Detected Hardware Unit Hang:\n"
1022	      "  TDH                  <%x>\n"
1023	      "  TDT                  <%x>\n"
1024	      "  next_to_use          <%x>\n"
1025	      "  next_to_clean        <%x>\n"
1026	      "buffer_info[next_to_clean]:\n"
1027	      "  time_stamp           <%lx>\n"
1028	      "  next_to_watch        <%x>\n"
1029	      "  jiffies              <%lx>\n"
1030	      "  next_to_watch.status <%x>\n"
1031	      "MAC Status             <%x>\n"
1032	      "PHY Status             <%x>\n"
1033	      "PHY 1000BASE-T Status  <%x>\n"
1034	      "PHY Extended Status    <%x>\n"
1035	      "PCI Status             <%x>\n",
1036	      readl(adapter->hw.hw_addr + tx_ring->head),
1037	      readl(adapter->hw.hw_addr + tx_ring->tail),
1038	      tx_ring->next_to_use,
1039	      tx_ring->next_to_clean,
1040	      tx_ring->buffer_info[eop].time_stamp,
1041	      eop,
1042	      jiffies,
1043	      eop_desc->upper.fields.status,
1044	      er32(STATUS),
1045	      phy_status,
1046	      phy_1000t_status,
1047	      phy_ext_status,
1048	      pci_status);
1049}
1050
1051/**
1052 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1053 * @adapter: board private structure
1054 *
1055 * the return value indicates whether actual cleaning was done, there
1056 * is no guarantee that everything was cleaned
1057 **/
1058static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
1059{
1060	struct net_device *netdev = adapter->netdev;
1061	struct e1000_hw *hw = &adapter->hw;
1062	struct e1000_ring *tx_ring = adapter->tx_ring;
1063	struct e1000_tx_desc *tx_desc, *eop_desc;
1064	struct e1000_buffer *buffer_info;
1065	unsigned int i, eop;
1066	unsigned int count = 0;
1067	unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1068
1069	i = tx_ring->next_to_clean;
1070	eop = tx_ring->buffer_info[i].next_to_watch;
1071	eop_desc = E1000_TX_DESC(*tx_ring, eop);
1072
1073	while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1074	       (count < tx_ring->count)) {
1075		bool cleaned = false;
1076		rmb(); /* read buffer_info after eop_desc */
1077		for (; !cleaned; count++) {
1078			tx_desc = E1000_TX_DESC(*tx_ring, i);
1079			buffer_info = &tx_ring->buffer_info[i];
1080			cleaned = (i == eop);
1081
1082			if (cleaned) {
1083				total_tx_packets += buffer_info->segs;
1084				total_tx_bytes += buffer_info->bytecount;
1085			}
1086
1087			e1000_put_txbuf(adapter, buffer_info);
1088			tx_desc->upper.data = 0;
1089
1090			i++;
1091			if (i == tx_ring->count)
1092				i = 0;
1093		}
1094
1095		if (i == tx_ring->next_to_use)
1096			break;
1097		eop = tx_ring->buffer_info[i].next_to_watch;
1098		eop_desc = E1000_TX_DESC(*tx_ring, eop);
1099	}
1100
1101	tx_ring->next_to_clean = i;
1102
1103#define TX_WAKE_THRESHOLD 32
1104	if (count && netif_carrier_ok(netdev) &&
1105	    e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1106		/* Make sure that anybody stopping the queue after this
1107		 * sees the new next_to_clean.
1108		 */
1109		smp_mb();
1110
1111		if (netif_queue_stopped(netdev) &&
1112		    !(test_bit(__E1000_DOWN, &adapter->state))) {
1113			netif_wake_queue(netdev);
1114			++adapter->restart_queue;
1115		}
1116	}
1117
1118	if (adapter->detect_tx_hung) {
1119		/*
1120		 * Detect a transmit hang in hardware, this serializes the
1121		 * check with the clearing of time_stamp and movement of i
1122		 */
1123		adapter->detect_tx_hung = 0;
1124		if (tx_ring->buffer_info[i].time_stamp &&
1125		    time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1126			       + (adapter->tx_timeout_factor * HZ)) &&
1127		    !(er32(STATUS) & E1000_STATUS_TXOFF)) {
1128			schedule_work(&adapter->print_hang_task);
1129			netif_stop_queue(netdev);
1130		}
1131	}
1132	adapter->total_tx_bytes += total_tx_bytes;
1133	adapter->total_tx_packets += total_tx_packets;
1134	return count < tx_ring->count;
1135}
1136
1137/**
1138 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1139 * @adapter: board private structure
1140 *
1141 * the return value indicates whether actual cleaning was done, there
1142 * is no guarantee that everything was cleaned
1143 **/
1144static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1145				  int *work_done, int work_to_do)
1146{
1147	struct e1000_hw *hw = &adapter->hw;
1148	union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1149	struct net_device *netdev = adapter->netdev;
1150	struct pci_dev *pdev = adapter->pdev;
1151	struct e1000_ring *rx_ring = adapter->rx_ring;
1152	struct e1000_buffer *buffer_info, *next_buffer;
1153	struct e1000_ps_page *ps_page;
1154	struct sk_buff *skb;
1155	unsigned int i, j;
1156	u32 length, staterr;
1157	int cleaned_count = 0;
1158	bool cleaned = 0;
1159	unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1160
1161	i = rx_ring->next_to_clean;
1162	rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1163	staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1164	buffer_info = &rx_ring->buffer_info[i];
1165
1166	while (staterr & E1000_RXD_STAT_DD) {
1167		if (*work_done >= work_to_do)
1168			break;
1169		(*work_done)++;
1170		skb = buffer_info->skb;
1171		rmb();	/* read descriptor and rx_buffer_info after status DD */
1172
1173		/* in the packet split case this is header only */
1174		prefetch(skb->data - NET_IP_ALIGN);
1175
1176		i++;
1177		if (i == rx_ring->count)
1178			i = 0;
1179		next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1180		prefetch(next_rxd);
1181
1182		next_buffer = &rx_ring->buffer_info[i];
1183
1184		cleaned = 1;
1185		cleaned_count++;
1186		dma_unmap_single(&pdev->dev, buffer_info->dma,
1187				 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1188		buffer_info->dma = 0;
1189
1190		/* see !EOP comment in other Rx routine */
1191		if (!(staterr & E1000_RXD_STAT_EOP))
1192			adapter->flags2 |= FLAG2_IS_DISCARDING;
1193
1194		if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1195			e_dbg("Packet Split buffers didn't pick up the full "
1196			      "packet\n");
1197			dev_kfree_skb_irq(skb);
1198			if (staterr & E1000_RXD_STAT_EOP)
1199				adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1200			goto next_desc;
1201		}
1202
1203		if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1204			dev_kfree_skb_irq(skb);
1205			goto next_desc;
1206		}
1207
1208		length = le16_to_cpu(rx_desc->wb.middle.length0);
1209
1210		if (!length) {
1211			e_dbg("Last part of the packet spanning multiple "
1212			      "descriptors\n");
1213			dev_kfree_skb_irq(skb);
1214			goto next_desc;
1215		}
1216
1217		/* Good Receive */
1218		skb_put(skb, length);
1219
1220		{
1221		/*
1222		 * this looks ugly, but it seems compiler issues make it
1223		 * more efficient than reusing j
1224		 */
1225		int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1226
1227		/*
1228		 * page alloc/put takes too long and effects small packet
1229		 * throughput, so unsplit small packets and save the alloc/put
1230		 * only valid in softirq (napi) context to call kmap_*
1231		 */
1232		if (l1 && (l1 <= copybreak) &&
1233		    ((length + l1) <= adapter->rx_ps_bsize0)) {
1234			u8 *vaddr;
1235
1236			ps_page = &buffer_info->ps_pages[0];
1237
1238			/*
1239			 * there is no documentation about how to call
1240			 * kmap_atomic, so we can't hold the mapping
1241			 * very long
1242			 */
1243			dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1244						PAGE_SIZE, DMA_FROM_DEVICE);
1245			vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1246			memcpy(skb_tail_pointer(skb), vaddr, l1);
1247			kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
1248			dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1249						   PAGE_SIZE, DMA_FROM_DEVICE);
1250
1251			/* remove the CRC */
1252			if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1253				l1 -= 4;
1254
1255			skb_put(skb, l1);
1256			goto copydone;
1257		} /* if */
1258		}
1259
1260		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1261			length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1262			if (!length)
1263				break;
1264
1265			ps_page = &buffer_info->ps_pages[j];
1266			dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1267				       DMA_FROM_DEVICE);
1268			ps_page->dma = 0;
1269			skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1270			ps_page->page = NULL;
1271			skb->len += length;
1272			skb->data_len += length;
1273			skb->truesize += length;
1274		}
1275
1276		/* strip the ethernet crc, problem is we're using pages now so
1277		 * this whole operation can get a little cpu intensive
1278		 */
1279		if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1280			pskb_trim(skb, skb->len - 4);
1281
1282copydone:
1283		total_rx_bytes += skb->len;
1284		total_rx_packets++;
1285
1286		e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1287			rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1288
1289		if (rx_desc->wb.upper.header_status &
1290			   cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1291			adapter->rx_hdr_split++;
1292
1293		e1000_receive_skb(adapter, netdev, skb,
1294				  staterr, rx_desc->wb.middle.vlan);
1295
1296next_desc:
1297		rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1298		buffer_info->skb = NULL;
1299
1300		/* return some buffers to hardware, one at a time is too slow */
1301		if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1302			adapter->alloc_rx_buf(adapter, cleaned_count,
1303					      GFP_ATOMIC);
1304			cleaned_count = 0;
1305		}
1306
1307		/* use prefetched values */
1308		rx_desc = next_rxd;
1309		buffer_info = next_buffer;
1310
1311		staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1312	}
1313	rx_ring->next_to_clean = i;
1314
1315	cleaned_count = e1000_desc_unused(rx_ring);
1316	if (cleaned_count)
1317		adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC);
1318
1319	adapter->total_rx_bytes += total_rx_bytes;
1320	adapter->total_rx_packets += total_rx_packets;
1321	return cleaned;
1322}
1323
1324/**
1325 * e1000_consume_page - helper function
1326 **/
1327static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1328                               u16 length)
1329{
1330	bi->page = NULL;
1331	skb->len += length;
1332	skb->data_len += length;
1333	skb->truesize += length;
1334}
1335
1336/**
1337 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1338 * @adapter: board private structure
1339 *
1340 * the return value indicates whether actual cleaning was done, there
1341 * is no guarantee that everything was cleaned
1342 **/
1343
1344static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1345                                     int *work_done, int work_to_do)
1346{
1347	struct net_device *netdev = adapter->netdev;
1348	struct pci_dev *pdev = adapter->pdev;
1349	struct e1000_ring *rx_ring = adapter->rx_ring;
1350	struct e1000_rx_desc *rx_desc, *next_rxd;
1351	struct e1000_buffer *buffer_info, *next_buffer;
1352	u32 length;
1353	unsigned int i;
1354	int cleaned_count = 0;
1355	bool cleaned = false;
1356	unsigned int total_rx_bytes=0, total_rx_packets=0;
1357
1358	i = rx_ring->next_to_clean;
1359	rx_desc = E1000_RX_DESC(*rx_ring, i);
1360	buffer_info = &rx_ring->buffer_info[i];
1361
1362	while (rx_desc->status & E1000_RXD_STAT_DD) {
1363		struct sk_buff *skb;
1364		u8 status;
1365
1366		if (*work_done >= work_to_do)
1367			break;
1368		(*work_done)++;
1369		rmb();	/* read descriptor and rx_buffer_info after status DD */
1370
1371		status = rx_desc->status;
1372		skb = buffer_info->skb;
1373		buffer_info->skb = NULL;
1374
1375		++i;
1376		if (i == rx_ring->count)
1377			i = 0;
1378		next_rxd = E1000_RX_DESC(*rx_ring, i);
1379		prefetch(next_rxd);
1380
1381		next_buffer = &rx_ring->buffer_info[i];
1382
1383		cleaned = true;
1384		cleaned_count++;
1385		dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1386			       DMA_FROM_DEVICE);
1387		buffer_info->dma = 0;
1388
1389		length = le16_to_cpu(rx_desc->length);
1390
1391		/* errors is only valid for DD + EOP descriptors */
1392		if (unlikely((status & E1000_RXD_STAT_EOP) &&
1393		    (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1394				/* recycle both page and skb */
1395				buffer_info->skb = skb;
1396				/* an error means any chain goes out the window
1397				 * too */
1398				if (rx_ring->rx_skb_top)
1399					dev_kfree_skb_irq(rx_ring->rx_skb_top);
1400				rx_ring->rx_skb_top = NULL;
1401				goto next_desc;
1402		}
1403
1404#define rxtop (rx_ring->rx_skb_top)
1405		if (!(status & E1000_RXD_STAT_EOP)) {
1406			/* this descriptor is only the beginning (or middle) */
1407			if (!rxtop) {
1408				/* this is the beginning of a chain */
1409				rxtop = skb;
1410				skb_fill_page_desc(rxtop, 0, buffer_info->page,
1411				                   0, length);
1412			} else {
1413				/* this is the middle of a chain */
1414				skb_fill_page_desc(rxtop,
1415				    skb_shinfo(rxtop)->nr_frags,
1416				    buffer_info->page, 0, length);
1417				/* re-use the skb, only consumed the page */
1418				buffer_info->skb = skb;
1419			}
1420			e1000_consume_page(buffer_info, rxtop, length);
1421			goto next_desc;
1422		} else {
1423			if (rxtop) {
1424				/* end of the chain */
1425				skb_fill_page_desc(rxtop,
1426				    skb_shinfo(rxtop)->nr_frags,
1427				    buffer_info->page, 0, length);
1428				/* re-use the current skb, we only consumed the
1429				 * page */
1430				buffer_info->skb = skb;
1431				skb = rxtop;
1432				rxtop = NULL;
1433				e1000_consume_page(buffer_info, skb, length);
1434			} else {
1435				/* no chain, got EOP, this buf is the packet
1436				 * copybreak to save the put_page/alloc_page */
1437				if (length <= copybreak &&
1438				    skb_tailroom(skb) >= length) {
1439					u8 *vaddr;
1440					vaddr = kmap_atomic(buffer_info->page,
1441					                   KM_SKB_DATA_SOFTIRQ);
1442					memcpy(skb_tail_pointer(skb), vaddr,
1443					       length);
1444					kunmap_atomic(vaddr,
1445					              KM_SKB_DATA_SOFTIRQ);
1446					/* re-use the page, so don't erase
1447					 * buffer_info->page */
1448					skb_put(skb, length);
1449				} else {
1450					skb_fill_page_desc(skb, 0,
1451					                   buffer_info->page, 0,
1452				                           length);
1453					e1000_consume_page(buffer_info, skb,
1454					                   length);
1455				}
1456			}
1457		}
1458
1459		/* Receive Checksum Offload XXX recompute due to CRC strip? */
1460		e1000_rx_checksum(adapter,
1461		                  (u32)(status) |
1462		                  ((u32)(rx_desc->errors) << 24),
1463		                  le16_to_cpu(rx_desc->csum), skb);
1464
1465		/* probably a little skewed due to removing CRC */
1466		total_rx_bytes += skb->len;
1467		total_rx_packets++;
1468
1469		/* eth type trans needs skb->data to point to something */
1470		if (!pskb_may_pull(skb, ETH_HLEN)) {
1471			e_err("pskb_may_pull failed.\n");
1472			dev_kfree_skb_irq(skb);
1473			goto next_desc;
1474		}
1475
1476		e1000_receive_skb(adapter, netdev, skb, status,
1477		                  rx_desc->special);
1478
1479next_desc:
1480		rx_desc->status = 0;
1481
1482		/* return some buffers to hardware, one at a time is too slow */
1483		if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1484			adapter->alloc_rx_buf(adapter, cleaned_count,
1485					      GFP_ATOMIC);
1486			cleaned_count = 0;
1487		}
1488
1489		/* use prefetched values */
1490		rx_desc = next_rxd;
1491		buffer_info = next_buffer;
1492	}
1493	rx_ring->next_to_clean = i;
1494
1495	cleaned_count = e1000_desc_unused(rx_ring);
1496	if (cleaned_count)
1497		adapter->alloc_rx_buf(adapter, cleaned_count, GFP_ATOMIC);
1498
1499	adapter->total_rx_bytes += total_rx_bytes;
1500	adapter->total_rx_packets += total_rx_packets;
1501	return cleaned;
1502}
1503
1504/**
1505 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1506 * @adapter: board private structure
1507 **/
1508static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1509{
1510	struct e1000_ring *rx_ring = adapter->rx_ring;
1511	struct e1000_buffer *buffer_info;
1512	struct e1000_ps_page *ps_page;
1513	struct pci_dev *pdev = adapter->pdev;
1514	unsigned int i, j;
1515
1516	/* Free all the Rx ring sk_buffs */
1517	for (i = 0; i < rx_ring->count; i++) {
1518		buffer_info = &rx_ring->buffer_info[i];
1519		if (buffer_info->dma) {
1520			if (adapter->clean_rx == e1000_clean_rx_irq)
1521				dma_unmap_single(&pdev->dev, buffer_info->dma,
1522						 adapter->rx_buffer_len,
1523						 DMA_FROM_DEVICE);
1524			else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1525				dma_unmap_page(&pdev->dev, buffer_info->dma,
1526				               PAGE_SIZE,
1527					       DMA_FROM_DEVICE);
1528			else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1529				dma_unmap_single(&pdev->dev, buffer_info->dma,
1530						 adapter->rx_ps_bsize0,
1531						 DMA_FROM_DEVICE);
1532			buffer_info->dma = 0;
1533		}
1534
1535		if (buffer_info->page) {
1536			put_page(buffer_info->page);
1537			buffer_info->page = NULL;
1538		}
1539
1540		if (buffer_info->skb) {
1541			dev_kfree_skb(buffer_info->skb);
1542			buffer_info->skb = NULL;
1543		}
1544
1545		for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1546			ps_page = &buffer_info->ps_pages[j];
1547			if (!ps_page->page)
1548				break;
1549			dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1550				       DMA_FROM_DEVICE);
1551			ps_page->dma = 0;
1552			put_page(ps_page->page);
1553			ps_page->page = NULL;
1554		}
1555	}
1556
1557	/* there also may be some cached data from a chained receive */
1558	if (rx_ring->rx_skb_top) {
1559		dev_kfree_skb(rx_ring->rx_skb_top);
1560		rx_ring->rx_skb_top = NULL;
1561	}
1562
1563	/* Zero out the descriptor ring */
1564	memset(rx_ring->desc, 0, rx_ring->size);
1565
1566	rx_ring->next_to_clean = 0;
1567	rx_ring->next_to_use = 0;
1568	adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1569
1570	writel(0, adapter->hw.hw_addr + rx_ring->head);
1571	writel(0, adapter->hw.hw_addr + rx_ring->tail);
1572}
1573
1574static void e1000e_downshift_workaround(struct work_struct *work)
1575{
1576	struct e1000_adapter *adapter = container_of(work,
1577					struct e1000_adapter, downshift_task);
1578
1579	if (test_bit(__E1000_DOWN, &adapter->state))
1580		return;
1581
1582	e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1583}
1584
1585/**
1586 * e1000_intr_msi - Interrupt Handler
1587 * @irq: interrupt number
1588 * @data: pointer to a network interface device structure
1589 **/
1590static irqreturn_t e1000_intr_msi(int irq, void *data)
1591{
1592	struct net_device *netdev = data;
1593	struct e1000_adapter *adapter = netdev_priv(netdev);
1594	struct e1000_hw *hw = &adapter->hw;
1595	u32 icr = er32(ICR);
1596
1597	/*
1598	 * read ICR disables interrupts using IAM
1599	 */
1600
1601	if (icr & E1000_ICR_LSC) {
1602		hw->mac.get_link_status = 1;
1603		/*
1604		 * ICH8 workaround-- Call gig speed drop workaround on cable
1605		 * disconnect (LSC) before accessing any PHY registers
1606		 */
1607		if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1608		    (!(er32(STATUS) & E1000_STATUS_LU)))
1609			schedule_work(&adapter->downshift_task);
1610
1611		/*
1612		 * 80003ES2LAN workaround-- For packet buffer work-around on
1613		 * link down event; disable receives here in the ISR and reset
1614		 * adapter in watchdog
1615		 */
1616		if (netif_carrier_ok(netdev) &&
1617		    adapter->flags & FLAG_RX_NEEDS_RESTART) {
1618			/* disable receives */
1619			u32 rctl = er32(RCTL);
1620			ew32(RCTL, rctl & ~E1000_RCTL_EN);
1621			adapter->flags |= FLAG_RX_RESTART_NOW;
1622		}
1623		/* guard against interrupt when we're going down */
1624		if (!test_bit(__E1000_DOWN, &adapter->state))
1625			mod_timer(&adapter->watchdog_timer, jiffies + 1);
1626	}
1627
1628	if (napi_schedule_prep(&adapter->napi)) {
1629		adapter->total_tx_bytes = 0;
1630		adapter->total_tx_packets = 0;
1631		adapter->total_rx_bytes = 0;
1632		adapter->total_rx_packets = 0;
1633		__napi_schedule(&adapter->napi);
1634	}
1635
1636	return IRQ_HANDLED;
1637}
1638
1639/**
1640 * e1000_intr - Interrupt Handler
1641 * @irq: interrupt number
1642 * @data: pointer to a network interface device structure
1643 **/
1644static irqreturn_t e1000_intr(int irq, void *data)
1645{
1646	struct net_device *netdev = data;
1647	struct e1000_adapter *adapter = netdev_priv(netdev);
1648	struct e1000_hw *hw = &adapter->hw;
1649	u32 rctl, icr = er32(ICR);
1650
1651	if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1652		return IRQ_NONE;  /* Not our interrupt */
1653
1654	/*
1655	 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1656	 * not set, then the adapter didn't send an interrupt
1657	 */
1658	if (!(icr & E1000_ICR_INT_ASSERTED))
1659		return IRQ_NONE;
1660
1661	/*
1662	 * Interrupt Auto-Mask...upon reading ICR,
1663	 * interrupts are masked.  No need for the
1664	 * IMC write
1665	 */
1666
1667	if (icr & E1000_ICR_LSC) {
1668		hw->mac.get_link_status = 1;
1669		/*
1670		 * ICH8 workaround-- Call gig speed drop workaround on cable
1671		 * disconnect (LSC) before accessing any PHY registers
1672		 */
1673		if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1674		    (!(er32(STATUS) & E1000_STATUS_LU)))
1675			schedule_work(&adapter->downshift_task);
1676
1677		/*
1678		 * 80003ES2LAN workaround--
1679		 * For packet buffer work-around on link down event;
1680		 * disable receives here in the ISR and
1681		 * reset adapter in watchdog
1682		 */
1683		if (netif_carrier_ok(netdev) &&
1684		    (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1685			/* disable receives */
1686			rctl = er32(RCTL);
1687			ew32(RCTL, rctl & ~E1000_RCTL_EN);
1688			adapter->flags |= FLAG_RX_RESTART_NOW;
1689		}
1690		/* guard against interrupt when we're going down */
1691		if (!test_bit(__E1000_DOWN, &adapter->state))
1692			mod_timer(&adapter->watchdog_timer, jiffies + 1);
1693	}
1694
1695	if (napi_schedule_prep(&adapter->napi)) {
1696		adapter->total_tx_bytes = 0;
1697		adapter->total_tx_packets = 0;
1698		adapter->total_rx_bytes = 0;
1699		adapter->total_rx_packets = 0;
1700		__napi_schedule(&adapter->napi);
1701	}
1702
1703	return IRQ_HANDLED;
1704}
1705
1706static irqreturn_t e1000_msix_other(int irq, void *data)
1707{
1708	struct net_device *netdev = data;
1709	struct e1000_adapter *adapter = netdev_priv(netdev);
1710	struct e1000_hw *hw = &adapter->hw;
1711	u32 icr = er32(ICR);
1712
1713	if (!(icr & E1000_ICR_INT_ASSERTED)) {
1714		if (!test_bit(__E1000_DOWN, &adapter->state))
1715			ew32(IMS, E1000_IMS_OTHER);
1716		return IRQ_NONE;
1717	}
1718
1719	if (icr & adapter->eiac_mask)
1720		ew32(ICS, (icr & adapter->eiac_mask));
1721
1722	if (icr & E1000_ICR_OTHER) {
1723		if (!(icr & E1000_ICR_LSC))
1724			goto no_link_interrupt;
1725		hw->mac.get_link_status = 1;
1726		/* guard against interrupt when we're going down */
1727		if (!test_bit(__E1000_DOWN, &adapter->state))
1728			mod_timer(&adapter->watchdog_timer, jiffies + 1);
1729	}
1730
1731no_link_interrupt:
1732	if (!test_bit(__E1000_DOWN, &adapter->state))
1733		ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1734
1735	return IRQ_HANDLED;
1736}
1737
1738
1739static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1740{
1741	struct net_device *netdev = data;
1742	struct e1000_adapter *adapter = netdev_priv(netdev);
1743	struct e1000_hw *hw = &adapter->hw;
1744	struct e1000_ring *tx_ring = adapter->tx_ring;
1745
1746
1747	adapter->total_tx_bytes = 0;
1748	adapter->total_tx_packets = 0;
1749
1750	if (!e1000_clean_tx_irq(adapter))
1751		/* Ring was not completely cleaned, so fire another interrupt */
1752		ew32(ICS, tx_ring->ims_val);
1753
1754	return IRQ_HANDLED;
1755}
1756
1757static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1758{
1759	struct net_device *netdev = data;
1760	struct e1000_adapter *adapter = netdev_priv(netdev);
1761
1762	/* Write the ITR value calculated at the end of the
1763	 * previous interrupt.
1764	 */
1765	if (adapter->rx_ring->set_itr) {
1766		writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1767		       adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1768		adapter->rx_ring->set_itr = 0;
1769	}
1770
1771	if (napi_schedule_prep(&adapter->napi)) {
1772		adapter->total_rx_bytes = 0;
1773		adapter->total_rx_packets = 0;
1774		__napi_schedule(&adapter->napi);
1775	}
1776	return IRQ_HANDLED;
1777}
1778
1779/**
1780 * e1000_configure_msix - Configure MSI-X hardware
1781 *
1782 * e1000_configure_msix sets up the hardware to properly
1783 * generate MSI-X interrupts.
1784 **/
1785static void e1000_configure_msix(struct e1000_adapter *adapter)
1786{
1787	struct e1000_hw *hw = &adapter->hw;
1788	struct e1000_ring *rx_ring = adapter->rx_ring;
1789	struct e1000_ring *tx_ring = adapter->tx_ring;
1790	int vector = 0;
1791	u32 ctrl_ext, ivar = 0;
1792
1793	adapter->eiac_mask = 0;
1794
1795	/* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1796	if (hw->mac.type == e1000_82574) {
1797		u32 rfctl = er32(RFCTL);
1798		rfctl |= E1000_RFCTL_ACK_DIS;
1799		ew32(RFCTL, rfctl);
1800	}
1801
1802#define E1000_IVAR_INT_ALLOC_VALID	0x8
1803	/* Configure Rx vector */
1804	rx_ring->ims_val = E1000_IMS_RXQ0;
1805	adapter->eiac_mask |= rx_ring->ims_val;
1806	if (rx_ring->itr_val)
1807		writel(1000000000 / (rx_ring->itr_val * 256),
1808		       hw->hw_addr + rx_ring->itr_register);
1809	else
1810		writel(1, hw->hw_addr + rx_ring->itr_register);
1811	ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1812
1813	/* Configure Tx vector */
1814	tx_ring->ims_val = E1000_IMS_TXQ0;
1815	vector++;
1816	if (tx_ring->itr_val)
1817		writel(1000000000 / (tx_ring->itr_val * 256),
1818		       hw->hw_addr + tx_ring->itr_register);
1819	else
1820		writel(1, hw->hw_addr + tx_ring->itr_register);
1821	adapter->eiac_mask |= tx_ring->ims_val;
1822	ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1823
1824	/* set vector for Other Causes, e.g. link changes */
1825	vector++;
1826	ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1827	if (rx_ring->itr_val)
1828		writel(1000000000 / (rx_ring->itr_val * 256),
1829		       hw->hw_addr + E1000_EITR_82574(vector));
1830	else
1831		writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1832
1833	/* Cause Tx interrupts on every write back */
1834	ivar |= (1 << 31);
1835
1836	ew32(IVAR, ivar);
1837
1838	/* enable MSI-X PBA support */
1839	ctrl_ext = er32(CTRL_EXT);
1840	ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1841
1842	/* Auto-Mask Other interrupts upon ICR read */
1843#define E1000_EIAC_MASK_82574   0x01F00000
1844	ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1845	ctrl_ext |= E1000_CTRL_EXT_EIAME;
1846	ew32(CTRL_EXT, ctrl_ext);
1847	e1e_flush();
1848}
1849
1850void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1851{
1852	if (adapter->msix_entries) {
1853		pci_disable_msix(adapter->pdev);
1854		kfree(adapter->msix_entries);
1855		adapter->msix_entries = NULL;
1856	} else if (adapter->flags & FLAG_MSI_ENABLED) {
1857		pci_disable_msi(adapter->pdev);
1858		adapter->flags &= ~FLAG_MSI_ENABLED;
1859	}
1860}
1861
1862/**
1863 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1864 *
1865 * Attempt to configure interrupts using the best available
1866 * capabilities of the hardware and kernel.
1867 **/
1868void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1869{
1870	int err;
1871	int i;
1872
1873	switch (adapter->int_mode) {
1874	case E1000E_INT_MODE_MSIX:
1875		if (adapter->flags & FLAG_HAS_MSIX) {
1876			adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1877			adapter->msix_entries = kcalloc(adapter->num_vectors,
1878						      sizeof(struct msix_entry),
1879						      GFP_KERNEL);
1880			if (adapter->msix_entries) {
1881				for (i = 0; i < adapter->num_vectors; i++)
1882					adapter->msix_entries[i].entry = i;
1883
1884				err = pci_enable_msix(adapter->pdev,
1885						      adapter->msix_entries,
1886						      adapter->num_vectors);
1887				if (err == 0)
1888					return;
1889			}
1890			/* MSI-X failed, so fall through and try MSI */
1891			e_err("Failed to initialize MSI-X interrupts.  "
1892			      "Falling back to MSI interrupts.\n");
1893			e1000e_reset_interrupt_capability(adapter);
1894		}
1895		adapter->int_mode = E1000E_INT_MODE_MSI;
1896		/* Fall through */
1897	case E1000E_INT_MODE_MSI:
1898		if (!pci_enable_msi(adapter->pdev)) {
1899			adapter->flags |= FLAG_MSI_ENABLED;
1900		} else {
1901			adapter->int_mode = E1000E_INT_MODE_LEGACY;
1902			e_err("Failed to initialize MSI interrupts.  Falling "
1903			      "back to legacy interrupts.\n");
1904		}
1905		/* Fall through */
1906	case E1000E_INT_MODE_LEGACY:
1907		/* Don't do anything; this is the system default */
1908		break;
1909	}
1910
1911	/* store the number of vectors being used */
1912	adapter->num_vectors = 1;
1913}
1914
1915/**
1916 * e1000_request_msix - Initialize MSI-X interrupts
1917 *
1918 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1919 * kernel.
1920 **/
1921static int e1000_request_msix(struct e1000_adapter *adapter)
1922{
1923	struct net_device *netdev = adapter->netdev;
1924	int err = 0, vector = 0;
1925
1926	if (strlen(netdev->name) < (IFNAMSIZ - 5))
1927		snprintf(adapter->rx_ring->name,
1928			 sizeof(adapter->rx_ring->name) - 1,
1929			 "%s-rx-0", netdev->name);
1930	else
1931		memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1932	err = request_irq(adapter->msix_entries[vector].vector,
1933			  e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1934			  netdev);
1935	if (err)
1936		goto out;
1937	adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1938	adapter->rx_ring->itr_val = adapter->itr;
1939	vector++;
1940
1941	if (strlen(netdev->name) < (IFNAMSIZ - 5))
1942		snprintf(adapter->tx_ring->name,
1943			 sizeof(adapter->tx_ring->name) - 1,
1944			 "%s-tx-0", netdev->name);
1945	else
1946		memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1947	err = request_irq(adapter->msix_entries[vector].vector,
1948			  e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1949			  netdev);
1950	if (err)
1951		goto out;
1952	adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1953	adapter->tx_ring->itr_val = adapter->itr;
1954	vector++;
1955
1956	err = request_irq(adapter->msix_entries[vector].vector,
1957			  e1000_msix_other, 0, netdev->name, netdev);
1958	if (err)
1959		goto out;
1960
1961	e1000_configure_msix(adapter);
1962	return 0;
1963out:
1964	return err;
1965}
1966
1967/**
1968 * e1000_request_irq - initialize interrupts
1969 *
1970 * Attempts to configure interrupts using the best available
1971 * capabilities of the hardware and kernel.
1972 **/
1973static int e1000_request_irq(struct e1000_adapter *adapter)
1974{
1975	struct net_device *netdev = adapter->netdev;
1976	int err;
1977
1978	if (adapter->msix_entries) {
1979		err = e1000_request_msix(adapter);
1980		if (!err)
1981			return err;
1982		/* fall back to MSI */
1983		e1000e_reset_interrupt_capability(adapter);
1984		adapter->int_mode = E1000E_INT_MODE_MSI;
1985		e1000e_set_interrupt_capability(adapter);
1986	}
1987	if (adapter->flags & FLAG_MSI_ENABLED) {
1988		err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
1989				  netdev->name, netdev);
1990		if (!err)
1991			return err;
1992
1993		/* fall back to legacy interrupt */
1994		e1000e_reset_interrupt_capability(adapter);
1995		adapter->int_mode = E1000E_INT_MODE_LEGACY;
1996	}
1997
1998	err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
1999			  netdev->name, netdev);
2000	if (err)
2001		e_err("Unable to allocate interrupt, Error: %d\n", err);
2002
2003	return err;
2004}
2005
2006static void e1000_free_irq(struct e1000_adapter *adapter)
2007{
2008	struct net_device *netdev = adapter->netdev;
2009
2010	if (adapter->msix_entries) {
2011		int vector = 0;
2012
2013		free_irq(adapter->msix_entries[vector].vector, netdev);
2014		vector++;
2015
2016		free_irq(adapter->msix_entries[vector].vector, netdev);
2017		vector++;
2018
2019		/* Other Causes interrupt vector */
2020		free_irq(adapter->msix_entries[vector].vector, netdev);
2021		return;
2022	}
2023
2024	free_irq(adapter->pdev->irq, netdev);
2025}
2026
2027/**
2028 * e1000_irq_disable - Mask off interrupt generation on the NIC
2029 **/
2030static void e1000_irq_disable(struct e1000_adapter *adapter)
2031{
2032	struct e1000_hw *hw = &adapter->hw;
2033
2034	ew32(IMC, ~0);
2035	if (adapter->msix_entries)
2036		ew32(EIAC_82574, 0);
2037	e1e_flush();
2038
2039	if (adapter->msix_entries) {
2040		int i;
2041		for (i = 0; i < adapter->num_vectors; i++)
2042			synchronize_irq(adapter->msix_entries[i].vector);
2043	} else {
2044		synchronize_irq(adapter->pdev->irq);
2045	}
2046}
2047
2048/**
2049 * e1000_irq_enable - Enable default interrupt generation settings
2050 **/
2051static void e1000_irq_enable(struct e1000_adapter *adapter)
2052{
2053	struct e1000_hw *hw = &adapter->hw;
2054
2055	if (adapter->msix_entries) {
2056		ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2057		ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2058	} else {
2059		ew32(IMS, IMS_ENABLE_MASK);
2060	}
2061	e1e_flush();
2062}
2063
2064/**
2065 * e1000e_get_hw_control - get control of the h/w from f/w
2066 * @adapter: address of board private structure
2067 *
2068 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2069 * For ASF and Pass Through versions of f/w this means that
2070 * the driver is loaded. For AMT version (only with 82573)
2071 * of the f/w this means that the network i/f is open.
2072 **/
2073void e1000e_get_hw_control(struct e1000_adapter *adapter)
2074{
2075	struct e1000_hw *hw = &adapter->hw;
2076	u32 ctrl_ext;
2077	u32 swsm;
2078
2079	/* Let firmware know the driver has taken over */
2080	if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2081		swsm = er32(SWSM);
2082		ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2083	} else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2084		ctrl_ext = er32(CTRL_EXT);
2085		ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2086	}
2087}
2088
2089/**
2090 * e1000e_release_hw_control - release control of the h/w to f/w
2091 * @adapter: address of board private structure
2092 *
2093 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2094 * For ASF and Pass Through versions of f/w this means that the
2095 * driver is no longer loaded. For AMT version (only with 82573) i
2096 * of the f/w this means that the network i/f is closed.
2097 *
2098 **/
2099void e1000e_release_hw_control(struct e1000_adapter *adapter)
2100{
2101	struct e1000_hw *hw = &adapter->hw;
2102	u32 ctrl_ext;
2103	u32 swsm;
2104
2105	/* Let firmware taken over control of h/w */
2106	if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2107		swsm = er32(SWSM);
2108		ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2109	} else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2110		ctrl_ext = er32(CTRL_EXT);
2111		ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2112	}
2113}
2114
2115/**
2116 * @e1000_alloc_ring - allocate memory for a ring structure
2117 **/
2118static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2119				struct e1000_ring *ring)
2120{
2121	struct pci_dev *pdev = adapter->pdev;
2122
2123	ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2124					GFP_KERNEL);
2125	if (!ring->desc)
2126		return -ENOMEM;
2127
2128	return 0;
2129}
2130
2131/**
2132 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2133 * @adapter: board private structure
2134 *
2135 * Return 0 on success, negative on failure
2136 **/
2137int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2138{
2139	struct e1000_ring *tx_ring = adapter->tx_ring;
2140	int err = -ENOMEM, size;
2141
2142	size = sizeof(struct e1000_buffer) * tx_ring->count;
2143	tx_ring->buffer_info = vzalloc(size);
2144	if (!tx_ring->buffer_info)
2145		goto err;
2146
2147	/* round up to nearest 4K */
2148	tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2149	tx_ring->size = ALIGN(tx_ring->size, 4096);
2150
2151	err = e1000_alloc_ring_dma(adapter, tx_ring);
2152	if (err)
2153		goto err;
2154
2155	tx_ring->next_to_use = 0;
2156	tx_ring->next_to_clean = 0;
2157
2158	return 0;
2159err:
2160	vfree(tx_ring->buffer_info);
2161	e_err("Unable to allocate memory for the transmit descriptor ring\n");
2162	return err;
2163}
2164
2165/**
2166 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2167 * @adapter: board private structure
2168 *
2169 * Returns 0 on success, negative on failure
2170 **/
2171int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2172{
2173	struct e1000_ring *rx_ring = adapter->rx_ring;
2174	struct e1000_buffer *buffer_info;
2175	int i, size, desc_len, err = -ENOMEM;
2176
2177	size = sizeof(struct e1000_buffer) * rx_ring->count;
2178	rx_ring->buffer_info = vzalloc(size);
2179	if (!rx_ring->buffer_info)
2180		goto err;
2181
2182	for (i = 0; i < rx_ring->count; i++) {
2183		buffer_info = &rx_ring->buffer_info[i];
2184		buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2185						sizeof(struct e1000_ps_page),
2186						GFP_KERNEL);
2187		if (!buffer_info->ps_pages)
2188			goto err_pages;
2189	}
2190
2191	desc_len = sizeof(union e1000_rx_desc_packet_split);
2192
2193	/* Round up to nearest 4K */
2194	rx_ring->size = rx_ring->count * desc_len;
2195	rx_ring->size = ALIGN(rx_ring->size, 4096);
2196
2197	err = e1000_alloc_ring_dma(adapter, rx_ring);
2198	if (err)
2199		goto err_pages;
2200
2201	rx_ring->next_to_clean = 0;
2202	rx_ring->next_to_use = 0;
2203	rx_ring->rx_skb_top = NULL;
2204
2205	return 0;
2206
2207err_pages:
2208	for (i = 0; i < rx_ring->count; i++) {
2209		buffer_info = &rx_ring->buffer_info[i];
2210		kfree(buffer_info->ps_pages);
2211	}
2212err:
2213	vfree(rx_ring->buffer_info);
2214	e_err("Unable to allocate memory for the receive descriptor ring\n");
2215	return err;
2216}
2217
2218/**
2219 * e1000_clean_tx_ring - Free Tx Buffers
2220 * @adapter: board private structure
2221 **/
2222static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2223{
2224	struct e1000_ring *tx_ring = adapter->tx_ring;
2225	struct e1000_buffer *buffer_info;
2226	unsigned long size;
2227	unsigned int i;
2228
2229	for (i = 0; i < tx_ring->count; i++) {
2230		buffer_info = &tx_ring->buffer_info[i];
2231		e1000_put_txbuf(adapter, buffer_info);
2232	}
2233
2234	size = sizeof(struct e1000_buffer) * tx_ring->count;
2235	memset(tx_ring->buffer_info, 0, size);
2236
2237	memset(tx_ring->desc, 0, tx_ring->size);
2238
2239	tx_ring->next_to_use = 0;
2240	tx_ring->next_to_clean = 0;
2241
2242	writel(0, adapter->hw.hw_addr + tx_ring->head);
2243	writel(0, adapter->hw.hw_addr + tx_ring->tail);
2244}
2245
2246/**
2247 * e1000e_free_tx_resources - Free Tx Resources per Queue
2248 * @adapter: board private structure
2249 *
2250 * Free all transmit software resources
2251 **/
2252void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2253{
2254	struct pci_dev *pdev = adapter->pdev;
2255	struct e1000_ring *tx_ring = adapter->tx_ring;
2256
2257	e1000_clean_tx_ring(adapter);
2258
2259	vfree(tx_ring->buffer_info);
2260	tx_ring->buffer_info = NULL;
2261
2262	dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2263			  tx_ring->dma);
2264	tx_ring->desc = NULL;
2265}
2266
2267/**
2268 * e1000e_free_rx_resources - Free Rx Resources
2269 * @adapter: board private structure
2270 *
2271 * Free all receive software resources
2272 **/
2273
2274void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2275{
2276	struct pci_dev *pdev = adapter->pdev;
2277	struct e1000_ring *rx_ring = adapter->rx_ring;
2278	int i;
2279
2280	e1000_clean_rx_ring(adapter);
2281
2282	for (i = 0; i < rx_ring->count; i++)
2283		kfree(rx_ring->buffer_info[i].ps_pages);
2284
2285	vfree(rx_ring->buffer_info);
2286	rx_ring->buffer_info = NULL;
2287
2288	dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2289			  rx_ring->dma);
2290	rx_ring->desc = NULL;
2291}
2292
2293/**
2294 * e1000_update_itr - update the dynamic ITR value based on statistics
2295 * @adapter: pointer to adapter
2296 * @itr_setting: current adapter->itr
2297 * @packets: the number of packets during this measurement interval
2298 * @bytes: the number of bytes during this measurement interval
2299 *
2300 *      Stores a new ITR value based on packets and byte
2301 *      counts during the last interrupt.  The advantage of per interrupt
2302 *      computation is faster updates and more accurate ITR for the current
2303 *      traffic pattern.  Constants in this function were computed
2304 *      based on theoretical maximum wire speed and thresholds were set based
2305 *      on testing data as well as attempting to minimize response time
2306 *      while increasing bulk throughput.  This functionality is controlled
2307 *      by the InterruptThrottleRate module parameter.
2308 **/
2309static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2310				     u16 itr_setting, int packets,
2311				     int bytes)
2312{
2313	unsigned int retval = itr_setting;
2314
2315	if (packets == 0)
2316		goto update_itr_done;
2317
2318	switch (itr_setting) {
2319	case lowest_latency:
2320		/* handle TSO and jumbo frames */
2321		if (bytes/packets > 8000)
2322			retval = bulk_latency;
2323		else if ((packets < 5) && (bytes > 512))
2324			retval = low_latency;
2325		break;
2326	case low_latency:  /* 50 usec aka 20000 ints/s */
2327		if (bytes > 10000) {
2328			/* this if handles the TSO accounting */
2329			if (bytes/packets > 8000)
2330				retval = bulk_latency;
2331			else if ((packets < 10) || ((bytes/packets) > 1200))
2332				retval = bulk_latency;
2333			else if ((packets > 35))
2334				retval = lowest_latency;
2335		} else if (bytes/packets > 2000) {
2336			retval = bulk_latency;
2337		} else if (packets <= 2 && bytes < 512) {
2338			retval = lowest_latency;
2339		}
2340		break;
2341	case bulk_latency: /* 250 usec aka 4000 ints/s */
2342		if (bytes > 25000) {
2343			if (packets > 35)
2344				retval = low_latency;
2345		} else if (bytes < 6000) {
2346			retval = low_latency;
2347		}
2348		break;
2349	}
2350
2351update_itr_done:
2352	return retval;
2353}
2354
2355static void e1000_set_itr(struct e1000_adapter *adapter)
2356{
2357	struct e1000_hw *hw = &adapter->hw;
2358	u16 current_itr;
2359	u32 new_itr = adapter->itr;
2360
2361	/* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2362	if (adapter->link_speed != SPEED_1000) {
2363		current_itr = 0;
2364		new_itr = 4000;
2365		goto set_itr_now;
2366	}
2367
2368	if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2369		new_itr = 0;
2370		goto set_itr_now;
2371	}
2372
2373	adapter->tx_itr = e1000_update_itr(adapter,
2374				    adapter->tx_itr,
2375				    adapter->total_tx_packets,
2376				    adapter->total_tx_bytes);
2377	/* conservative mode (itr 3) eliminates the lowest_latency setting */
2378	if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2379		adapter->tx_itr = low_latency;
2380
2381	adapter->rx_itr = e1000_update_itr(adapter,
2382				    adapter->rx_itr,
2383				    adapter->total_rx_packets,
2384				    adapter->total_rx_bytes);
2385	/* conservative mode (itr 3) eliminates the lowest_latency setting */
2386	if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2387		adapter->rx_itr = low_latency;
2388
2389	current_itr = max(adapter->rx_itr, adapter->tx_itr);
2390
2391	switch (current_itr) {
2392	/* counts and packets in update_itr are dependent on these numbers */
2393	case lowest_latency:
2394		new_itr = 70000;
2395		break;
2396	case low_latency:
2397		new_itr = 20000; /* aka hwitr = ~200 */
2398		break;
2399	case bulk_latency:
2400		new_itr = 4000;
2401		break;
2402	default:
2403		break;
2404	}
2405
2406set_itr_now:
2407	if (new_itr != adapter->itr) {
2408		/*
2409		 * this attempts to bias the interrupt rate towards Bulk
2410		 * by adding intermediate steps when interrupt rate is
2411		 * increasing
2412		 */
2413		new_itr = new_itr > adapter->itr ?
2414			     min(adapter->itr + (new_itr >> 2), new_itr) :
2415			     new_itr;
2416		adapter->itr = new_itr;
2417		adapter->rx_ring->itr_val = new_itr;
2418		if (adapter->msix_entries)
2419			adapter->rx_ring->set_itr = 1;
2420		else
2421			if (new_itr)
2422				ew32(ITR, 1000000000 / (new_itr * 256));
2423			else
2424				ew32(ITR, 0);
2425	}
2426}
2427
2428/**
2429 * e1000_alloc_queues - Allocate memory for all rings
2430 * @adapter: board private structure to initialize
2431 **/
2432static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2433{
2434	adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2435	if (!adapter->tx_ring)
2436		goto err;
2437
2438	adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2439	if (!adapter->rx_ring)
2440		goto err;
2441
2442	return 0;
2443err:
2444	e_err("Unable to allocate memory for queues\n");
2445	kfree(adapter->rx_ring);
2446	kfree(adapter->tx_ring);
2447	return -ENOMEM;
2448}
2449
2450/**
2451 * e1000_clean - NAPI Rx polling callback
2452 * @napi: struct associated with this polling callback
2453 * @budget: amount of packets driver is allowed to process this poll
2454 **/
2455static int e1000_clean(struct napi_struct *napi, int budget)
2456{
2457	struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
2458	struct e1000_hw *hw = &adapter->hw;
2459	struct net_device *poll_dev = adapter->netdev;
2460	int tx_cleaned = 1, work_done = 0;
2461
2462	adapter = netdev_priv(poll_dev);
2463
2464	if (adapter->msix_entries &&
2465	    !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2466		goto clean_rx;
2467
2468	tx_cleaned = e1000_clean_tx_irq(adapter);
2469
2470clean_rx:
2471	adapter->clean_rx(adapter, &work_done, budget);
2472
2473	if (!tx_cleaned)
2474		work_done = budget;
2475
2476	/* If budget not fully consumed, exit the polling mode */
2477	if (work_done < budget) {
2478		if (adapter->itr_setting & 3)
2479			e1000_set_itr(adapter);
2480		napi_complete(napi);
2481		if (!test_bit(__E1000_DOWN, &adapter->state)) {
2482			if (adapter->msix_entries)
2483				ew32(IMS, adapter->rx_ring->ims_val);
2484			else
2485				e1000_irq_enable(adapter);
2486		}
2487	}
2488
2489	return work_done;
2490}
2491
2492static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2493{
2494	struct e1000_adapter *adapter = netdev_priv(netdev);
2495	struct e1000_hw *hw = &adapter->hw;
2496	u32 vfta, index;
2497
2498	/* don't update vlan cookie if already programmed */
2499	if ((adapter->hw.mng_cookie.status &
2500	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2501	    (vid == adapter->mng_vlan_id))
2502		return;
2503
2504	/* add VID to filter table */
2505	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2506		index = (vid >> 5) & 0x7F;
2507		vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2508		vfta |= (1 << (vid & 0x1F));
2509		hw->mac.ops.write_vfta(hw, index, vfta);
2510	}
2511
2512	set_bit(vid, adapter->active_vlans);
2513}
2514
2515static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2516{
2517	struct e1000_adapter *adapter = netdev_priv(netdev);
2518	struct e1000_hw *hw = &adapter->hw;
2519	u32 vfta, index;
2520
2521	if ((adapter->hw.mng_cookie.status &
2522	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2523	    (vid == adapter->mng_vlan_id)) {
2524		/* release control to f/w */
2525		e1000e_release_hw_control(adapter);
2526		return;
2527	}
2528
2529	/* remove VID from filter table */
2530	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2531		index = (vid >> 5) & 0x7F;
2532		vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2533		vfta &= ~(1 << (vid & 0x1F));
2534		hw->mac.ops.write_vfta(hw, index, vfta);
2535	}
2536
2537	clear_bit(vid, adapter->active_vlans);
2538}
2539
2540/**
2541 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2542 * @adapter: board private structure to initialize
2543 **/
2544static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2545{
2546	struct net_device *netdev = adapter->netdev;
2547	struct e1000_hw *hw = &adapter->hw;
2548	u32 rctl;
2549
2550	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2551		/* disable VLAN receive filtering */
2552		rctl = er32(RCTL);
2553		rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2554		ew32(RCTL, rctl);
2555
2556		if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2557			e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2558			adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2559		}
2560	}
2561}
2562
2563/**
2564 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2565 * @adapter: board private structure to initialize
2566 **/
2567static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2568{
2569	struct e1000_hw *hw = &adapter->hw;
2570	u32 rctl;
2571
2572	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2573		/* enable VLAN receive filtering */
2574		rctl = er32(RCTL);
2575		rctl |= E1000_RCTL_VFE;
2576		rctl &= ~E1000_RCTL_CFIEN;
2577		ew32(RCTL, rctl);
2578	}
2579}
2580
2581/**
2582 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2583 * @adapter: board private structure to initialize
2584 **/
2585static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2586{
2587	struct e1000_hw *hw = &adapter->hw;
2588	u32 ctrl;
2589
2590	/* disable VLAN tag insert/strip */
2591	ctrl = er32(CTRL);
2592	ctrl &= ~E1000_CTRL_VME;
2593	ew32(CTRL, ctrl);
2594}
2595
2596/**
2597 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2598 * @adapter: board private structure to initialize
2599 **/
2600static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2601{
2602	struct e1000_hw *hw = &adapter->hw;
2603	u32 ctrl;
2604
2605	/* enable VLAN tag insert/strip */
2606	ctrl = er32(CTRL);
2607	ctrl |= E1000_CTRL_VME;
2608	ew32(CTRL, ctrl);
2609}
2610
2611static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2612{
2613	struct net_device *netdev = adapter->netdev;
2614	u16 vid = adapter->hw.mng_cookie.vlan_id;
2615	u16 old_vid = adapter->mng_vlan_id;
2616
2617	if (adapter->hw.mng_cookie.status &
2618	    E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2619		e1000_vlan_rx_add_vid(netdev, vid);
2620		adapter->mng_vlan_id = vid;
2621	}
2622
2623	if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2624		e1000_vlan_rx_kill_vid(netdev, old_vid);
2625}
2626
2627static void e1000_restore_vlan(struct e1000_adapter *adapter)
2628{
2629	u16 vid;
2630
2631	e1000_vlan_rx_add_vid(adapter->netdev, 0);
2632
2633	for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2634		e1000_vlan_rx_add_vid(adapter->netdev, vid);
2635}
2636
2637static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2638{
2639	struct e1000_hw *hw = &adapter->hw;
2640	u32 manc, manc2h, mdef, i, j;
2641
2642	if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2643		return;
2644
2645	manc = er32(MANC);
2646
2647	/*
2648	 * enable receiving management packets to the host. this will probably
2649	 * generate destination unreachable messages from the host OS, but
2650	 * the packets will be handled on SMBUS
2651	 */
2652	manc |= E1000_MANC_EN_MNG2HOST;
2653	manc2h = er32(MANC2H);
2654
2655	switch (hw->mac.type) {
2656	default:
2657		manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2658		break;
2659	case e1000_82574:
2660	case e1000_82583:
2661		/*
2662		 * Check if IPMI pass-through decision filter already exists;
2663		 * if so, enable it.
2664		 */
2665		for (i = 0, j = 0; i < 8; i++) {
2666			mdef = er32(MDEF(i));
2667
2668			/* Ignore filters with anything other than IPMI ports */
2669			if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2670				continue;
2671
2672			/* Enable this decision filter in MANC2H */
2673			if (mdef)
2674				manc2h |= (1 << i);
2675
2676			j |= mdef;
2677		}
2678
2679		if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2680			break;
2681
2682		/* Create new decision filter in an empty filter */
2683		for (i = 0, j = 0; i < 8; i++)
2684			if (er32(MDEF(i)) == 0) {
2685				ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2686					       E1000_MDEF_PORT_664));
2687				manc2h |= (1 << 1);
2688				j++;
2689				break;
2690			}
2691
2692		if (!j)
2693			e_warn("Unable to create IPMI pass-through filter\n");
2694		break;
2695	}
2696
2697	ew32(MANC2H, manc2h);
2698	ew32(MANC, manc);
2699}
2700
2701/**
2702 * e1000_configure_tx - Configure Transmit Unit after Reset
2703 * @adapter: board private structure
2704 *
2705 * Configure the Tx unit of the MAC after a reset.
2706 **/
2707static void e1000_configure_tx(struct e1000_adapter *adapter)
2708{
2709	struct e1000_hw *hw = &adapter->hw;
2710	struct e1000_ring *tx_ring = adapter->tx_ring;
2711	u64 tdba;
2712	u32 tdlen, tctl, tipg, tarc;
2713	u32 ipgr1, ipgr2;
2714
2715	/* Setup the HW Tx Head and Tail descriptor pointers */
2716	tdba = tx_ring->dma;
2717	tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2718	ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
2719	ew32(TDBAH, (tdba >> 32));
2720	ew32(TDLEN, tdlen);
2721	ew32(TDH, 0);
2722	ew32(TDT, 0);
2723	tx_ring->head = E1000_TDH;
2724	tx_ring->tail = E1000_TDT;
2725
2726	/* Set the default values for the Tx Inter Packet Gap timer */
2727	tipg = DEFAULT_82543_TIPG_IPGT_COPPER;          /*  8  */
2728	ipgr1 = DEFAULT_82543_TIPG_IPGR1;               /*  8  */
2729	ipgr2 = DEFAULT_82543_TIPG_IPGR2;               /*  6  */
2730
2731	if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2732		ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /*  7  */
2733
2734	tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2735	tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2736	ew32(TIPG, tipg);
2737
2738	/* Set the Tx Interrupt Delay register */
2739	ew32(TIDV, adapter->tx_int_delay);
2740	/* Tx irq moderation */
2741	ew32(TADV, adapter->tx_abs_int_delay);
2742
2743	if (adapter->flags2 & FLAG2_DMA_BURST) {
2744		u32 txdctl = er32(TXDCTL(0));
2745		txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2746			    E1000_TXDCTL_WTHRESH);
2747		/*
2748		 * set up some performance related parameters to encourage the
2749		 * hardware to use the bus more efficiently in bursts, depends
2750		 * on the tx_int_delay to be enabled,
2751		 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2752		 * hthresh = 1 ==> prefetch when one or more available
2753		 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2754		 * BEWARE: this seems to work but should be considered first if
2755		 * there are Tx hangs or other Tx related bugs
2756		 */
2757		txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2758		ew32(TXDCTL(0), txdctl);
2759		/* erratum work around: set txdctl the same for both queues */
2760		ew32(TXDCTL(1), txdctl);
2761	}
2762
2763	/* Program the Transmit Control Register */
2764	tctl = er32(TCTL);
2765	tctl &= ~E1000_TCTL_CT;
2766	tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2767		(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2768
2769	if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2770		tarc = er32(TARC(0));
2771		/*
2772		 * set the speed mode bit, we'll clear it if we're not at
2773		 * gigabit link later
2774		 */
2775#define SPEED_MODE_BIT (1 << 21)
2776		tarc |= SPEED_MODE_BIT;
2777		ew32(TARC(0), tarc);
2778	}
2779
2780	/* errata: program both queues to unweighted RR */
2781	if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2782		tarc = er32(TARC(0));
2783		tarc |= 1;
2784		ew32(TARC(0), tarc);
2785		tarc = er32(TARC(1));
2786		tarc |= 1;
2787		ew32(TARC(1), tarc);
2788	}
2789
2790	/* Setup Transmit Descriptor Settings for eop descriptor */
2791	adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2792
2793	/* only set IDE if we are delaying interrupts using the timers */
2794	if (adapter->tx_int_delay)
2795		adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2796
2797	/* enable Report Status bit */
2798	adapter->txd_cmd |= E1000_TXD_CMD_RS;
2799
2800	ew32(TCTL, tctl);
2801
2802	e1000e_config_collision_dist(hw);
2803}
2804
2805/**
2806 * e1000_setup_rctl - configure the receive control registers
2807 * @adapter: Board private structure
2808 **/
2809#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2810			   (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2811static void e1000_setup_rctl(struct e1000_adapter *adapter)
2812{
2813	struct e1000_hw *hw = &adapter->hw;
2814	u32 rctl, rfctl;
2815	u32 pages = 0;
2816
2817	/* Workaround Si errata on 82579 - configure jumbo frame flow */
2818	if (hw->mac.type == e1000_pch2lan) {
2819		s32 ret_val;
2820
2821		if (adapter->netdev->mtu > ETH_DATA_LEN)
2822			ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2823		else
2824			ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2825
2826		if (ret_val)
2827			e_dbg("failed to enable jumbo frame workaround mode\n");
2828	}
2829
2830	/* Program MC offset vector base */
2831	rctl = er32(RCTL);
2832	rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2833	rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2834		E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2835		(adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2836
2837	/* Do not Store bad packets */
2838	rctl &= ~E1000_RCTL_SBP;
2839
2840	/* Enable Long Packet receive */
2841	if (adapter->netdev->mtu <= ETH_DATA_LEN)
2842		rctl &= ~E1000_RCTL_LPE;
2843	else
2844		rctl |= E1000_RCTL_LPE;
2845
2846	/* Some systems expect that the CRC is included in SMBUS traffic. The
2847	 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2848	 * host memory when this is enabled
2849	 */
2850	if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2851		rctl |= E1000_RCTL_SECRC;
2852
2853	/* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2854	if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2855		u16 phy_data;
2856
2857		e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2858		phy_data &= 0xfff8;
2859		phy_data |= (1 << 2);
2860		e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2861
2862		e1e_rphy(hw, 22, &phy_data);
2863		phy_data &= 0x0fff;
2864		phy_data |= (1 << 14);
2865		e1e_wphy(hw, 0x10, 0x2823);
2866		e1e_wphy(hw, 0x11, 0x0003);
2867		e1e_wphy(hw, 22, phy_data);
2868	}
2869
2870	/* Setup buffer sizes */
2871	rctl &= ~E1000_RCTL_SZ_4096;
2872	rctl |= E1000_RCTL_BSEX;
2873	switch (adapter->rx_buffer_len) {
2874	case 2048:
2875	default:
2876		rctl |= E1000_RCTL_SZ_2048;
2877		rctl &= ~E1000_RCTL_BSEX;
2878		break;
2879	case 4096:
2880		rctl |= E1000_RCTL_SZ_4096;
2881		break;
2882	case 8192:
2883		rctl |= E1000_RCTL_SZ_8192;
2884		break;
2885	case 16384:
2886		rctl |= E1000_RCTL_SZ_16384;
2887		break;
2888	}
2889
2890	/*
2891	 * 82571 and greater support packet-split where the protocol
2892	 * header is placed in skb->data and the packet data is
2893	 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2894	 * In the case of a non-split, skb->data is linearly filled,
2895	 * followed by the page buffers.  Therefore, skb->data is
2896	 * sized to hold the largest protocol header.
2897	 *
2898	 * allocations using alloc_page take too long for regular MTU
2899	 * so only enable packet split for jumbo frames
2900	 *
2901	 * Using pages when the page size is greater than 16k wastes
2902	 * a lot of memory, since we allocate 3 pages at all times
2903	 * per packet.
2904	 */
2905	pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2906	if (!(adapter->flags & FLAG_HAS_ERT) && (pages <= 3) &&
2907	    (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
2908		adapter->rx_ps_pages = pages;
2909	else
2910		adapter->rx_ps_pages = 0;
2911
2912	if (adapter->rx_ps_pages) {
2913		u32 psrctl = 0;
2914
2915		/* Configure extra packet-split registers */
2916		rfctl = er32(RFCTL);
2917		rfctl |= E1000_RFCTL_EXTEN;
2918		/*
2919		 * disable packet split support for IPv6 extension headers,
2920		 * because some malformed IPv6 headers can hang the Rx
2921		 */
2922		rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2923			  E1000_RFCTL_NEW_IPV6_EXT_DIS);
2924
2925		ew32(RFCTL, rfctl);
2926
2927		/* Enable Packet split descriptors */
2928		rctl |= E1000_RCTL_DTYP_PS;
2929
2930		psrctl |= adapter->rx_ps_bsize0 >>
2931			E1000_PSRCTL_BSIZE0_SHIFT;
2932
2933		switch (adapter->rx_ps_pages) {
2934		case 3:
2935			psrctl |= PAGE_SIZE <<
2936				E1000_PSRCTL_BSIZE3_SHIFT;
2937		case 2:
2938			psrctl |= PAGE_SIZE <<
2939				E1000_PSRCTL_BSIZE2_SHIFT;
2940		case 1:
2941			psrctl |= PAGE_SIZE >>
2942				E1000_PSRCTL_BSIZE1_SHIFT;
2943			break;
2944		}
2945
2946		ew32(PSRCTL, psrctl);
2947	}
2948
2949	ew32(RCTL, rctl);
2950	/* just started the receive unit, no need to restart */
2951	adapter->flags &= ~FLAG_RX_RESTART_NOW;
2952}
2953
2954/**
2955 * e1000_configure_rx - Configure Receive Unit after Reset
2956 * @adapter: board private structure
2957 *
2958 * Configure the Rx unit of the MAC after a reset.
2959 **/
2960static void e1000_configure_rx(struct e1000_adapter *adapter)
2961{
2962	struct e1000_hw *hw = &adapter->hw;
2963	struct e1000_ring *rx_ring = adapter->rx_ring;
2964	u64 rdba;
2965	u32 rdlen, rctl, rxcsum, ctrl_ext;
2966
2967	if (adapter->rx_ps_pages) {
2968		/* this is a 32 byte descriptor */
2969		rdlen = rx_ring->count *
2970		    sizeof(union e1000_rx_desc_packet_split);
2971		adapter->clean_rx = e1000_clean_rx_irq_ps;
2972		adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2973	} else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2974		rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2975		adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2976		adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
2977	} else {
2978		rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2979		adapter->clean_rx = e1000_clean_rx_irq;
2980		adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2981	}
2982
2983	/* disable receives while setting up the descriptors */
2984	rctl = er32(RCTL);
2985	if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
2986		ew32(RCTL, rctl & ~E1000_RCTL_EN);
2987	e1e_flush();
2988	usleep_range(10000, 20000);
2989
2990	if (adapter->flags2 & FLAG2_DMA_BURST) {
2991		/*
2992		 * set the writeback threshold (only takes effect if the RDTR
2993		 * is set). set GRAN=1 and write back up to 0x4 worth, and
2994		 * enable prefetching of 0x20 Rx descriptors
2995		 * granularity = 01
2996		 * wthresh = 04,
2997		 * hthresh = 04,
2998		 * pthresh = 0x20
2999		 */
3000		ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3001		ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3002
3003		/*
3004		 * override the delay timers for enabling bursting, only if
3005		 * the value was not set by the user via module options
3006		 */
3007		if (adapter->rx_int_delay == DEFAULT_RDTR)
3008			adapter->rx_int_delay = BURST_RDTR;
3009		if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3010			adapter->rx_abs_int_delay = BURST_RADV;
3011	}
3012
3013	/* set the Receive Delay Timer Register */
3014	ew32(RDTR, adapter->rx_int_delay);
3015
3016	/* irq moderation */
3017	ew32(RADV, adapter->rx_abs_int_delay);
3018	if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3019		ew32(ITR, 1000000000 / (adapter->itr * 256));
3020
3021	ctrl_ext = er32(CTRL_EXT);
3022	/* Auto-Mask interrupts upon ICR access */
3023	ctrl_ext |= E1000_CTRL_EXT_IAME;
3024	ew32(IAM, 0xffffffff);
3025	ew32(CTRL_EXT, ctrl_ext);
3026	e1e_flush();
3027
3028	/*
3029	 * Setup the HW Rx Head and Tail Descriptor Pointers and
3030	 * the Base and Length of the Rx Descriptor Ring
3031	 */
3032	rdba = rx_ring->dma;
3033	ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
3034	ew32(RDBAH, (rdba >> 32));
3035	ew32(RDLEN, rdlen);
3036	ew32(RDH, 0);
3037	ew32(RDT, 0);
3038	rx_ring->head = E1000_RDH;
3039	rx_ring->tail = E1000_RDT;
3040
3041	/* Enable Receive Checksum Offload for TCP and UDP */
3042	rxcsum = er32(RXCSUM);
3043	if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
3044		rxcsum |= E1000_RXCSUM_TUOFL;
3045
3046		/*
3047		 * IPv4 payload checksum for UDP fragments must be
3048		 * used in conjunction with packet-split.
3049		 */
3050		if (adapter->rx_ps_pages)
3051			rxcsum |= E1000_RXCSUM_IPPCSE;
3052	} else {
3053		rxcsum &= ~E1000_RXCSUM_TUOFL;
3054		/* no need to clear IPPCSE as it defaults to 0 */
3055	}
3056	ew32(RXCSUM, rxcsum);
3057
3058	/*
3059	 * Enable early receives on supported devices, only takes effect when
3060	 * packet size is equal or larger than the specified value (in 8 byte
3061	 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
3062	 */
3063	if ((adapter->flags & FLAG_HAS_ERT) ||
3064	    (adapter->hw.mac.type == e1000_pch2lan)) {
3065		if (adapter->netdev->mtu > ETH_DATA_LEN) {
3066			u32 rxdctl = er32(RXDCTL(0));
3067			ew32(RXDCTL(0), rxdctl | 0x3);
3068			if (adapter->flags & FLAG_HAS_ERT)
3069				ew32(ERT, E1000_ERT_2048 | (1 << 13));
3070			/*
3071			 * With jumbo frames and early-receive enabled,
3072			 * excessive C-state transition latencies result in
3073			 * dropped transactions.
3074			 */
3075			pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
3076		} else {
3077			pm_qos_update_request(&adapter->netdev->pm_qos_req,
3078					      PM_QOS_DEFAULT_VALUE);
3079		}
3080	}
3081
3082	/* Enable Receives */
3083	ew32(RCTL, rctl);
3084}
3085
3086/**
3087 *  e1000_update_mc_addr_list - Update Multicast addresses
3088 *  @hw: pointer to the HW structure
3089 *  @mc_addr_list: array of multicast addresses to program
3090 *  @mc_addr_count: number of multicast addresses to program
3091 *
3092 *  Updates the Multicast Table Array.
3093 *  The caller must have a packed mc_addr_list of multicast addresses.
3094 **/
3095static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
3096				      u32 mc_addr_count)
3097{
3098	hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
3099}
3100
3101/**
3102 * e1000_set_multi - Multicast and Promiscuous mode set
3103 * @netdev: network interface device structure
3104 *
3105 * The set_multi entry point is called whenever the multicast address
3106 * list or the network interface flags are updated.  This routine is
3107 * responsible for configuring the hardware for proper multicast,
3108 * promiscuous mode, and all-multi behavior.
3109 **/
3110static void e1000_set_multi(struct net_device *netdev)
3111{
3112	struct e1000_adapter *adapter = netdev_priv(netdev);
3113	struct e1000_hw *hw = &adapter->hw;
3114	struct netdev_hw_addr *ha;
3115	u8  *mta_list;
3116	u32 rctl;
3117
3118	/* Check for Promiscuous and All Multicast modes */
3119
3120	rctl = er32(RCTL);
3121
3122	if (netdev->flags & IFF_PROMISC) {
3123		rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3124		rctl &= ~E1000_RCTL_VFE;
3125		/* Do not hardware filter VLANs in promisc mode */
3126		e1000e_vlan_filter_disable(adapter);
3127	} else {
3128		if (netdev->flags & IFF_ALLMULTI) {
3129			rctl |= E1000_RCTL_MPE;
3130			rctl &= ~E1000_RCTL_UPE;
3131		} else {
3132			rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3133		}
3134		e1000e_vlan_filter_enable(adapter);
3135	}
3136
3137	ew32(RCTL, rctl);
3138
3139	if (!netdev_mc_empty(netdev)) {
3140		int i = 0;
3141
3142		mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3143		if (!mta_list)
3144			return;
3145
3146		/* prepare a packed array of only addresses. */
3147		netdev_for_each_mc_addr(ha, netdev)
3148			memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3149
3150		e1000_update_mc_addr_list(hw, mta_list, i);
3151		kfree(mta_list);
3152	} else {
3153		/*
3154		 * if we're called from probe, we might not have
3155		 * anything to do here, so clear out the list
3156		 */
3157		e1000_update_mc_addr_list(hw, NULL, 0);
3158	}
3159
3160	if (netdev->features & NETIF_F_HW_VLAN_RX)
3161		e1000e_vlan_strip_enable(adapter);
3162	else
3163		e1000e_vlan_strip_disable(adapter);
3164}
3165
3166/**
3167 * e1000_configure - configure the hardware for Rx and Tx
3168 * @adapter: private board structure
3169 **/
3170static void e1000_configure(struct e1000_adapter *adapter)
3171{
3172	e1000_set_multi(adapter->netdev);
3173
3174	e1000_restore_vlan(adapter);
3175	e1000_init_manageability_pt(adapter);
3176
3177	e1000_configure_tx(adapter);
3178	e1000_setup_rctl(adapter);
3179	e1000_configure_rx(adapter);
3180	adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring),
3181			      GFP_KERNEL);
3182}
3183
3184/**
3185 * e1000e_power_up_phy - restore link in case the phy was powered down
3186 * @adapter: address of board private structure
3187 *
3188 * The phy may be powered down to save power and turn off link when the
3189 * driver is unloaded and wake on lan is not enabled (among others)
3190 * *** this routine MUST be followed by a call to e1000e_reset ***
3191 **/
3192void e1000e_power_up_phy(struct e1000_adapter *adapter)
3193{
3194	if (adapter->hw.phy.ops.power_up)
3195		adapter->hw.phy.ops.power_up(&adapter->hw);
3196
3197	adapter->hw.mac.ops.setup_link(&adapter->hw);
3198}
3199
3200/**
3201 * e1000_power_down_phy - Power down the PHY
3202 *
3203 * Power down the PHY so no link is implied when interface is down.
3204 * The PHY cannot be powered down if management or WoL is active.
3205 */
3206static void e1000_power_down_phy(struct e1000_adapter *adapter)
3207{
3208	/* WoL is enabled */
3209	if (adapter->wol)
3210		return;
3211
3212	if (adapter->hw.phy.ops.power_down)
3213		adapter->hw.phy.ops.power_down(&adapter->hw);
3214}
3215
3216/**
3217 * e1000e_reset - bring the hardware into a known good state
3218 *
3219 * This function boots the hardware and enables some settings that
3220 * require a configuration cycle of the hardware - those cannot be
3221 * set/changed during runtime. After reset the device needs to be
3222 * properly configured for Rx, Tx etc.
3223 */
3224void e1000e_reset(struct e1000_adapter *adapter)
3225{
3226	struct e1000_mac_info *mac = &adapter->hw.mac;
3227	struct e1000_fc_info *fc = &adapter->hw.fc;
3228	struct e1000_hw *hw = &adapter->hw;
3229	u32 tx_space, min_tx_space, min_rx_space;
3230	u32 pba = adapter->pba;
3231	u16 hwm;
3232
3233	/* reset Packet Buffer Allocation to default */
3234	ew32(PBA, pba);
3235
3236	if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3237		/*
3238		 * To maintain wire speed transmits, the Tx FIFO should be
3239		 * large enough to accommodate two full transmit packets,
3240		 * rounded up to the next 1KB and expressed in KB.  Likewise,
3241		 * the Rx FIFO should be large enough to accommodate at least
3242		 * one full receive packet and is similarly rounded up and
3243		 * expressed in KB.
3244		 */
3245		pba = er32(PBA);
3246		/* upper 16 bits has Tx packet buffer allocation size in KB */
3247		tx_space = pba >> 16;
3248		/* lower 16 bits has Rx packet buffer allocation size in KB */
3249		pba &= 0xffff;
3250		/*
3251		 * the Tx fifo also stores 16 bytes of information about the Tx
3252		 * but don't include ethernet FCS because hardware appends it
3253		 */
3254		min_tx_space = (adapter->max_frame_size +
3255				sizeof(struct e1000_tx_desc) -
3256				ETH_FCS_LEN) * 2;
3257		min_tx_space = ALIGN(min_tx_space, 1024);
3258		min_tx_space >>= 10;
3259		/* software strips receive CRC, so leave room for it */
3260		min_rx_space = adapter->max_frame_size;
3261		min_rx_space = ALIGN(min_rx_space, 1024);
3262		min_rx_space >>= 10;
3263
3264		/*
3265		 * If current Tx allocation is less than the min Tx FIFO size,
3266		 * and the min Tx FIFO size is less than the current Rx FIFO
3267		 * allocation, take space away from current Rx allocation
3268		 */
3269		if ((tx_space < min_tx_space) &&
3270		    ((min_tx_space - tx_space) < pba)) {
3271			pba -= min_tx_space - tx_space;
3272
3273			/*
3274			 * if short on Rx space, Rx wins and must trump Tx
3275			 * adjustment or use Early Receive if available
3276			 */
3277			if ((pba < min_rx_space) &&
3278			    (!(adapter->flags & FLAG_HAS_ERT)))
3279				/* ERT enabled in e1000_configure_rx */
3280				pba = min_rx_space;
3281		}
3282
3283		ew32(PBA, pba);
3284	}
3285
3286	/*
3287	 * flow control settings
3288	 *
3289	 * The high water mark must be low enough to fit one full frame
3290	 * (or the size used for early receive) above it in the Rx FIFO.
3291	 * Set it to the lower of:
3292	 * - 90% of the Rx FIFO size, and
3293	 * - the full Rx FIFO size minus the early receive size (for parts
3294	 *   with ERT support assuming ERT set to E1000_ERT_2048), or
3295	 * - the full Rx FIFO size minus one full frame
3296	 */
3297	if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3298		fc->pause_time = 0xFFFF;
3299	else
3300		fc->pause_time = E1000_FC_PAUSE_TIME;
3301	fc->send_xon = 1;
3302	fc->current_mode = fc->requested_mode;
3303
3304	switch (hw->mac.type) {
3305	default:
3306		if ((adapter->flags & FLAG_HAS_ERT) &&
3307		    (adapter->netdev->mtu > ETH_DATA_LEN))
3308			hwm = min(((pba << 10) * 9 / 10),
3309				  ((pba << 10) - (E1000_ERT_2048 << 3)));
3310		else
3311			hwm = min(((pba << 10) * 9 / 10),
3312				  ((pba << 10) - adapter->max_frame_size));
3313
3314		fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3315		fc->low_water = fc->high_water - 8;
3316		break;
3317	case e1000_pchlan:
3318		/*
3319		 * Workaround PCH LOM adapter hangs with certain network
3320		 * loads.  If hangs persist, try disabling Tx flow control.
3321		 */
3322		if (adapter->netdev->mtu > ETH_DATA_LEN) {
3323			fc->high_water = 0x3500;
3324			fc->low_water  = 0x1500;
3325		} else {
3326			fc->high_water = 0x5000;
3327			fc->low_water  = 0x3000;
3328		}
3329		fc->refresh_time = 0x1000;
3330		break;
3331	case e1000_pch2lan:
3332		fc->high_water = 0x05C20;
3333		fc->low_water = 0x05048;
3334		fc->pause_time = 0x0650;
3335		fc->refresh_time = 0x0400;
3336		if (adapter->netdev->mtu > ETH_DATA_LEN) {
3337			pba = 14;
3338			ew32(PBA, pba);
3339		}
3340		break;
3341	}
3342
3343	/*
3344	 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3345	 * fit in receive buffer and early-receive not supported.
3346	 */
3347	if (adapter->itr_setting & 0x3) {
3348		if (((adapter->max_frame_size * 2) > (pba << 10)) &&
3349		    !(adapter->flags & FLAG_HAS_ERT)) {
3350			if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3351				dev_info(&adapter->pdev->dev,
3352					"Interrupt Throttle Rate turned off\n");
3353				adapter->flags2 |= FLAG2_DISABLE_AIM;
3354				ew32(ITR, 0);
3355			}
3356		} else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3357			dev_info(&adapter->pdev->dev,
3358				 "Interrupt Throttle Rate turned on\n");
3359			adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3360			adapter->itr = 20000;
3361			ew32(ITR, 1000000000 / (adapter->itr * 256));
3362		}
3363	}
3364
3365	/* Allow time for pending master requests to run */
3366	mac->ops.reset_hw(hw);
3367
3368	/*
3369	 * For parts with AMT enabled, let the firmware know
3370	 * that the network interface is in control
3371	 */
3372	if (adapter->flags & FLAG_HAS_AMT)
3373		e1000e_get_hw_control(adapter);
3374
3375	ew32(WUC, 0);
3376
3377	if (mac->ops.init_hw(hw))
3378		e_err("Hardware Error\n");
3379
3380	e1000_update_mng_vlan(adapter);
3381
3382	/* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3383	ew32(VET, ETH_P_8021Q);
3384
3385	e1000e_reset_adaptive(hw);
3386
3387	if (!netif_running(adapter->netdev) &&
3388	    !test_bit(__E1000_TESTING, &adapter->state)) {
3389		e1000_power_down_phy(adapter);
3390		return;
3391	}
3392
3393	e1000_get_phy_info(hw);
3394
3395	if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3396	    !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3397		u16 phy_data = 0;
3398		/*
3399		 * speed up time to link by disabling smart power down, ignore
3400		 * the return value of this function because there is nothing
3401		 * different we would do if it failed
3402		 */
3403		e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3404		phy_data &= ~IGP02E1000_PM_SPD;
3405		e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3406	}
3407}
3408
3409int e1000e_up(struct e1000_adapter *adapter)
3410{
3411	struct e1000_hw *hw = &adapter->hw;
3412
3413	/* hardware has been reset, we need to reload some things */
3414	e1000_configure(adapter);
3415
3416	clear_bit(__E1000_DOWN, &adapter->state);
3417
3418	napi_enable(&adapter->napi);
3419	if (adapter->msix_entries)
3420		e1000_configure_msix(adapter);
3421	e1000_irq_enable(adapter);
3422
3423	netif_start_queue(adapter->netdev);
3424
3425	/* fire a link change interrupt to start the watchdog */
3426	if (adapter->msix_entries)
3427		ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3428	else
3429		ew32(ICS, E1000_ICS_LSC);
3430
3431	return 0;
3432}
3433
3434static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3435{
3436	struct e1000_hw *hw = &adapter->hw;
3437
3438	if (!(adapter->flags2 & FLAG2_DMA_BURST))
3439		return;
3440
3441	/* flush pending descriptor writebacks to memory */
3442	ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3443	ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3444
3445	/* execute the writes immediately */
3446	e1e_flush();
3447}
3448
3449static void e1000e_update_stats(struct e1000_adapter *adapter);
3450
3451void e1000e_down(struct e1000_adapter *adapter)
3452{
3453	struct net_device *netdev = adapter->netdev;
3454	struct e1000_hw *hw = &adapter->hw;
3455	u32 tctl, rctl;
3456
3457	/*
3458	 * signal that we're down so the interrupt handler does not
3459	 * reschedule our watchdog timer
3460	 */
3461	set_bit(__E1000_DOWN, &adapter->state);
3462
3463	/* disable receives in the hardware */
3464	rctl = er32(RCTL);
3465	if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3466		ew32(RCTL, rctl & ~E1000_RCTL_EN);
3467	/* flush and sleep below */
3468
3469	netif_stop_queue(netdev);
3470
3471	/* disable transmits in the hardware */
3472	tctl = er32(TCTL);
3473	tctl &= ~E1000_TCTL_EN;
3474	ew32(TCTL, tctl);
3475
3476	/* flush both disables and wait for them to finish */
3477	e1e_flush();
3478	usleep_range(10000, 20000);
3479
3480	napi_disable(&adapter->napi);
3481	e1000_irq_disable(adapter);
3482
3483	del_timer_sync(&adapter->watchdog_timer);
3484	del_timer_sync(&adapter->phy_info_timer);
3485
3486	netif_carrier_off(netdev);
3487
3488	spin_lock(&adapter->stats64_lock);
3489	e1000e_update_stats(adapter);
3490	spin_unlock(&adapter->stats64_lock);
3491
3492	e1000e_flush_descriptors(adapter);
3493	e1000_clean_tx_ring(adapter);
3494	e1000_clean_rx_ring(adapter);
3495
3496	adapter->link_speed = 0;
3497	adapter->link_duplex = 0;
3498
3499	if (!pci_channel_offline(adapter->pdev))
3500		e1000e_reset(adapter);
3501
3502	/*
3503	 * TODO: for power management, we could drop the link and
3504	 * pci_disable_device here.
3505	 */
3506}
3507
3508void e1000e_reinit_locked(struct e1000_adapter *adapter)
3509{
3510	might_sleep();
3511	while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3512		usleep_range(1000, 2000);
3513	e1000e_down(adapter);
3514	e1000e_up(adapter);
3515	clear_bit(__E1000_RESETTING, &adapter->state);
3516}
3517
3518/**
3519 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3520 * @adapter: board private structure to initialize
3521 *
3522 * e1000_sw_init initializes the Adapter private data structure.
3523 * Fields are initialized based on PCI device information and
3524 * OS network device settings (MTU size).
3525 **/
3526static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3527{
3528	struct net_device *netdev = adapter->netdev;
3529
3530	adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3531	adapter->rx_ps_bsize0 = 128;
3532	adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3533	adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3534
3535	spin_lock_init(&adapter->stats64_lock);
3536
3537	e1000e_set_interrupt_capability(adapter);
3538
3539	if (e1000_alloc_queues(adapter))
3540		return -ENOMEM;
3541
3542	/* Explicitly disable IRQ since the NIC can be in any state. */
3543	e1000_irq_disable(adapter);
3544
3545	set_bit(__E1000_DOWN, &adapter->state);
3546	return 0;
3547}
3548
3549/**
3550 * e1000_intr_msi_test - Interrupt Handler
3551 * @irq: interrupt number
3552 * @data: pointer to a network interface device structure
3553 **/
3554static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3555{
3556	struct net_device *netdev = data;
3557	struct e1000_adapter *adapter = netdev_priv(netdev);
3558	struct e1000_hw *hw = &adapter->hw;
3559	u32 icr = er32(ICR);
3560
3561	e_dbg("icr is %08X\n", icr);
3562	if (icr & E1000_ICR_RXSEQ) {
3563		adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3564		wmb();
3565	}
3566
3567	return IRQ_HANDLED;
3568}
3569
3570/**
3571 * e1000_test_msi_interrupt - Returns 0 for successful test
3572 * @adapter: board private struct
3573 *
3574 * code flow taken from tg3.c
3575 **/
3576static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3577{
3578	struct net_device *netdev = adapter->netdev;
3579	struct e1000_hw *hw = &adapter->hw;
3580	int err;
3581
3582	/* poll_enable hasn't been called yet, so don't need disable */
3583	/* clear any pending events */
3584	er32(ICR);
3585
3586	/* free the real vector and request a test handler */
3587	e1000_free_irq(adapter);
3588	e1000e_reset_interrupt_capability(adapter);
3589
3590	/* Assume that the test fails, if it succeeds then the test
3591	 * MSI irq handler will unset this flag */
3592	adapter->flags |= FLAG_MSI_TEST_FAILED;
3593
3594	err = pci_enable_msi(adapter->pdev);
3595	if (err)
3596		goto msi_test_failed;
3597
3598	err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
3599			  netdev->name, netdev);
3600	if (err) {
3601		pci_disable_msi(adapter->pdev);
3602		goto msi_test_failed;
3603	}
3604
3605	wmb();
3606
3607	e1000_irq_enable(adapter);
3608
3609	/* fire an unusual interrupt on the test handler */
3610	ew32(ICS, E1000_ICS_RXSEQ);
3611	e1e_flush();
3612	msleep(50);
3613
3614	e1000_irq_disable(adapter);
3615
3616	rmb();
3617
3618	if (adapter->flags & FLAG_MSI_TEST_FAILED) {
3619		adapter->int_mode = E1000E_INT_MODE_LEGACY;
3620		e_info("MSI interrupt test failed, using legacy interrupt.\n");
3621	} else
3622		e_dbg("MSI interrupt test succeeded!\n");
3623
3624	free_irq(adapter->pdev->irq, netdev);
3625	pci_disable_msi(adapter->pdev);
3626
3627msi_test_failed:
3628	e1000e_set_interrupt_capability(adapter);
3629	return e1000_request_irq(adapter);
3630}
3631
3632/**
3633 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3634 * @adapter: board private struct
3635 *
3636 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3637 **/
3638static int e1000_test_msi(struct e1000_adapter *adapter)
3639{
3640	int err;
3641	u16 pci_cmd;
3642
3643	if (!(adapter->flags & FLAG_MSI_ENABLED))
3644		return 0;
3645
3646	/* disable SERR in case the MSI write causes a master abort */
3647	pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3648	if (pci_cmd & PCI_COMMAND_SERR)
3649		pci_write_config_word(adapter->pdev, PCI_COMMAND,
3650				      pci_cmd & ~PCI_COMMAND_SERR);
3651
3652	err = e1000_test_msi_interrupt(adapter);
3653
3654	/* re-enable SERR */
3655	if (pci_cmd & PCI_COMMAND_SERR) {
3656		pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3657		pci_cmd |= PCI_COMMAND_SERR;
3658		pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3659	}
3660
3661	return err;
3662}
3663
3664/**
3665 * e1000_open - Called when a network interface is made active
3666 * @netdev: network interface device structure
3667 *
3668 * Returns 0 on success, negative value on failure
3669 *
3670 * The open entry point is called when a network interface is made
3671 * active by the system (IFF_UP).  At this point all resources needed
3672 * for transmit and receive operations are allocated, the interrupt
3673 * handler is registered with the OS, the watchdog timer is started,
3674 * and the stack is notified that the interface is ready.
3675 **/
3676static int e1000_open(struct net_device *netdev)
3677{
3678	struct e1000_adapter *adapter = netdev_priv(netdev);
3679	struct e1000_hw *hw = &adapter->hw;
3680	struct pci_dev *pdev = adapter->pdev;
3681	int err;
3682
3683	/* disallow open during test */
3684	if (test_bit(__E1000_TESTING, &adapter->state))
3685		return -EBUSY;
3686
3687	pm_runtime_get_sync(&pdev->dev);
3688
3689	netif_carrier_off(netdev);
3690
3691	/* allocate transmit descriptors */
3692	err = e1000e_setup_tx_resources(adapter);
3693	if (err)
3694		goto err_setup_tx;
3695
3696	/* allocate receive descriptors */
3697	err = e1000e_setup_rx_resources(adapter);
3698	if (err)
3699		goto err_setup_rx;
3700
3701	/*
3702	 * If AMT is enabled, let the firmware know that the network
3703	 * interface is now open and reset the part to a known state.
3704	 */
3705	if (adapter->flags & FLAG_HAS_AMT) {
3706		e1000e_get_hw_control(adapter);
3707		e1000e_reset(adapter);
3708	}
3709
3710	e1000e_power_up_phy(adapter);
3711
3712	adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3713	if ((adapter->hw.mng_cookie.status &
3714	     E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3715		e1000_update_mng_vlan(adapter);
3716
3717	/* DMA latency requirement to workaround early-receive/jumbo issue */
3718	if ((adapter->flags & FLAG_HAS_ERT) ||
3719	    (adapter->hw.mac.type == e1000_pch2lan))
3720		pm_qos_add_request(&adapter->netdev->pm_qos_req,
3721				   PM_QOS_CPU_DMA_LATENCY,
3722				   PM_QOS_DEFAULT_VALUE);
3723
3724	/*
3725	 * before we allocate an interrupt, we must be ready to handle it.
3726	 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3727	 * as soon as we call pci_request_irq, so we have to setup our
3728	 * clean_rx handler before we do so.
3729	 */
3730	e1000_configure(adapter);
3731
3732	err = e1000_request_irq(adapter);
3733	if (err)
3734		goto err_req_irq;
3735
3736	/*
3737	 * Work around PCIe errata with MSI interrupts causing some chipsets to
3738	 * ignore e1000e MSI messages, which means we need to test our MSI
3739	 * interrupt now
3740	 */
3741	if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
3742		err = e1000_test_msi(adapter);
3743		if (err) {
3744			e_err("Interrupt allocation failed\n");
3745			goto err_req_irq;
3746		}
3747	}
3748
3749	/* From here on the code is the same as e1000e_up() */
3750	clear_bit(__E1000_DOWN, &adapter->state);
3751
3752	napi_enable(&adapter->napi);
3753
3754	e1000_irq_enable(adapter);
3755
3756	netif_start_queue(netdev);
3757
3758	adapter->idle_check = true;
3759	pm_runtime_put(&pdev->dev);
3760
3761	/* fire a link status change interrupt to start the watchdog */
3762	if (adapter->msix_entries)
3763		ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3764	else
3765		ew32(ICS, E1000_ICS_LSC);
3766
3767	return 0;
3768
3769err_req_irq:
3770	e1000e_release_hw_control(adapter);
3771	e1000_power_down_phy(adapter);
3772	e1000e_free_rx_resources(adapter);
3773err_setup_rx:
3774	e1000e_free_tx_resources(adapter);
3775err_setup_tx:
3776	e1000e_reset(adapter);
3777	pm_runtime_put_sync(&pdev->dev);
3778
3779	return err;
3780}
3781
3782/**
3783 * e1000_close - Disables a network interface
3784 * @netdev: network interface device structure
3785 *
3786 * Returns 0, this is not allowed to fail
3787 *
3788 * The close entry point is called when an interface is de-activated
3789 * by the OS.  The hardware is still under the drivers control, but
3790 * needs to be disabled.  A global MAC reset is issued to stop the
3791 * hardware, and all transmit and receive resources are freed.
3792 **/
3793static int e1000_close(struct net_device *netdev)
3794{
3795	struct e1000_adapter *adapter = netdev_priv(netdev);
3796	struct pci_dev *pdev = adapter->pdev;
3797
3798	WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3799
3800	pm_runtime_get_sync(&pdev->dev);
3801
3802	if (!test_bit(__E1000_DOWN, &adapter->state)) {
3803		e1000e_down(adapter);
3804		e1000_free_irq(adapter);
3805	}
3806	e1000_power_down_phy(adapter);
3807
3808	e1000e_free_tx_resources(adapter);
3809	e1000e_free_rx_resources(adapter);
3810
3811	/*
3812	 * kill manageability vlan ID if supported, but not if a vlan with
3813	 * the same ID is registered on the host OS (let 8021q kill it)
3814	 */
3815	if (adapter->hw.mng_cookie.status &
3816	    E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
3817		e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3818
3819	/*
3820	 * If AMT is enabled, let the firmware know that the network
3821	 * interface is now closed
3822	 */
3823	if ((adapter->flags & FLAG_HAS_AMT) &&
3824	    !test_bit(__E1000_TESTING, &adapter->state))
3825		e1000e_release_hw_control(adapter);
3826
3827	if ((adapter->flags & FLAG_HAS_ERT) ||
3828	    (adapter->hw.mac.type == e1000_pch2lan))
3829		pm_qos_remove_request(&adapter->netdev->pm_qos_req);
3830
3831	pm_runtime_put_sync(&pdev->dev);
3832
3833	return 0;
3834}
3835/**
3836 * e1000_set_mac - Change the Ethernet Address of the NIC
3837 * @netdev: network interface device structure
3838 * @p: pointer to an address structure
3839 *
3840 * Returns 0 on success, negative on failure
3841 **/
3842static int e1000_set_mac(struct net_device *netdev, void *p)
3843{
3844	struct e1000_adapter *adapter = netdev_priv(netdev);
3845	struct sockaddr *addr = p;
3846
3847	if (!is_valid_ether_addr(addr->sa_data))
3848		return -EADDRNOTAVAIL;
3849
3850	memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3851	memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3852
3853	e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3854
3855	if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3856		/* activate the work around */
3857		e1000e_set_laa_state_82571(&adapter->hw, 1);
3858
3859		/*
3860		 * Hold a copy of the LAA in RAR[14] This is done so that
3861		 * between the time RAR[0] gets clobbered  and the time it
3862		 * gets fixed (in e1000_watchdog), the actual LAA is in one
3863		 * of the RARs and no incoming packets directed to this port
3864		 * are dropped. Eventually the LAA will be in RAR[0] and
3865		 * RAR[14]
3866		 */
3867		e1000e_rar_set(&adapter->hw,
3868			      adapter->hw.mac.addr,
3869			      adapter->hw.mac.rar_entry_count - 1);
3870	}
3871
3872	return 0;
3873}
3874
3875/**
3876 * e1000e_update_phy_task - work thread to update phy
3877 * @work: pointer to our work struct
3878 *
3879 * this worker thread exists because we must acquire a
3880 * semaphore to read the phy, which we could msleep while
3881 * waiting for it, and we can't msleep in a timer.
3882 **/
3883static void e1000e_update_phy_task(struct work_struct *work)
3884{
3885	struct e1000_adapter *adapter = container_of(work,
3886					struct e1000_adapter, update_phy_task);
3887
3888	if (test_bit(__E1000_DOWN, &adapter->state))
3889		return;
3890
3891	e1000_get_phy_info(&adapter->hw);
3892}
3893
3894/*
3895 * Need to wait a few seconds after link up to get diagnostic information from
3896 * the phy
3897 */
3898static void e1000_update_phy_info(unsigned long data)
3899{
3900	struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3901
3902	if (test_bit(__E1000_DOWN, &adapter->state))
3903		return;
3904
3905	schedule_work(&adapter->update_phy_task);
3906}
3907
3908/**
3909 * e1000e_update_phy_stats - Update the PHY statistics counters
3910 * @adapter: board private structure
3911 *
3912 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
3913 **/
3914static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
3915{
3916	struct e1000_hw *hw = &adapter->hw;
3917	s32 ret_val;
3918	u16 phy_data;
3919
3920	ret_val = hw->phy.ops.acquire(hw);
3921	if (ret_val)
3922		return;
3923
3924	/*
3925	 * A page set is expensive so check if already on desired page.
3926	 * If not, set to the page with the PHY status registers.
3927	 */
3928	hw->phy.addr = 1;
3929	ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
3930					   &phy_data);
3931	if (ret_val)
3932		goto release;
3933	if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
3934		ret_val = hw->phy.ops.set_page(hw,
3935					       HV_STATS_PAGE << IGP_PAGE_SHIFT);
3936		if (ret_val)
3937			goto release;
3938	}
3939
3940	/* Single Collision Count */
3941	hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
3942	ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
3943	if (!ret_val)
3944		adapter->stats.scc += phy_data;
3945
3946	/* Excessive Collision Count */
3947	hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
3948	ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
3949	if (!ret_val)
3950		adapter->stats.ecol += phy_data;
3951
3952	/* Multiple Collision Count */
3953	hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
3954	ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
3955	if (!ret_val)
3956		adapter->stats.mcc += phy_data;
3957
3958	/* Late Collision Count */
3959	hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
3960	ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
3961	if (!ret_val)
3962		adapter->stats.latecol += phy_data;
3963
3964	/* Collision Count - also used for adaptive IFS */
3965	hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
3966	ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
3967	if (!ret_val)
3968		hw->mac.collision_delta = phy_data;
3969
3970	/* Defer Count */
3971	hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
3972	ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
3973	if (!ret_val)
3974		adapter->stats.dc += phy_data;
3975
3976	/* Transmit with no CRS */
3977	hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
3978	ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
3979	if (!ret_val)
3980		adapter->stats.tncrs += phy_data;
3981
3982release:
3983	hw->phy.ops.release(hw);
3984}
3985
3986/**
3987 * e1000e_update_stats - Update the board statistics counters
3988 * @adapter: board private structure
3989 **/
3990static void e1000e_update_stats(struct e1000_adapter *adapter)
3991{
3992	struct net_device *netdev = adapter->netdev;
3993	struct e1000_hw *hw = &adapter->hw;
3994	struct pci_dev *pdev = adapter->pdev;
3995
3996	/*
3997	 * Prevent stats update while adapter is being reset, or if the pci
3998	 * connection is down.
3999	 */
4000	if (adapter->link_speed == 0)
4001		return;
4002	if (pci_channel_offline(pdev))
4003		return;
4004
4005	adapter->stats.crcerrs += er32(CRCERRS);
4006	adapter->stats.gprc += er32(GPRC);
4007	adapter->stats.gorc += er32(GORCL);
4008	er32(GORCH); /* Clear gorc */
4009	adapter->stats.bprc += er32(BPRC);
4010	adapter->stats.mprc += er32(MPRC);
4011	adapter->stats.roc += er32(ROC);
4012
4013	adapter->stats.mpc += er32(MPC);
4014
4015	/* Half-duplex statistics */
4016	if (adapter->link_duplex == HALF_DUPLEX) {
4017		if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4018			e1000e_update_phy_stats(adapter);
4019		} else {
4020			adapter->stats.scc += er32(SCC);
4021			adapter->stats.ecol += er32(ECOL);
4022			adapter->stats.mcc += er32(MCC);
4023			adapter->stats.latecol += er32(LATECOL);
4024			adapter->stats.dc += er32(DC);
4025
4026			hw->mac.collision_delta = er32(COLC);
4027
4028			if ((hw->mac.type != e1000_82574) &&
4029			    (hw->mac.type != e1000_82583))
4030				adapter->stats.tncrs += er32(TNCRS);
4031		}
4032		adapter->stats.colc += hw->mac.collision_delta;
4033	}
4034
4035	adapter->stats.xonrxc += er32(XONRXC);
4036	adapter->stats.xontxc += er32(XONTXC);
4037	adapter->stats.xoffrxc += er32(XOFFRXC);
4038	adapter->stats.xofftxc += er32(XOFFTXC);
4039	adapter->stats.gptc += er32(GPTC);
4040	adapter->stats.gotc += er32(GOTCL);
4041	er32(GOTCH); /* Clear gotc */
4042	adapter->stats.rnbc += er32(RNBC);
4043	adapter->stats.ruc += er32(RUC);
4044
4045	adapter->stats.mptc += er32(MPTC);
4046	adapter->stats.bptc += er32(BPTC);
4047
4048	/* used for adaptive IFS */
4049
4050	hw->mac.tx_packet_delta = er32(TPT);
4051	adapter->stats.tpt += hw->mac.tx_packet_delta;
4052
4053	adapter->stats.algnerrc += er32(ALGNERRC);
4054	adapter->stats.rxerrc += er32(RXERRC);
4055	adapter->stats.cexterr += er32(CEXTERR);
4056	adapter->stats.tsctc += er32(TSCTC);
4057	adapter->stats.tsctfc += er32(TSCTFC);
4058
4059	/* Fill out the OS statistics structure */
4060	netdev->stats.multicast = adapter->stats.mprc;
4061	netdev->stats.collisions = adapter->stats.colc;
4062
4063	/* Rx Errors */
4064
4065	/*
4066	 * RLEC on some newer hardware can be incorrect so build
4067	 * our own version based on RUC and ROC
4068	 */
4069	netdev->stats.rx_errors = adapter->stats.rxerrc +
4070		adapter->stats.crcerrs + adapter->stats.algnerrc +
4071		adapter->stats.ruc + adapter->stats.roc +
4072		adapter->stats.cexterr;
4073	netdev->stats.rx_length_errors = adapter->stats.ruc +
4074					      adapter->stats.roc;
4075	netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4076	netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4077	netdev->stats.rx_missed_errors = adapter->stats.mpc;
4078
4079	/* Tx Errors */
4080	netdev->stats.tx_errors = adapter->stats.ecol +
4081				       adapter->stats.latecol;
4082	netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4083	netdev->stats.tx_window_errors = adapter->stats.latecol;
4084	netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4085
4086	/* Tx Dropped needs to be maintained elsewhere */
4087
4088	/* Management Stats */
4089	adapter->stats.mgptc += er32(MGTPTC);
4090	adapter->stats.mgprc += er32(MGTPRC);
4091	adapter->stats.mgpdc += er32(MGTPDC);
4092}
4093
4094/**
4095 * e1000_phy_read_status - Update the PHY register status snapshot
4096 * @adapter: board private structure
4097 **/
4098static void e1000_phy_read_status(struct e1000_adapter *adapter)
4099{
4100	struct e1000_hw *hw = &adapter->hw;
4101	struct e1000_phy_regs *phy = &adapter->phy_regs;
4102
4103	if ((er32(STATUS) & E1000_STATUS_LU) &&
4104	    (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4105		int ret_val;
4106
4107		ret_val  = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4108		ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4109		ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4110		ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4111		ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4112		ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4113		ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4114		ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4115		if (ret_val)
4116			e_warn("Error reading PHY register\n");
4117	} else {
4118		/*
4119		 * Do not read PHY registers if link is not up
4120		 * Set values to typical power-on defaults
4121		 */
4122		phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4123		phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4124			     BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4125			     BMSR_ERCAP);
4126		phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4127				  ADVERTISE_ALL | ADVERTISE_CSMA);
4128		phy->lpa = 0;
4129		phy->expansion = EXPANSION_ENABLENPAGE;
4130		phy->ctrl1000 = ADVERTISE_1000FULL;
4131		phy->stat1000 = 0;
4132		phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4133	}
4134}
4135
4136static void e1000_print_link_info(struct e1000_adapter *adapter)
4137{
4138	struct e1000_hw *hw = &adapter->hw;
4139	u32 ctrl = er32(CTRL);
4140
4141	/* Link status message must follow this format for user tools */
4142	printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
4143	       "Flow Control: %s\n",
4144	       adapter->netdev->name,
4145	       adapter->link_speed,
4146	       (adapter->link_duplex == FULL_DUPLEX) ?
4147	       "Full Duplex" : "Half Duplex",
4148	       ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
4149	       "Rx/Tx" :
4150	       ((ctrl & E1000_CTRL_RFCE) ? "Rx" :
4151		((ctrl & E1000_CTRL_TFCE) ? "Tx" : "None")));
4152}
4153
4154static bool e1000e_has_link(struct e1000_adapter *adapter)
4155{
4156	struct e1000_hw *hw = &adapter->hw;
4157	bool link_active = 0;
4158	s32 ret_val = 0;
4159
4160	/*
4161	 * get_link_status is set on LSC (link status) interrupt or
4162	 * Rx sequence error interrupt.  get_link_status will stay
4163	 * false until the check_for_link establishes link
4164	 * for copper adapters ONLY
4165	 */
4166	switch (hw->phy.media_type) {
4167	case e1000_media_type_copper:
4168		if (hw->mac.get_link_status) {
4169			ret_val = hw->mac.ops.check_for_link(hw);
4170			link_active = !hw->mac.get_link_status;
4171		} else {
4172			link_active = 1;
4173		}
4174		break;
4175	case e1000_media_type_fiber:
4176		ret_val = hw->mac.ops.check_for_link(hw);
4177		link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4178		break;
4179	case e1000_media_type_internal_serdes:
4180		ret_val = hw->mac.ops.check_for_link(hw);
4181		link_active = adapter->hw.mac.serdes_has_link;
4182		break;
4183	default:
4184	case e1000_media_type_unknown:
4185		break;
4186	}
4187
4188	if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4189	    (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4190		/* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4191		e_info("Gigabit has been disabled, downgrading speed\n");
4192	}
4193
4194	return link_active;
4195}
4196
4197static void e1000e_enable_receives(struct e1000_adapter *adapter)
4198{
4199	/* make sure the receive unit is started */
4200	if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4201	    (adapter->flags & FLAG_RX_RESTART_NOW)) {
4202		struct e1000_hw *hw = &adapter->hw;
4203		u32 rctl = er32(RCTL);
4204		ew32(RCTL, rctl | E1000_RCTL_EN);
4205		adapter->flags &= ~FLAG_RX_RESTART_NOW;
4206	}
4207}
4208
4209static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4210{
4211	struct e1000_hw *hw = &adapter->hw;
4212
4213	/*
4214	 * With 82574 controllers, PHY needs to be checked periodically
4215	 * for hung state and reset, if two calls return true
4216	 */
4217	if (e1000_check_phy_82574(hw))
4218		adapter->phy_hang_count++;
4219	else
4220		adapter->phy_hang_count = 0;
4221
4222	if (adapter->phy_hang_count > 1) {
4223		adapter->phy_hang_count = 0;
4224		schedule_work(&adapter->reset_task);
4225	}
4226}
4227
4228/**
4229 * e1000_watchdog - Timer Call-back
4230 * @data: pointer to adapter cast into an unsigned long
4231 **/
4232static void e1000_watchdog(unsigned long data)
4233{
4234	struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4235
4236	/* Do the rest outside of interrupt context */
4237	schedule_work(&adapter->watchdog_task);
4238
4239	/* TODO: make this use queue_delayed_work() */
4240}
4241
4242static void e1000_watchdog_task(struct work_struct *work)
4243{
4244	struct e1000_adapter *adapter = container_of(work,
4245					struct e1000_adapter, watchdog_task);
4246	struct net_device *netdev = adapter->netdev;
4247	struct e1000_mac_info *mac = &adapter->hw.mac;
4248	struct e1000_phy_info *phy = &adapter->hw.phy;
4249	struct e1000_ring *tx_ring = adapter->tx_ring;
4250	struct e1000_hw *hw = &adapter->hw;
4251	u32 link, tctl;
4252
4253	if (test_bit(__E1000_DOWN, &adapter->state))
4254		return;
4255
4256	link = e1000e_has_link(adapter);
4257	if ((netif_carrier_ok(netdev)) && link) {
4258		/* Cancel scheduled suspend requests. */
4259		pm_runtime_resume(netdev->dev.parent);
4260
4261		e1000e_enable_receives(adapter);
4262		goto link_up;
4263	}
4264
4265	if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4266	    (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4267		e1000_update_mng_vlan(adapter);
4268
4269	if (link) {
4270		if (!netif_carrier_ok(netdev)) {
4271			bool txb2b = 1;
4272
4273			/* Cancel scheduled suspend requests. */
4274			pm_runtime_resume(netdev->dev.parent);
4275
4276			/* update snapshot of PHY registers on LSC */
4277			e1000_phy_read_status(adapter);
4278			mac->ops.get_link_up_info(&adapter->hw,
4279						   &adapter->link_speed,
4280						   &adapter->link_duplex);
4281			e1000_print_link_info(adapter);
4282			/*
4283			 * On supported PHYs, check for duplex mismatch only
4284			 * if link has autonegotiated at 10/100 half
4285			 */
4286			if ((hw->phy.type == e1000_phy_igp_3 ||
4287			     hw->phy.type == e1000_phy_bm) &&
4288			    (hw->mac.autoneg == true) &&
4289			    (adapter->link_speed == SPEED_10 ||
4290			     adapter->link_speed == SPEED_100) &&
4291			    (adapter->link_duplex == HALF_DUPLEX)) {
4292				u16 autoneg_exp;
4293
4294				e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4295
4296				if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4297					e_info("Autonegotiated half duplex but"
4298					       " link partner cannot autoneg. "
4299					       " Try forcing full duplex if "
4300					       "link gets many collisions.\n");
4301			}
4302
4303			/* adjust timeout factor according to speed/duplex */
4304			adapter->tx_timeout_factor = 1;
4305			switch (adapter->link_speed) {
4306			case SPEED_10:
4307				txb2b = 0;
4308				adapter->tx_timeout_factor = 16;
4309				break;
4310			case SPEED_100:
4311				txb2b = 0;
4312				adapter->tx_timeout_factor = 10;
4313				break;
4314			}
4315
4316			/*
4317			 * workaround: re-program speed mode bit after
4318			 * link-up event
4319			 */
4320			if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4321			    !txb2b) {
4322				u32 tarc0;
4323				tarc0 = er32(TARC(0));
4324				tarc0 &= ~SPEED_MODE_BIT;
4325				ew32(TARC(0), tarc0);
4326			}
4327
4328			/*
4329			 * disable TSO for pcie and 10/100 speeds, to avoid
4330			 * some hardware issues
4331			 */
4332			if (!(adapter->flags & FLAG_TSO_FORCE)) {
4333				switch (adapter->link_speed) {
4334				case SPEED_10:
4335				case SPEED_100:
4336					e_info("10/100 speed: disabling TSO\n");
4337					netdev->features &= ~NETIF_F_TSO;
4338					netdev->features &= ~NETIF_F_TSO6;
4339					break;
4340				case SPEED_1000:
4341					netdev->features |= NETIF_F_TSO;
4342					netdev->features |= NETIF_F_TSO6;
4343					break;
4344				default:
4345					/* oops */
4346					break;
4347				}
4348			}
4349
4350			/*
4351			 * enable transmits in the hardware, need to do this
4352			 * after setting TARC(0)
4353			 */
4354			tctl = er32(TCTL);
4355			tctl |= E1000_TCTL_EN;
4356			ew32(TCTL, tctl);
4357
4358                        /*
4359			 * Perform any post-link-up configuration before
4360			 * reporting link up.
4361			 */
4362			if (phy->ops.cfg_on_link_up)
4363				phy->ops.cfg_on_link_up(hw);
4364
4365			netif_carrier_on(netdev);
4366
4367			if (!test_bit(__E1000_DOWN, &adapter->state))
4368				mod_timer(&adapter->phy_info_timer,
4369					  round_jiffies(jiffies + 2 * HZ));
4370		}
4371	} else {
4372		if (netif_carrier_ok(netdev)) {
4373			adapter->link_speed = 0;
4374			adapter->link_duplex = 0;
4375			/* Link status message must follow this format */
4376			printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4377			       adapter->netdev->name);
4378			netif_carrier_off(netdev);
4379			if (!test_bit(__E1000_DOWN, &adapter->state))
4380				mod_timer(&adapter->phy_info_timer,
4381					  round_jiffies(jiffies + 2 * HZ));
4382
4383			if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4384				schedule_work(&adapter->reset_task);
4385			else
4386				pm_schedule_suspend(netdev->dev.parent,
4387							LINK_TIMEOUT);
4388		}
4389	}
4390
4391link_up:
4392	spin_lock(&adapter->stats64_lock);
4393	e1000e_update_stats(adapter);
4394
4395	mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4396	adapter->tpt_old = adapter->stats.tpt;
4397	mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4398	adapter->colc_old = adapter->stats.colc;
4399
4400	adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4401	adapter->gorc_old = adapter->stats.gorc;
4402	adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4403	adapter->gotc_old = adapter->stats.gotc;
4404	spin_unlock(&adapter->stats64_lock);
4405
4406	e1000e_update_adaptive(&adapter->hw);
4407
4408	if (!netif_carrier_ok(netdev) &&
4409	    (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4410		/*
4411		 * We've lost link, so the controller stops DMA,
4412		 * but we've got queued Tx work that's never going
4413		 * to get done, so reset controller to flush Tx.
4414		 * (Do the reset outside of interrupt context).
4415		 */
4416		schedule_work(&adapter->reset_task);
4417		/* return immediately since reset is imminent */
4418		return;
4419	}
4420
4421	/* Simple mode for Interrupt Throttle Rate (ITR) */
4422	if (adapter->itr_setting == 4) {
4423		/*
4424		 * Symmetric Tx/Rx gets a reduced ITR=2000;
4425		 * Total asymmetrical Tx or Rx gets ITR=8000;
4426		 * everyone else is between 2000-8000.
4427		 */
4428		u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4429		u32 dif = (adapter->gotc > adapter->gorc ?
4430			    adapter->gotc - adapter->gorc :
4431			    adapter->gorc - adapter->gotc) / 10000;
4432		u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4433
4434		ew32(ITR, 1000000000 / (itr * 256));
4435	}
4436
4437	/* Cause software interrupt to ensure Rx ring is cleaned */
4438	if (adapter->msix_entries)
4439		ew32(ICS, adapter->rx_ring->ims_val);
4440	else
4441		ew32(ICS, E1000_ICS_RXDMT0);
4442
4443	/* flush pending descriptors to memory before detecting Tx hang */
4444	e1000e_flush_descriptors(adapter);
4445
4446	/* Force detection of hung controller every watchdog period */
4447	adapter->detect_tx_hung = 1;
4448
4449	/*
4450	 * With 82571 controllers, LAA may be overwritten due to controller
4451	 * reset from the other port. Set the appropriate LAA in RAR[0]
4452	 */
4453	if (e1000e_get_laa_state_82571(hw))
4454		e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4455
4456	if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4457		e1000e_check_82574_phy_workaround(adapter);
4458
4459	/* Reset the timer */
4460	if (!test_bit(__E1000_DOWN, &adapter->state))
4461		mod_timer(&adapter->watchdog_timer,
4462			  round_jiffies(jiffies + 2 * HZ));
4463}
4464
4465#define E1000_TX_FLAGS_CSUM		0x00000001
4466#define E1000_TX_FLAGS_VLAN		0x00000002
4467#define E1000_TX_FLAGS_TSO		0x00000004
4468#define E1000_TX_FLAGS_IPV4		0x00000008
4469#define E1000_TX_FLAGS_VLAN_MASK	0xffff0000
4470#define E1000_TX_FLAGS_VLAN_SHIFT	16
4471
4472static int e1000_tso(struct e1000_adapter *adapter,
4473		     struct sk_buff *skb)
4474{
4475	struct e1000_ring *tx_ring = adapter->tx_ring;
4476	struct e1000_context_desc *context_desc;
4477	struct e1000_buffer *buffer_info;
4478	unsigned int i;
4479	u32 cmd_length = 0;
4480	u16 ipcse = 0, tucse, mss;
4481	u8 ipcss, ipcso, tucss, tucso, hdr_len;
4482
4483	if (!skb_is_gso(skb))
4484		return 0;
4485
4486	if (skb_header_cloned(skb)) {
4487		int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4488
4489		if (err)
4490			return err;
4491	}
4492
4493	hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4494	mss = skb_shinfo(skb)->gso_size;
4495	if (skb->protocol == htons(ETH_P_IP)) {
4496		struct iphdr *iph = ip_hdr(skb);
4497		iph->tot_len = 0;
4498		iph->check = 0;
4499		tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4500		                                         0, IPPROTO_TCP, 0);
4501		cmd_length = E1000_TXD_CMD_IP;
4502		ipcse = skb_transport_offset(skb) - 1;
4503	} else if (skb_is_gso_v6(skb)) {
4504		ipv6_hdr(skb)->payload_len = 0;
4505		tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4506		                                       &ipv6_hdr(skb)->daddr,
4507		                                       0, IPPROTO_TCP, 0);
4508		ipcse = 0;
4509	}
4510	ipcss = skb_network_offset(skb);
4511	ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4512	tucss = skb_transport_offset(skb);
4513	tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4514	tucse = 0;
4515
4516	cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4517	               E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4518
4519	i = tx_ring->next_to_use;
4520	context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4521	buffer_info = &tx_ring->buffer_info[i];
4522
4523	context_desc->lower_setup.ip_fields.ipcss  = ipcss;
4524	context_desc->lower_setup.ip_fields.ipcso  = ipcso;
4525	context_desc->lower_setup.ip_fields.ipcse  = cpu_to_le16(ipcse);
4526	context_desc->upper_setup.tcp_fields.tucss = tucss;
4527	context_desc->upper_setup.tcp_fields.tucso = tucso;
4528	context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4529	context_desc->tcp_seg_setup.fields.mss     = cpu_to_le16(mss);
4530	context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4531	context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4532
4533	buffer_info->time_stamp = jiffies;
4534	buffer_info->next_to_watch = i;
4535
4536	i++;
4537	if (i == tx_ring->count)
4538		i = 0;
4539	tx_ring->next_to_use = i;
4540
4541	return 1;
4542}
4543
4544static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4545{
4546	struct e1000_ring *tx_ring = adapter->tx_ring;
4547	struct e1000_context_desc *context_desc;
4548	struct e1000_buffer *buffer_info;
4549	unsigned int i;
4550	u8 css;
4551	u32 cmd_len = E1000_TXD_CMD_DEXT;
4552	__be16 protocol;
4553
4554	if (skb->ip_summed != CHECKSUM_PARTIAL)
4555		return 0;
4556
4557	if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4558		protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4559	else
4560		protocol = skb->protocol;
4561
4562	switch (protocol) {
4563	case cpu_to_be16(ETH_P_IP):
4564		if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4565			cmd_len |= E1000_TXD_CMD_TCP;
4566		break;
4567	case cpu_to_be16(ETH_P_IPV6):
4568		/* XXX not handling all IPV6 headers */
4569		if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4570			cmd_len |= E1000_TXD_CMD_TCP;
4571		break;
4572	default:
4573		if (unlikely(net_ratelimit()))
4574			e_warn("checksum_partial proto=%x!\n",
4575			       be16_to_cpu(protocol));
4576		break;
4577	}
4578
4579	css = skb_checksum_start_offset(skb);
4580
4581	i = tx_ring->next_to_use;
4582	buffer_info = &tx_ring->buffer_info[i];
4583	context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4584
4585	context_desc->lower_setup.ip_config = 0;
4586	context_desc->upper_setup.tcp_fields.tucss = css;
4587	context_desc->upper_setup.tcp_fields.tucso =
4588				css + skb->csum_offset;
4589	context_desc->upper_setup.tcp_fields.tucse = 0;
4590	context_desc->tcp_seg_setup.data = 0;
4591	context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4592
4593	buffer_info->time_stamp = jiffies;
4594	buffer_info->next_to_watch = i;
4595
4596	i++;
4597	if (i == tx_ring->count)
4598		i = 0;
4599	tx_ring->next_to_use = i;
4600
4601	return 1;
4602}
4603
4604#define E1000_MAX_PER_TXD	8192
4605#define E1000_MAX_TXD_PWR	12
4606
4607static int e1000_tx_map(struct e1000_adapter *adapter,
4608			struct sk_buff *skb, unsigned int first,
4609			unsigned int max_per_txd, unsigned int nr_frags,
4610			unsigned int mss)
4611{
4612	struct e1000_ring *tx_ring = adapter->tx_ring;
4613	struct pci_dev *pdev = adapter->pdev;
4614	struct e1000_buffer *buffer_info;
4615	unsigned int len = skb_headlen(skb);
4616	unsigned int offset = 0, size, count = 0, i;
4617	unsigned int f, bytecount, segs;
4618
4619	i = tx_ring->next_to_use;
4620
4621	while (len) {
4622		buffer_info = &tx_ring->buffer_info[i];
4623		size = min(len, max_per_txd);
4624
4625		buffer_info->length = size;
4626		buffer_info->time_stamp = jiffies;
4627		buffer_info->next_to_watch = i;
4628		buffer_info->dma = dma_map_single(&pdev->dev,
4629						  skb->data + offset,
4630						  size, DMA_TO_DEVICE);
4631		buffer_info->mapped_as_page = false;
4632		if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4633			goto dma_error;
4634
4635		len -= size;
4636		offset += size;
4637		count++;
4638
4639		if (len) {
4640			i++;
4641			if (i == tx_ring->count)
4642				i = 0;
4643		}
4644	}
4645
4646	for (f = 0; f < nr_frags; f++) {
4647		struct skb_frag_struct *frag;
4648
4649		frag = &skb_shinfo(skb)->frags[f];
4650		len = frag->size;
4651		offset = frag->page_offset;
4652
4653		while (len) {
4654			i++;
4655			if (i == tx_ring->count)
4656				i = 0;
4657
4658			buffer_info = &tx_ring->buffer_info[i];
4659			size = min(len, max_per_txd);
4660
4661			buffer_info->length = size;
4662			buffer_info->time_stamp = jiffies;
4663			buffer_info->next_to_watch = i;
4664			buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
4665							offset, size,
4666							DMA_TO_DEVICE);
4667			buffer_info->mapped_as_page = true;
4668			if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4669				goto dma_error;
4670
4671			len -= size;
4672			offset += size;
4673			count++;
4674		}
4675	}
4676
4677	segs = skb_shinfo(skb)->gso_segs ? : 1;
4678	/* multiply data chunks by size of headers */
4679	bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4680
4681	tx_ring->buffer_info[i].skb = skb;
4682	tx_ring->buffer_info[i].segs = segs;
4683	tx_ring->buffer_info[i].bytecount = bytecount;
4684	tx_ring->buffer_info[first].next_to_watch = i;
4685
4686	return count;
4687
4688dma_error:
4689	dev_err(&pdev->dev, "Tx DMA map failed\n");
4690	buffer_info->dma = 0;
4691	if (count)
4692		count--;
4693
4694	while (count--) {
4695		if (i == 0)
4696			i += tx_ring->count;
4697		i--;
4698		buffer_info = &tx_ring->buffer_info[i];
4699		e1000_put_txbuf(adapter, buffer_info);
4700	}
4701
4702	return 0;
4703}
4704
4705static void e1000_tx_queue(struct e1000_adapter *adapter,
4706			   int tx_flags, int count)
4707{
4708	struct e1000_ring *tx_ring = adapter->tx_ring;
4709	struct e1000_tx_desc *tx_desc = NULL;
4710	struct e1000_buffer *buffer_info;
4711	u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4712	unsigned int i;
4713
4714	if (tx_flags & E1000_TX_FLAGS_TSO) {
4715		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4716			     E1000_TXD_CMD_TSE;
4717		txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4718
4719		if (tx_flags & E1000_TX_FLAGS_IPV4)
4720			txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4721	}
4722
4723	if (tx_flags & E1000_TX_FLAGS_CSUM) {
4724		txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4725		txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4726	}
4727
4728	if (tx_flags & E1000_TX_FLAGS_VLAN) {
4729		txd_lower |= E1000_TXD_CMD_VLE;
4730		txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4731	}
4732
4733	i = tx_ring->next_to_use;
4734
4735	do {
4736		buffer_info = &tx_ring->buffer_info[i];
4737		tx_desc = E1000_TX_DESC(*tx_ring, i);
4738		tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4739		tx_desc->lower.data =
4740			cpu_to_le32(txd_lower | buffer_info->length);
4741		tx_desc->upper.data = cpu_to_le32(txd_upper);
4742
4743		i++;
4744		if (i == tx_ring->count)
4745			i = 0;
4746	} while (--count > 0);
4747
4748	tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4749
4750	/*
4751	 * Force memory writes to complete before letting h/w
4752	 * know there are new descriptors to fetch.  (Only
4753	 * applicable for weak-ordered memory model archs,
4754	 * such as IA-64).
4755	 */
4756	wmb();
4757
4758	tx_ring->next_to_use = i;
4759
4760	if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
4761		e1000e_update_tdt_wa(adapter, i);
4762	else
4763		writel(i, adapter->hw.hw_addr + tx_ring->tail);
4764
4765	/*
4766	 * we need this if more than one processor can write to our tail
4767	 * at a time, it synchronizes IO on IA64/Altix systems
4768	 */
4769	mmiowb();
4770}
4771
4772#define MINIMUM_DHCP_PACKET_SIZE 282
4773static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4774				    struct sk_buff *skb)
4775{
4776	struct e1000_hw *hw =  &adapter->hw;
4777	u16 length, offset;
4778
4779	if (vlan_tx_tag_present(skb)) {
4780		if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4781		    (adapter->hw.mng_cookie.status &
4782			E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4783			return 0;
4784	}
4785
4786	if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4787		return 0;
4788
4789	if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4790		return 0;
4791
4792	{
4793		const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4794		struct udphdr *udp;
4795
4796		if (ip->protocol != IPPROTO_UDP)
4797			return 0;
4798
4799		udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4800		if (ntohs(udp->dest) != 67)
4801			return 0;
4802
4803		offset = (u8 *)udp + 8 - skb->data;
4804		length = skb->len - offset;
4805		return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4806	}
4807
4808	return 0;
4809}
4810
4811static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4812{
4813	struct e1000_adapter *adapter = netdev_priv(netdev);
4814
4815	netif_stop_queue(netdev);
4816	/*
4817	 * Herbert's original patch had:
4818	 *  smp_mb__after_netif_stop_queue();
4819	 * but since that doesn't exist yet, just open code it.
4820	 */
4821	smp_mb();
4822
4823	/*
4824	 * We need to check again in a case another CPU has just
4825	 * made room available.
4826	 */
4827	if (e1000_desc_unused(adapter->tx_ring) < size)
4828		return -EBUSY;
4829
4830	/* A reprieve! */
4831	netif_start_queue(netdev);
4832	++adapter->restart_queue;
4833	return 0;
4834}
4835
4836static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4837{
4838	struct e1000_adapter *adapter = netdev_priv(netdev);
4839
4840	if (e1000_desc_unused(adapter->tx_ring) >= size)
4841		return 0;
4842	return __e1000_maybe_stop_tx(netdev, size);
4843}
4844
4845#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
4846static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4847				    struct net_device *netdev)
4848{
4849	struct e1000_adapter *adapter = netdev_priv(netdev);
4850	struct e1000_ring *tx_ring = adapter->tx_ring;
4851	unsigned int first;
4852	unsigned int max_per_txd = E1000_MAX_PER_TXD;
4853	unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4854	unsigned int tx_flags = 0;
4855	unsigned int len = skb_headlen(skb);
4856	unsigned int nr_frags;
4857	unsigned int mss;
4858	int count = 0;
4859	int tso;
4860	unsigned int f;
4861
4862	if (test_bit(__E1000_DOWN, &adapter->state)) {
4863		dev_kfree_skb_any(skb);
4864		return NETDEV_TX_OK;
4865	}
4866
4867	if (skb->len <= 0) {
4868		dev_kfree_skb_any(skb);
4869		return NETDEV_TX_OK;
4870	}
4871
4872	mss = skb_shinfo(skb)->gso_size;
4873	/*
4874	 * The controller does a simple calculation to
4875	 * make sure there is enough room in the FIFO before
4876	 * initiating the DMA for each buffer.  The calc is:
4877	 * 4 = ceil(buffer len/mss).  To make sure we don't
4878	 * overrun the FIFO, adjust the max buffer len if mss
4879	 * drops.
4880	 */
4881	if (mss) {
4882		u8 hdr_len;
4883		max_per_txd = min(mss << 2, max_per_txd);
4884		max_txd_pwr = fls(max_per_txd) - 1;
4885
4886		/*
4887		 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4888		 * points to just header, pull a few bytes of payload from
4889		 * frags into skb->data
4890		 */
4891		hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4892		/*
4893		 * we do this workaround for ES2LAN, but it is un-necessary,
4894		 * avoiding it could save a lot of cycles
4895		 */
4896		if (skb->data_len && (hdr_len == len)) {
4897			unsigned int pull_size;
4898
4899			pull_size = min((unsigned int)4, skb->data_len);
4900			if (!__pskb_pull_tail(skb, pull_size)) {
4901				e_err("__pskb_pull_tail failed.\n");
4902				dev_kfree_skb_any(skb);
4903				return NETDEV_TX_OK;
4904			}
4905			len = skb_headlen(skb);
4906		}
4907	}
4908
4909	/* reserve a descriptor for the offload context */
4910	if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4911		count++;
4912	count++;
4913
4914	count += TXD_USE_COUNT(len, max_txd_pwr);
4915
4916	nr_frags = skb_shinfo(skb)->nr_frags;
4917	for (f = 0; f < nr_frags; f++)
4918		count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4919				       max_txd_pwr);
4920
4921	if (adapter->hw.mac.tx_pkt_filtering)
4922		e1000_transfer_dhcp_info(adapter, skb);
4923
4924	/*
4925	 * need: count + 2 desc gap to keep tail from touching
4926	 * head, otherwise try next time
4927	 */
4928	if (e1000_maybe_stop_tx(netdev, count + 2))
4929		return NETDEV_TX_BUSY;
4930
4931	if (vlan_tx_tag_present(skb)) {
4932		tx_flags |= E1000_TX_FLAGS_VLAN;
4933		tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4934	}
4935
4936	first = tx_ring->next_to_use;
4937
4938	tso = e1000_tso(adapter, skb);
4939	if (tso < 0) {
4940		dev_kfree_skb_any(skb);
4941		return NETDEV_TX_OK;
4942	}
4943
4944	if (tso)
4945		tx_flags |= E1000_TX_FLAGS_TSO;
4946	else if (e1000_tx_csum(adapter, skb))
4947		tx_flags |= E1000_TX_FLAGS_CSUM;
4948
4949	/*
4950	 * Old method was to assume IPv4 packet by default if TSO was enabled.
4951	 * 82571 hardware supports TSO capabilities for IPv6 as well...
4952	 * no longer assume, we must.
4953	 */
4954	if (skb->protocol == htons(ETH_P_IP))
4955		tx_flags |= E1000_TX_FLAGS_IPV4;
4956
4957	/* if count is 0 then mapping error has occurred */
4958	count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
4959	if (count) {
4960		e1000_tx_queue(adapter, tx_flags, count);
4961		/* Make sure there is space in the ring for the next send. */
4962		e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4963
4964	} else {
4965		dev_kfree_skb_any(skb);
4966		tx_ring->buffer_info[first].time_stamp = 0;
4967		tx_ring->next_to_use = first;
4968	}
4969
4970	return NETDEV_TX_OK;
4971}
4972
4973/**
4974 * e1000_tx_timeout - Respond to a Tx Hang
4975 * @netdev: network interface device structure
4976 **/
4977static void e1000_tx_timeout(struct net_device *netdev)
4978{
4979	struct e1000_adapter *adapter = netdev_priv(netdev);
4980
4981	/* Do the reset outside of interrupt context */
4982	adapter->tx_timeout_count++;
4983	schedule_work(&adapter->reset_task);
4984}
4985
4986static void e1000_reset_task(struct work_struct *work)
4987{
4988	struct e1000_adapter *adapter;
4989	adapter = container_of(work, struct e1000_adapter, reset_task);
4990
4991	/* don't run the task if already down */
4992	if (test_bit(__E1000_DOWN, &adapter->state))
4993		return;
4994
4995	if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4996	      (adapter->flags & FLAG_RX_RESTART_NOW))) {
4997		e1000e_dump(adapter);
4998		e_err("Reset adapter\n");
4999	}
5000	e1000e_reinit_locked(adapter);
5001}
5002
5003/**
5004 * e1000_get_stats64 - Get System Network Statistics
5005 * @netdev: network interface device structure
5006 * @stats: rtnl_link_stats64 pointer
5007 *
5008 * Returns the address of the device statistics structure.
5009 **/
5010struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5011                                             struct rtnl_link_stats64 *stats)
5012{
5013	struct e1000_adapter *adapter = netdev_priv(netdev);
5014
5015	memset(stats, 0, sizeof(struct rtnl_link_stats64));
5016	spin_lock(&adapter->stats64_lock);
5017	e1000e_update_stats(adapter);
5018	/* Fill out the OS statistics structure */
5019	stats->rx_bytes = adapter->stats.gorc;
5020	stats->rx_packets = adapter->stats.gprc;
5021	stats->tx_bytes = adapter->stats.gotc;
5022	stats->tx_packets = adapter->stats.gptc;
5023	stats->multicast = adapter->stats.mprc;
5024	stats->collisions = adapter->stats.colc;
5025
5026	/* Rx Errors */
5027
5028	/*
5029	 * RLEC on some newer hardware can be incorrect so build
5030	 * our own version based on RUC and ROC
5031	 */
5032	stats->rx_errors = adapter->stats.rxerrc +
5033		adapter->stats.crcerrs + adapter->stats.algnerrc +
5034		adapter->stats.ruc + adapter->stats.roc +
5035		adapter->stats.cexterr;
5036	stats->rx_length_errors = adapter->stats.ruc +
5037					      adapter->stats.roc;
5038	stats->rx_crc_errors = adapter->stats.crcerrs;
5039	stats->rx_frame_errors = adapter->stats.algnerrc;
5040	stats->rx_missed_errors = adapter->stats.mpc;
5041
5042	/* Tx Errors */
5043	stats->tx_errors = adapter->stats.ecol +
5044				       adapter->stats.latecol;
5045	stats->tx_aborted_errors = adapter->stats.ecol;
5046	stats->tx_window_errors = adapter->stats.latecol;
5047	stats->tx_carrier_errors = adapter->stats.tncrs;
5048
5049	/* Tx Dropped needs to be maintained elsewhere */
5050
5051	spin_unlock(&adapter->stats64_lock);
5052	return stats;
5053}
5054
5055/**
5056 * e1000_change_mtu - Change the Maximum Transfer Unit
5057 * @netdev: network interface device structure
5058 * @new_mtu: new value for maximum frame size
5059 *
5060 * Returns 0 on success, negative on failure
5061 **/
5062static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5063{
5064	struct e1000_adapter *adapter = netdev_priv(netdev);
5065	int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5066
5067	/* Jumbo frame support */
5068	if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5069	    !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5070		e_err("Jumbo Frames not supported.\n");
5071		return -EINVAL;
5072	}
5073
5074	/* Supported frame sizes */
5075	if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5076	    (max_frame > adapter->max_hw_frame_size)) {
5077		e_err("Unsupported MTU setting\n");
5078		return -EINVAL;
5079	}
5080
5081	/* Jumbo frame workaround on 82579 requires CRC be stripped */
5082	if ((adapter->hw.mac.type == e1000_pch2lan) &&
5083	    !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5084	    (new_mtu > ETH_DATA_LEN)) {
5085		e_err("Jumbo Frames not supported on 82579 when CRC "
5086		      "stripping is disabled.\n");
5087		return -EINVAL;
5088	}
5089
5090	/* 82573 Errata 17 */
5091	if (((adapter->hw.mac.type == e1000_82573) ||
5092	     (adapter->hw.mac.type == e1000_82574)) &&
5093	    (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
5094		adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
5095		e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
5096	}
5097
5098	while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5099		usleep_range(1000, 2000);
5100	/* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5101	adapter->max_frame_size = max_frame;
5102	e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5103	netdev->mtu = new_mtu;
5104	if (netif_running(netdev))
5105		e1000e_down(adapter);
5106
5107	/*
5108	 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5109	 * means we reserve 2 more, this pushes us to allocate from the next
5110	 * larger slab size.
5111	 * i.e. RXBUFFER_2048 --> size-4096 slab
5112	 * However with the new *_jumbo_rx* routines, jumbo receives will use
5113	 * fragmented skbs
5114	 */
5115
5116	if (max_frame <= 2048)
5117		adapter->rx_buffer_len = 2048;
5118	else
5119		adapter->rx_buffer_len = 4096;
5120
5121	/* adjust allocation if LPE protects us, and we aren't using SBP */
5122	if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5123	     (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5124		adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5125					 + ETH_FCS_LEN;
5126
5127	if (netif_running(netdev))
5128		e1000e_up(adapter);
5129	else
5130		e1000e_reset(adapter);
5131
5132	clear_bit(__E1000_RESETTING, &adapter->state);
5133
5134	return 0;
5135}
5136
5137static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5138			   int cmd)
5139{
5140	struct e1000_adapter *adapter = netdev_priv(netdev);
5141	struct mii_ioctl_data *data = if_mii(ifr);
5142
5143	if (adapter->hw.phy.media_type != e1000_media_type_copper)
5144		return -EOPNOTSUPP;
5145
5146	switch (cmd) {
5147	case SIOCGMIIPHY:
5148		data->phy_id = adapter->hw.phy.addr;
5149		break;
5150	case SIOCGMIIREG:
5151		e1000_phy_read_status(adapter);
5152
5153		switch (data->reg_num & 0x1F) {
5154		case MII_BMCR:
5155			data->val_out = adapter->phy_regs.bmcr;
5156			break;
5157		case MII_BMSR:
5158			data->val_out = adapter->phy_regs.bmsr;
5159			break;
5160		case MII_PHYSID1:
5161			data->val_out = (adapter->hw.phy.id >> 16);
5162			break;
5163		case MII_PHYSID2:
5164			data->val_out = (adapter->hw.phy.id & 0xFFFF);
5165			break;
5166		case MII_ADVERTISE:
5167			data->val_out = adapter->phy_regs.advertise;
5168			break;
5169		case MII_LPA:
5170			data->val_out = adapter->phy_regs.lpa;
5171			break;
5172		case MII_EXPANSION:
5173			data->val_out = adapter->phy_regs.expansion;
5174			break;
5175		case MII_CTRL1000:
5176			data->val_out = adapter->phy_regs.ctrl1000;
5177			break;
5178		case MII_STAT1000:
5179			data->val_out = adapter->phy_regs.stat1000;
5180			break;
5181		case MII_ESTATUS:
5182			data->val_out = adapter->phy_regs.estatus;
5183			break;
5184		default:
5185			return -EIO;
5186		}
5187		break;
5188	case SIOCSMIIREG:
5189	default:
5190		return -EOPNOTSUPP;
5191	}
5192	return 0;
5193}
5194
5195static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5196{
5197	switch (cmd) {
5198	case SIOCGMIIPHY:
5199	case SIOCGMIIREG:
5200	case SIOCSMIIREG:
5201		return e1000_mii_ioctl(netdev, ifr, cmd);
5202	default:
5203		return -EOPNOTSUPP;
5204	}
5205}
5206
5207static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5208{
5209	struct e1000_hw *hw = &adapter->hw;
5210	u32 i, mac_reg;
5211	u16 phy_reg, wuc_enable;
5212	int retval = 0;
5213
5214	/* copy MAC RARs to PHY RARs */
5215	e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5216
5217	retval = hw->phy.ops.acquire(hw);
5218	if (retval) {
5219		e_err("Could not acquire PHY\n");
5220		return retval;
5221	}
5222
5223	/* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5224	retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5225	if (retval)
5226		goto out;
5227
5228	/* copy MAC MTA to PHY MTA - only needed for pchlan */
5229	for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5230		mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5231		hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5232					   (u16)(mac_reg & 0xFFFF));
5233		hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5234					   (u16)((mac_reg >> 16) & 0xFFFF));
5235	}
5236
5237	/* configure PHY Rx Control register */
5238	hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5239	mac_reg = er32(RCTL);
5240	if (mac_reg & E1000_RCTL_UPE)
5241		phy_reg |= BM_RCTL_UPE;
5242	if (mac_reg & E1000_RCTL_MPE)
5243		phy_reg |= BM_RCTL_MPE;
5244	phy_reg &= ~(BM_RCTL_MO_MASK);
5245	if (mac_reg & E1000_RCTL_MO_3)
5246		phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5247				<< BM_RCTL_MO_SHIFT);
5248	if (mac_reg & E1000_RCTL_BAM)
5249		phy_reg |= BM_RCTL_BAM;
5250	if (mac_reg & E1000_RCTL_PMCF)
5251		phy_reg |= BM_RCTL_PMCF;
5252	mac_reg = er32(CTRL);
5253	if (mac_reg & E1000_CTRL_RFCE)
5254		phy_reg |= BM_RCTL_RFCE;
5255	hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5256
5257	/* enable PHY wakeup in MAC register */
5258	ew32(WUFC, wufc);
5259	ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5260
5261	/* configure and enable PHY wakeup in PHY registers */
5262	hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5263	hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5264
5265	/* activate PHY wakeup */
5266	wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5267	retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5268	if (retval)
5269		e_err("Could not set PHY Host Wakeup bit\n");
5270out:
5271	hw->phy.ops.release(hw);
5272
5273	return retval;
5274}
5275
5276static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5277			    bool runtime)
5278{
5279	struct net_device *netdev = pci_get_drvdata(pdev);
5280	struct e1000_adapter *adapter = netdev_priv(netdev);
5281	struct e1000_hw *hw = &adapter->hw;
5282	u32 ctrl, ctrl_ext, rctl, status;
5283	/* Runtime suspend should only enable wakeup for link changes */
5284	u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5285	int retval = 0;
5286
5287	netif_device_detach(netdev);
5288
5289	if (netif_running(netdev)) {
5290		WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5291		e1000e_down(adapter);
5292		e1000_free_irq(adapter);
5293	}
5294	e1000e_reset_interrupt_capability(adapter);
5295
5296	retval = pci_save_state(pdev);
5297	if (retval)
5298		return retval;
5299
5300	status = er32(STATUS);
5301	if (status & E1000_STATUS_LU)
5302		wufc &= ~E1000_WUFC_LNKC;
5303
5304	if (wufc) {
5305		e1000_setup_rctl(adapter);
5306		e1000_set_multi(netdev);
5307
5308		/* turn on all-multi mode if wake on multicast is enabled */
5309		if (wufc & E1000_WUFC_MC) {
5310			rctl = er32(RCTL);
5311			rctl |= E1000_RCTL_MPE;
5312			ew32(RCTL, rctl);
5313		}
5314
5315		ctrl = er32(CTRL);
5316		/* advertise wake from D3Cold */
5317		#define E1000_CTRL_ADVD3WUC 0x00100000
5318		/* phy power management enable */
5319		#define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5320		ctrl |= E1000_CTRL_ADVD3WUC;
5321		if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5322			ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5323		ew32(CTRL, ctrl);
5324
5325		if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5326		    adapter->hw.phy.media_type ==
5327		    e1000_media_type_internal_serdes) {
5328			/* keep the laser running in D3 */
5329			ctrl_ext = er32(CTRL_EXT);
5330			ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5331			ew32(CTRL_EXT, ctrl_ext);
5332		}
5333
5334		if (adapter->flags & FLAG_IS_ICH)
5335			e1000_suspend_workarounds_ich8lan(&adapter->hw);
5336
5337		/* Allow time for pending master requests to run */
5338		e1000e_disable_pcie_master(&adapter->hw);
5339
5340		if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5341			/* enable wakeup by the PHY */
5342			retval = e1000_init_phy_wakeup(adapter, wufc);
5343			if (retval)
5344				return retval;
5345		} else {
5346			/* enable wakeup by the MAC */
5347			ew32(WUFC, wufc);
5348			ew32(WUC, E1000_WUC_PME_EN);
5349		}
5350	} else {
5351		ew32(WUC, 0);
5352		ew32(WUFC, 0);
5353	}
5354
5355	*enable_wake = !!wufc;
5356
5357	/* make sure adapter isn't asleep if manageability is enabled */
5358	if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5359	    (hw->mac.ops.check_mng_mode(hw)))
5360		*enable_wake = true;
5361
5362	if (adapter->hw.phy.type == e1000_phy_igp_3)
5363		e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5364
5365	/*
5366	 * Release control of h/w to f/w.  If f/w is AMT enabled, this
5367	 * would have already happened in close and is redundant.
5368	 */
5369	e1000e_release_hw_control(adapter);
5370
5371	pci_disable_device(pdev);
5372
5373	return 0;
5374}
5375
5376static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5377{
5378	if (sleep && wake) {
5379		pci_prepare_to_sleep(pdev);
5380		return;
5381	}
5382
5383	pci_wake_from_d3(pdev, wake);
5384	pci_set_power_state(pdev, PCI_D3hot);
5385}
5386
5387static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5388                                    bool wake)
5389{
5390	struct net_device *netdev = pci_get_drvdata(pdev);
5391	struct e1000_adapter *adapter = netdev_priv(netdev);
5392
5393	/*
5394	 * The pci-e switch on some quad port adapters will report a
5395	 * correctable error when the MAC transitions from D0 to D3.  To
5396	 * prevent this we need to mask off the correctable errors on the
5397	 * downstream port of the pci-e switch.
5398	 */
5399	if (adapter->flags & FLAG_IS_QUAD_PORT) {
5400		struct pci_dev *us_dev = pdev->bus->self;
5401		int pos = pci_pcie_cap(us_dev);
5402		u16 devctl;
5403
5404		pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5405		pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5406		                      (devctl & ~PCI_EXP_DEVCTL_CERE));
5407
5408		e1000_power_off(pdev, sleep, wake);
5409
5410		pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5411	} else {
5412		e1000_power_off(pdev, sleep, wake);
5413	}
5414}
5415
5416#ifdef CONFIG_PCIEASPM
5417static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5418{
5419	pci_disable_link_state_locked(pdev, state);
5420}
5421#else
5422static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5423{
5424	int pos;
5425	u16 reg16;
5426
5427	/*
5428	 * Both device and parent should have the same ASPM setting.
5429	 * Disable ASPM in downstream component first and then upstream.
5430	 */
5431	pos = pci_pcie_cap(pdev);
5432	pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5433	reg16 &= ~state;
5434	pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5435
5436	if (!pdev->bus->self)
5437		return;
5438
5439	pos = pci_pcie_cap(pdev->bus->self);
5440	pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5441	reg16 &= ~state;
5442	pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5443}
5444#endif
5445static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5446{
5447	dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5448		 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5449		 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5450
5451	__e1000e_disable_aspm(pdev, state);
5452}
5453
5454#ifdef CONFIG_PM
5455static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5456{
5457	return !!adapter->tx_ring->buffer_info;
5458}
5459
5460static int __e1000_resume(struct pci_dev *pdev)
5461{
5462	struct net_device *netdev = pci_get_drvdata(pdev);
5463	struct e1000_adapter *adapter = netdev_priv(netdev);
5464	struct e1000_hw *hw = &adapter->hw;
5465	u16 aspm_disable_flag = 0;
5466	u32 err;
5467
5468	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5469		aspm_disable_flag = PCIE_LINK_STATE_L0S;
5470	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5471		aspm_disable_flag |= PCIE_LINK_STATE_L1;
5472	if (aspm_disable_flag)
5473		e1000e_disable_aspm(pdev, aspm_disable_flag);
5474
5475	pci_set_power_state(pdev, PCI_D0);
5476	pci_restore_state(pdev);
5477	pci_save_state(pdev);
5478
5479	e1000e_set_interrupt_capability(adapter);
5480	if (netif_running(netdev)) {
5481		err = e1000_request_irq(adapter);
5482		if (err)
5483			return err;
5484	}
5485
5486	if (hw->mac.type == e1000_pch2lan)
5487		e1000_resume_workarounds_pchlan(&adapter->hw);
5488
5489	e1000e_power_up_phy(adapter);
5490
5491	/* report the system wakeup cause from S3/S4 */
5492	if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5493		u16 phy_data;
5494
5495		e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5496		if (phy_data) {
5497			e_info("PHY Wakeup cause - %s\n",
5498				phy_data & E1000_WUS_EX ? "Unicast Packet" :
5499				phy_data & E1000_WUS_MC ? "Multicast Packet" :
5500				phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5501				phy_data & E1000_WUS_MAG ? "Magic Packet" :
5502				phy_data & E1000_WUS_LNKC ? "Link Status "
5503				" Change" : "other");
5504		}
5505		e1e_wphy(&adapter->hw, BM_WUS, ~0);
5506	} else {
5507		u32 wus = er32(WUS);
5508		if (wus) {
5509			e_info("MAC Wakeup cause - %s\n",
5510				wus & E1000_WUS_EX ? "Unicast Packet" :
5511				wus & E1000_WUS_MC ? "Multicast Packet" :
5512				wus & E1000_WUS_BC ? "Broadcast Packet" :
5513				wus & E1000_WUS_MAG ? "Magic Packet" :
5514				wus & E1000_WUS_LNKC ? "Link Status Change" :
5515				"other");
5516		}
5517		ew32(WUS, ~0);
5518	}
5519
5520	e1000e_reset(adapter);
5521
5522	e1000_init_manageability_pt(adapter);
5523
5524	if (netif_running(netdev))
5525		e1000e_up(adapter);
5526
5527	netif_device_attach(netdev);
5528
5529	/*
5530	 * If the controller has AMT, do not set DRV_LOAD until the interface
5531	 * is up.  For all other cases, let the f/w know that the h/w is now
5532	 * under the control of the driver.
5533	 */
5534	if (!(adapter->flags & FLAG_HAS_AMT))
5535		e1000e_get_hw_control(adapter);
5536
5537	return 0;
5538}
5539
5540#ifdef CONFIG_PM_SLEEP
5541static int e1000_suspend(struct device *dev)
5542{
5543	struct pci_dev *pdev = to_pci_dev(dev);
5544	int retval;
5545	bool wake;
5546
5547	retval = __e1000_shutdown(pdev, &wake, false);
5548	if (!retval)
5549		e1000_complete_shutdown(pdev, true, wake);
5550
5551	return retval;
5552}
5553
5554static int e1000_resume(struct device *dev)
5555{
5556	struct pci_dev *pdev = to_pci_dev(dev);
5557	struct net_device *netdev = pci_get_drvdata(pdev);
5558	struct e1000_adapter *adapter = netdev_priv(netdev);
5559
5560	if (e1000e_pm_ready(adapter))
5561		adapter->idle_check = true;
5562
5563	return __e1000_resume(pdev);
5564}
5565#endif /* CONFIG_PM_SLEEP */
5566
5567#ifdef CONFIG_PM_RUNTIME
5568static int e1000_runtime_suspend(struct device *dev)
5569{
5570	struct pci_dev *pdev = to_pci_dev(dev);
5571	struct net_device *netdev = pci_get_drvdata(pdev);
5572	struct e1000_adapter *adapter = netdev_priv(netdev);
5573
5574	if (e1000e_pm_ready(adapter)) {
5575		bool wake;
5576
5577		__e1000_shutdown(pdev, &wake, true);
5578	}
5579
5580	return 0;
5581}
5582
5583static int e1000_idle(struct device *dev)
5584{
5585	struct pci_dev *pdev = to_pci_dev(dev);
5586	struct net_device *netdev = pci_get_drvdata(pdev);
5587	struct e1000_adapter *adapter = netdev_priv(netdev);
5588
5589	if (!e1000e_pm_ready(adapter))
5590		return 0;
5591
5592	if (adapter->idle_check) {
5593		adapter->idle_check = false;
5594		if (!e1000e_has_link(adapter))
5595			pm_schedule_suspend(dev, MSEC_PER_SEC);
5596	}
5597
5598	return -EBUSY;
5599}
5600
5601static int e1000_runtime_resume(struct device *dev)
5602{
5603	struct pci_dev *pdev = to_pci_dev(dev);
5604	struct net_device *netdev = pci_get_drvdata(pdev);
5605	struct e1000_adapter *adapter = netdev_priv(netdev);
5606
5607	if (!e1000e_pm_ready(adapter))
5608		return 0;
5609
5610	adapter->idle_check = !dev->power.runtime_auto;
5611	return __e1000_resume(pdev);
5612}
5613#endif /* CONFIG_PM_RUNTIME */
5614#endif /* CONFIG_PM */
5615
5616static void e1000_shutdown(struct pci_dev *pdev)
5617{
5618	bool wake = false;
5619
5620	__e1000_shutdown(pdev, &wake, false);
5621
5622	if (system_state == SYSTEM_POWER_OFF)
5623		e1000_complete_shutdown(pdev, false, wake);
5624}
5625
5626#ifdef CONFIG_NET_POLL_CONTROLLER
5627
5628static irqreturn_t e1000_intr_msix(int irq, void *data)
5629{
5630	struct net_device *netdev = data;
5631	struct e1000_adapter *adapter = netdev_priv(netdev);
5632
5633	if (adapter->msix_entries) {
5634		int vector, msix_irq;
5635
5636		vector = 0;
5637		msix_irq = adapter->msix_entries[vector].vector;
5638		disable_irq(msix_irq);
5639		e1000_intr_msix_rx(msix_irq, netdev);
5640		enable_irq(msix_irq);
5641
5642		vector++;
5643		msix_irq = adapter->msix_entries[vector].vector;
5644		disable_irq(msix_irq);
5645		e1000_intr_msix_tx(msix_irq, netdev);
5646		enable_irq(msix_irq);
5647
5648		vector++;
5649		msix_irq = adapter->msix_entries[vector].vector;
5650		disable_irq(msix_irq);
5651		e1000_msix_other(msix_irq, netdev);
5652		enable_irq(msix_irq);
5653	}
5654
5655	return IRQ_HANDLED;
5656}
5657
5658/*
5659 * Polling 'interrupt' - used by things like netconsole to send skbs
5660 * without having to re-enable interrupts. It's not called while
5661 * the interrupt routine is executing.
5662 */
5663static void e1000_netpoll(struct net_device *netdev)
5664{
5665	struct e1000_adapter *adapter = netdev_priv(netdev);
5666
5667	switch (adapter->int_mode) {
5668	case E1000E_INT_MODE_MSIX:
5669		e1000_intr_msix(adapter->pdev->irq, netdev);
5670		break;
5671	case E1000E_INT_MODE_MSI:
5672		disable_irq(adapter->pdev->irq);
5673		e1000_intr_msi(adapter->pdev->irq, netdev);
5674		enable_irq(adapter->pdev->irq);
5675		break;
5676	default: /* E1000E_INT_MODE_LEGACY */
5677		disable_irq(adapter->pdev->irq);
5678		e1000_intr(adapter->pdev->irq, netdev);
5679		enable_irq(adapter->pdev->irq);
5680		break;
5681	}
5682}
5683#endif
5684
5685/**
5686 * e1000_io_error_detected - called when PCI error is detected
5687 * @pdev: Pointer to PCI device
5688 * @state: The current pci connection state
5689 *
5690 * This function is called after a PCI bus error affecting
5691 * this device has been detected.
5692 */
5693static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5694						pci_channel_state_t state)
5695{
5696	struct net_device *netdev = pci_get_drvdata(pdev);
5697	struct e1000_adapter *adapter = netdev_priv(netdev);
5698
5699	netif_device_detach(netdev);
5700
5701	if (state == pci_channel_io_perm_failure)
5702		return PCI_ERS_RESULT_DISCONNECT;
5703
5704	if (netif_running(netdev))
5705		e1000e_down(adapter);
5706	pci_disable_device(pdev);
5707
5708	/* Request a slot slot reset. */
5709	return PCI_ERS_RESULT_NEED_RESET;
5710}
5711
5712/**
5713 * e1000_io_slot_reset - called after the pci bus has been reset.
5714 * @pdev: Pointer to PCI device
5715 *
5716 * Restart the card from scratch, as if from a cold-boot. Implementation
5717 * resembles the first-half of the e1000_resume routine.
5718 */
5719static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5720{
5721	struct net_device *netdev = pci_get_drvdata(pdev);
5722	struct e1000_adapter *adapter = netdev_priv(netdev);
5723	struct e1000_hw *hw = &adapter->hw;
5724	u16 aspm_disable_flag = 0;
5725	int err;
5726	pci_ers_result_t result;
5727
5728	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5729		aspm_disable_flag = PCIE_LINK_STATE_L0S;
5730	if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5731		aspm_disable_flag |= PCIE_LINK_STATE_L1;
5732	if (aspm_disable_flag)
5733		e1000e_disable_aspm(pdev, aspm_disable_flag);
5734
5735	err = pci_enable_device_mem(pdev);
5736	if (err) {
5737		dev_err(&pdev->dev,
5738			"Cannot re-enable PCI device after reset.\n");
5739		result = PCI_ERS_RESULT_DISCONNECT;
5740	} else {
5741		pci_set_master(pdev);
5742		pdev->state_saved = true;
5743		pci_restore_state(pdev);
5744
5745		pci_enable_wake(pdev, PCI_D3hot, 0);
5746		pci_enable_wake(pdev, PCI_D3cold, 0);
5747
5748		e1000e_reset(adapter);
5749		ew32(WUS, ~0);
5750		result = PCI_ERS_RESULT_RECOVERED;
5751	}
5752
5753	pci_cleanup_aer_uncorrect_error_status(pdev);
5754
5755	return result;
5756}
5757
5758/**
5759 * e1000_io_resume - called when traffic can start flowing again.
5760 * @pdev: Pointer to PCI device
5761 *
5762 * This callback is called when the error recovery driver tells us that
5763 * its OK to resume normal operation. Implementation resembles the
5764 * second-half of the e1000_resume routine.
5765 */
5766static void e1000_io_resume(struct pci_dev *pdev)
5767{
5768	struct net_device *netdev = pci_get_drvdata(pdev);
5769	struct e1000_adapter *adapter = netdev_priv(netdev);
5770
5771	e1000_init_manageability_pt(adapter);
5772
5773	if (netif_running(netdev)) {
5774		if (e1000e_up(adapter)) {
5775			dev_err(&pdev->dev,
5776				"can't bring device back up after reset\n");
5777			return;
5778		}
5779	}
5780
5781	netif_device_attach(netdev);
5782
5783	/*
5784	 * If the controller has AMT, do not set DRV_LOAD until the interface
5785	 * is up.  For all other cases, let the f/w know that the h/w is now
5786	 * under the control of the driver.
5787	 */
5788	if (!(adapter->flags & FLAG_HAS_AMT))
5789		e1000e_get_hw_control(adapter);
5790
5791}
5792
5793static void e1000_print_device_info(struct e1000_adapter *adapter)
5794{
5795	struct e1000_hw *hw = &adapter->hw;
5796	struct net_device *netdev = adapter->netdev;
5797	u32 ret_val;
5798	u8 pba_str[E1000_PBANUM_LENGTH];
5799
5800	/* print bus type/speed/width info */
5801	e_info("(PCI Express:2.5GT/s:%s) %pM\n",
5802	       /* bus width */
5803	       ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5804	        "Width x1"),
5805	       /* MAC address */
5806	       netdev->dev_addr);
5807	e_info("Intel(R) PRO/%s Network Connection\n",
5808	       (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
5809	ret_val = e1000_read_pba_string_generic(hw, pba_str,
5810						E1000_PBANUM_LENGTH);
5811	if (ret_val)
5812		strncpy((char *)pba_str, "Unknown", sizeof(pba_str) - 1);
5813	e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5814	       hw->mac.type, hw->phy.type, pba_str);
5815}
5816
5817static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5818{
5819	struct e1000_hw *hw = &adapter->hw;
5820	int ret_val;
5821	u16 buf = 0;
5822
5823	if (hw->mac.type != e1000_82573)
5824		return;
5825
5826	ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
5827	if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
5828		/* Deep Smart Power Down (DSPD) */
5829		dev_warn(&adapter->pdev->dev,
5830			 "Warning: detected DSPD enabled in EEPROM\n");
5831	}
5832}
5833
5834static const struct net_device_ops e1000e_netdev_ops = {
5835	.ndo_open		= e1000_open,
5836	.ndo_stop		= e1000_close,
5837	.ndo_start_xmit		= e1000_xmit_frame,
5838	.ndo_get_stats64	= e1000e_get_stats64,
5839	.ndo_set_multicast_list	= e1000_set_multi,
5840	.ndo_set_mac_address	= e1000_set_mac,
5841	.ndo_change_mtu		= e1000_change_mtu,
5842	.ndo_do_ioctl		= e1000_ioctl,
5843	.ndo_tx_timeout		= e1000_tx_timeout,
5844	.ndo_validate_addr	= eth_validate_addr,
5845
5846	.ndo_vlan_rx_add_vid	= e1000_vlan_rx_add_vid,
5847	.ndo_vlan_rx_kill_vid	= e1000_vlan_rx_kill_vid,
5848#ifdef CONFIG_NET_POLL_CONTROLLER
5849	.ndo_poll_controller	= e1000_netpoll,
5850#endif
5851};
5852
5853/**
5854 * e1000_probe - Device Initialization Routine
5855 * @pdev: PCI device information struct
5856 * @ent: entry in e1000_pci_tbl
5857 *
5858 * Returns 0 on success, negative on failure
5859 *
5860 * e1000_probe initializes an adapter identified by a pci_dev structure.
5861 * The OS initialization, configuring of the adapter private structure,
5862 * and a hardware reset occur.
5863 **/
5864static int __devinit e1000_probe(struct pci_dev *pdev,
5865				 const struct pci_device_id *ent)
5866{
5867	struct net_device *netdev;
5868	struct e1000_adapter *adapter;
5869	struct e1000_hw *hw;
5870	const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
5871	resource_size_t mmio_start, mmio_len;
5872	resource_size_t flash_start, flash_len;
5873
5874	static int cards_found;
5875	u16 aspm_disable_flag = 0;
5876	int i, err, pci_using_dac;
5877	u16 eeprom_data = 0;
5878	u16 eeprom_apme_mask = E1000_EEPROM_APME;
5879
5880	if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
5881		aspm_disable_flag = PCIE_LINK_STATE_L0S;
5882	if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5883		aspm_disable_flag |= PCIE_LINK_STATE_L1;
5884	if (aspm_disable_flag)
5885		e1000e_disable_aspm(pdev, aspm_disable_flag);
5886
5887	err = pci_enable_device_mem(pdev);
5888	if (err)
5889		return err;
5890
5891	pci_using_dac = 0;
5892	err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
5893	if (!err) {
5894		err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
5895		if (!err)
5896			pci_using_dac = 1;
5897	} else {
5898		err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
5899		if (err) {
5900			err = dma_set_coherent_mask(&pdev->dev,
5901						    DMA_BIT_MASK(32));
5902			if (err) {
5903				dev_err(&pdev->dev, "No usable DMA "
5904					"configuration, aborting\n");
5905				goto err_dma;
5906			}
5907		}
5908	}
5909
5910	err = pci_request_selected_regions_exclusive(pdev,
5911	                                  pci_select_bars(pdev, IORESOURCE_MEM),
5912	                                  e1000e_driver_name);
5913	if (err)
5914		goto err_pci_reg;
5915
5916	/* AER (Advanced Error Reporting) hooks */
5917	pci_enable_pcie_error_reporting(pdev);
5918
5919	pci_set_master(pdev);
5920	/* PCI config space info */
5921	err = pci_save_state(pdev);
5922	if (err)
5923		goto err_alloc_etherdev;
5924
5925	err = -ENOMEM;
5926	netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5927	if (!netdev)
5928		goto err_alloc_etherdev;
5929
5930	SET_NETDEV_DEV(netdev, &pdev->dev);
5931
5932	netdev->irq = pdev->irq;
5933
5934	pci_set_drvdata(pdev, netdev);
5935	adapter = netdev_priv(netdev);
5936	hw = &adapter->hw;
5937	adapter->netdev = netdev;
5938	adapter->pdev = pdev;
5939	adapter->ei = ei;
5940	adapter->pba = ei->pba;
5941	adapter->flags = ei->flags;
5942	adapter->flags2 = ei->flags2;
5943	adapter->hw.adapter = adapter;
5944	adapter->hw.mac.type = ei->mac;
5945	adapter->max_hw_frame_size = ei->max_hw_frame_size;
5946	adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5947
5948	mmio_start = pci_resource_start(pdev, 0);
5949	mmio_len = pci_resource_len(pdev, 0);
5950
5951	err = -EIO;
5952	adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5953	if (!adapter->hw.hw_addr)
5954		goto err_ioremap;
5955
5956	if ((adapter->flags & FLAG_HAS_FLASH) &&
5957	    (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5958		flash_start = pci_resource_start(pdev, 1);
5959		flash_len = pci_resource_len(pdev, 1);
5960		adapter->hw.flash_address = ioremap(flash_start, flash_len);
5961		if (!adapter->hw.flash_address)
5962			goto err_flashmap;
5963	}
5964
5965	/* construct the net_device struct */
5966	netdev->netdev_ops		= &e1000e_netdev_ops;
5967	e1000e_set_ethtool_ops(netdev);
5968	netdev->watchdog_timeo		= 5 * HZ;
5969	netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
5970	strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5971
5972	netdev->mem_start = mmio_start;
5973	netdev->mem_end = mmio_start + mmio_len;
5974
5975	adapter->bd_number = cards_found++;
5976
5977	e1000e_check_options(adapter);
5978
5979	/* setup adapter struct */
5980	err = e1000_sw_init(adapter);
5981	if (err)
5982		goto err_sw_init;
5983
5984	memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5985	memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5986	memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5987
5988	err = ei->get_variants(adapter);
5989	if (err)
5990		goto err_hw_init;
5991
5992	if ((adapter->flags & FLAG_IS_ICH) &&
5993	    (adapter->flags & FLAG_READ_ONLY_NVM))
5994		e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5995
5996	hw->mac.ops.get_bus_info(&adapter->hw);
5997
5998	adapter->hw.phy.autoneg_wait_to_complete = 0;
5999
6000	/* Copper options */
6001	if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6002		adapter->hw.phy.mdix = AUTO_ALL_MODES;
6003		adapter->hw.phy.disable_polarity_correction = 0;
6004		adapter->hw.phy.ms_type = e1000_ms_hw_default;
6005	}
6006
6007	if (e1000_check_reset_block(&adapter->hw))
6008		e_info("PHY reset is blocked due to SOL/IDER session.\n");
6009
6010	netdev->features = NETIF_F_SG |
6011			   NETIF_F_HW_CSUM |
6012			   NETIF_F_HW_VLAN_TX |
6013			   NETIF_F_HW_VLAN_RX;
6014
6015	if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6016		netdev->features |= NETIF_F_HW_VLAN_FILTER;
6017
6018	netdev->features |= NETIF_F_TSO;
6019	netdev->features |= NETIF_F_TSO6;
6020
6021	netdev->vlan_features |= NETIF_F_TSO;
6022	netdev->vlan_features |= NETIF_F_TSO6;
6023	netdev->vlan_features |= NETIF_F_HW_CSUM;
6024	netdev->vlan_features |= NETIF_F_SG;
6025
6026	if (pci_using_dac) {
6027		netdev->features |= NETIF_F_HIGHDMA;
6028		netdev->vlan_features |= NETIF_F_HIGHDMA;
6029	}
6030
6031	if (e1000e_enable_mng_pass_thru(&adapter->hw))
6032		adapter->flags |= FLAG_MNG_PT_ENABLED;
6033
6034	/*
6035	 * before reading the NVM, reset the controller to
6036	 * put the device in a known good starting state
6037	 */
6038	adapter->hw.mac.ops.reset_hw(&adapter->hw);
6039
6040	/*
6041	 * systems with ASPM and others may see the checksum fail on the first
6042	 * attempt. Let's give it a few tries
6043	 */
6044	for (i = 0;; i++) {
6045		if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6046			break;
6047		if (i == 2) {
6048			e_err("The NVM Checksum Is Not Valid\n");
6049			err = -EIO;
6050			goto err_eeprom;
6051		}
6052	}
6053
6054	e1000_eeprom_checks(adapter);
6055
6056	/* copy the MAC address */
6057	if (e1000e_read_mac_addr(&adapter->hw))
6058		e_err("NVM Read Error while reading MAC address\n");
6059
6060	memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6061	memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
6062
6063	if (!is_valid_ether_addr(netdev->perm_addr)) {
6064		e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
6065		err = -EIO;
6066		goto err_eeprom;
6067	}
6068
6069	init_timer(&adapter->watchdog_timer);
6070	adapter->watchdog_timer.function = e1000_watchdog;
6071	adapter->watchdog_timer.data = (unsigned long) adapter;
6072
6073	init_timer(&adapter->phy_info_timer);
6074	adapter->phy_info_timer.function = e1000_update_phy_info;
6075	adapter->phy_info_timer.data = (unsigned long) adapter;
6076
6077	INIT_WORK(&adapter->reset_task, e1000_reset_task);
6078	INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6079	INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6080	INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6081	INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6082
6083	/* Initialize link parameters. User can change them with ethtool */
6084	adapter->hw.mac.autoneg = 1;
6085	adapter->fc_autoneg = 1;
6086	adapter->hw.fc.requested_mode = e1000_fc_default;
6087	adapter->hw.fc.current_mode = e1000_fc_default;
6088	adapter->hw.phy.autoneg_advertised = 0x2f;
6089
6090	/* ring size defaults */
6091	adapter->rx_ring->count = 256;
6092	adapter->tx_ring->count = 256;
6093
6094	/*
6095	 * Initial Wake on LAN setting - If APM wake is enabled in
6096	 * the EEPROM, enable the ACPI Magic Packet filter
6097	 */
6098	if (adapter->flags & FLAG_APME_IN_WUC) {
6099		/* APME bit in EEPROM is mapped to WUC.APME */
6100		eeprom_data = er32(WUC);
6101		eeprom_apme_mask = E1000_WUC_APME;
6102		if ((hw->mac.type > e1000_ich10lan) &&
6103		    (eeprom_data & E1000_WUC_PHY_WAKE))
6104			adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6105	} else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6106		if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6107		    (adapter->hw.bus.func == 1))
6108			e1000_read_nvm(&adapter->hw,
6109				NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
6110		else
6111			e1000_read_nvm(&adapter->hw,
6112				NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
6113	}
6114
6115	/* fetch WoL from EEPROM */
6116	if (eeprom_data & eeprom_apme_mask)
6117		adapter->eeprom_wol |= E1000_WUFC_MAG;
6118
6119	/*
6120	 * now that we have the eeprom settings, apply the special cases
6121	 * where the eeprom may be wrong or the board simply won't support
6122	 * wake on lan on a particular port
6123	 */
6124	if (!(adapter->flags & FLAG_HAS_WOL))
6125		adapter->eeprom_wol = 0;
6126
6127	/* initialize the wol settings based on the eeprom settings */
6128	adapter->wol = adapter->eeprom_wol;
6129	device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6130
6131	/* save off EEPROM version number */
6132	e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6133
6134	/* reset the hardware with the new settings */
6135	e1000e_reset(adapter);
6136
6137	/*
6138	 * If the controller has AMT, do not set DRV_LOAD until the interface
6139	 * is up.  For all other cases, let the f/w know that the h/w is now
6140	 * under the control of the driver.
6141	 */
6142	if (!(adapter->flags & FLAG_HAS_AMT))
6143		e1000e_get_hw_control(adapter);
6144
6145	strncpy(netdev->name, "eth%d", sizeof(netdev->name) - 1);
6146	err = register_netdev(netdev);
6147	if (err)
6148		goto err_register;
6149
6150	/* carrier off reporting is important to ethtool even BEFORE open */
6151	netif_carrier_off(netdev);
6152
6153	e1000_print_device_info(adapter);
6154
6155	if (pci_dev_run_wake(pdev))
6156		pm_runtime_put_noidle(&pdev->dev);
6157
6158	return 0;
6159
6160err_register:
6161	if (!(adapter->flags & FLAG_HAS_AMT))
6162		e1000e_release_hw_control(adapter);
6163err_eeprom:
6164	if (!e1000_check_reset_block(&adapter->hw))
6165		e1000_phy_hw_reset(&adapter->hw);
6166err_hw_init:
6167	kfree(adapter->tx_ring);
6168	kfree(adapter->rx_ring);
6169err_sw_init:
6170	if (adapter->hw.flash_address)
6171		iounmap(adapter->hw.flash_address);
6172	e1000e_reset_interrupt_capability(adapter);
6173err_flashmap:
6174	iounmap(adapter->hw.hw_addr);
6175err_ioremap:
6176	free_netdev(netdev);
6177err_alloc_etherdev:
6178	pci_release_selected_regions(pdev,
6179	                             pci_select_bars(pdev, IORESOURCE_MEM));
6180err_pci_reg:
6181err_dma:
6182	pci_disable_device(pdev);
6183	return err;
6184}
6185
6186/**
6187 * e1000_remove - Device Removal Routine
6188 * @pdev: PCI device information struct
6189 *
6190 * e1000_remove is called by the PCI subsystem to alert the driver
6191 * that it should release a PCI device.  The could be caused by a
6192 * Hot-Plug event, or because the driver is going to be removed from
6193 * memory.
6194 **/
6195static void __devexit e1000_remove(struct pci_dev *pdev)
6196{
6197	struct net_device *netdev = pci_get_drvdata(pdev);
6198	struct e1000_adapter *adapter = netdev_priv(netdev);
6199	bool down = test_bit(__E1000_DOWN, &adapter->state);
6200
6201	/*
6202	 * The timers may be rescheduled, so explicitly disable them
6203	 * from being rescheduled.
6204	 */
6205	if (!down)
6206		set_bit(__E1000_DOWN, &adapter->state);
6207	del_timer_sync(&adapter->watchdog_timer);
6208	del_timer_sync(&adapter->phy_info_timer);
6209
6210	cancel_work_sync(&adapter->reset_task);
6211	cancel_work_sync(&adapter->watchdog_task);
6212	cancel_work_sync(&adapter->downshift_task);
6213	cancel_work_sync(&adapter->update_phy_task);
6214	cancel_work_sync(&adapter->print_hang_task);
6215
6216	if (!(netdev->flags & IFF_UP))
6217		e1000_power_down_phy(adapter);
6218
6219	/* Don't lie to e1000_close() down the road. */
6220	if (!down)
6221		clear_bit(__E1000_DOWN, &adapter->state);
6222	unregister_netdev(netdev);
6223
6224	if (pci_dev_run_wake(pdev))
6225		pm_runtime_get_noresume(&pdev->dev);
6226
6227	/*
6228	 * Release control of h/w to f/w.  If f/w is AMT enabled, this
6229	 * would have already happened in close and is redundant.
6230	 */
6231	e1000e_release_hw_control(adapter);
6232
6233	e1000e_reset_interrupt_capability(adapter);
6234	kfree(adapter->tx_ring);
6235	kfree(adapter->rx_ring);
6236
6237	iounmap(adapter->hw.hw_addr);
6238	if (adapter->hw.flash_address)
6239		iounmap(adapter->hw.flash_address);
6240	pci_release_selected_regions(pdev,
6241	                             pci_select_bars(pdev, IORESOURCE_MEM));
6242
6243	free_netdev(netdev);
6244
6245	/* AER disable */
6246	pci_disable_pcie_error_reporting(pdev);
6247
6248	pci_disable_device(pdev);
6249}
6250
6251/* PCI Error Recovery (ERS) */
6252static struct pci_error_handlers e1000_err_handler = {
6253	.error_detected = e1000_io_error_detected,
6254	.slot_reset = e1000_io_slot_reset,
6255	.resume = e1000_io_resume,
6256};
6257
6258static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6259	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6260	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6261	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6262	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6263	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6264	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6265	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6266	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6267	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6268
6269	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6270	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6271	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6272	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6273
6274	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6275	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6276	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6277
6278	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6279	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6280	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6281
6282	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6283	  board_80003es2lan },
6284	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6285	  board_80003es2lan },
6286	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6287	  board_80003es2lan },
6288	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6289	  board_80003es2lan },
6290
6291	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6292	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6293	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6294	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6295	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6296	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6297	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6298	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6299
6300	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6301	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6302	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6303	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6304	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6305	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6306	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6307	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6308	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6309
6310	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6311	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6312	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
6313
6314	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6315	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
6316	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
6317
6318	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6319	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6320	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6321	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6322
6323	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6324	{ PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6325
6326	{ }	/* terminate list */
6327};
6328MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6329
6330#ifdef CONFIG_PM
6331static const struct dev_pm_ops e1000_pm_ops = {
6332	SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6333	SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6334				e1000_runtime_resume, e1000_idle)
6335};
6336#endif
6337
6338/* PCI Device API Driver */
6339static struct pci_driver e1000_driver = {
6340	.name     = e1000e_driver_name,
6341	.id_table = e1000_pci_tbl,
6342	.probe    = e1000_probe,
6343	.remove   = __devexit_p(e1000_remove),
6344#ifdef CONFIG_PM
6345	.driver.pm = &e1000_pm_ops,
6346#endif
6347	.shutdown = e1000_shutdown,
6348	.err_handler = &e1000_err_handler
6349};
6350
6351/**
6352 * e1000_init_module - Driver Registration Routine
6353 *
6354 * e1000_init_module is the first routine called when the driver is
6355 * loaded. All it does is register with the PCI subsystem.
6356 **/
6357static int __init e1000_init_module(void)
6358{
6359	int ret;
6360	pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6361		e1000e_driver_version);
6362	pr_info("Copyright(c) 1999 - 2011 Intel Corporation.\n");
6363	ret = pci_register_driver(&e1000_driver);
6364
6365	return ret;
6366}
6367module_init(e1000_init_module);
6368
6369/**
6370 * e1000_exit_module - Driver Exit Cleanup Routine
6371 *
6372 * e1000_exit_module is called just before the driver is removed
6373 * from memory.
6374 **/
6375static void __exit e1000_exit_module(void)
6376{
6377	pci_unregister_driver(&e1000_driver);
6378}
6379module_exit(e1000_exit_module);
6380
6381
6382MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6383MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6384MODULE_LICENSE("GPL");
6385MODULE_VERSION(DRV_VERSION);
6386
6387/* e1000_main.c */