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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
4 *
5 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
6 */
7
8#include <linux/kernel.h>
9#include <linux/module.h>
10#include <linux/interrupt.h>
11#include <linux/delay.h>
12#include <linux/ethtool.h>
13#include <linux/platform_device.h>
14
15#include <linux/netdevice.h>
16#include <linux/can.h>
17#include <linux/can/dev.h>
18#include <linux/can/skb.h>
19#include <linux/can/error.h>
20
21#include <linux/mfd/janz.h>
22#include <asm/io.h>
23
24/* the DPM has 64k of memory, organized into 256x 256 byte pages */
25#define DPM_NUM_PAGES 256
26#define DPM_PAGE_SIZE 256
27#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
28
29/* JANZ ICAN3 "old-style" host interface queue page numbers */
30#define QUEUE_OLD_CONTROL 0
31#define QUEUE_OLD_RB0 1
32#define QUEUE_OLD_RB1 2
33#define QUEUE_OLD_WB0 3
34#define QUEUE_OLD_WB1 4
35
36/* Janz ICAN3 "old-style" host interface control registers */
37#define MSYNC_PEER 0x00 /* ICAN only */
38#define MSYNC_LOCL 0x01 /* host only */
39#define TARGET_RUNNING 0x02
40#define FIRMWARE_STAMP 0x60 /* big endian firmware stamp */
41
42#define MSYNC_RB0 0x01
43#define MSYNC_RB1 0x02
44#define MSYNC_RBLW 0x04
45#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
46
47#define MSYNC_WB0 0x10
48#define MSYNC_WB1 0x20
49#define MSYNC_WBLW 0x40
50#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
51
52/* Janz ICAN3 "new-style" host interface queue page numbers */
53#define QUEUE_TOHOST 5
54#define QUEUE_FROMHOST_MID 6
55#define QUEUE_FROMHOST_HIGH 7
56#define QUEUE_FROMHOST_LOW 8
57
58/* The first free page in the DPM is #9 */
59#define DPM_FREE_START 9
60
61/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
62#define DESC_VALID 0x80
63#define DESC_WRAP 0x40
64#define DESC_INTERRUPT 0x20
65#define DESC_IVALID 0x10
66#define DESC_LEN(len) (len)
67
68/* Janz ICAN3 Firmware Messages */
69#define MSG_CONNECTI 0x02
70#define MSG_DISCONNECT 0x03
71#define MSG_IDVERS 0x04
72#define MSG_MSGLOST 0x05
73#define MSG_NEWHOSTIF 0x08
74#define MSG_INQUIRY 0x0a
75#define MSG_SETAFILMASK 0x10
76#define MSG_INITFDPMQUEUE 0x11
77#define MSG_HWCONF 0x12
78#define MSG_FMSGLOST 0x15
79#define MSG_CEVTIND 0x37
80#define MSG_CBTRREQ 0x41
81#define MSG_COFFREQ 0x42
82#define MSG_CONREQ 0x43
83#define MSG_CCONFREQ 0x47
84#define MSG_NMTS 0xb0
85#define MSG_LMTS 0xb4
86
87/*
88 * Janz ICAN3 CAN Inquiry Message Types
89 *
90 * NOTE: there appears to be a firmware bug here. You must send
91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
92 * NOTE: response. The controller never responds to a message with
93 * NOTE: the INQUIRY_EXTENDED subspec :(
94 */
95#define INQUIRY_STATUS 0x00
96#define INQUIRY_TERMINATION 0x01
97#define INQUIRY_EXTENDED 0x04
98
99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
100#define SETAFILMASK_REJECT 0x00
101#define SETAFILMASK_FASTIF 0x02
102
103/* Janz ICAN3 CAN Hardware Configuration Message Types */
104#define HWCONF_TERMINATE_ON 0x01
105#define HWCONF_TERMINATE_OFF 0x00
106
107/* Janz ICAN3 CAN Event Indication Message Types */
108#define CEVTIND_EI 0x01
109#define CEVTIND_DOI 0x02
110#define CEVTIND_LOST 0x04
111#define CEVTIND_FULL 0x08
112#define CEVTIND_BEI 0x10
113
114#define CEVTIND_CHIP_SJA1000 0x02
115
116#define ICAN3_BUSERR_QUOTA_MAX 255
117
118/* Janz ICAN3 CAN Frame Conversion */
119#define ICAN3_SNGL 0x02
120#define ICAN3_ECHO 0x10
121#define ICAN3_EFF_RTR 0x40
122#define ICAN3_SFF_RTR 0x10
123#define ICAN3_EFF 0x80
124
125#define ICAN3_CAN_TYPE_MASK 0x0f
126#define ICAN3_CAN_TYPE_SFF 0x00
127#define ICAN3_CAN_TYPE_EFF 0x01
128
129#define ICAN3_CAN_DLC_MASK 0x0f
130
131/* Janz ICAN3 NMTS subtypes */
132#define NMTS_CREATE_NODE_REQ 0x0
133#define NMTS_SLAVE_STATE_IND 0x8
134#define NMTS_SLAVE_EVENT_IND 0x9
135
136/* Janz ICAN3 LMTS subtypes */
137#define LMTS_BUSON_REQ 0x0
138#define LMTS_BUSOFF_REQ 0x1
139#define LMTS_CAN_CONF_REQ 0x2
140
141/* Janz ICAN3 NMTS Event indications */
142#define NE_LOCAL_OCCURRED 0x3
143#define NE_LOCAL_RESOLVED 0x2
144#define NE_REMOTE_OCCURRED 0xc
145#define NE_REMOTE_RESOLVED 0x8
146
147/*
148 * SJA1000 Status and Error Register Definitions
149 *
150 * Copied from drivers/net/can/sja1000/sja1000.h
151 */
152
153/* status register content */
154#define SR_BS 0x80
155#define SR_ES 0x40
156#define SR_TS 0x20
157#define SR_RS 0x10
158#define SR_TCS 0x08
159#define SR_TBS 0x04
160#define SR_DOS 0x02
161#define SR_RBS 0x01
162
163#define SR_CRIT (SR_BS|SR_ES)
164
165/* ECC register */
166#define ECC_SEG 0x1F
167#define ECC_DIR 0x20
168#define ECC_ERR 6
169#define ECC_BIT 0x00
170#define ECC_FORM 0x40
171#define ECC_STUFF 0x80
172#define ECC_MASK 0xc0
173
174/* Number of buffers for use in the "new-style" host interface */
175#define ICAN3_NEW_BUFFERS 16
176
177/* Number of buffers for use in the "fast" host interface */
178#define ICAN3_TX_BUFFERS 512
179#define ICAN3_RX_BUFFERS 1024
180
181/* SJA1000 Clock Input */
182#define ICAN3_CAN_CLOCK 8000000
183
184/* Janz ICAN3 firmware types */
185enum ican3_fwtype {
186 ICAN3_FWTYPE_ICANOS,
187 ICAN3_FWTYPE_CAL_CANOPEN,
188};
189
190/* Driver Name */
191#define DRV_NAME "janz-ican3"
192
193/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
194struct ican3_dpm_control {
195 /* window address register */
196 u8 window_address;
197 u8 unused1;
198
199 /*
200 * Read access: clear interrupt from microcontroller
201 * Write access: send interrupt to microcontroller
202 */
203 u8 interrupt;
204 u8 unused2;
205
206 /* write-only: reset all hardware on the module */
207 u8 hwreset;
208 u8 unused3;
209
210 /* write-only: generate an interrupt to the TPU */
211 u8 tpuinterrupt;
212};
213
214struct ican3_dev {
215
216 /* must be the first member */
217 struct can_priv can;
218
219 /* CAN network device */
220 struct net_device *ndev;
221 struct napi_struct napi;
222
223 /* module number */
224 unsigned int num;
225
226 /* base address of registers and IRQ */
227 struct janz_cmodio_onboard_regs __iomem *ctrl;
228 struct ican3_dpm_control __iomem *dpmctrl;
229 void __iomem *dpm;
230 int irq;
231
232 /* CAN bus termination status */
233 struct completion termination_comp;
234 bool termination_enabled;
235
236 /* CAN bus error status registers */
237 struct completion buserror_comp;
238 struct can_berr_counter bec;
239
240 /* firmware type */
241 enum ican3_fwtype fwtype;
242 char fwinfo[32];
243
244 /* old and new style host interface */
245 unsigned int iftype;
246
247 /* queue for echo packets */
248 struct sk_buff_head echoq;
249
250 /*
251 * Any function which changes the current DPM page must hold this
252 * lock while it is performing data accesses. This ensures that the
253 * function will not be preempted and end up reading data from a
254 * different DPM page than it expects.
255 */
256 spinlock_t lock;
257
258 /* new host interface */
259 unsigned int rx_int;
260 unsigned int rx_num;
261 unsigned int tx_num;
262
263 /* fast host interface */
264 unsigned int fastrx_start;
265 unsigned int fastrx_num;
266 unsigned int fasttx_start;
267 unsigned int fasttx_num;
268
269 /* first free DPM page */
270 unsigned int free_page;
271};
272
273struct ican3_msg {
274 u8 control;
275 u8 spec;
276 __le16 len;
277 u8 data[252];
278};
279
280struct ican3_new_desc {
281 u8 control;
282 u8 pointer;
283};
284
285struct ican3_fast_desc {
286 u8 control;
287 u8 command;
288 u8 data[14];
289};
290
291/* write to the window basic address register */
292static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
293{
294 BUG_ON(page >= DPM_NUM_PAGES);
295 iowrite8(page, &mod->dpmctrl->window_address);
296}
297
298/*
299 * ICAN3 "old-style" host interface
300 */
301
302/*
303 * Receive a message from the ICAN3 "old-style" firmware interface
304 *
305 * LOCKING: must hold mod->lock
306 *
307 * returns 0 on success, -ENOMEM when no message exists
308 */
309static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
310{
311 unsigned int mbox, mbox_page;
312 u8 locl, peer, xord;
313
314 /* get the MSYNC registers */
315 ican3_set_page(mod, QUEUE_OLD_CONTROL);
316 peer = ioread8(mod->dpm + MSYNC_PEER);
317 locl = ioread8(mod->dpm + MSYNC_LOCL);
318 xord = locl ^ peer;
319
320 if ((xord & MSYNC_RB_MASK) == 0x00) {
321 netdev_dbg(mod->ndev, "no mbox for reading\n");
322 return -ENOMEM;
323 }
324
325 /* find the first free mbox to read */
326 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
327 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
328 else
329 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
330
331 /* copy the message */
332 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
333 ican3_set_page(mod, mbox_page);
334 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
335
336 /*
337 * notify the firmware that the read buffer is available
338 * for it to fill again
339 */
340 locl ^= mbox;
341
342 ican3_set_page(mod, QUEUE_OLD_CONTROL);
343 iowrite8(locl, mod->dpm + MSYNC_LOCL);
344 return 0;
345}
346
347/*
348 * Send a message through the "old-style" firmware interface
349 *
350 * LOCKING: must hold mod->lock
351 *
352 * returns 0 on success, -ENOMEM when no free space exists
353 */
354static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
355{
356 unsigned int mbox, mbox_page;
357 u8 locl, peer, xord;
358
359 /* get the MSYNC registers */
360 ican3_set_page(mod, QUEUE_OLD_CONTROL);
361 peer = ioread8(mod->dpm + MSYNC_PEER);
362 locl = ioread8(mod->dpm + MSYNC_LOCL);
363 xord = locl ^ peer;
364
365 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
366 netdev_err(mod->ndev, "no mbox for writing\n");
367 return -ENOMEM;
368 }
369
370 /* calculate a free mbox to use */
371 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
372
373 /* copy the message to the DPM */
374 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
375 ican3_set_page(mod, mbox_page);
376 memcpy_toio(mod->dpm, msg, sizeof(*msg));
377
378 locl ^= mbox;
379 if (mbox == MSYNC_WB1)
380 locl |= MSYNC_WBLW;
381
382 ican3_set_page(mod, QUEUE_OLD_CONTROL);
383 iowrite8(locl, mod->dpm + MSYNC_LOCL);
384 return 0;
385}
386
387/*
388 * ICAN3 "new-style" Host Interface Setup
389 */
390
391static void ican3_init_new_host_interface(struct ican3_dev *mod)
392{
393 struct ican3_new_desc desc;
394 unsigned long flags;
395 void __iomem *dst;
396 int i;
397
398 spin_lock_irqsave(&mod->lock, flags);
399
400 /* setup the internal datastructures for RX */
401 mod->rx_num = 0;
402 mod->rx_int = 0;
403
404 /* tohost queue descriptors are in page 5 */
405 ican3_set_page(mod, QUEUE_TOHOST);
406 dst = mod->dpm;
407
408 /* initialize the tohost (rx) queue descriptors: pages 9-24 */
409 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
410 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
411 desc.pointer = mod->free_page;
412
413 /* set wrap flag on last buffer */
414 if (i == ICAN3_NEW_BUFFERS - 1)
415 desc.control |= DESC_WRAP;
416
417 memcpy_toio(dst, &desc, sizeof(desc));
418 dst += sizeof(desc);
419 mod->free_page++;
420 }
421
422 /* fromhost (tx) mid queue descriptors are in page 6 */
423 ican3_set_page(mod, QUEUE_FROMHOST_MID);
424 dst = mod->dpm;
425
426 /* setup the internal datastructures for TX */
427 mod->tx_num = 0;
428
429 /* initialize the fromhost mid queue descriptors: pages 25-40 */
430 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
431 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
432 desc.pointer = mod->free_page;
433
434 /* set wrap flag on last buffer */
435 if (i == ICAN3_NEW_BUFFERS - 1)
436 desc.control |= DESC_WRAP;
437
438 memcpy_toio(dst, &desc, sizeof(desc));
439 dst += sizeof(desc);
440 mod->free_page++;
441 }
442
443 /* fromhost hi queue descriptors are in page 7 */
444 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
445 dst = mod->dpm;
446
447 /* initialize only a single buffer in the fromhost hi queue (unused) */
448 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
449 desc.pointer = mod->free_page;
450 memcpy_toio(dst, &desc, sizeof(desc));
451 mod->free_page++;
452
453 /* fromhost low queue descriptors are in page 8 */
454 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
455 dst = mod->dpm;
456
457 /* initialize only a single buffer in the fromhost low queue (unused) */
458 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
459 desc.pointer = mod->free_page;
460 memcpy_toio(dst, &desc, sizeof(desc));
461 mod->free_page++;
462
463 spin_unlock_irqrestore(&mod->lock, flags);
464}
465
466/*
467 * ICAN3 Fast Host Interface Setup
468 */
469
470static void ican3_init_fast_host_interface(struct ican3_dev *mod)
471{
472 struct ican3_fast_desc desc;
473 unsigned long flags;
474 unsigned int addr;
475 void __iomem *dst;
476 int i;
477
478 spin_lock_irqsave(&mod->lock, flags);
479
480 /* save the start recv page */
481 mod->fastrx_start = mod->free_page;
482 mod->fastrx_num = 0;
483
484 /* build a single fast tohost queue descriptor */
485 memset(&desc, 0, sizeof(desc));
486 desc.control = 0x00;
487 desc.command = 1;
488
489 /* build the tohost queue descriptor ring in memory */
490 addr = 0;
491 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
492
493 /* set the wrap bit on the last buffer */
494 if (i == ICAN3_RX_BUFFERS - 1)
495 desc.control |= DESC_WRAP;
496
497 /* switch to the correct page */
498 ican3_set_page(mod, mod->free_page);
499
500 /* copy the descriptor to the DPM */
501 dst = mod->dpm + addr;
502 memcpy_toio(dst, &desc, sizeof(desc));
503 addr += sizeof(desc);
504
505 /* move to the next page if necessary */
506 if (addr >= DPM_PAGE_SIZE) {
507 addr = 0;
508 mod->free_page++;
509 }
510 }
511
512 /* make sure we page-align the next queue */
513 if (addr != 0)
514 mod->free_page++;
515
516 /* save the start xmit page */
517 mod->fasttx_start = mod->free_page;
518 mod->fasttx_num = 0;
519
520 /* build a single fast fromhost queue descriptor */
521 memset(&desc, 0, sizeof(desc));
522 desc.control = DESC_VALID;
523 desc.command = 1;
524
525 /* build the fromhost queue descriptor ring in memory */
526 addr = 0;
527 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
528
529 /* set the wrap bit on the last buffer */
530 if (i == ICAN3_TX_BUFFERS - 1)
531 desc.control |= DESC_WRAP;
532
533 /* switch to the correct page */
534 ican3_set_page(mod, mod->free_page);
535
536 /* copy the descriptor to the DPM */
537 dst = mod->dpm + addr;
538 memcpy_toio(dst, &desc, sizeof(desc));
539 addr += sizeof(desc);
540
541 /* move to the next page if necessary */
542 if (addr >= DPM_PAGE_SIZE) {
543 addr = 0;
544 mod->free_page++;
545 }
546 }
547
548 spin_unlock_irqrestore(&mod->lock, flags);
549}
550
551/*
552 * ICAN3 "new-style" Host Interface Message Helpers
553 */
554
555/*
556 * LOCKING: must hold mod->lock
557 */
558static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
559{
560 struct ican3_new_desc desc;
561 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
562
563 /* switch to the fromhost mid queue, and read the buffer descriptor */
564 ican3_set_page(mod, QUEUE_FROMHOST_MID);
565 memcpy_fromio(&desc, desc_addr, sizeof(desc));
566
567 if (!(desc.control & DESC_VALID)) {
568 netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
569 return -ENOMEM;
570 }
571
572 /* switch to the data page, copy the data */
573 ican3_set_page(mod, desc.pointer);
574 memcpy_toio(mod->dpm, msg, sizeof(*msg));
575
576 /* switch back to the descriptor, set the valid bit, write it back */
577 ican3_set_page(mod, QUEUE_FROMHOST_MID);
578 desc.control ^= DESC_VALID;
579 memcpy_toio(desc_addr, &desc, sizeof(desc));
580
581 /* update the tx number */
582 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
583 return 0;
584}
585
586/*
587 * LOCKING: must hold mod->lock
588 */
589static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
590{
591 struct ican3_new_desc desc;
592 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
593
594 /* switch to the tohost queue, and read the buffer descriptor */
595 ican3_set_page(mod, QUEUE_TOHOST);
596 memcpy_fromio(&desc, desc_addr, sizeof(desc));
597
598 if (!(desc.control & DESC_VALID)) {
599 netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
600 return -ENOMEM;
601 }
602
603 /* switch to the data page, copy the data */
604 ican3_set_page(mod, desc.pointer);
605 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
606
607 /* switch back to the descriptor, toggle the valid bit, write it back */
608 ican3_set_page(mod, QUEUE_TOHOST);
609 desc.control ^= DESC_VALID;
610 memcpy_toio(desc_addr, &desc, sizeof(desc));
611
612 /* update the rx number */
613 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
614 return 0;
615}
616
617/*
618 * Message Send / Recv Helpers
619 */
620
621static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
622{
623 unsigned long flags;
624 int ret;
625
626 spin_lock_irqsave(&mod->lock, flags);
627
628 if (mod->iftype == 0)
629 ret = ican3_old_send_msg(mod, msg);
630 else
631 ret = ican3_new_send_msg(mod, msg);
632
633 spin_unlock_irqrestore(&mod->lock, flags);
634 return ret;
635}
636
637static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
638{
639 unsigned long flags;
640 int ret;
641
642 spin_lock_irqsave(&mod->lock, flags);
643
644 if (mod->iftype == 0)
645 ret = ican3_old_recv_msg(mod, msg);
646 else
647 ret = ican3_new_recv_msg(mod, msg);
648
649 spin_unlock_irqrestore(&mod->lock, flags);
650 return ret;
651}
652
653/*
654 * Quick Pre-constructed Messages
655 */
656
657static int ican3_msg_connect(struct ican3_dev *mod)
658{
659 struct ican3_msg msg;
660
661 memset(&msg, 0, sizeof(msg));
662 msg.spec = MSG_CONNECTI;
663 msg.len = cpu_to_le16(0);
664
665 return ican3_send_msg(mod, &msg);
666}
667
668static int ican3_msg_disconnect(struct ican3_dev *mod)
669{
670 struct ican3_msg msg;
671
672 memset(&msg, 0, sizeof(msg));
673 msg.spec = MSG_DISCONNECT;
674 msg.len = cpu_to_le16(0);
675
676 return ican3_send_msg(mod, &msg);
677}
678
679static int ican3_msg_newhostif(struct ican3_dev *mod)
680{
681 struct ican3_msg msg;
682 int ret;
683
684 memset(&msg, 0, sizeof(msg));
685 msg.spec = MSG_NEWHOSTIF;
686 msg.len = cpu_to_le16(0);
687
688 /* If we're not using the old interface, switching seems bogus */
689 WARN_ON(mod->iftype != 0);
690
691 ret = ican3_send_msg(mod, &msg);
692 if (ret)
693 return ret;
694
695 /* mark the module as using the new host interface */
696 mod->iftype = 1;
697 return 0;
698}
699
700static int ican3_msg_fasthostif(struct ican3_dev *mod)
701{
702 struct ican3_msg msg;
703 unsigned int addr;
704
705 memset(&msg, 0, sizeof(msg));
706 msg.spec = MSG_INITFDPMQUEUE;
707 msg.len = cpu_to_le16(8);
708
709 /* write the tohost queue start address */
710 addr = DPM_PAGE_ADDR(mod->fastrx_start);
711 msg.data[0] = addr & 0xff;
712 msg.data[1] = (addr >> 8) & 0xff;
713 msg.data[2] = (addr >> 16) & 0xff;
714 msg.data[3] = (addr >> 24) & 0xff;
715
716 /* write the fromhost queue start address */
717 addr = DPM_PAGE_ADDR(mod->fasttx_start);
718 msg.data[4] = addr & 0xff;
719 msg.data[5] = (addr >> 8) & 0xff;
720 msg.data[6] = (addr >> 16) & 0xff;
721 msg.data[7] = (addr >> 24) & 0xff;
722
723 /* If we're not using the new interface yet, we cannot do this */
724 WARN_ON(mod->iftype != 1);
725
726 return ican3_send_msg(mod, &msg);
727}
728
729/*
730 * Setup the CAN filter to either accept or reject all
731 * messages from the CAN bus.
732 */
733static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
734{
735 struct ican3_msg msg;
736 int ret;
737
738 /* Standard Frame Format */
739 memset(&msg, 0, sizeof(msg));
740 msg.spec = MSG_SETAFILMASK;
741 msg.len = cpu_to_le16(5);
742 msg.data[0] = 0x00; /* IDLo LSB */
743 msg.data[1] = 0x00; /* IDLo MSB */
744 msg.data[2] = 0xff; /* IDHi LSB */
745 msg.data[3] = 0x07; /* IDHi MSB */
746
747 /* accept all frames for fast host if, or reject all frames */
748 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
749
750 ret = ican3_send_msg(mod, &msg);
751 if (ret)
752 return ret;
753
754 /* Extended Frame Format */
755 memset(&msg, 0, sizeof(msg));
756 msg.spec = MSG_SETAFILMASK;
757 msg.len = cpu_to_le16(13);
758 msg.data[0] = 0; /* MUX = 0 */
759 msg.data[1] = 0x00; /* IDLo LSB */
760 msg.data[2] = 0x00;
761 msg.data[3] = 0x00;
762 msg.data[4] = 0x20; /* IDLo MSB */
763 msg.data[5] = 0xff; /* IDHi LSB */
764 msg.data[6] = 0xff;
765 msg.data[7] = 0xff;
766 msg.data[8] = 0x3f; /* IDHi MSB */
767
768 /* accept all frames for fast host if, or reject all frames */
769 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
770
771 return ican3_send_msg(mod, &msg);
772}
773
774/*
775 * Bring the CAN bus online or offline
776 */
777static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
778{
779 struct can_bittiming *bt = &mod->can.bittiming;
780 struct ican3_msg msg;
781 u8 btr0, btr1;
782 int res;
783
784 /* This algorithm was stolen from drivers/net/can/sja1000/sja1000.c */
785 /* The bittiming register command for the ICAN3 just sets the bit timing */
786 /* registers on the SJA1000 chip directly */
787 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
788 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
789 (((bt->phase_seg2 - 1) & 0x7) << 4);
790 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
791 btr1 |= 0x80;
792
793 if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
794 if (on) {
795 /* set bittiming */
796 memset(&msg, 0, sizeof(msg));
797 msg.spec = MSG_CBTRREQ;
798 msg.len = cpu_to_le16(4);
799 msg.data[0] = 0x00;
800 msg.data[1] = 0x00;
801 msg.data[2] = btr0;
802 msg.data[3] = btr1;
803
804 res = ican3_send_msg(mod, &msg);
805 if (res)
806 return res;
807 }
808
809 /* can-on/off request */
810 memset(&msg, 0, sizeof(msg));
811 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
812 msg.len = cpu_to_le16(0);
813
814 return ican3_send_msg(mod, &msg);
815
816 } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
817 /* bittiming + can-on/off request */
818 memset(&msg, 0, sizeof(msg));
819 msg.spec = MSG_LMTS;
820 if (on) {
821 msg.len = cpu_to_le16(4);
822 msg.data[0] = LMTS_BUSON_REQ;
823 msg.data[1] = 0;
824 msg.data[2] = btr0;
825 msg.data[3] = btr1;
826 } else {
827 msg.len = cpu_to_le16(2);
828 msg.data[0] = LMTS_BUSOFF_REQ;
829 msg.data[1] = 0;
830 }
831 res = ican3_send_msg(mod, &msg);
832 if (res)
833 return res;
834
835 if (on) {
836 /* create NMT Slave Node for error processing
837 * class 2 (with error capability, see CiA/DS203-1)
838 * id 1
839 * name locnod1 (must be exactly 7 bytes)
840 */
841 memset(&msg, 0, sizeof(msg));
842 msg.spec = MSG_NMTS;
843 msg.len = cpu_to_le16(11);
844 msg.data[0] = NMTS_CREATE_NODE_REQ;
845 msg.data[1] = 0;
846 msg.data[2] = 2; /* node class */
847 msg.data[3] = 1; /* node id */
848 strcpy(msg.data + 4, "locnod1"); /* node name */
849 return ican3_send_msg(mod, &msg);
850 }
851 return 0;
852 }
853 return -ENOTSUPP;
854}
855
856static int ican3_set_termination(struct ican3_dev *mod, bool on)
857{
858 struct ican3_msg msg;
859
860 memset(&msg, 0, sizeof(msg));
861 msg.spec = MSG_HWCONF;
862 msg.len = cpu_to_le16(2);
863 msg.data[0] = 0x00;
864 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
865
866 return ican3_send_msg(mod, &msg);
867}
868
869static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
870{
871 struct ican3_msg msg;
872
873 memset(&msg, 0, sizeof(msg));
874 msg.spec = MSG_INQUIRY;
875 msg.len = cpu_to_le16(2);
876 msg.data[0] = subspec;
877 msg.data[1] = 0x00;
878
879 return ican3_send_msg(mod, &msg);
880}
881
882static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
883{
884 struct ican3_msg msg;
885
886 if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
887 memset(&msg, 0, sizeof(msg));
888 msg.spec = MSG_CCONFREQ;
889 msg.len = cpu_to_le16(2);
890 msg.data[0] = 0x00;
891 msg.data[1] = quota;
892 } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
893 memset(&msg, 0, sizeof(msg));
894 msg.spec = MSG_LMTS;
895 msg.len = cpu_to_le16(4);
896 msg.data[0] = LMTS_CAN_CONF_REQ;
897 msg.data[1] = 0x00;
898 msg.data[2] = 0x00;
899 msg.data[3] = quota;
900 } else {
901 return -ENOTSUPP;
902 }
903 return ican3_send_msg(mod, &msg);
904}
905
906/*
907 * ICAN3 to Linux CAN Frame Conversion
908 */
909
910static void ican3_to_can_frame(struct ican3_dev *mod,
911 struct ican3_fast_desc *desc,
912 struct can_frame *cf)
913{
914 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
915 if (desc->data[1] & ICAN3_SFF_RTR)
916 cf->can_id |= CAN_RTR_FLAG;
917
918 cf->can_id |= desc->data[0] << 3;
919 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
920 cf->len = can_cc_dlc2len(desc->data[1] & ICAN3_CAN_DLC_MASK);
921 memcpy(cf->data, &desc->data[2], cf->len);
922 } else {
923 cf->len = can_cc_dlc2len(desc->data[0] & ICAN3_CAN_DLC_MASK);
924 if (desc->data[0] & ICAN3_EFF_RTR)
925 cf->can_id |= CAN_RTR_FLAG;
926
927 if (desc->data[0] & ICAN3_EFF) {
928 cf->can_id |= CAN_EFF_FLAG;
929 cf->can_id |= desc->data[2] << 21; /* 28-21 */
930 cf->can_id |= desc->data[3] << 13; /* 20-13 */
931 cf->can_id |= desc->data[4] << 5; /* 12-5 */
932 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
933 } else {
934 cf->can_id |= desc->data[2] << 3; /* 10-3 */
935 cf->can_id |= desc->data[3] >> 5; /* 2-0 */
936 }
937
938 memcpy(cf->data, &desc->data[6], cf->len);
939 }
940}
941
942static void can_frame_to_ican3(struct ican3_dev *mod,
943 struct can_frame *cf,
944 struct ican3_fast_desc *desc)
945{
946 /* clear out any stale data in the descriptor */
947 memset(desc->data, 0, sizeof(desc->data));
948
949 /* we always use the extended format, with the ECHO flag set */
950 desc->command = ICAN3_CAN_TYPE_EFF;
951 desc->data[0] |= cf->len;
952 desc->data[1] |= ICAN3_ECHO;
953
954 /* support single transmission (no retries) mode */
955 if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
956 desc->data[1] |= ICAN3_SNGL;
957
958 if (cf->can_id & CAN_RTR_FLAG)
959 desc->data[0] |= ICAN3_EFF_RTR;
960
961 /* pack the id into the correct places */
962 if (cf->can_id & CAN_EFF_FLAG) {
963 desc->data[0] |= ICAN3_EFF;
964 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
965 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
966 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
967 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
968 } else {
969 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
970 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
971 }
972
973 /* copy the data bits into the descriptor */
974 memcpy(&desc->data[6], cf->data, cf->len);
975}
976
977/*
978 * Interrupt Handling
979 */
980
981/*
982 * Handle an ID + Version message response from the firmware. We never generate
983 * this message in production code, but it is very useful when debugging to be
984 * able to display this message.
985 */
986static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
987{
988 netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
989}
990
991static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
992{
993 struct net_device *dev = mod->ndev;
994 struct net_device_stats *stats = &dev->stats;
995 struct can_frame *cf;
996 struct sk_buff *skb;
997
998 /*
999 * Report that communication messages with the microcontroller firmware
1000 * are being lost. These are never CAN frames, so we do not generate an
1001 * error frame for userspace
1002 */
1003 if (msg->spec == MSG_MSGLOST) {
1004 netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
1005 return;
1006 }
1007
1008 /*
1009 * Oops, this indicates that we have lost messages in the fast queue,
1010 * which are exclusively CAN messages. Our driver isn't reading CAN
1011 * frames fast enough.
1012 *
1013 * We'll pretend that the SJA1000 told us that it ran out of buffer
1014 * space, because there is not a better message for this.
1015 */
1016 skb = alloc_can_err_skb(dev, &cf);
1017 if (skb) {
1018 cf->can_id |= CAN_ERR_CRTL;
1019 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1020 stats->rx_over_errors++;
1021 stats->rx_errors++;
1022 netif_rx(skb);
1023 }
1024}
1025
1026/*
1027 * Handle CAN Event Indication Messages from the firmware
1028 *
1029 * The ICAN3 firmware provides the values of some SJA1000 registers when it
1030 * generates this message. The code below is largely copied from the
1031 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
1032 */
1033static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
1034{
1035 struct net_device *dev = mod->ndev;
1036 struct net_device_stats *stats = &dev->stats;
1037 enum can_state state = mod->can.state;
1038 u8 isrc, ecc, status, rxerr, txerr;
1039 struct can_frame *cf;
1040 struct sk_buff *skb;
1041
1042 /* we can only handle the SJA1000 part */
1043 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
1044 netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
1045 return -ENODEV;
1046 }
1047
1048 /* check the message length for sanity */
1049 if (le16_to_cpu(msg->len) < 6) {
1050 netdev_err(mod->ndev, "error message too short\n");
1051 return -EINVAL;
1052 }
1053
1054 isrc = msg->data[0];
1055 ecc = msg->data[2];
1056 status = msg->data[3];
1057 rxerr = msg->data[4];
1058 txerr = msg->data[5];
1059
1060 /*
1061 * This hardware lacks any support other than bus error messages to
1062 * determine if packet transmission has failed.
1063 *
1064 * When TX errors happen, one echo skb needs to be dropped from the
1065 * front of the queue.
1066 *
1067 * A small bit of code is duplicated here and below, to avoid error
1068 * skb allocation when it will just be freed immediately.
1069 */
1070 if (isrc == CEVTIND_BEI) {
1071 int ret;
1072 netdev_dbg(mod->ndev, "bus error interrupt\n");
1073
1074 /* TX error */
1075 if (!(ecc & ECC_DIR)) {
1076 kfree_skb(skb_dequeue(&mod->echoq));
1077 stats->tx_errors++;
1078 } else {
1079 stats->rx_errors++;
1080 }
1081
1082 /*
1083 * The controller automatically disables bus-error interrupts
1084 * and therefore we must re-enable them.
1085 */
1086 ret = ican3_set_buserror(mod, 1);
1087 if (ret) {
1088 netdev_err(mod->ndev, "unable to re-enable bus-error\n");
1089 return ret;
1090 }
1091
1092 /* bus error reporting is off, return immediately */
1093 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
1094 return 0;
1095 }
1096
1097 skb = alloc_can_err_skb(dev, &cf);
1098 if (skb == NULL)
1099 return -ENOMEM;
1100
1101 /* data overrun interrupt */
1102 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1103 netdev_dbg(mod->ndev, "data overrun interrupt\n");
1104 cf->can_id |= CAN_ERR_CRTL;
1105 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1106 stats->rx_over_errors++;
1107 stats->rx_errors++;
1108 }
1109
1110 /* error warning + passive interrupt */
1111 if (isrc == CEVTIND_EI) {
1112 netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
1113 if (status & SR_BS) {
1114 state = CAN_STATE_BUS_OFF;
1115 cf->can_id |= CAN_ERR_BUSOFF;
1116 mod->can.can_stats.bus_off++;
1117 can_bus_off(dev);
1118 } else if (status & SR_ES) {
1119 if (rxerr >= 128 || txerr >= 128)
1120 state = CAN_STATE_ERROR_PASSIVE;
1121 else
1122 state = CAN_STATE_ERROR_WARNING;
1123 } else {
1124 state = CAN_STATE_ERROR_ACTIVE;
1125 }
1126 }
1127
1128 /* bus error interrupt */
1129 if (isrc == CEVTIND_BEI) {
1130 mod->can.can_stats.bus_error++;
1131 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR | CAN_ERR_CNT;
1132
1133 switch (ecc & ECC_MASK) {
1134 case ECC_BIT:
1135 cf->data[2] |= CAN_ERR_PROT_BIT;
1136 break;
1137 case ECC_FORM:
1138 cf->data[2] |= CAN_ERR_PROT_FORM;
1139 break;
1140 case ECC_STUFF:
1141 cf->data[2] |= CAN_ERR_PROT_STUFF;
1142 break;
1143 default:
1144 cf->data[3] = ecc & ECC_SEG;
1145 break;
1146 }
1147
1148 if (!(ecc & ECC_DIR))
1149 cf->data[2] |= CAN_ERR_PROT_TX;
1150
1151 cf->data[6] = txerr;
1152 cf->data[7] = rxerr;
1153 }
1154
1155 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1156 state == CAN_STATE_ERROR_PASSIVE)) {
1157 cf->can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;
1158 if (state == CAN_STATE_ERROR_WARNING) {
1159 mod->can.can_stats.error_warning++;
1160 cf->data[1] = (txerr > rxerr) ?
1161 CAN_ERR_CRTL_TX_WARNING :
1162 CAN_ERR_CRTL_RX_WARNING;
1163 } else {
1164 mod->can.can_stats.error_passive++;
1165 cf->data[1] = (txerr > rxerr) ?
1166 CAN_ERR_CRTL_TX_PASSIVE :
1167 CAN_ERR_CRTL_RX_PASSIVE;
1168 }
1169
1170 cf->data[6] = txerr;
1171 cf->data[7] = rxerr;
1172 }
1173
1174 mod->can.state = state;
1175 netif_rx(skb);
1176 return 0;
1177}
1178
1179static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1180{
1181 switch (msg->data[0]) {
1182 case INQUIRY_STATUS:
1183 case INQUIRY_EXTENDED:
1184 mod->bec.rxerr = msg->data[5];
1185 mod->bec.txerr = msg->data[6];
1186 complete(&mod->buserror_comp);
1187 break;
1188 case INQUIRY_TERMINATION:
1189 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1190 complete(&mod->termination_comp);
1191 break;
1192 default:
1193 netdev_err(mod->ndev, "received an unknown inquiry response\n");
1194 break;
1195 }
1196}
1197
1198/* Handle NMTS Slave Event Indication Messages from the firmware */
1199static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)
1200{
1201 u16 subspec;
1202
1203 subspec = msg->data[0] + msg->data[1] * 0x100;
1204 if (subspec == NMTS_SLAVE_EVENT_IND) {
1205 switch (msg->data[2]) {
1206 case NE_LOCAL_OCCURRED:
1207 case NE_LOCAL_RESOLVED:
1208 /* now follows the same message as Raw ICANOS CEVTIND
1209 * shift the data at the same place and call this method
1210 */
1211 le16_add_cpu(&msg->len, -3);
1212 memmove(msg->data, msg->data + 3, le16_to_cpu(msg->len));
1213 ican3_handle_cevtind(mod, msg);
1214 break;
1215 case NE_REMOTE_OCCURRED:
1216 case NE_REMOTE_RESOLVED:
1217 /* should not occurre, ignore */
1218 break;
1219 default:
1220 netdev_warn(mod->ndev, "unknown NMTS event indication %x\n",
1221 msg->data[2]);
1222 break;
1223 }
1224 } else if (subspec == NMTS_SLAVE_STATE_IND) {
1225 /* ignore state indications */
1226 } else {
1227 netdev_warn(mod->ndev, "unhandled NMTS indication %x\n",
1228 subspec);
1229 return;
1230 }
1231}
1232
1233static void ican3_handle_unknown_message(struct ican3_dev *mod,
1234 struct ican3_msg *msg)
1235{
1236 netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
1237 msg->spec, le16_to_cpu(msg->len));
1238}
1239
1240/*
1241 * Handle a control message from the firmware
1242 */
1243static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1244{
1245 netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1246 mod->num, msg->spec, le16_to_cpu(msg->len));
1247
1248 switch (msg->spec) {
1249 case MSG_IDVERS:
1250 ican3_handle_idvers(mod, msg);
1251 break;
1252 case MSG_MSGLOST:
1253 case MSG_FMSGLOST:
1254 ican3_handle_msglost(mod, msg);
1255 break;
1256 case MSG_CEVTIND:
1257 ican3_handle_cevtind(mod, msg);
1258 break;
1259 case MSG_INQUIRY:
1260 ican3_handle_inquiry(mod, msg);
1261 break;
1262 case MSG_NMTS:
1263 ican3_handle_nmtsind(mod, msg);
1264 break;
1265 default:
1266 ican3_handle_unknown_message(mod, msg);
1267 break;
1268 }
1269}
1270
1271/*
1272 * The ican3 needs to store all echo skbs, and therefore cannot
1273 * use the generic infrastructure for this.
1274 */
1275static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1276{
1277 skb = can_create_echo_skb(skb);
1278 if (!skb)
1279 return;
1280
1281 skb_tx_timestamp(skb);
1282
1283 /* save this skb for tx interrupt echo handling */
1284 skb_queue_tail(&mod->echoq, skb);
1285}
1286
1287static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1288{
1289 struct sk_buff *skb = skb_dequeue(&mod->echoq);
1290 struct can_frame *cf;
1291 u8 dlc = 0;
1292
1293 /* this should never trigger unless there is a driver bug */
1294 if (!skb) {
1295 netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1296 return 0;
1297 }
1298
1299 cf = (struct can_frame *)skb->data;
1300 if (!(cf->can_id & CAN_RTR_FLAG))
1301 dlc = cf->len;
1302
1303 /* check flag whether this packet has to be looped back */
1304 if (skb->pkt_type != PACKET_LOOPBACK) {
1305 kfree_skb(skb);
1306 return dlc;
1307 }
1308
1309 skb->protocol = htons(ETH_P_CAN);
1310 skb->pkt_type = PACKET_BROADCAST;
1311 skb->ip_summed = CHECKSUM_UNNECESSARY;
1312 skb->dev = mod->ndev;
1313 netif_receive_skb(skb);
1314 return dlc;
1315}
1316
1317/*
1318 * Compare an skb with an existing echo skb
1319 *
1320 * This function will be used on devices which have a hardware loopback.
1321 * On these devices, this function can be used to compare a received skb
1322 * with the saved echo skbs so that the hardware echo skb can be dropped.
1323 *
1324 * Returns true if the skb's are identical, false otherwise.
1325 */
1326static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1327{
1328 struct can_frame *cf = (struct can_frame *)skb->data;
1329 struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1330 struct can_frame *echo_cf;
1331
1332 if (!echo_skb)
1333 return false;
1334
1335 echo_cf = (struct can_frame *)echo_skb->data;
1336 if (cf->can_id != echo_cf->can_id)
1337 return false;
1338
1339 if (cf->len != echo_cf->len)
1340 return false;
1341
1342 return memcmp(cf->data, echo_cf->data, cf->len) == 0;
1343}
1344
1345/*
1346 * Check that there is room in the TX ring to transmit another skb
1347 *
1348 * LOCKING: must hold mod->lock
1349 */
1350static bool ican3_txok(struct ican3_dev *mod)
1351{
1352 struct ican3_fast_desc __iomem *desc;
1353 u8 control;
1354
1355 /* check that we have echo queue space */
1356 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1357 return false;
1358
1359 /* copy the control bits of the descriptor */
1360 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1361 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1362 control = ioread8(&desc->control);
1363
1364 /* if the control bits are not valid, then we have no more space */
1365 if (!(control & DESC_VALID))
1366 return false;
1367
1368 return true;
1369}
1370
1371/*
1372 * Receive one CAN frame from the hardware
1373 *
1374 * CONTEXT: must be called from user context
1375 */
1376static int ican3_recv_skb(struct ican3_dev *mod)
1377{
1378 struct net_device *ndev = mod->ndev;
1379 struct net_device_stats *stats = &ndev->stats;
1380 struct ican3_fast_desc desc;
1381 void __iomem *desc_addr;
1382 struct can_frame *cf;
1383 struct sk_buff *skb;
1384 unsigned long flags;
1385
1386 spin_lock_irqsave(&mod->lock, flags);
1387
1388 /* copy the whole descriptor */
1389 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1390 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1391 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1392
1393 spin_unlock_irqrestore(&mod->lock, flags);
1394
1395 /* check that we actually have a CAN frame */
1396 if (!(desc.control & DESC_VALID))
1397 return -ENOBUFS;
1398
1399 /* allocate an skb */
1400 skb = alloc_can_skb(ndev, &cf);
1401 if (unlikely(skb == NULL)) {
1402 stats->rx_dropped++;
1403 goto err_noalloc;
1404 }
1405
1406 /* convert the ICAN3 frame into Linux CAN format */
1407 ican3_to_can_frame(mod, &desc, cf);
1408
1409 /*
1410 * If this is an ECHO frame received from the hardware loopback
1411 * feature, use the skb saved in the ECHO stack instead. This allows
1412 * the Linux CAN core to support CAN_RAW_RECV_OWN_MSGS correctly.
1413 *
1414 * Since this is a confirmation of a successfully transmitted packet
1415 * sent from this host, update the transmit statistics.
1416 *
1417 * Also, the netdevice queue needs to be allowed to send packets again.
1418 */
1419 if (ican3_echo_skb_matches(mod, skb)) {
1420 stats->tx_packets++;
1421 stats->tx_bytes += ican3_get_echo_skb(mod);
1422 kfree_skb(skb);
1423 goto err_noalloc;
1424 }
1425
1426 /* update statistics, receive the skb */
1427 stats->rx_packets++;
1428 if (!(cf->can_id & CAN_RTR_FLAG))
1429 stats->rx_bytes += cf->len;
1430 netif_receive_skb(skb);
1431
1432err_noalloc:
1433 /* toggle the valid bit and return the descriptor to the ring */
1434 desc.control ^= DESC_VALID;
1435
1436 spin_lock_irqsave(&mod->lock, flags);
1437
1438 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1439 memcpy_toio(desc_addr, &desc, 1);
1440
1441 /* update the next buffer pointer */
1442 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1443 : (mod->fastrx_num + 1);
1444
1445 /* there are still more buffers to process */
1446 spin_unlock_irqrestore(&mod->lock, flags);
1447 return 0;
1448}
1449
1450static int ican3_napi(struct napi_struct *napi, int budget)
1451{
1452 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
1453 unsigned long flags;
1454 int received = 0;
1455 int ret;
1456
1457 /* process all communication messages */
1458 while (true) {
1459 struct ican3_msg msg;
1460 ret = ican3_recv_msg(mod, &msg);
1461 if (ret)
1462 break;
1463
1464 ican3_handle_message(mod, &msg);
1465 }
1466
1467 /* process all CAN frames from the fast interface */
1468 while (received < budget) {
1469 ret = ican3_recv_skb(mod);
1470 if (ret)
1471 break;
1472
1473 received++;
1474 }
1475
1476 /* We have processed all packets that the adapter had, but it
1477 * was less than our budget, stop polling */
1478 if (received < budget)
1479 napi_complete_done(napi, received);
1480
1481 spin_lock_irqsave(&mod->lock, flags);
1482
1483 /* Wake up the transmit queue if necessary */
1484 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1485 netif_wake_queue(mod->ndev);
1486
1487 spin_unlock_irqrestore(&mod->lock, flags);
1488
1489 /* re-enable interrupt generation */
1490 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1491 return received;
1492}
1493
1494static irqreturn_t ican3_irq(int irq, void *dev_id)
1495{
1496 struct ican3_dev *mod = dev_id;
1497 u8 stat;
1498
1499 /*
1500 * The interrupt status register on this device reports interrupts
1501 * as zeroes instead of using ones like most other devices
1502 */
1503 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1504 if (stat == (1 << mod->num))
1505 return IRQ_NONE;
1506
1507 /* clear the MODULbus interrupt from the microcontroller */
1508 ioread8(&mod->dpmctrl->interrupt);
1509
1510 /* disable interrupt generation, schedule the NAPI poller */
1511 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1512 napi_schedule(&mod->napi);
1513 return IRQ_HANDLED;
1514}
1515
1516/*
1517 * Firmware reset, startup, and shutdown
1518 */
1519
1520/*
1521 * Reset an ICAN module to its power-on state
1522 *
1523 * CONTEXT: no network device registered
1524 */
1525static int ican3_reset_module(struct ican3_dev *mod)
1526{
1527 unsigned long start;
1528 u8 runold, runnew;
1529
1530 /* disable interrupts so no more work is scheduled */
1531 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1532
1533 /* the first unallocated page in the DPM is #9 */
1534 mod->free_page = DPM_FREE_START;
1535
1536 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1537 runold = ioread8(mod->dpm + TARGET_RUNNING);
1538
1539 /* reset the module */
1540 iowrite8(0x00, &mod->dpmctrl->hwreset);
1541
1542 /* wait until the module has finished resetting and is running */
1543 start = jiffies;
1544 do {
1545 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1546 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1547 if (runnew == (runold ^ 0xff))
1548 return 0;
1549
1550 msleep(10);
1551 } while (time_before(jiffies, start + HZ / 2));
1552
1553 netdev_err(mod->ndev, "failed to reset CAN module\n");
1554 return -ETIMEDOUT;
1555}
1556
1557static void ican3_shutdown_module(struct ican3_dev *mod)
1558{
1559 ican3_msg_disconnect(mod);
1560 ican3_reset_module(mod);
1561}
1562
1563/*
1564 * Startup an ICAN module, bringing it into fast mode
1565 */
1566static int ican3_startup_module(struct ican3_dev *mod)
1567{
1568 int ret;
1569
1570 ret = ican3_reset_module(mod);
1571 if (ret) {
1572 netdev_err(mod->ndev, "unable to reset module\n");
1573 return ret;
1574 }
1575
1576 /* detect firmware */
1577 memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
1578 if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
1579 netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
1580 return -ENODEV;
1581 }
1582 if (strstr(mod->fwinfo, "CAL/CANopen"))
1583 mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
1584 else
1585 mod->fwtype = ICAN3_FWTYPE_ICANOS;
1586
1587 /* re-enable interrupts so we can send messages */
1588 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1589
1590 ret = ican3_msg_connect(mod);
1591 if (ret) {
1592 netdev_err(mod->ndev, "unable to connect to module\n");
1593 return ret;
1594 }
1595
1596 ican3_init_new_host_interface(mod);
1597 ret = ican3_msg_newhostif(mod);
1598 if (ret) {
1599 netdev_err(mod->ndev, "unable to switch to new-style interface\n");
1600 return ret;
1601 }
1602
1603 /* default to "termination on" */
1604 ret = ican3_set_termination(mod, true);
1605 if (ret) {
1606 netdev_err(mod->ndev, "unable to enable termination\n");
1607 return ret;
1608 }
1609
1610 /* default to "bus errors enabled" */
1611 ret = ican3_set_buserror(mod, 1);
1612 if (ret) {
1613 netdev_err(mod->ndev, "unable to set bus-error\n");
1614 return ret;
1615 }
1616
1617 ican3_init_fast_host_interface(mod);
1618 ret = ican3_msg_fasthostif(mod);
1619 if (ret) {
1620 netdev_err(mod->ndev, "unable to switch to fast host interface\n");
1621 return ret;
1622 }
1623
1624 ret = ican3_set_id_filter(mod, true);
1625 if (ret) {
1626 netdev_err(mod->ndev, "unable to set acceptance filter\n");
1627 return ret;
1628 }
1629
1630 return 0;
1631}
1632
1633/*
1634 * CAN Network Device
1635 */
1636
1637static int ican3_open(struct net_device *ndev)
1638{
1639 struct ican3_dev *mod = netdev_priv(ndev);
1640 int ret;
1641
1642 /* open the CAN layer */
1643 ret = open_candev(ndev);
1644 if (ret) {
1645 netdev_err(mod->ndev, "unable to start CAN layer\n");
1646 return ret;
1647 }
1648
1649 /* bring the bus online */
1650 ret = ican3_set_bus_state(mod, true);
1651 if (ret) {
1652 netdev_err(mod->ndev, "unable to set bus-on\n");
1653 close_candev(ndev);
1654 return ret;
1655 }
1656
1657 /* start up the network device */
1658 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1659 netif_start_queue(ndev);
1660
1661 return 0;
1662}
1663
1664static int ican3_stop(struct net_device *ndev)
1665{
1666 struct ican3_dev *mod = netdev_priv(ndev);
1667 int ret;
1668
1669 /* stop the network device xmit routine */
1670 netif_stop_queue(ndev);
1671 mod->can.state = CAN_STATE_STOPPED;
1672
1673 /* bring the bus offline, stop receiving packets */
1674 ret = ican3_set_bus_state(mod, false);
1675 if (ret) {
1676 netdev_err(mod->ndev, "unable to set bus-off\n");
1677 return ret;
1678 }
1679
1680 /* drop all outstanding echo skbs */
1681 skb_queue_purge(&mod->echoq);
1682
1683 /* close the CAN layer */
1684 close_candev(ndev);
1685 return 0;
1686}
1687
1688static netdev_tx_t ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1689{
1690 struct ican3_dev *mod = netdev_priv(ndev);
1691 struct can_frame *cf = (struct can_frame *)skb->data;
1692 struct ican3_fast_desc desc;
1693 void __iomem *desc_addr;
1694 unsigned long flags;
1695
1696 if (can_dev_dropped_skb(ndev, skb))
1697 return NETDEV_TX_OK;
1698
1699 spin_lock_irqsave(&mod->lock, flags);
1700
1701 /* check that we can actually transmit */
1702 if (!ican3_txok(mod)) {
1703 netdev_err(mod->ndev, "BUG: no free descriptors\n");
1704 spin_unlock_irqrestore(&mod->lock, flags);
1705 return NETDEV_TX_BUSY;
1706 }
1707
1708 /* copy the control bits of the descriptor */
1709 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1710 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1711 memset(&desc, 0, sizeof(desc));
1712 memcpy_fromio(&desc, desc_addr, 1);
1713
1714 /* convert the Linux CAN frame into ICAN3 format */
1715 can_frame_to_ican3(mod, cf, &desc);
1716
1717 /*
1718 * This hardware doesn't have TX-done notifications, so we'll try and
1719 * emulate it the best we can using ECHO skbs. Add the skb to the ECHO
1720 * stack. Upon packet reception, check if the ECHO skb and received
1721 * skb match, and use that to wake the queue.
1722 */
1723 ican3_put_echo_skb(mod, skb);
1724
1725 /*
1726 * the programming manual says that you must set the IVALID bit, then
1727 * interrupt, then set the valid bit. Quite weird, but it seems to be
1728 * required for this to work
1729 */
1730 desc.control |= DESC_IVALID;
1731 memcpy_toio(desc_addr, &desc, sizeof(desc));
1732
1733 /* generate a MODULbus interrupt to the microcontroller */
1734 iowrite8(0x01, &mod->dpmctrl->interrupt);
1735
1736 desc.control ^= DESC_VALID;
1737 memcpy_toio(desc_addr, &desc, sizeof(desc));
1738
1739 /* update the next buffer pointer */
1740 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1741 : (mod->fasttx_num + 1);
1742
1743 /* if there is no free descriptor space, stop the transmit queue */
1744 if (!ican3_txok(mod))
1745 netif_stop_queue(ndev);
1746
1747 spin_unlock_irqrestore(&mod->lock, flags);
1748 return NETDEV_TX_OK;
1749}
1750
1751static const struct net_device_ops ican3_netdev_ops = {
1752 .ndo_open = ican3_open,
1753 .ndo_stop = ican3_stop,
1754 .ndo_start_xmit = ican3_xmit,
1755 .ndo_change_mtu = can_change_mtu,
1756};
1757
1758static const struct ethtool_ops ican3_ethtool_ops = {
1759 .get_ts_info = ethtool_op_get_ts_info,
1760};
1761
1762/*
1763 * Low-level CAN Device
1764 */
1765
1766/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
1767static const struct can_bittiming_const ican3_bittiming_const = {
1768 .name = DRV_NAME,
1769 .tseg1_min = 1,
1770 .tseg1_max = 16,
1771 .tseg2_min = 1,
1772 .tseg2_max = 8,
1773 .sjw_max = 4,
1774 .brp_min = 1,
1775 .brp_max = 64,
1776 .brp_inc = 1,
1777};
1778
1779static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1780{
1781 struct ican3_dev *mod = netdev_priv(ndev);
1782 int ret;
1783
1784 if (mode != CAN_MODE_START)
1785 return -ENOTSUPP;
1786
1787 /* bring the bus online */
1788 ret = ican3_set_bus_state(mod, true);
1789 if (ret) {
1790 netdev_err(ndev, "unable to set bus-on\n");
1791 return ret;
1792 }
1793
1794 /* start up the network device */
1795 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1796
1797 if (netif_queue_stopped(ndev))
1798 netif_wake_queue(ndev);
1799
1800 return 0;
1801}
1802
1803static int ican3_get_berr_counter(const struct net_device *ndev,
1804 struct can_berr_counter *bec)
1805{
1806 struct ican3_dev *mod = netdev_priv(ndev);
1807 int ret;
1808
1809 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1810 if (ret)
1811 return ret;
1812
1813 if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) {
1814 netdev_info(mod->ndev, "%s timed out\n", __func__);
1815 return -ETIMEDOUT;
1816 }
1817
1818 bec->rxerr = mod->bec.rxerr;
1819 bec->txerr = mod->bec.txerr;
1820 return 0;
1821}
1822
1823/*
1824 * Sysfs Attributes
1825 */
1826
1827static ssize_t termination_show(struct device *dev,
1828 struct device_attribute *attr,
1829 char *buf)
1830{
1831 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1832 int ret;
1833
1834 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1835 if (ret)
1836 return ret;
1837
1838 if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) {
1839 netdev_info(mod->ndev, "%s timed out\n", __func__);
1840 return -ETIMEDOUT;
1841 }
1842
1843 return sysfs_emit(buf, "%u\n", mod->termination_enabled);
1844}
1845
1846static ssize_t termination_store(struct device *dev,
1847 struct device_attribute *attr,
1848 const char *buf, size_t count)
1849{
1850 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1851 unsigned long enable;
1852 int ret;
1853
1854 if (kstrtoul(buf, 0, &enable))
1855 return -EINVAL;
1856
1857 ret = ican3_set_termination(mod, enable);
1858 if (ret)
1859 return ret;
1860
1861 return count;
1862}
1863
1864static ssize_t fwinfo_show(struct device *dev,
1865 struct device_attribute *attr,
1866 char *buf)
1867{
1868 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1869
1870 return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
1871}
1872
1873static DEVICE_ATTR_RW(termination);
1874static DEVICE_ATTR_RO(fwinfo);
1875
1876static struct attribute *ican3_sysfs_attrs[] = {
1877 &dev_attr_termination.attr,
1878 &dev_attr_fwinfo.attr,
1879 NULL,
1880};
1881
1882static const struct attribute_group ican3_sysfs_attr_group = {
1883 .attrs = ican3_sysfs_attrs,
1884};
1885
1886/*
1887 * PCI Subsystem
1888 */
1889
1890static int ican3_probe(struct platform_device *pdev)
1891{
1892 struct janz_platform_data *pdata;
1893 struct net_device *ndev;
1894 struct ican3_dev *mod;
1895 struct resource *res;
1896 struct device *dev;
1897 int ret;
1898
1899 pdata = dev_get_platdata(&pdev->dev);
1900 if (!pdata)
1901 return -ENXIO;
1902
1903 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1904
1905 /* save the struct device for printing */
1906 dev = &pdev->dev;
1907
1908 /* allocate the CAN device and private data */
1909 ndev = alloc_candev(sizeof(*mod), 0);
1910 if (!ndev) {
1911 dev_err(dev, "unable to allocate CANdev\n");
1912 ret = -ENOMEM;
1913 goto out_return;
1914 }
1915
1916 platform_set_drvdata(pdev, ndev);
1917 mod = netdev_priv(ndev);
1918 mod->ndev = ndev;
1919 mod->num = pdata->modno;
1920 netif_napi_add_weight(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
1921 skb_queue_head_init(&mod->echoq);
1922 spin_lock_init(&mod->lock);
1923 init_completion(&mod->termination_comp);
1924 init_completion(&mod->buserror_comp);
1925
1926 /* setup device-specific sysfs attributes */
1927 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1928
1929 /* the first unallocated page in the DPM is 9 */
1930 mod->free_page = DPM_FREE_START;
1931
1932 ndev->netdev_ops = &ican3_netdev_ops;
1933 ndev->ethtool_ops = &ican3_ethtool_ops;
1934 ndev->flags |= IFF_ECHO;
1935 SET_NETDEV_DEV(ndev, &pdev->dev);
1936
1937 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1938 mod->can.bittiming_const = &ican3_bittiming_const;
1939 mod->can.do_set_mode = ican3_set_mode;
1940 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1941 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1942 | CAN_CTRLMODE_BERR_REPORTING
1943 | CAN_CTRLMODE_ONE_SHOT;
1944
1945 /* find our IRQ number */
1946 mod->irq = platform_get_irq(pdev, 0);
1947 if (mod->irq < 0) {
1948 ret = -ENODEV;
1949 goto out_free_ndev;
1950 }
1951
1952 ndev->irq = mod->irq;
1953
1954 /* get access to the MODULbus registers for this module */
1955 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1956 if (!res) {
1957 dev_err(dev, "MODULbus registers not found\n");
1958 ret = -ENODEV;
1959 goto out_free_ndev;
1960 }
1961
1962 mod->dpm = ioremap(res->start, resource_size(res));
1963 if (!mod->dpm) {
1964 dev_err(dev, "MODULbus registers not ioremap\n");
1965 ret = -ENOMEM;
1966 goto out_free_ndev;
1967 }
1968
1969 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1970
1971 /* get access to the control registers for this module */
1972 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1973 if (!res) {
1974 dev_err(dev, "CONTROL registers not found\n");
1975 ret = -ENODEV;
1976 goto out_iounmap_dpm;
1977 }
1978
1979 mod->ctrl = ioremap(res->start, resource_size(res));
1980 if (!mod->ctrl) {
1981 dev_err(dev, "CONTROL registers not ioremap\n");
1982 ret = -ENOMEM;
1983 goto out_iounmap_dpm;
1984 }
1985
1986 /* disable our IRQ, then hookup the IRQ handler */
1987 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1988 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1989 if (ret) {
1990 dev_err(dev, "unable to request IRQ\n");
1991 goto out_iounmap_ctrl;
1992 }
1993
1994 /* reset and initialize the CAN controller into fast mode */
1995 napi_enable(&mod->napi);
1996 ret = ican3_startup_module(mod);
1997 if (ret) {
1998 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1999 goto out_free_irq;
2000 }
2001
2002 /* register with the Linux CAN layer */
2003 ret = register_candev(ndev);
2004 if (ret) {
2005 dev_err(dev, "%s: unable to register CANdev\n", __func__);
2006 goto out_free_irq;
2007 }
2008
2009 netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
2010 return 0;
2011
2012out_free_irq:
2013 napi_disable(&mod->napi);
2014 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2015 free_irq(mod->irq, mod);
2016out_iounmap_ctrl:
2017 iounmap(mod->ctrl);
2018out_iounmap_dpm:
2019 iounmap(mod->dpm);
2020out_free_ndev:
2021 free_candev(ndev);
2022out_return:
2023 return ret;
2024}
2025
2026static void ican3_remove(struct platform_device *pdev)
2027{
2028 struct net_device *ndev = platform_get_drvdata(pdev);
2029 struct ican3_dev *mod = netdev_priv(ndev);
2030
2031 /* unregister the netdevice, stop interrupts */
2032 unregister_netdev(ndev);
2033 napi_disable(&mod->napi);
2034 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2035 free_irq(mod->irq, mod);
2036
2037 /* put the module into reset */
2038 ican3_shutdown_module(mod);
2039
2040 /* unmap all registers */
2041 iounmap(mod->ctrl);
2042 iounmap(mod->dpm);
2043
2044 free_candev(ndev);
2045}
2046
2047static struct platform_driver ican3_driver = {
2048 .driver = {
2049 .name = DRV_NAME,
2050 },
2051 .probe = ican3_probe,
2052 .remove_new = ican3_remove,
2053};
2054
2055module_platform_driver(ican3_driver);
2056
2057MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
2058MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
2059MODULE_LICENSE("GPL");
2060MODULE_ALIAS("platform:janz-ican3");
1/*
2 * Janz MODULbus VMOD-ICAN3 CAN Interface Driver
3 *
4 * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/interrupt.h>
16#include <linux/delay.h>
17#include <linux/platform_device.h>
18
19#include <linux/netdevice.h>
20#include <linux/can.h>
21#include <linux/can/dev.h>
22#include <linux/can/error.h>
23
24#include <linux/mfd/janz.h>
25#include <asm/io.h>
26
27/* the DPM has 64k of memory, organized into 256x 256 byte pages */
28#define DPM_NUM_PAGES 256
29#define DPM_PAGE_SIZE 256
30#define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
31
32/* JANZ ICAN3 "old-style" host interface queue page numbers */
33#define QUEUE_OLD_CONTROL 0
34#define QUEUE_OLD_RB0 1
35#define QUEUE_OLD_RB1 2
36#define QUEUE_OLD_WB0 3
37#define QUEUE_OLD_WB1 4
38
39/* Janz ICAN3 "old-style" host interface control registers */
40#define MSYNC_PEER 0x00 /* ICAN only */
41#define MSYNC_LOCL 0x01 /* host only */
42#define TARGET_RUNNING 0x02
43
44#define MSYNC_RB0 0x01
45#define MSYNC_RB1 0x02
46#define MSYNC_RBLW 0x04
47#define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
48
49#define MSYNC_WB0 0x10
50#define MSYNC_WB1 0x20
51#define MSYNC_WBLW 0x40
52#define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
53
54/* Janz ICAN3 "new-style" host interface queue page numbers */
55#define QUEUE_TOHOST 5
56#define QUEUE_FROMHOST_MID 6
57#define QUEUE_FROMHOST_HIGH 7
58#define QUEUE_FROMHOST_LOW 8
59
60/* The first free page in the DPM is #9 */
61#define DPM_FREE_START 9
62
63/* Janz ICAN3 "new-style" and "fast" host interface descriptor flags */
64#define DESC_VALID 0x80
65#define DESC_WRAP 0x40
66#define DESC_INTERRUPT 0x20
67#define DESC_IVALID 0x10
68#define DESC_LEN(len) (len)
69
70/* Janz ICAN3 Firmware Messages */
71#define MSG_CONNECTI 0x02
72#define MSG_DISCONNECT 0x03
73#define MSG_IDVERS 0x04
74#define MSG_MSGLOST 0x05
75#define MSG_NEWHOSTIF 0x08
76#define MSG_INQUIRY 0x0a
77#define MSG_SETAFILMASK 0x10
78#define MSG_INITFDPMQUEUE 0x11
79#define MSG_HWCONF 0x12
80#define MSG_FMSGLOST 0x15
81#define MSG_CEVTIND 0x37
82#define MSG_CBTRREQ 0x41
83#define MSG_COFFREQ 0x42
84#define MSG_CONREQ 0x43
85#define MSG_CCONFREQ 0x47
86
87/*
88 * Janz ICAN3 CAN Inquiry Message Types
89 *
90 * NOTE: there appears to be a firmware bug here. You must send
91 * NOTE: INQUIRY_STATUS and expect to receive an INQUIRY_EXTENDED
92 * NOTE: response. The controller never responds to a message with
93 * NOTE: the INQUIRY_EXTENDED subspec :(
94 */
95#define INQUIRY_STATUS 0x00
96#define INQUIRY_TERMINATION 0x01
97#define INQUIRY_EXTENDED 0x04
98
99/* Janz ICAN3 CAN Set Acceptance Filter Mask Message Types */
100#define SETAFILMASK_REJECT 0x00
101#define SETAFILMASK_FASTIF 0x02
102
103/* Janz ICAN3 CAN Hardware Configuration Message Types */
104#define HWCONF_TERMINATE_ON 0x01
105#define HWCONF_TERMINATE_OFF 0x00
106
107/* Janz ICAN3 CAN Event Indication Message Types */
108#define CEVTIND_EI 0x01
109#define CEVTIND_DOI 0x02
110#define CEVTIND_LOST 0x04
111#define CEVTIND_FULL 0x08
112#define CEVTIND_BEI 0x10
113
114#define CEVTIND_CHIP_SJA1000 0x02
115
116#define ICAN3_BUSERR_QUOTA_MAX 255
117
118/* Janz ICAN3 CAN Frame Conversion */
119#define ICAN3_ECHO 0x10
120#define ICAN3_EFF_RTR 0x40
121#define ICAN3_SFF_RTR 0x10
122#define ICAN3_EFF 0x80
123
124#define ICAN3_CAN_TYPE_MASK 0x0f
125#define ICAN3_CAN_TYPE_SFF 0x00
126#define ICAN3_CAN_TYPE_EFF 0x01
127
128#define ICAN3_CAN_DLC_MASK 0x0f
129
130/*
131 * SJA1000 Status and Error Register Definitions
132 *
133 * Copied from drivers/net/can/sja1000/sja1000.h
134 */
135
136/* status register content */
137#define SR_BS 0x80
138#define SR_ES 0x40
139#define SR_TS 0x20
140#define SR_RS 0x10
141#define SR_TCS 0x08
142#define SR_TBS 0x04
143#define SR_DOS 0x02
144#define SR_RBS 0x01
145
146#define SR_CRIT (SR_BS|SR_ES)
147
148/* ECC register */
149#define ECC_SEG 0x1F
150#define ECC_DIR 0x20
151#define ECC_ERR 6
152#define ECC_BIT 0x00
153#define ECC_FORM 0x40
154#define ECC_STUFF 0x80
155#define ECC_MASK 0xc0
156
157/* Number of buffers for use in the "new-style" host interface */
158#define ICAN3_NEW_BUFFERS 16
159
160/* Number of buffers for use in the "fast" host interface */
161#define ICAN3_TX_BUFFERS 512
162#define ICAN3_RX_BUFFERS 1024
163
164/* SJA1000 Clock Input */
165#define ICAN3_CAN_CLOCK 8000000
166
167/* Driver Name */
168#define DRV_NAME "janz-ican3"
169
170/* DPM Control Registers -- starts at offset 0x100 in the MODULbus registers */
171struct ican3_dpm_control {
172 /* window address register */
173 u8 window_address;
174 u8 unused1;
175
176 /*
177 * Read access: clear interrupt from microcontroller
178 * Write access: send interrupt to microcontroller
179 */
180 u8 interrupt;
181 u8 unused2;
182
183 /* write-only: reset all hardware on the module */
184 u8 hwreset;
185 u8 unused3;
186
187 /* write-only: generate an interrupt to the TPU */
188 u8 tpuinterrupt;
189};
190
191struct ican3_dev {
192
193 /* must be the first member */
194 struct can_priv can;
195
196 /* CAN network device */
197 struct net_device *ndev;
198 struct napi_struct napi;
199
200 /* Device for printing */
201 struct device *dev;
202
203 /* module number */
204 unsigned int num;
205
206 /* base address of registers and IRQ */
207 struct janz_cmodio_onboard_regs __iomem *ctrl;
208 struct ican3_dpm_control __iomem *dpmctrl;
209 void __iomem *dpm;
210 int irq;
211
212 /* CAN bus termination status */
213 struct completion termination_comp;
214 bool termination_enabled;
215
216 /* CAN bus error status registers */
217 struct completion buserror_comp;
218 struct can_berr_counter bec;
219
220 /* old and new style host interface */
221 unsigned int iftype;
222
223 /*
224 * Any function which changes the current DPM page must hold this
225 * lock while it is performing data accesses. This ensures that the
226 * function will not be preempted and end up reading data from a
227 * different DPM page than it expects.
228 */
229 spinlock_t lock;
230
231 /* new host interface */
232 unsigned int rx_int;
233 unsigned int rx_num;
234 unsigned int tx_num;
235
236 /* fast host interface */
237 unsigned int fastrx_start;
238 unsigned int fastrx_int;
239 unsigned int fastrx_num;
240 unsigned int fasttx_start;
241 unsigned int fasttx_num;
242
243 /* first free DPM page */
244 unsigned int free_page;
245};
246
247struct ican3_msg {
248 u8 control;
249 u8 spec;
250 __le16 len;
251 u8 data[252];
252};
253
254struct ican3_new_desc {
255 u8 control;
256 u8 pointer;
257};
258
259struct ican3_fast_desc {
260 u8 control;
261 u8 command;
262 u8 data[14];
263};
264
265/* write to the window basic address register */
266static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
267{
268 BUG_ON(page >= DPM_NUM_PAGES);
269 iowrite8(page, &mod->dpmctrl->window_address);
270}
271
272/*
273 * ICAN3 "old-style" host interface
274 */
275
276/*
277 * Receive a message from the ICAN3 "old-style" firmware interface
278 *
279 * LOCKING: must hold mod->lock
280 *
281 * returns 0 on success, -ENOMEM when no message exists
282 */
283static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
284{
285 unsigned int mbox, mbox_page;
286 u8 locl, peer, xord;
287
288 /* get the MSYNC registers */
289 ican3_set_page(mod, QUEUE_OLD_CONTROL);
290 peer = ioread8(mod->dpm + MSYNC_PEER);
291 locl = ioread8(mod->dpm + MSYNC_LOCL);
292 xord = locl ^ peer;
293
294 if ((xord & MSYNC_RB_MASK) == 0x00) {
295 dev_dbg(mod->dev, "no mbox for reading\n");
296 return -ENOMEM;
297 }
298
299 /* find the first free mbox to read */
300 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
301 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
302 else
303 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
304
305 /* copy the message */
306 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
307 ican3_set_page(mod, mbox_page);
308 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
309
310 /*
311 * notify the firmware that the read buffer is available
312 * for it to fill again
313 */
314 locl ^= mbox;
315
316 ican3_set_page(mod, QUEUE_OLD_CONTROL);
317 iowrite8(locl, mod->dpm + MSYNC_LOCL);
318 return 0;
319}
320
321/*
322 * Send a message through the "old-style" firmware interface
323 *
324 * LOCKING: must hold mod->lock
325 *
326 * returns 0 on success, -ENOMEM when no free space exists
327 */
328static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
329{
330 unsigned int mbox, mbox_page;
331 u8 locl, peer, xord;
332
333 /* get the MSYNC registers */
334 ican3_set_page(mod, QUEUE_OLD_CONTROL);
335 peer = ioread8(mod->dpm + MSYNC_PEER);
336 locl = ioread8(mod->dpm + MSYNC_LOCL);
337 xord = locl ^ peer;
338
339 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
340 dev_err(mod->dev, "no mbox for writing\n");
341 return -ENOMEM;
342 }
343
344 /* calculate a free mbox to use */
345 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
346
347 /* copy the message to the DPM */
348 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
349 ican3_set_page(mod, mbox_page);
350 memcpy_toio(mod->dpm, msg, sizeof(*msg));
351
352 locl ^= mbox;
353 if (mbox == MSYNC_WB1)
354 locl |= MSYNC_WBLW;
355
356 ican3_set_page(mod, QUEUE_OLD_CONTROL);
357 iowrite8(locl, mod->dpm + MSYNC_LOCL);
358 return 0;
359}
360
361/*
362 * ICAN3 "new-style" Host Interface Setup
363 */
364
365static void __devinit ican3_init_new_host_interface(struct ican3_dev *mod)
366{
367 struct ican3_new_desc desc;
368 unsigned long flags;
369 void __iomem *dst;
370 int i;
371
372 spin_lock_irqsave(&mod->lock, flags);
373
374 /* setup the internal datastructures for RX */
375 mod->rx_num = 0;
376 mod->rx_int = 0;
377
378 /* tohost queue descriptors are in page 5 */
379 ican3_set_page(mod, QUEUE_TOHOST);
380 dst = mod->dpm;
381
382 /* initialize the tohost (rx) queue descriptors: pages 9-24 */
383 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
384 desc.control = DESC_INTERRUPT | DESC_LEN(1); /* I L=1 */
385 desc.pointer = mod->free_page;
386
387 /* set wrap flag on last buffer */
388 if (i == ICAN3_NEW_BUFFERS - 1)
389 desc.control |= DESC_WRAP;
390
391 memcpy_toio(dst, &desc, sizeof(desc));
392 dst += sizeof(desc);
393 mod->free_page++;
394 }
395
396 /* fromhost (tx) mid queue descriptors are in page 6 */
397 ican3_set_page(mod, QUEUE_FROMHOST_MID);
398 dst = mod->dpm;
399
400 /* setup the internal datastructures for TX */
401 mod->tx_num = 0;
402
403 /* initialize the fromhost mid queue descriptors: pages 25-40 */
404 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
405 desc.control = DESC_VALID | DESC_LEN(1); /* V L=1 */
406 desc.pointer = mod->free_page;
407
408 /* set wrap flag on last buffer */
409 if (i == ICAN3_NEW_BUFFERS - 1)
410 desc.control |= DESC_WRAP;
411
412 memcpy_toio(dst, &desc, sizeof(desc));
413 dst += sizeof(desc);
414 mod->free_page++;
415 }
416
417 /* fromhost hi queue descriptors are in page 7 */
418 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
419 dst = mod->dpm;
420
421 /* initialize only a single buffer in the fromhost hi queue (unused) */
422 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
423 desc.pointer = mod->free_page;
424 memcpy_toio(dst, &desc, sizeof(desc));
425 mod->free_page++;
426
427 /* fromhost low queue descriptors are in page 8 */
428 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
429 dst = mod->dpm;
430
431 /* initialize only a single buffer in the fromhost low queue (unused) */
432 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1); /* VW L=1 */
433 desc.pointer = mod->free_page;
434 memcpy_toio(dst, &desc, sizeof(desc));
435 mod->free_page++;
436
437 spin_unlock_irqrestore(&mod->lock, flags);
438}
439
440/*
441 * ICAN3 Fast Host Interface Setup
442 */
443
444static void __devinit ican3_init_fast_host_interface(struct ican3_dev *mod)
445{
446 struct ican3_fast_desc desc;
447 unsigned long flags;
448 unsigned int addr;
449 void __iomem *dst;
450 int i;
451
452 spin_lock_irqsave(&mod->lock, flags);
453
454 /* save the start recv page */
455 mod->fastrx_start = mod->free_page;
456 mod->fastrx_num = 0;
457 mod->fastrx_int = 0;
458
459 /* build a single fast tohost queue descriptor */
460 memset(&desc, 0, sizeof(desc));
461 desc.control = 0x00;
462 desc.command = 1;
463
464 /* build the tohost queue descriptor ring in memory */
465 addr = 0;
466 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
467
468 /* set the wrap bit on the last buffer */
469 if (i == ICAN3_RX_BUFFERS - 1)
470 desc.control |= DESC_WRAP;
471
472 /* switch to the correct page */
473 ican3_set_page(mod, mod->free_page);
474
475 /* copy the descriptor to the DPM */
476 dst = mod->dpm + addr;
477 memcpy_toio(dst, &desc, sizeof(desc));
478 addr += sizeof(desc);
479
480 /* move to the next page if necessary */
481 if (addr >= DPM_PAGE_SIZE) {
482 addr = 0;
483 mod->free_page++;
484 }
485 }
486
487 /* make sure we page-align the next queue */
488 if (addr != 0)
489 mod->free_page++;
490
491 /* save the start xmit page */
492 mod->fasttx_start = mod->free_page;
493 mod->fasttx_num = 0;
494
495 /* build a single fast fromhost queue descriptor */
496 memset(&desc, 0, sizeof(desc));
497 desc.control = DESC_VALID;
498 desc.command = 1;
499
500 /* build the fromhost queue descriptor ring in memory */
501 addr = 0;
502 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
503
504 /* set the wrap bit on the last buffer */
505 if (i == ICAN3_TX_BUFFERS - 1)
506 desc.control |= DESC_WRAP;
507
508 /* switch to the correct page */
509 ican3_set_page(mod, mod->free_page);
510
511 /* copy the descriptor to the DPM */
512 dst = mod->dpm + addr;
513 memcpy_toio(dst, &desc, sizeof(desc));
514 addr += sizeof(desc);
515
516 /* move to the next page if necessary */
517 if (addr >= DPM_PAGE_SIZE) {
518 addr = 0;
519 mod->free_page++;
520 }
521 }
522
523 spin_unlock_irqrestore(&mod->lock, flags);
524}
525
526/*
527 * ICAN3 "new-style" Host Interface Message Helpers
528 */
529
530/*
531 * LOCKING: must hold mod->lock
532 */
533static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
534{
535 struct ican3_new_desc desc;
536 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
537
538 /* switch to the fromhost mid queue, and read the buffer descriptor */
539 ican3_set_page(mod, QUEUE_FROMHOST_MID);
540 memcpy_fromio(&desc, desc_addr, sizeof(desc));
541
542 if (!(desc.control & DESC_VALID)) {
543 dev_dbg(mod->dev, "%s: no free buffers\n", __func__);
544 return -ENOMEM;
545 }
546
547 /* switch to the data page, copy the data */
548 ican3_set_page(mod, desc.pointer);
549 memcpy_toio(mod->dpm, msg, sizeof(*msg));
550
551 /* switch back to the descriptor, set the valid bit, write it back */
552 ican3_set_page(mod, QUEUE_FROMHOST_MID);
553 desc.control ^= DESC_VALID;
554 memcpy_toio(desc_addr, &desc, sizeof(desc));
555
556 /* update the tx number */
557 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
558 return 0;
559}
560
561/*
562 * LOCKING: must hold mod->lock
563 */
564static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
565{
566 struct ican3_new_desc desc;
567 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
568
569 /* switch to the tohost queue, and read the buffer descriptor */
570 ican3_set_page(mod, QUEUE_TOHOST);
571 memcpy_fromio(&desc, desc_addr, sizeof(desc));
572
573 if (!(desc.control & DESC_VALID)) {
574 dev_dbg(mod->dev, "%s: no buffers to recv\n", __func__);
575 return -ENOMEM;
576 }
577
578 /* switch to the data page, copy the data */
579 ican3_set_page(mod, desc.pointer);
580 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
581
582 /* switch back to the descriptor, toggle the valid bit, write it back */
583 ican3_set_page(mod, QUEUE_TOHOST);
584 desc.control ^= DESC_VALID;
585 memcpy_toio(desc_addr, &desc, sizeof(desc));
586
587 /* update the rx number */
588 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
589 return 0;
590}
591
592/*
593 * Message Send / Recv Helpers
594 */
595
596static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
597{
598 unsigned long flags;
599 int ret;
600
601 spin_lock_irqsave(&mod->lock, flags);
602
603 if (mod->iftype == 0)
604 ret = ican3_old_send_msg(mod, msg);
605 else
606 ret = ican3_new_send_msg(mod, msg);
607
608 spin_unlock_irqrestore(&mod->lock, flags);
609 return ret;
610}
611
612static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
613{
614 unsigned long flags;
615 int ret;
616
617 spin_lock_irqsave(&mod->lock, flags);
618
619 if (mod->iftype == 0)
620 ret = ican3_old_recv_msg(mod, msg);
621 else
622 ret = ican3_new_recv_msg(mod, msg);
623
624 spin_unlock_irqrestore(&mod->lock, flags);
625 return ret;
626}
627
628/*
629 * Quick Pre-constructed Messages
630 */
631
632static int __devinit ican3_msg_connect(struct ican3_dev *mod)
633{
634 struct ican3_msg msg;
635
636 memset(&msg, 0, sizeof(msg));
637 msg.spec = MSG_CONNECTI;
638 msg.len = cpu_to_le16(0);
639
640 return ican3_send_msg(mod, &msg);
641}
642
643static int __devexit ican3_msg_disconnect(struct ican3_dev *mod)
644{
645 struct ican3_msg msg;
646
647 memset(&msg, 0, sizeof(msg));
648 msg.spec = MSG_DISCONNECT;
649 msg.len = cpu_to_le16(0);
650
651 return ican3_send_msg(mod, &msg);
652}
653
654static int __devinit ican3_msg_newhostif(struct ican3_dev *mod)
655{
656 struct ican3_msg msg;
657 int ret;
658
659 memset(&msg, 0, sizeof(msg));
660 msg.spec = MSG_NEWHOSTIF;
661 msg.len = cpu_to_le16(0);
662
663 /* If we're not using the old interface, switching seems bogus */
664 WARN_ON(mod->iftype != 0);
665
666 ret = ican3_send_msg(mod, &msg);
667 if (ret)
668 return ret;
669
670 /* mark the module as using the new host interface */
671 mod->iftype = 1;
672 return 0;
673}
674
675static int __devinit ican3_msg_fasthostif(struct ican3_dev *mod)
676{
677 struct ican3_msg msg;
678 unsigned int addr;
679
680 memset(&msg, 0, sizeof(msg));
681 msg.spec = MSG_INITFDPMQUEUE;
682 msg.len = cpu_to_le16(8);
683
684 /* write the tohost queue start address */
685 addr = DPM_PAGE_ADDR(mod->fastrx_start);
686 msg.data[0] = addr & 0xff;
687 msg.data[1] = (addr >> 8) & 0xff;
688 msg.data[2] = (addr >> 16) & 0xff;
689 msg.data[3] = (addr >> 24) & 0xff;
690
691 /* write the fromhost queue start address */
692 addr = DPM_PAGE_ADDR(mod->fasttx_start);
693 msg.data[4] = addr & 0xff;
694 msg.data[5] = (addr >> 8) & 0xff;
695 msg.data[6] = (addr >> 16) & 0xff;
696 msg.data[7] = (addr >> 24) & 0xff;
697
698 /* If we're not using the new interface yet, we cannot do this */
699 WARN_ON(mod->iftype != 1);
700
701 return ican3_send_msg(mod, &msg);
702}
703
704/*
705 * Setup the CAN filter to either accept or reject all
706 * messages from the CAN bus.
707 */
708static int __devinit ican3_set_id_filter(struct ican3_dev *mod, bool accept)
709{
710 struct ican3_msg msg;
711 int ret;
712
713 /* Standard Frame Format */
714 memset(&msg, 0, sizeof(msg));
715 msg.spec = MSG_SETAFILMASK;
716 msg.len = cpu_to_le16(5);
717 msg.data[0] = 0x00; /* IDLo LSB */
718 msg.data[1] = 0x00; /* IDLo MSB */
719 msg.data[2] = 0xff; /* IDHi LSB */
720 msg.data[3] = 0x07; /* IDHi MSB */
721
722 /* accept all frames for fast host if, or reject all frames */
723 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
724
725 ret = ican3_send_msg(mod, &msg);
726 if (ret)
727 return ret;
728
729 /* Extended Frame Format */
730 memset(&msg, 0, sizeof(msg));
731 msg.spec = MSG_SETAFILMASK;
732 msg.len = cpu_to_le16(13);
733 msg.data[0] = 0; /* MUX = 0 */
734 msg.data[1] = 0x00; /* IDLo LSB */
735 msg.data[2] = 0x00;
736 msg.data[3] = 0x00;
737 msg.data[4] = 0x20; /* IDLo MSB */
738 msg.data[5] = 0xff; /* IDHi LSB */
739 msg.data[6] = 0xff;
740 msg.data[7] = 0xff;
741 msg.data[8] = 0x3f; /* IDHi MSB */
742
743 /* accept all frames for fast host if, or reject all frames */
744 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
745
746 return ican3_send_msg(mod, &msg);
747}
748
749/*
750 * Bring the CAN bus online or offline
751 */
752static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
753{
754 struct ican3_msg msg;
755
756 memset(&msg, 0, sizeof(msg));
757 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
758 msg.len = cpu_to_le16(0);
759
760 return ican3_send_msg(mod, &msg);
761}
762
763static int ican3_set_termination(struct ican3_dev *mod, bool on)
764{
765 struct ican3_msg msg;
766
767 memset(&msg, 0, sizeof(msg));
768 msg.spec = MSG_HWCONF;
769 msg.len = cpu_to_le16(2);
770 msg.data[0] = 0x00;
771 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
772
773 return ican3_send_msg(mod, &msg);
774}
775
776static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
777{
778 struct ican3_msg msg;
779
780 memset(&msg, 0, sizeof(msg));
781 msg.spec = MSG_INQUIRY;
782 msg.len = cpu_to_le16(2);
783 msg.data[0] = subspec;
784 msg.data[1] = 0x00;
785
786 return ican3_send_msg(mod, &msg);
787}
788
789static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
790{
791 struct ican3_msg msg;
792
793 memset(&msg, 0, sizeof(msg));
794 msg.spec = MSG_CCONFREQ;
795 msg.len = cpu_to_le16(2);
796 msg.data[0] = 0x00;
797 msg.data[1] = quota;
798
799 return ican3_send_msg(mod, &msg);
800}
801
802/*
803 * ICAN3 to Linux CAN Frame Conversion
804 */
805
806static void ican3_to_can_frame(struct ican3_dev *mod,
807 struct ican3_fast_desc *desc,
808 struct can_frame *cf)
809{
810 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
811 if (desc->data[1] & ICAN3_SFF_RTR)
812 cf->can_id |= CAN_RTR_FLAG;
813
814 cf->can_id |= desc->data[0] << 3;
815 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
816 cf->can_dlc = desc->data[1] & ICAN3_CAN_DLC_MASK;
817 memcpy(cf->data, &desc->data[2], sizeof(cf->data));
818 } else {
819 cf->can_dlc = desc->data[0] & ICAN3_CAN_DLC_MASK;
820 if (desc->data[0] & ICAN3_EFF_RTR)
821 cf->can_id |= CAN_RTR_FLAG;
822
823 if (desc->data[0] & ICAN3_EFF) {
824 cf->can_id |= CAN_EFF_FLAG;
825 cf->can_id |= desc->data[2] << 21; /* 28-21 */
826 cf->can_id |= desc->data[3] << 13; /* 20-13 */
827 cf->can_id |= desc->data[4] << 5; /* 12-5 */
828 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
829 } else {
830 cf->can_id |= desc->data[2] << 3; /* 10-3 */
831 cf->can_id |= desc->data[3] >> 5; /* 2-0 */
832 }
833
834 memcpy(cf->data, &desc->data[6], sizeof(cf->data));
835 }
836}
837
838static void can_frame_to_ican3(struct ican3_dev *mod,
839 struct can_frame *cf,
840 struct ican3_fast_desc *desc)
841{
842 /* clear out any stale data in the descriptor */
843 memset(desc->data, 0, sizeof(desc->data));
844
845 /* we always use the extended format, with the ECHO flag set */
846 desc->command = ICAN3_CAN_TYPE_EFF;
847 desc->data[0] |= cf->can_dlc;
848 desc->data[1] |= ICAN3_ECHO;
849
850 if (cf->can_id & CAN_RTR_FLAG)
851 desc->data[0] |= ICAN3_EFF_RTR;
852
853 /* pack the id into the correct places */
854 if (cf->can_id & CAN_EFF_FLAG) {
855 desc->data[0] |= ICAN3_EFF;
856 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21; /* 28-21 */
857 desc->data[3] = (cf->can_id & 0x001fe000) >> 13; /* 20-13 */
858 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5; /* 12-5 */
859 desc->data[5] = (cf->can_id & 0x0000001f) << 3; /* 4-0 */
860 } else {
861 desc->data[2] = (cf->can_id & 0x7F8) >> 3; /* bits 10-3 */
862 desc->data[3] = (cf->can_id & 0x007) << 5; /* bits 2-0 */
863 }
864
865 /* copy the data bits into the descriptor */
866 memcpy(&desc->data[6], cf->data, sizeof(cf->data));
867}
868
869/*
870 * Interrupt Handling
871 */
872
873/*
874 * Handle an ID + Version message response from the firmware. We never generate
875 * this message in production code, but it is very useful when debugging to be
876 * able to display this message.
877 */
878static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
879{
880 dev_dbg(mod->dev, "IDVERS response: %s\n", msg->data);
881}
882
883static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
884{
885 struct net_device *dev = mod->ndev;
886 struct net_device_stats *stats = &dev->stats;
887 struct can_frame *cf;
888 struct sk_buff *skb;
889
890 /*
891 * Report that communication messages with the microcontroller firmware
892 * are being lost. These are never CAN frames, so we do not generate an
893 * error frame for userspace
894 */
895 if (msg->spec == MSG_MSGLOST) {
896 dev_err(mod->dev, "lost %d control messages\n", msg->data[0]);
897 return;
898 }
899
900 /*
901 * Oops, this indicates that we have lost messages in the fast queue,
902 * which are exclusively CAN messages. Our driver isn't reading CAN
903 * frames fast enough.
904 *
905 * We'll pretend that the SJA1000 told us that it ran out of buffer
906 * space, because there is not a better message for this.
907 */
908 skb = alloc_can_err_skb(dev, &cf);
909 if (skb) {
910 cf->can_id |= CAN_ERR_CRTL;
911 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
912 stats->rx_errors++;
913 stats->rx_bytes += cf->can_dlc;
914 netif_rx(skb);
915 }
916}
917
918/*
919 * Handle CAN Event Indication Messages from the firmware
920 *
921 * The ICAN3 firmware provides the values of some SJA1000 registers when it
922 * generates this message. The code below is largely copied from the
923 * drivers/net/can/sja1000/sja1000.c file, and adapted as necessary
924 */
925static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
926{
927 struct net_device *dev = mod->ndev;
928 struct net_device_stats *stats = &dev->stats;
929 enum can_state state = mod->can.state;
930 u8 status, isrc, rxerr, txerr;
931 struct can_frame *cf;
932 struct sk_buff *skb;
933
934 /* we can only handle the SJA1000 part */
935 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
936 dev_err(mod->dev, "unable to handle errors on non-SJA1000\n");
937 return -ENODEV;
938 }
939
940 /* check the message length for sanity */
941 if (le16_to_cpu(msg->len) < 6) {
942 dev_err(mod->dev, "error message too short\n");
943 return -EINVAL;
944 }
945
946 skb = alloc_can_err_skb(dev, &cf);
947 if (skb == NULL)
948 return -ENOMEM;
949
950 isrc = msg->data[0];
951 status = msg->data[3];
952 rxerr = msg->data[4];
953 txerr = msg->data[5];
954
955 /* data overrun interrupt */
956 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
957 dev_dbg(mod->dev, "data overrun interrupt\n");
958 cf->can_id |= CAN_ERR_CRTL;
959 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
960 stats->rx_over_errors++;
961 stats->rx_errors++;
962 }
963
964 /* error warning + passive interrupt */
965 if (isrc == CEVTIND_EI) {
966 dev_dbg(mod->dev, "error warning + passive interrupt\n");
967 if (status & SR_BS) {
968 state = CAN_STATE_BUS_OFF;
969 cf->can_id |= CAN_ERR_BUSOFF;
970 can_bus_off(dev);
971 } else if (status & SR_ES) {
972 if (rxerr >= 128 || txerr >= 128)
973 state = CAN_STATE_ERROR_PASSIVE;
974 else
975 state = CAN_STATE_ERROR_WARNING;
976 } else {
977 state = CAN_STATE_ERROR_ACTIVE;
978 }
979 }
980
981 /* bus error interrupt */
982 if (isrc == CEVTIND_BEI) {
983 u8 ecc = msg->data[2];
984
985 dev_dbg(mod->dev, "bus error interrupt\n");
986 mod->can.can_stats.bus_error++;
987 stats->rx_errors++;
988 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
989
990 switch (ecc & ECC_MASK) {
991 case ECC_BIT:
992 cf->data[2] |= CAN_ERR_PROT_BIT;
993 break;
994 case ECC_FORM:
995 cf->data[2] |= CAN_ERR_PROT_FORM;
996 break;
997 case ECC_STUFF:
998 cf->data[2] |= CAN_ERR_PROT_STUFF;
999 break;
1000 default:
1001 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
1002 cf->data[3] = ecc & ECC_SEG;
1003 break;
1004 }
1005
1006 if ((ecc & ECC_DIR) == 0)
1007 cf->data[2] |= CAN_ERR_PROT_TX;
1008
1009 cf->data[6] = txerr;
1010 cf->data[7] = rxerr;
1011 }
1012
1013 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1014 state == CAN_STATE_ERROR_PASSIVE)) {
1015 cf->can_id |= CAN_ERR_CRTL;
1016 if (state == CAN_STATE_ERROR_WARNING) {
1017 mod->can.can_stats.error_warning++;
1018 cf->data[1] = (txerr > rxerr) ?
1019 CAN_ERR_CRTL_TX_WARNING :
1020 CAN_ERR_CRTL_RX_WARNING;
1021 } else {
1022 mod->can.can_stats.error_passive++;
1023 cf->data[1] = (txerr > rxerr) ?
1024 CAN_ERR_CRTL_TX_PASSIVE :
1025 CAN_ERR_CRTL_RX_PASSIVE;
1026 }
1027
1028 cf->data[6] = txerr;
1029 cf->data[7] = rxerr;
1030 }
1031
1032 mod->can.state = state;
1033 stats->rx_errors++;
1034 stats->rx_bytes += cf->can_dlc;
1035 netif_rx(skb);
1036 return 0;
1037}
1038
1039static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1040{
1041 switch (msg->data[0]) {
1042 case INQUIRY_STATUS:
1043 case INQUIRY_EXTENDED:
1044 mod->bec.rxerr = msg->data[5];
1045 mod->bec.txerr = msg->data[6];
1046 complete(&mod->buserror_comp);
1047 break;
1048 case INQUIRY_TERMINATION:
1049 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1050 complete(&mod->termination_comp);
1051 break;
1052 default:
1053 dev_err(mod->dev, "received an unknown inquiry response\n");
1054 break;
1055 }
1056}
1057
1058static void ican3_handle_unknown_message(struct ican3_dev *mod,
1059 struct ican3_msg *msg)
1060{
1061 dev_warn(mod->dev, "received unknown message: spec 0x%.2x length %d\n",
1062 msg->spec, le16_to_cpu(msg->len));
1063}
1064
1065/*
1066 * Handle a control message from the firmware
1067 */
1068static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1069{
1070 dev_dbg(mod->dev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1071 mod->num, msg->spec, le16_to_cpu(msg->len));
1072
1073 switch (msg->spec) {
1074 case MSG_IDVERS:
1075 ican3_handle_idvers(mod, msg);
1076 break;
1077 case MSG_MSGLOST:
1078 case MSG_FMSGLOST:
1079 ican3_handle_msglost(mod, msg);
1080 break;
1081 case MSG_CEVTIND:
1082 ican3_handle_cevtind(mod, msg);
1083 break;
1084 case MSG_INQUIRY:
1085 ican3_handle_inquiry(mod, msg);
1086 break;
1087 default:
1088 ican3_handle_unknown_message(mod, msg);
1089 break;
1090 }
1091}
1092
1093/*
1094 * Check that there is room in the TX ring to transmit another skb
1095 *
1096 * LOCKING: must hold mod->lock
1097 */
1098static bool ican3_txok(struct ican3_dev *mod)
1099{
1100 struct ican3_fast_desc __iomem *desc;
1101 u8 control;
1102
1103 /* copy the control bits of the descriptor */
1104 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1105 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1106 control = ioread8(&desc->control);
1107
1108 /* if the control bits are not valid, then we have no more space */
1109 if (!(control & DESC_VALID))
1110 return false;
1111
1112 return true;
1113}
1114
1115/*
1116 * Receive one CAN frame from the hardware
1117 *
1118 * CONTEXT: must be called from user context
1119 */
1120static int ican3_recv_skb(struct ican3_dev *mod)
1121{
1122 struct net_device *ndev = mod->ndev;
1123 struct net_device_stats *stats = &ndev->stats;
1124 struct ican3_fast_desc desc;
1125 void __iomem *desc_addr;
1126 struct can_frame *cf;
1127 struct sk_buff *skb;
1128 unsigned long flags;
1129
1130 spin_lock_irqsave(&mod->lock, flags);
1131
1132 /* copy the whole descriptor */
1133 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1134 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1135 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1136
1137 spin_unlock_irqrestore(&mod->lock, flags);
1138
1139 /* check that we actually have a CAN frame */
1140 if (!(desc.control & DESC_VALID))
1141 return -ENOBUFS;
1142
1143 /* allocate an skb */
1144 skb = alloc_can_skb(ndev, &cf);
1145 if (unlikely(skb == NULL)) {
1146 stats->rx_dropped++;
1147 goto err_noalloc;
1148 }
1149
1150 /* convert the ICAN3 frame into Linux CAN format */
1151 ican3_to_can_frame(mod, &desc, cf);
1152
1153 /* receive the skb, update statistics */
1154 netif_receive_skb(skb);
1155 stats->rx_packets++;
1156 stats->rx_bytes += cf->can_dlc;
1157
1158err_noalloc:
1159 /* toggle the valid bit and return the descriptor to the ring */
1160 desc.control ^= DESC_VALID;
1161
1162 spin_lock_irqsave(&mod->lock, flags);
1163
1164 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1165 memcpy_toio(desc_addr, &desc, 1);
1166
1167 /* update the next buffer pointer */
1168 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1169 : (mod->fastrx_num + 1);
1170
1171 /* there are still more buffers to process */
1172 spin_unlock_irqrestore(&mod->lock, flags);
1173 return 0;
1174}
1175
1176static int ican3_napi(struct napi_struct *napi, int budget)
1177{
1178 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
1179 struct ican3_msg msg;
1180 unsigned long flags;
1181 int received = 0;
1182 int ret;
1183
1184 /* process all communication messages */
1185 while (true) {
1186 ret = ican3_recv_msg(mod, &msg);
1187 if (ret)
1188 break;
1189
1190 ican3_handle_message(mod, &msg);
1191 }
1192
1193 /* process all CAN frames from the fast interface */
1194 while (received < budget) {
1195 ret = ican3_recv_skb(mod);
1196 if (ret)
1197 break;
1198
1199 received++;
1200 }
1201
1202 /* We have processed all packets that the adapter had, but it
1203 * was less than our budget, stop polling */
1204 if (received < budget)
1205 napi_complete(napi);
1206
1207 spin_lock_irqsave(&mod->lock, flags);
1208
1209 /* Wake up the transmit queue if necessary */
1210 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1211 netif_wake_queue(mod->ndev);
1212
1213 spin_unlock_irqrestore(&mod->lock, flags);
1214
1215 /* re-enable interrupt generation */
1216 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1217 return received;
1218}
1219
1220static irqreturn_t ican3_irq(int irq, void *dev_id)
1221{
1222 struct ican3_dev *mod = dev_id;
1223 u8 stat;
1224
1225 /*
1226 * The interrupt status register on this device reports interrupts
1227 * as zeroes instead of using ones like most other devices
1228 */
1229 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1230 if (stat == (1 << mod->num))
1231 return IRQ_NONE;
1232
1233 /* clear the MODULbus interrupt from the microcontroller */
1234 ioread8(&mod->dpmctrl->interrupt);
1235
1236 /* disable interrupt generation, schedule the NAPI poller */
1237 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1238 napi_schedule(&mod->napi);
1239 return IRQ_HANDLED;
1240}
1241
1242/*
1243 * Firmware reset, startup, and shutdown
1244 */
1245
1246/*
1247 * Reset an ICAN module to its power-on state
1248 *
1249 * CONTEXT: no network device registered
1250 */
1251static int ican3_reset_module(struct ican3_dev *mod)
1252{
1253 u8 val = 1 << mod->num;
1254 unsigned long start;
1255 u8 runold, runnew;
1256
1257 /* disable interrupts so no more work is scheduled */
1258 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1259
1260 /* the first unallocated page in the DPM is #9 */
1261 mod->free_page = DPM_FREE_START;
1262
1263 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1264 runold = ioread8(mod->dpm + TARGET_RUNNING);
1265
1266 /* reset the module */
1267 iowrite8(val, &mod->ctrl->reset_assert);
1268 iowrite8(val, &mod->ctrl->reset_deassert);
1269
1270 /* wait until the module has finished resetting and is running */
1271 start = jiffies;
1272 do {
1273 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1274 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1275 if (runnew == (runold ^ 0xff))
1276 return 0;
1277
1278 msleep(10);
1279 } while (time_before(jiffies, start + HZ / 4));
1280
1281 dev_err(mod->dev, "failed to reset CAN module\n");
1282 return -ETIMEDOUT;
1283}
1284
1285static void __devexit ican3_shutdown_module(struct ican3_dev *mod)
1286{
1287 ican3_msg_disconnect(mod);
1288 ican3_reset_module(mod);
1289}
1290
1291/*
1292 * Startup an ICAN module, bringing it into fast mode
1293 */
1294static int __devinit ican3_startup_module(struct ican3_dev *mod)
1295{
1296 int ret;
1297
1298 ret = ican3_reset_module(mod);
1299 if (ret) {
1300 dev_err(mod->dev, "unable to reset module\n");
1301 return ret;
1302 }
1303
1304 /* re-enable interrupts so we can send messages */
1305 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1306
1307 ret = ican3_msg_connect(mod);
1308 if (ret) {
1309 dev_err(mod->dev, "unable to connect to module\n");
1310 return ret;
1311 }
1312
1313 ican3_init_new_host_interface(mod);
1314 ret = ican3_msg_newhostif(mod);
1315 if (ret) {
1316 dev_err(mod->dev, "unable to switch to new-style interface\n");
1317 return ret;
1318 }
1319
1320 /* default to "termination on" */
1321 ret = ican3_set_termination(mod, true);
1322 if (ret) {
1323 dev_err(mod->dev, "unable to enable termination\n");
1324 return ret;
1325 }
1326
1327 /* default to "bus errors enabled" */
1328 ret = ican3_set_buserror(mod, ICAN3_BUSERR_QUOTA_MAX);
1329 if (ret) {
1330 dev_err(mod->dev, "unable to set bus-error\n");
1331 return ret;
1332 }
1333
1334 ican3_init_fast_host_interface(mod);
1335 ret = ican3_msg_fasthostif(mod);
1336 if (ret) {
1337 dev_err(mod->dev, "unable to switch to fast host interface\n");
1338 return ret;
1339 }
1340
1341 ret = ican3_set_id_filter(mod, true);
1342 if (ret) {
1343 dev_err(mod->dev, "unable to set acceptance filter\n");
1344 return ret;
1345 }
1346
1347 return 0;
1348}
1349
1350/*
1351 * CAN Network Device
1352 */
1353
1354static int ican3_open(struct net_device *ndev)
1355{
1356 struct ican3_dev *mod = netdev_priv(ndev);
1357 u8 quota;
1358 int ret;
1359
1360 /* open the CAN layer */
1361 ret = open_candev(ndev);
1362 if (ret) {
1363 dev_err(mod->dev, "unable to start CAN layer\n");
1364 return ret;
1365 }
1366
1367 /* set the bus error generation state appropriately */
1368 if (mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
1369 quota = ICAN3_BUSERR_QUOTA_MAX;
1370 else
1371 quota = 0;
1372
1373 ret = ican3_set_buserror(mod, quota);
1374 if (ret) {
1375 dev_err(mod->dev, "unable to set bus-error\n");
1376 close_candev(ndev);
1377 return ret;
1378 }
1379
1380 /* bring the bus online */
1381 ret = ican3_set_bus_state(mod, true);
1382 if (ret) {
1383 dev_err(mod->dev, "unable to set bus-on\n");
1384 close_candev(ndev);
1385 return ret;
1386 }
1387
1388 /* start up the network device */
1389 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1390 netif_start_queue(ndev);
1391
1392 return 0;
1393}
1394
1395static int ican3_stop(struct net_device *ndev)
1396{
1397 struct ican3_dev *mod = netdev_priv(ndev);
1398 int ret;
1399
1400 /* stop the network device xmit routine */
1401 netif_stop_queue(ndev);
1402 mod->can.state = CAN_STATE_STOPPED;
1403
1404 /* bring the bus offline, stop receiving packets */
1405 ret = ican3_set_bus_state(mod, false);
1406 if (ret) {
1407 dev_err(mod->dev, "unable to set bus-off\n");
1408 return ret;
1409 }
1410
1411 /* close the CAN layer */
1412 close_candev(ndev);
1413 return 0;
1414}
1415
1416static int ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1417{
1418 struct ican3_dev *mod = netdev_priv(ndev);
1419 struct net_device_stats *stats = &ndev->stats;
1420 struct can_frame *cf = (struct can_frame *)skb->data;
1421 struct ican3_fast_desc desc;
1422 void __iomem *desc_addr;
1423 unsigned long flags;
1424
1425 spin_lock_irqsave(&mod->lock, flags);
1426
1427 /* check that we can actually transmit */
1428 if (!ican3_txok(mod)) {
1429 dev_err(mod->dev, "no free descriptors, stopping queue\n");
1430 netif_stop_queue(ndev);
1431 spin_unlock_irqrestore(&mod->lock, flags);
1432 return NETDEV_TX_BUSY;
1433 }
1434
1435 /* copy the control bits of the descriptor */
1436 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1437 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1438 memset(&desc, 0, sizeof(desc));
1439 memcpy_fromio(&desc, desc_addr, 1);
1440
1441 /* convert the Linux CAN frame into ICAN3 format */
1442 can_frame_to_ican3(mod, cf, &desc);
1443
1444 /*
1445 * the programming manual says that you must set the IVALID bit, then
1446 * interrupt, then set the valid bit. Quite weird, but it seems to be
1447 * required for this to work
1448 */
1449 desc.control |= DESC_IVALID;
1450 memcpy_toio(desc_addr, &desc, sizeof(desc));
1451
1452 /* generate a MODULbus interrupt to the microcontroller */
1453 iowrite8(0x01, &mod->dpmctrl->interrupt);
1454
1455 desc.control ^= DESC_VALID;
1456 memcpy_toio(desc_addr, &desc, sizeof(desc));
1457
1458 /* update the next buffer pointer */
1459 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1460 : (mod->fasttx_num + 1);
1461
1462 /* update statistics */
1463 stats->tx_packets++;
1464 stats->tx_bytes += cf->can_dlc;
1465 kfree_skb(skb);
1466
1467 /*
1468 * This hardware doesn't have TX-done notifications, so we'll try and
1469 * emulate it the best we can using ECHO skbs. Get the next TX
1470 * descriptor, and see if we have room to send. If not, stop the queue.
1471 * It will be woken when the ECHO skb for the current packet is recv'd.
1472 */
1473
1474 /* copy the control bits of the descriptor */
1475 if (!ican3_txok(mod))
1476 netif_stop_queue(ndev);
1477
1478 spin_unlock_irqrestore(&mod->lock, flags);
1479 return NETDEV_TX_OK;
1480}
1481
1482static const struct net_device_ops ican3_netdev_ops = {
1483 .ndo_open = ican3_open,
1484 .ndo_stop = ican3_stop,
1485 .ndo_start_xmit = ican3_xmit,
1486};
1487
1488/*
1489 * Low-level CAN Device
1490 */
1491
1492/* This structure was stolen from drivers/net/can/sja1000/sja1000.c */
1493static struct can_bittiming_const ican3_bittiming_const = {
1494 .name = DRV_NAME,
1495 .tseg1_min = 1,
1496 .tseg1_max = 16,
1497 .tseg2_min = 1,
1498 .tseg2_max = 8,
1499 .sjw_max = 4,
1500 .brp_min = 1,
1501 .brp_max = 64,
1502 .brp_inc = 1,
1503};
1504
1505/*
1506 * This routine was stolen from drivers/net/can/sja1000/sja1000.c
1507 *
1508 * The bittiming register command for the ICAN3 just sets the bit timing
1509 * registers on the SJA1000 chip directly
1510 */
1511static int ican3_set_bittiming(struct net_device *ndev)
1512{
1513 struct ican3_dev *mod = netdev_priv(ndev);
1514 struct can_bittiming *bt = &mod->can.bittiming;
1515 struct ican3_msg msg;
1516 u8 btr0, btr1;
1517
1518 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
1519 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
1520 (((bt->phase_seg2 - 1) & 0x7) << 4);
1521 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
1522 btr1 |= 0x80;
1523
1524 memset(&msg, 0, sizeof(msg));
1525 msg.spec = MSG_CBTRREQ;
1526 msg.len = cpu_to_le16(4);
1527 msg.data[0] = 0x00;
1528 msg.data[1] = 0x00;
1529 msg.data[2] = btr0;
1530 msg.data[3] = btr1;
1531
1532 return ican3_send_msg(mod, &msg);
1533}
1534
1535static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1536{
1537 struct ican3_dev *mod = netdev_priv(ndev);
1538 int ret;
1539
1540 if (mode != CAN_MODE_START)
1541 return -ENOTSUPP;
1542
1543 /* bring the bus online */
1544 ret = ican3_set_bus_state(mod, true);
1545 if (ret) {
1546 dev_err(mod->dev, "unable to set bus-on\n");
1547 return ret;
1548 }
1549
1550 /* start up the network device */
1551 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1552
1553 if (netif_queue_stopped(ndev))
1554 netif_wake_queue(ndev);
1555
1556 return 0;
1557}
1558
1559static int ican3_get_berr_counter(const struct net_device *ndev,
1560 struct can_berr_counter *bec)
1561{
1562 struct ican3_dev *mod = netdev_priv(ndev);
1563 int ret;
1564
1565 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1566 if (ret)
1567 return ret;
1568
1569 ret = wait_for_completion_timeout(&mod->buserror_comp, HZ);
1570 if (ret <= 0) {
1571 dev_info(mod->dev, "%s timed out\n", __func__);
1572 return -ETIMEDOUT;
1573 }
1574
1575 bec->rxerr = mod->bec.rxerr;
1576 bec->txerr = mod->bec.txerr;
1577 return 0;
1578}
1579
1580/*
1581 * Sysfs Attributes
1582 */
1583
1584static ssize_t ican3_sysfs_show_term(struct device *dev,
1585 struct device_attribute *attr,
1586 char *buf)
1587{
1588 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1589 int ret;
1590
1591 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1592 if (ret)
1593 return ret;
1594
1595 ret = wait_for_completion_timeout(&mod->termination_comp, HZ);
1596 if (ret <= 0) {
1597 dev_info(mod->dev, "%s timed out\n", __func__);
1598 return -ETIMEDOUT;
1599 }
1600
1601 return snprintf(buf, PAGE_SIZE, "%u\n", mod->termination_enabled);
1602}
1603
1604static ssize_t ican3_sysfs_set_term(struct device *dev,
1605 struct device_attribute *attr,
1606 const char *buf, size_t count)
1607{
1608 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1609 unsigned long enable;
1610 int ret;
1611
1612 if (strict_strtoul(buf, 0, &enable))
1613 return -EINVAL;
1614
1615 ret = ican3_set_termination(mod, enable);
1616 if (ret)
1617 return ret;
1618
1619 return count;
1620}
1621
1622static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term,
1623 ican3_sysfs_set_term);
1624
1625static struct attribute *ican3_sysfs_attrs[] = {
1626 &dev_attr_termination.attr,
1627 NULL,
1628};
1629
1630static struct attribute_group ican3_sysfs_attr_group = {
1631 .attrs = ican3_sysfs_attrs,
1632};
1633
1634/*
1635 * PCI Subsystem
1636 */
1637
1638static int __devinit ican3_probe(struct platform_device *pdev)
1639{
1640 struct janz_platform_data *pdata;
1641 struct net_device *ndev;
1642 struct ican3_dev *mod;
1643 struct resource *res;
1644 struct device *dev;
1645 int ret;
1646
1647 pdata = pdev->dev.platform_data;
1648 if (!pdata)
1649 return -ENXIO;
1650
1651 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1652
1653 /* save the struct device for printing */
1654 dev = &pdev->dev;
1655
1656 /* allocate the CAN device and private data */
1657 ndev = alloc_candev(sizeof(*mod), 0);
1658 if (!ndev) {
1659 dev_err(dev, "unable to allocate CANdev\n");
1660 ret = -ENOMEM;
1661 goto out_return;
1662 }
1663
1664 platform_set_drvdata(pdev, ndev);
1665 mod = netdev_priv(ndev);
1666 mod->ndev = ndev;
1667 mod->dev = &pdev->dev;
1668 mod->num = pdata->modno;
1669 netif_napi_add(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
1670 spin_lock_init(&mod->lock);
1671 init_completion(&mod->termination_comp);
1672 init_completion(&mod->buserror_comp);
1673
1674 /* setup device-specific sysfs attributes */
1675 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1676
1677 /* the first unallocated page in the DPM is 9 */
1678 mod->free_page = DPM_FREE_START;
1679
1680 ndev->netdev_ops = &ican3_netdev_ops;
1681 ndev->flags |= IFF_ECHO;
1682 SET_NETDEV_DEV(ndev, &pdev->dev);
1683
1684 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1685 mod->can.bittiming_const = &ican3_bittiming_const;
1686 mod->can.do_set_bittiming = ican3_set_bittiming;
1687 mod->can.do_set_mode = ican3_set_mode;
1688 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1689 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1690 | CAN_CTRLMODE_BERR_REPORTING;
1691
1692 /* find our IRQ number */
1693 mod->irq = platform_get_irq(pdev, 0);
1694 if (mod->irq < 0) {
1695 dev_err(dev, "IRQ line not found\n");
1696 ret = -ENODEV;
1697 goto out_free_ndev;
1698 }
1699
1700 ndev->irq = mod->irq;
1701
1702 /* get access to the MODULbus registers for this module */
1703 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1704 if (!res) {
1705 dev_err(dev, "MODULbus registers not found\n");
1706 ret = -ENODEV;
1707 goto out_free_ndev;
1708 }
1709
1710 mod->dpm = ioremap(res->start, resource_size(res));
1711 if (!mod->dpm) {
1712 dev_err(dev, "MODULbus registers not ioremap\n");
1713 ret = -ENOMEM;
1714 goto out_free_ndev;
1715 }
1716
1717 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1718
1719 /* get access to the control registers for this module */
1720 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1721 if (!res) {
1722 dev_err(dev, "CONTROL registers not found\n");
1723 ret = -ENODEV;
1724 goto out_iounmap_dpm;
1725 }
1726
1727 mod->ctrl = ioremap(res->start, resource_size(res));
1728 if (!mod->ctrl) {
1729 dev_err(dev, "CONTROL registers not ioremap\n");
1730 ret = -ENOMEM;
1731 goto out_iounmap_dpm;
1732 }
1733
1734 /* disable our IRQ, then hookup the IRQ handler */
1735 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1736 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1737 if (ret) {
1738 dev_err(dev, "unable to request IRQ\n");
1739 goto out_iounmap_ctrl;
1740 }
1741
1742 /* reset and initialize the CAN controller into fast mode */
1743 napi_enable(&mod->napi);
1744 ret = ican3_startup_module(mod);
1745 if (ret) {
1746 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1747 goto out_free_irq;
1748 }
1749
1750 /* register with the Linux CAN layer */
1751 ret = register_candev(ndev);
1752 if (ret) {
1753 dev_err(dev, "%s: unable to register CANdev\n", __func__);
1754 goto out_free_irq;
1755 }
1756
1757 dev_info(dev, "module %d: registered CAN device\n", pdata->modno);
1758 return 0;
1759
1760out_free_irq:
1761 napi_disable(&mod->napi);
1762 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1763 free_irq(mod->irq, mod);
1764out_iounmap_ctrl:
1765 iounmap(mod->ctrl);
1766out_iounmap_dpm:
1767 iounmap(mod->dpm);
1768out_free_ndev:
1769 free_candev(ndev);
1770out_return:
1771 return ret;
1772}
1773
1774static int __devexit ican3_remove(struct platform_device *pdev)
1775{
1776 struct net_device *ndev = platform_get_drvdata(pdev);
1777 struct ican3_dev *mod = netdev_priv(ndev);
1778
1779 /* unregister the netdevice, stop interrupts */
1780 unregister_netdev(ndev);
1781 napi_disable(&mod->napi);
1782 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1783 free_irq(mod->irq, mod);
1784
1785 /* put the module into reset */
1786 ican3_shutdown_module(mod);
1787
1788 /* unmap all registers */
1789 iounmap(mod->ctrl);
1790 iounmap(mod->dpm);
1791
1792 free_candev(ndev);
1793
1794 return 0;
1795}
1796
1797static struct platform_driver ican3_driver = {
1798 .driver = {
1799 .name = DRV_NAME,
1800 .owner = THIS_MODULE,
1801 },
1802 .probe = ican3_probe,
1803 .remove = __devexit_p(ican3_remove),
1804};
1805
1806static int __init ican3_init(void)
1807{
1808 return platform_driver_register(&ican3_driver);
1809}
1810
1811static void __exit ican3_exit(void)
1812{
1813 platform_driver_unregister(&ican3_driver);
1814}
1815
1816MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1817MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
1818MODULE_LICENSE("GPL");
1819MODULE_ALIAS("platform:janz-ican3");
1820
1821module_init(ican3_init);
1822module_exit(ican3_exit);