Linux Audio

Check our new training course

Loading...
Note: File does not exist in v6.8.
  1/*
  2 * Copyright (C) 2005 - 2011 Emulex
  3 * All rights reserved.
  4 *
  5 * This program is free software; you can redistribute it and/or
  6 * modify it under the terms of the GNU General Public License version 2
  7 * as published by the Free Software Foundation.  The full GNU General
  8 * Public License is included in this distribution in the file called COPYING.
  9 *
 10 * Contact Information:
 11 * linux-drivers@emulex.com
 12 *
 13 * Emulex
 14 * 3333 Susan Street
 15 * Costa Mesa, CA 92626
 16 */
 17
 18#ifndef BE_H
 19#define BE_H
 20
 21#include <linux/pci.h>
 22#include <linux/etherdevice.h>
 23#include <linux/delay.h>
 24#include <net/tcp.h>
 25#include <net/ip.h>
 26#include <net/ipv6.h>
 27#include <linux/if_vlan.h>
 28#include <linux/workqueue.h>
 29#include <linux/interrupt.h>
 30#include <linux/firmware.h>
 31#include <linux/slab.h>
 32
 33#include "be_hw.h"
 34
 35#define DRV_VER			"4.0.100u"
 36#define DRV_NAME		"be2net"
 37#define BE_NAME			"ServerEngines BladeEngine2 10Gbps NIC"
 38#define BE3_NAME		"ServerEngines BladeEngine3 10Gbps NIC"
 39#define OC_NAME			"Emulex OneConnect 10Gbps NIC"
 40#define OC_NAME_BE		OC_NAME	"(be3)"
 41#define OC_NAME_LANCER		OC_NAME "(Lancer)"
 42#define DRV_DESC		"ServerEngines BladeEngine 10Gbps NIC Driver"
 43
 44#define BE_VENDOR_ID 		0x19a2
 45#define EMULEX_VENDOR_ID	0x10df
 46#define BE_DEVICE_ID1		0x211
 47#define BE_DEVICE_ID2		0x221
 48#define OC_DEVICE_ID1		0x700	/* Device Id for BE2 cards */
 49#define OC_DEVICE_ID2		0x710	/* Device Id for BE3 cards */
 50#define OC_DEVICE_ID3		0xe220	/* Device id for Lancer cards */
 51#define OC_DEVICE_ID4           0xe228   /* Device id for VF in Lancer */
 52
 53static inline char *nic_name(struct pci_dev *pdev)
 54{
 55	switch (pdev->device) {
 56	case OC_DEVICE_ID1:
 57		return OC_NAME;
 58	case OC_DEVICE_ID2:
 59		return OC_NAME_BE;
 60	case OC_DEVICE_ID3:
 61	case OC_DEVICE_ID4:
 62		return OC_NAME_LANCER;
 63	case BE_DEVICE_ID2:
 64		return BE3_NAME;
 65	default:
 66		return BE_NAME;
 67	}
 68}
 69
 70/* Number of bytes of an RX frame that are copied to skb->data */
 71#define BE_HDR_LEN		((u16) 64)
 72#define BE_MAX_JUMBO_FRAME_SIZE	9018
 73#define BE_MIN_MTU		256
 74
 75#define BE_NUM_VLANS_SUPPORTED	64
 76#define BE_MAX_EQD		96
 77#define	BE_MAX_TX_FRAG_COUNT	30
 78
 79#define EVNT_Q_LEN		1024
 80#define TX_Q_LEN		2048
 81#define TX_CQ_LEN		1024
 82#define RX_Q_LEN		1024	/* Does not support any other value */
 83#define RX_CQ_LEN		1024
 84#define MCC_Q_LEN		128	/* total size not to exceed 8 pages */
 85#define MCC_CQ_LEN		256
 86
 87#define MAX_RSS_QS		4	/* BE limit is 4 queues/port */
 88#define MAX_RX_QS		(MAX_RSS_QS + 1) /* RSS qs + 1 def Rx */
 89#define MAX_TX_QS		8
 90#define BE_MAX_MSIX_VECTORS	(MAX_RX_QS + 1)/* RX + TX */
 91#define BE_NAPI_WEIGHT		64
 92#define MAX_RX_POST 		BE_NAPI_WEIGHT /* Frags posted at a time */
 93#define RX_FRAGS_REFILL_WM	(RX_Q_LEN - MAX_RX_POST)
 94
 95#define FW_VER_LEN		32
 96
 97struct be_dma_mem {
 98	void *va;
 99	dma_addr_t dma;
100	u32 size;
101};
102
103struct be_queue_info {
104	struct be_dma_mem dma_mem;
105	u16 len;
106	u16 entry_size;	/* Size of an element in the queue */
107	u16 id;
108	u16 tail, head;
109	bool created;
110	atomic_t used;	/* Number of valid elements in the queue */
111};
112
113static inline u32 MODULO(u16 val, u16 limit)
114{
115	BUG_ON(limit & (limit - 1));
116	return val & (limit - 1);
117}
118
119static inline void index_adv(u16 *index, u16 val, u16 limit)
120{
121	*index = MODULO((*index + val), limit);
122}
123
124static inline void index_inc(u16 *index, u16 limit)
125{
126	*index = MODULO((*index + 1), limit);
127}
128
129static inline void *queue_head_node(struct be_queue_info *q)
130{
131	return q->dma_mem.va + q->head * q->entry_size;
132}
133
134static inline void *queue_tail_node(struct be_queue_info *q)
135{
136	return q->dma_mem.va + q->tail * q->entry_size;
137}
138
139static inline void queue_head_inc(struct be_queue_info *q)
140{
141	index_inc(&q->head, q->len);
142}
143
144static inline void queue_tail_inc(struct be_queue_info *q)
145{
146	index_inc(&q->tail, q->len);
147}
148
149struct be_eq_obj {
150	struct be_queue_info q;
151	char desc[32];
152
153	/* Adaptive interrupt coalescing (AIC) info */
154	bool enable_aic;
155	u16 min_eqd;		/* in usecs */
156	u16 max_eqd;		/* in usecs */
157	u16 cur_eqd;		/* in usecs */
158	u8  eq_idx;
159
160	struct napi_struct napi;
161};
162
163struct be_mcc_obj {
164	struct be_queue_info q;
165	struct be_queue_info cq;
166	bool rearm_cq;
167};
168
169struct be_tx_stats {
170	u32 be_tx_reqs;		/* number of TX requests initiated */
171	u32 be_tx_stops;	/* number of times TX Q was stopped */
172	u32 be_tx_wrbs;		/* number of tx WRBs used */
173	u32 be_tx_compl;	/* number of tx completion entries processed */
174	ulong be_tx_jiffies;
175	u64 be_tx_bytes;
176	u64 be_tx_bytes_prev;
177	u64 be_tx_pkts;
178	u32 be_tx_rate;
179};
180
181struct be_tx_obj {
182	struct be_queue_info q;
183	struct be_queue_info cq;
184	/* Remember the skbs that were transmitted */
185	struct sk_buff *sent_skb_list[TX_Q_LEN];
186	struct be_tx_stats stats;
187};
188
189/* Struct to remember the pages posted for rx frags */
190struct be_rx_page_info {
191	struct page *page;
192	DEFINE_DMA_UNMAP_ADDR(bus);
193	u16 page_offset;
194	bool last_page_user;
195};
196
197struct be_rx_stats {
198	u32 rx_post_fail;/* number of ethrx buffer alloc failures */
199	u32 rx_polls;	/* number of times NAPI called poll function */
200	u32 rx_events;	/* number of ucast rx completion events  */
201	u32 rx_compl;	/* number of rx completion entries processed */
202	ulong rx_dropped; /* number of skb allocation errors */
203	ulong rx_jiffies;
204	u64 rx_bytes;
205	u64 rx_bytes_prev;
206	u64 rx_pkts;
207	u32 rx_rate;
208	u32 rx_mcast_pkts;
209	u32 rxcp_err;	/* Num rx completion entries w/ err set. */
210	ulong rx_fps_jiffies;	/* jiffies at last FPS calc */
211	u32 rx_frags;
212	u32 prev_rx_frags;
213	u32 rx_fps;		/* Rx frags per second */
214};
215
216struct be_rx_compl_info {
217	u32 rss_hash;
218	u16 vlan_tag;
219	u16 pkt_size;
220	u16 rxq_idx;
221	u16 mac_id;
222	u8 vlanf;
223	u8 num_rcvd;
224	u8 err;
225	u8 ipf;
226	u8 tcpf;
227	u8 udpf;
228	u8 ip_csum;
229	u8 l4_csum;
230	u8 ipv6;
231	u8 vtm;
232	u8 pkt_type;
233};
234
235struct be_rx_obj {
236	struct be_adapter *adapter;
237	struct be_queue_info q;
238	struct be_queue_info cq;
239	struct be_rx_compl_info rxcp;
240	struct be_rx_page_info page_info_tbl[RX_Q_LEN];
241	struct be_eq_obj rx_eq;
242	struct be_rx_stats stats;
243	u8 rss_id;
244	bool rx_post_starved;	/* Zero rx frags have been posted to BE */
245	u32 cache_line_barrier[16];
246};
247
248struct be_drv_stats {
249	u8 be_on_die_temperature;
250	u64 be_tx_events;
251	u64 eth_red_drops;
252	u64 rx_drops_no_pbuf;
253	u64 rx_drops_no_txpb;
254	u64 rx_drops_no_erx_descr;
255	u64 rx_drops_no_tpre_descr;
256	u64 rx_drops_too_many_frags;
257	u64 rx_drops_invalid_ring;
258	u64 forwarded_packets;
259	u64 rx_drops_mtu;
260	u64 rx_crc_errors;
261	u64 rx_alignment_symbol_errors;
262	u64 rx_pause_frames;
263	u64 rx_priority_pause_frames;
264	u64 rx_control_frames;
265	u64 rx_in_range_errors;
266	u64 rx_out_range_errors;
267	u64 rx_frame_too_long;
268	u64 rx_address_match_errors;
269	u64 rx_dropped_too_small;
270	u64 rx_dropped_too_short;
271	u64 rx_dropped_header_too_small;
272	u64 rx_dropped_tcp_length;
273	u64 rx_dropped_runt;
274	u64 rx_ip_checksum_errs;
275	u64 rx_tcp_checksum_errs;
276	u64 rx_udp_checksum_errs;
277	u64 rx_switched_unicast_packets;
278	u64 rx_switched_multicast_packets;
279	u64 rx_switched_broadcast_packets;
280	u64 tx_pauseframes;
281	u64 tx_priority_pauseframes;
282	u64 tx_controlframes;
283	u64 rxpp_fifo_overflow_drop;
284	u64 rx_input_fifo_overflow_drop;
285	u64 pmem_fifo_overflow_drop;
286	u64 jabber_events;
287};
288
289struct be_vf_cfg {
290	unsigned char vf_mac_addr[ETH_ALEN];
291	u32 vf_if_handle;
292	u32 vf_pmac_id;
293	u16 vf_vlan_tag;
294	u32 vf_tx_rate;
295};
296
297#define BE_INVALID_PMAC_ID		0xffffffff
298
299struct be_adapter {
300	struct pci_dev *pdev;
301	struct net_device *netdev;
302
303	u8 __iomem *csr;
304	u8 __iomem *db;		/* Door Bell */
305	u8 __iomem *pcicfg;	/* PCI config space */
306
307	struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
308	struct be_dma_mem mbox_mem;
309	/* Mbox mem is adjusted to align to 16 bytes. The allocated addr
310	 * is stored for freeing purpose */
311	struct be_dma_mem mbox_mem_alloced;
312
313	struct be_mcc_obj mcc_obj;
314	spinlock_t mcc_lock;	/* For serializing mcc cmds to BE card */
315	spinlock_t mcc_cq_lock;
316
317	struct msix_entry msix_entries[BE_MAX_MSIX_VECTORS];
318	u32 num_msix_vec;
319	bool isr_registered;
320
321	/* TX Rings */
322	struct be_eq_obj tx_eq;
323	struct be_tx_obj tx_obj[MAX_TX_QS];
324	u8 num_tx_qs;
325
326	u32 cache_line_break[8];
327
328	/* Rx rings */
329	struct be_rx_obj rx_obj[MAX_RX_QS];
330	u32 num_rx_qs;
331	u32 big_page_size;	/* Compounded page size shared by rx wrbs */
332
333	u8 eq_next_idx;
334	struct be_drv_stats drv_stats;
335
336	u16 vlans_added;
337	u16 max_vlans;	/* Number of vlans supported */
338	u8 vlan_tag[VLAN_N_VID];
339	u8 vlan_prio_bmap;	/* Available Priority BitMap */
340	u16 recommended_prio;	/* Recommended Priority */
341	struct be_dma_mem mc_cmd_mem;
342
343	struct be_dma_mem stats_cmd;
344	/* Work queue used to perform periodic tasks like getting statistics */
345	struct delayed_work work;
346	u16 work_counter;
347
348	/* Ethtool knobs and info */
349	char fw_ver[FW_VER_LEN];
350	u32 if_handle;		/* Used to configure filtering */
351	u32 pmac_id;		/* MAC addr handle used by BE card */
352	u32 beacon_state;	/* for set_phys_id */
353
354	bool eeh_err;
355	bool link_up;
356	u32 port_num;
357	bool promiscuous;
358	bool wol;
359	u32 function_mode;
360	u32 function_caps;
361	u32 rx_fc;		/* Rx flow control */
362	u32 tx_fc;		/* Tx flow control */
363	bool ue_detected;
364	bool stats_cmd_sent;
365	int link_speed;
366	u8 port_type;
367	u8 transceiver;
368	u8 autoneg;
369	u8 generation;		/* BladeEngine ASIC generation */
370	u32 flash_status;
371	struct completion flash_compl;
372
373	bool be3_native;
374	bool sriov_enabled;
375	struct be_vf_cfg *vf_cfg;
376	u8 is_virtfn;
377	u32 sli_family;
378	u8 hba_port_num;
379	u16 pvid;
380};
381
382#define be_physfn(adapter) (!adapter->is_virtfn)
383
384/* BladeEngine Generation numbers */
385#define BE_GEN2 2
386#define BE_GEN3 3
387
388#define lancer_chip(adapter)	((adapter->pdev->device == OC_DEVICE_ID3) || \
389				 (adapter->pdev->device == OC_DEVICE_ID4))
390
391extern const struct ethtool_ops be_ethtool_ops;
392
393#define msix_enabled(adapter)		(adapter->num_msix_vec > 0)
394#define tx_stats(txo)			(&txo->stats)
395#define rx_stats(rxo)			(&rxo->stats)
396
397#define BE_SET_NETDEV_OPS(netdev, ops)	(netdev->netdev_ops = ops)
398
399#define for_all_rx_queues(adapter, rxo, i)				\
400	for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;	\
401		i++, rxo++)
402
403/* Just skip the first default non-rss queue */
404#define for_all_rss_queues(adapter, rxo, i)				\
405	for (i = 0, rxo = &adapter->rx_obj[i+1]; i < (adapter->num_rx_qs - 1);\
406		i++, rxo++)
407
408#define for_all_tx_queues(adapter, txo, i)				\
409	for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs;	\
410		i++, txo++)
411
412#define PAGE_SHIFT_4K		12
413#define PAGE_SIZE_4K		(1 << PAGE_SHIFT_4K)
414
415/* Returns number of pages spanned by the data starting at the given addr */
416#define PAGES_4K_SPANNED(_address, size) 				\
417		((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + 	\
418			(size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
419
420/* Byte offset into the page corresponding to given address */
421#define OFFSET_IN_PAGE(addr)						\
422		 ((size_t)(addr) & (PAGE_SIZE_4K-1))
423
424/* Returns bit offset within a DWORD of a bitfield */
425#define AMAP_BIT_OFFSET(_struct, field)  				\
426		(((size_t)&(((_struct *)0)->field))%32)
427
428/* Returns the bit mask of the field that is NOT shifted into location. */
429static inline u32 amap_mask(u32 bitsize)
430{
431	return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
432}
433
434static inline void
435amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
436{
437	u32 *dw = (u32 *) ptr + dw_offset;
438	*dw &= ~(mask << offset);
439	*dw |= (mask & value) << offset;
440}
441
442#define AMAP_SET_BITS(_struct, field, ptr, val)				\
443		amap_set(ptr,						\
444			offsetof(_struct, field)/32,			\
445			amap_mask(sizeof(((_struct *)0)->field)),	\
446			AMAP_BIT_OFFSET(_struct, field),		\
447			val)
448
449static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
450{
451	u32 *dw = (u32 *) ptr;
452	return mask & (*(dw + dw_offset) >> offset);
453}
454
455#define AMAP_GET_BITS(_struct, field, ptr)				\
456		amap_get(ptr,						\
457			offsetof(_struct, field)/32,			\
458			amap_mask(sizeof(((_struct *)0)->field)),	\
459			AMAP_BIT_OFFSET(_struct, field))
460
461#define be_dws_cpu_to_le(wrb, len)	swap_dws(wrb, len)
462#define be_dws_le_to_cpu(wrb, len)	swap_dws(wrb, len)
463static inline void swap_dws(void *wrb, int len)
464{
465#ifdef __BIG_ENDIAN
466	u32 *dw = wrb;
467	BUG_ON(len % 4);
468	do {
469		*dw = cpu_to_le32(*dw);
470		dw++;
471		len -= 4;
472	} while (len);
473#endif				/* __BIG_ENDIAN */
474}
475
476static inline u8 is_tcp_pkt(struct sk_buff *skb)
477{
478	u8 val = 0;
479
480	if (ip_hdr(skb)->version == 4)
481		val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
482	else if (ip_hdr(skb)->version == 6)
483		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
484
485	return val;
486}
487
488static inline u8 is_udp_pkt(struct sk_buff *skb)
489{
490	u8 val = 0;
491
492	if (ip_hdr(skb)->version == 4)
493		val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
494	else if (ip_hdr(skb)->version == 6)
495		val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
496
497	return val;
498}
499
500static inline void be_check_sriov_fn_type(struct be_adapter *adapter)
501{
502	u32 sli_intf;
503
504	pci_read_config_dword(adapter->pdev, SLI_INTF_REG_OFFSET, &sli_intf);
505	adapter->is_virtfn = (sli_intf & SLI_INTF_FT_MASK) ? 1 : 0;
506}
507
508static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
509{
510	u32 addr;
511
512	addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
513
514	mac[5] = (u8)(addr & 0xFF);
515	mac[4] = (u8)((addr >> 8) & 0xFF);
516	mac[3] = (u8)((addr >> 16) & 0xFF);
517	/* Use the OUI from the current MAC address */
518	memcpy(mac, adapter->netdev->dev_addr, 3);
519}
520
521static inline bool be_multi_rxq(const struct be_adapter *adapter)
522{
523	return adapter->num_rx_qs > 1;
524}
525
526extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
527		u16 num_popped);
528extern void be_link_status_update(struct be_adapter *adapter, bool link_up);
529extern void netdev_stats_update(struct be_adapter *adapter);
530extern void be_parse_stats(struct be_adapter *adapter);
531extern int be_load_fw(struct be_adapter *adapter, u8 *func);
532#endif				/* BE_H */