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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
4 * chips integrated hardware monitoring features
5 * Copyright (C) 2005-2006 Jean Delvare <jdelvare@suse.de>
6 *
7 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
8 * complete hardware monitoring features: voltage, fan and temperature
9 * sensors, and manual and automatic fan speed control.
10 *
11 * The F71872F/FG is almost the same, with two more voltages monitored,
12 * and 6 VID inputs.
13 *
14 * The F71806F/FG is essentially the same as the F71872F/FG. It even has
15 * the same chip ID, so the driver can't differentiate between.
16 */
17
18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/slab.h>
23#include <linux/jiffies.h>
24#include <linux/platform_device.h>
25#include <linux/hwmon.h>
26#include <linux/hwmon-sysfs.h>
27#include <linux/err.h>
28#include <linux/mutex.h>
29#include <linux/sysfs.h>
30#include <linux/ioport.h>
31#include <linux/acpi.h>
32#include <linux/io.h>
33
34static unsigned short force_id;
35module_param(force_id, ushort, 0);
36MODULE_PARM_DESC(force_id, "Override the detected device ID");
37
38static struct platform_device *pdev;
39
40#define DRVNAME "f71805f"
41enum kinds { f71805f, f71872f };
42
43/*
44 * Super-I/O constants and functions
45 */
46
47#define F71805F_LD_HWM 0x04
48
49#define SIO_REG_LDSEL 0x07 /* Logical device select */
50#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
51#define SIO_REG_DEVREV 0x22 /* Device revision */
52#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
53#define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
54#define SIO_REG_ENABLE 0x30 /* Logical device enable */
55#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
56
57#define SIO_FINTEK_ID 0x1934
58#define SIO_F71805F_ID 0x0406
59#define SIO_F71872F_ID 0x0341
60
61static inline int
62superio_inb(int base, int reg)
63{
64 outb(reg, base);
65 return inb(base + 1);
66}
67
68static int
69superio_inw(int base, int reg)
70{
71 int val;
72 outb(reg++, base);
73 val = inb(base + 1) << 8;
74 outb(reg, base);
75 val |= inb(base + 1);
76 return val;
77}
78
79static inline void
80superio_select(int base, int ld)
81{
82 outb(SIO_REG_LDSEL, base);
83 outb(ld, base + 1);
84}
85
86static inline int
87superio_enter(int base)
88{
89 if (!request_muxed_region(base, 2, DRVNAME))
90 return -EBUSY;
91
92 outb(0x87, base);
93 outb(0x87, base);
94
95 return 0;
96}
97
98static inline void
99superio_exit(int base)
100{
101 outb(0xaa, base);
102 release_region(base, 2);
103}
104
105/*
106 * ISA constants
107 */
108
109#define REGION_LENGTH 8
110#define ADDR_REG_OFFSET 5
111#define DATA_REG_OFFSET 6
112
113/*
114 * Registers
115 */
116
117/* in nr from 0 to 10 (8-bit values) */
118#define F71805F_REG_IN(nr) (0x10 + (nr))
119#define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
120#define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
121/* fan nr from 0 to 2 (12-bit values, two registers) */
122#define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
123#define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
124#define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
125#define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
126#define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
127#define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
128/* temp nr from 0 to 2 (8-bit values) */
129#define F71805F_REG_TEMP(nr) (0x1B + (nr))
130#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
131#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
132#define F71805F_REG_TEMP_MODE 0x01
133/* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
134/* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
135#define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
136 (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
137#define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
138 (0xA4 + 0x10 * (pwmnr) + \
139 2 * (2 - (apnr)))
140
141#define F71805F_REG_START 0x00
142/* status nr from 0 to 2 */
143#define F71805F_REG_STATUS(nr) (0x36 + (nr))
144
145/* individual register bits */
146#define FAN_CTRL_DC_MODE 0x10
147#define FAN_CTRL_LATCH_FULL 0x08
148#define FAN_CTRL_MODE_MASK 0x03
149#define FAN_CTRL_MODE_SPEED 0x00
150#define FAN_CTRL_MODE_TEMPERATURE 0x01
151#define FAN_CTRL_MODE_MANUAL 0x02
152
153/*
154 * Data structures and manipulation thereof
155 */
156
157struct f71805f_auto_point {
158 u8 temp[3];
159 u16 fan[3];
160};
161
162struct f71805f_data {
163 unsigned short addr;
164 const char *name;
165 struct device *hwmon_dev;
166
167 struct mutex update_lock;
168 bool valid; /* true if following fields are valid */
169 unsigned long last_updated; /* In jiffies */
170 unsigned long last_limits; /* In jiffies */
171
172 /* Register values */
173 u8 in[11];
174 u8 in_high[11];
175 u8 in_low[11];
176 u16 has_in;
177 u16 fan[3];
178 u16 fan_low[3];
179 u16 fan_target[3];
180 u8 fan_ctrl[3];
181 u8 pwm[3];
182 u8 pwm_freq[3];
183 u8 temp[3];
184 u8 temp_high[3];
185 u8 temp_hyst[3];
186 u8 temp_mode;
187 unsigned long alarms;
188 struct f71805f_auto_point auto_points[3];
189};
190
191struct f71805f_sio_data {
192 enum kinds kind;
193 u8 fnsel1;
194};
195
196static inline long in_from_reg(u8 reg)
197{
198 return reg * 8;
199}
200
201/* The 2 least significant bits are not used */
202static inline u8 in_to_reg(long val)
203{
204 if (val <= 0)
205 return 0;
206 if (val >= 2016)
207 return 0xfc;
208 return ((val + 16) / 32) << 2;
209}
210
211/* in0 is downscaled by a factor 2 internally */
212static inline long in0_from_reg(u8 reg)
213{
214 return reg * 16;
215}
216
217static inline u8 in0_to_reg(long val)
218{
219 if (val <= 0)
220 return 0;
221 if (val >= 4032)
222 return 0xfc;
223 return ((val + 32) / 64) << 2;
224}
225
226/* The 4 most significant bits are not used */
227static inline long fan_from_reg(u16 reg)
228{
229 reg &= 0xfff;
230 if (!reg || reg == 0xfff)
231 return 0;
232 return 1500000 / reg;
233}
234
235static inline u16 fan_to_reg(long rpm)
236{
237 /*
238 * If the low limit is set below what the chip can measure,
239 * store the largest possible 12-bit value in the registers,
240 * so that no alarm will ever trigger.
241 */
242 if (rpm < 367)
243 return 0xfff;
244 return 1500000 / rpm;
245}
246
247static inline unsigned long pwm_freq_from_reg(u8 reg)
248{
249 unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
250
251 reg &= 0x7f;
252 if (reg == 0)
253 reg++;
254 return clock / (reg << 8);
255}
256
257static inline u8 pwm_freq_to_reg(unsigned long val)
258{
259 if (val >= 187500) /* The highest we can do */
260 return 0x80;
261 if (val >= 1475) /* Use 48 MHz clock */
262 return 0x80 | (48000000UL / (val << 8));
263 if (val < 31) /* The lowest we can do */
264 return 0x7f;
265 else /* Use 1 MHz clock */
266 return 1000000UL / (val << 8);
267}
268
269static inline int pwm_mode_from_reg(u8 reg)
270{
271 return !(reg & FAN_CTRL_DC_MODE);
272}
273
274static inline long temp_from_reg(u8 reg)
275{
276 return reg * 1000;
277}
278
279static inline u8 temp_to_reg(long val)
280{
281 if (val <= 0)
282 return 0;
283 if (val >= 1000 * 0xff)
284 return 0xff;
285 return (val + 500) / 1000;
286}
287
288/*
289 * Device I/O access
290 */
291
292/* Must be called with data->update_lock held, except during initialization */
293static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
294{
295 outb(reg, data->addr + ADDR_REG_OFFSET);
296 return inb(data->addr + DATA_REG_OFFSET);
297}
298
299/* Must be called with data->update_lock held, except during initialization */
300static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
301{
302 outb(reg, data->addr + ADDR_REG_OFFSET);
303 outb(val, data->addr + DATA_REG_OFFSET);
304}
305
306/*
307 * It is important to read the MSB first, because doing so latches the
308 * value of the LSB, so we are sure both bytes belong to the same value.
309 * Must be called with data->update_lock held, except during initialization
310 */
311static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
312{
313 u16 val;
314
315 outb(reg, data->addr + ADDR_REG_OFFSET);
316 val = inb(data->addr + DATA_REG_OFFSET) << 8;
317 outb(++reg, data->addr + ADDR_REG_OFFSET);
318 val |= inb(data->addr + DATA_REG_OFFSET);
319
320 return val;
321}
322
323/* Must be called with data->update_lock held, except during initialization */
324static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
325{
326 outb(reg, data->addr + ADDR_REG_OFFSET);
327 outb(val >> 8, data->addr + DATA_REG_OFFSET);
328 outb(++reg, data->addr + ADDR_REG_OFFSET);
329 outb(val & 0xff, data->addr + DATA_REG_OFFSET);
330}
331
332static struct f71805f_data *f71805f_update_device(struct device *dev)
333{
334 struct f71805f_data *data = dev_get_drvdata(dev);
335 int nr, apnr;
336
337 mutex_lock(&data->update_lock);
338
339 /* Limit registers cache is refreshed after 60 seconds */
340 if (time_after(jiffies, data->last_updated + 60 * HZ)
341 || !data->valid) {
342 for (nr = 0; nr < 11; nr++) {
343 if (!(data->has_in & (1 << nr)))
344 continue;
345 data->in_high[nr] = f71805f_read8(data,
346 F71805F_REG_IN_HIGH(nr));
347 data->in_low[nr] = f71805f_read8(data,
348 F71805F_REG_IN_LOW(nr));
349 }
350 for (nr = 0; nr < 3; nr++) {
351 data->fan_low[nr] = f71805f_read16(data,
352 F71805F_REG_FAN_LOW(nr));
353 data->fan_target[nr] = f71805f_read16(data,
354 F71805F_REG_FAN_TARGET(nr));
355 data->pwm_freq[nr] = f71805f_read8(data,
356 F71805F_REG_PWM_FREQ(nr));
357 }
358 for (nr = 0; nr < 3; nr++) {
359 data->temp_high[nr] = f71805f_read8(data,
360 F71805F_REG_TEMP_HIGH(nr));
361 data->temp_hyst[nr] = f71805f_read8(data,
362 F71805F_REG_TEMP_HYST(nr));
363 }
364 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
365 for (nr = 0; nr < 3; nr++) {
366 for (apnr = 0; apnr < 3; apnr++) {
367 data->auto_points[nr].temp[apnr] =
368 f71805f_read8(data,
369 F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
370 apnr));
371 data->auto_points[nr].fan[apnr] =
372 f71805f_read16(data,
373 F71805F_REG_PWM_AUTO_POINT_FAN(nr,
374 apnr));
375 }
376 }
377
378 data->last_limits = jiffies;
379 }
380
381 /* Measurement registers cache is refreshed after 1 second */
382 if (time_after(jiffies, data->last_updated + HZ)
383 || !data->valid) {
384 for (nr = 0; nr < 11; nr++) {
385 if (!(data->has_in & (1 << nr)))
386 continue;
387 data->in[nr] = f71805f_read8(data,
388 F71805F_REG_IN(nr));
389 }
390 for (nr = 0; nr < 3; nr++) {
391 data->fan[nr] = f71805f_read16(data,
392 F71805F_REG_FAN(nr));
393 data->fan_ctrl[nr] = f71805f_read8(data,
394 F71805F_REG_FAN_CTRL(nr));
395 data->pwm[nr] = f71805f_read8(data,
396 F71805F_REG_PWM_DUTY(nr));
397 }
398 for (nr = 0; nr < 3; nr++) {
399 data->temp[nr] = f71805f_read8(data,
400 F71805F_REG_TEMP(nr));
401 }
402 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
403 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
404 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
405
406 data->last_updated = jiffies;
407 data->valid = true;
408 }
409
410 mutex_unlock(&data->update_lock);
411
412 return data;
413}
414
415/*
416 * Sysfs interface
417 */
418
419static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
420 char *buf)
421{
422 struct f71805f_data *data = f71805f_update_device(dev);
423 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
424 int nr = attr->index;
425
426 return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
427}
428
429static ssize_t show_in0_max(struct device *dev, struct device_attribute
430 *devattr, char *buf)
431{
432 struct f71805f_data *data = f71805f_update_device(dev);
433 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
434 int nr = attr->index;
435
436 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
437}
438
439static ssize_t show_in0_min(struct device *dev, struct device_attribute
440 *devattr, char *buf)
441{
442 struct f71805f_data *data = f71805f_update_device(dev);
443 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
444 int nr = attr->index;
445
446 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
447}
448
449static ssize_t set_in0_max(struct device *dev, struct device_attribute
450 *devattr, const char *buf, size_t count)
451{
452 struct f71805f_data *data = dev_get_drvdata(dev);
453 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
454 int nr = attr->index;
455 long val;
456 int err;
457
458 err = kstrtol(buf, 10, &val);
459 if (err)
460 return err;
461
462 mutex_lock(&data->update_lock);
463 data->in_high[nr] = in0_to_reg(val);
464 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
465 mutex_unlock(&data->update_lock);
466
467 return count;
468}
469
470static ssize_t set_in0_min(struct device *dev, struct device_attribute
471 *devattr, const char *buf, size_t count)
472{
473 struct f71805f_data *data = dev_get_drvdata(dev);
474 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
475 int nr = attr->index;
476 long val;
477 int err;
478
479 err = kstrtol(buf, 10, &val);
480 if (err)
481 return err;
482
483 mutex_lock(&data->update_lock);
484 data->in_low[nr] = in0_to_reg(val);
485 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
486 mutex_unlock(&data->update_lock);
487
488 return count;
489}
490
491static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
492 char *buf)
493{
494 struct f71805f_data *data = f71805f_update_device(dev);
495 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
496 int nr = attr->index;
497
498 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
499}
500
501static ssize_t show_in_max(struct device *dev, struct device_attribute
502 *devattr, char *buf)
503{
504 struct f71805f_data *data = f71805f_update_device(dev);
505 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
506 int nr = attr->index;
507
508 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
509}
510
511static ssize_t show_in_min(struct device *dev, struct device_attribute
512 *devattr, char *buf)
513{
514 struct f71805f_data *data = f71805f_update_device(dev);
515 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
516 int nr = attr->index;
517
518 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
519}
520
521static ssize_t set_in_max(struct device *dev, struct device_attribute
522 *devattr, const char *buf, size_t count)
523{
524 struct f71805f_data *data = dev_get_drvdata(dev);
525 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
526 int nr = attr->index;
527 long val;
528 int err;
529
530 err = kstrtol(buf, 10, &val);
531 if (err)
532 return err;
533
534 mutex_lock(&data->update_lock);
535 data->in_high[nr] = in_to_reg(val);
536 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
537 mutex_unlock(&data->update_lock);
538
539 return count;
540}
541
542static ssize_t set_in_min(struct device *dev, struct device_attribute
543 *devattr, const char *buf, size_t count)
544{
545 struct f71805f_data *data = dev_get_drvdata(dev);
546 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
547 int nr = attr->index;
548 long val;
549 int err;
550
551 err = kstrtol(buf, 10, &val);
552 if (err)
553 return err;
554
555 mutex_lock(&data->update_lock);
556 data->in_low[nr] = in_to_reg(val);
557 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
558 mutex_unlock(&data->update_lock);
559
560 return count;
561}
562
563static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
564 char *buf)
565{
566 struct f71805f_data *data = f71805f_update_device(dev);
567 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
568 int nr = attr->index;
569
570 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
571}
572
573static ssize_t show_fan_min(struct device *dev, struct device_attribute
574 *devattr, char *buf)
575{
576 struct f71805f_data *data = f71805f_update_device(dev);
577 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
578 int nr = attr->index;
579
580 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
581}
582
583static ssize_t show_fan_target(struct device *dev, struct device_attribute
584 *devattr, char *buf)
585{
586 struct f71805f_data *data = f71805f_update_device(dev);
587 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
588 int nr = attr->index;
589
590 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
591}
592
593static ssize_t set_fan_min(struct device *dev, struct device_attribute
594 *devattr, const char *buf, size_t count)
595{
596 struct f71805f_data *data = dev_get_drvdata(dev);
597 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
598 int nr = attr->index;
599 long val;
600 int err;
601
602 err = kstrtol(buf, 10, &val);
603 if (err)
604 return err;
605
606 mutex_lock(&data->update_lock);
607 data->fan_low[nr] = fan_to_reg(val);
608 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
609 mutex_unlock(&data->update_lock);
610
611 return count;
612}
613
614static ssize_t set_fan_target(struct device *dev, struct device_attribute
615 *devattr, const char *buf, size_t count)
616{
617 struct f71805f_data *data = dev_get_drvdata(dev);
618 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
619 int nr = attr->index;
620 long val;
621 int err;
622
623 err = kstrtol(buf, 10, &val);
624 if (err)
625 return err;
626
627 mutex_lock(&data->update_lock);
628 data->fan_target[nr] = fan_to_reg(val);
629 f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
630 data->fan_target[nr]);
631 mutex_unlock(&data->update_lock);
632
633 return count;
634}
635
636static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
637 char *buf)
638{
639 struct f71805f_data *data = f71805f_update_device(dev);
640 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
641 int nr = attr->index;
642
643 return sprintf(buf, "%d\n", (int)data->pwm[nr]);
644}
645
646static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
647 *devattr, char *buf)
648{
649 struct f71805f_data *data = f71805f_update_device(dev);
650 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
651 int nr = attr->index;
652 int mode;
653
654 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
655 case FAN_CTRL_MODE_SPEED:
656 mode = 3;
657 break;
658 case FAN_CTRL_MODE_TEMPERATURE:
659 mode = 2;
660 break;
661 default: /* MANUAL */
662 mode = 1;
663 }
664
665 return sprintf(buf, "%d\n", mode);
666}
667
668static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
669 *devattr, char *buf)
670{
671 struct f71805f_data *data = f71805f_update_device(dev);
672 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
673 int nr = attr->index;
674
675 return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
676}
677
678static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
679 *devattr, char *buf)
680{
681 struct f71805f_data *data = f71805f_update_device(dev);
682 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
683 int nr = attr->index;
684
685 return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
686}
687
688static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
689 const char *buf, size_t count)
690{
691 struct f71805f_data *data = dev_get_drvdata(dev);
692 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
693 int nr = attr->index;
694 unsigned long val;
695 int err;
696
697 err = kstrtoul(buf, 10, &val);
698 if (err)
699 return err;
700
701 if (val > 255)
702 return -EINVAL;
703
704 mutex_lock(&data->update_lock);
705 data->pwm[nr] = val;
706 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
707 mutex_unlock(&data->update_lock);
708
709 return count;
710}
711
712static struct attribute *f71805f_attr_pwm[];
713
714static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
715 *devattr, const char *buf, size_t count)
716{
717 struct f71805f_data *data = dev_get_drvdata(dev);
718 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
719 int nr = attr->index;
720 u8 reg;
721 unsigned long val;
722 int err;
723
724 err = kstrtoul(buf, 10, &val);
725 if (err)
726 return err;
727
728 if (val < 1 || val > 3)
729 return -EINVAL;
730
731 if (val > 1) { /* Automatic mode, user can't set PWM value */
732 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
733 S_IRUGO))
734 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
735 }
736
737 mutex_lock(&data->update_lock);
738 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
739 & ~FAN_CTRL_MODE_MASK;
740 switch (val) {
741 case 1:
742 reg |= FAN_CTRL_MODE_MANUAL;
743 break;
744 case 2:
745 reg |= FAN_CTRL_MODE_TEMPERATURE;
746 break;
747 case 3:
748 reg |= FAN_CTRL_MODE_SPEED;
749 break;
750 }
751 data->fan_ctrl[nr] = reg;
752 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
753 mutex_unlock(&data->update_lock);
754
755 if (val == 1) { /* Manual mode, user can set PWM value */
756 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
757 S_IRUGO | S_IWUSR))
758 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
759 }
760
761 return count;
762}
763
764static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
765 *devattr, const char *buf, size_t count)
766{
767 struct f71805f_data *data = dev_get_drvdata(dev);
768 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
769 int nr = attr->index;
770 unsigned long val;
771 int err;
772
773 err = kstrtoul(buf, 10, &val);
774 if (err)
775 return err;
776
777 mutex_lock(&data->update_lock);
778 data->pwm_freq[nr] = pwm_freq_to_reg(val);
779 f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
780 mutex_unlock(&data->update_lock);
781
782 return count;
783}
784
785static ssize_t show_pwm_auto_point_temp(struct device *dev,
786 struct device_attribute *devattr,
787 char *buf)
788{
789 struct f71805f_data *data = dev_get_drvdata(dev);
790 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
791 int pwmnr = attr->nr;
792 int apnr = attr->index;
793
794 return sprintf(buf, "%ld\n",
795 temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
796}
797
798static ssize_t set_pwm_auto_point_temp(struct device *dev,
799 struct device_attribute *devattr,
800 const char *buf, size_t count)
801{
802 struct f71805f_data *data = dev_get_drvdata(dev);
803 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
804 int pwmnr = attr->nr;
805 int apnr = attr->index;
806 unsigned long val;
807 int err;
808
809 err = kstrtoul(buf, 10, &val);
810 if (err)
811 return err;
812
813 mutex_lock(&data->update_lock);
814 data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
815 f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
816 data->auto_points[pwmnr].temp[apnr]);
817 mutex_unlock(&data->update_lock);
818
819 return count;
820}
821
822static ssize_t show_pwm_auto_point_fan(struct device *dev,
823 struct device_attribute *devattr,
824 char *buf)
825{
826 struct f71805f_data *data = dev_get_drvdata(dev);
827 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
828 int pwmnr = attr->nr;
829 int apnr = attr->index;
830
831 return sprintf(buf, "%ld\n",
832 fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
833}
834
835static ssize_t set_pwm_auto_point_fan(struct device *dev,
836 struct device_attribute *devattr,
837 const char *buf, size_t count)
838{
839 struct f71805f_data *data = dev_get_drvdata(dev);
840 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
841 int pwmnr = attr->nr;
842 int apnr = attr->index;
843 unsigned long val;
844 int err;
845
846 err = kstrtoul(buf, 10, &val);
847 if (err)
848 return err;
849
850 mutex_lock(&data->update_lock);
851 data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
852 f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
853 data->auto_points[pwmnr].fan[apnr]);
854 mutex_unlock(&data->update_lock);
855
856 return count;
857}
858
859static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
860 char *buf)
861{
862 struct f71805f_data *data = f71805f_update_device(dev);
863 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
864 int nr = attr->index;
865
866 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
867}
868
869static ssize_t show_temp_max(struct device *dev, struct device_attribute
870 *devattr, char *buf)
871{
872 struct f71805f_data *data = f71805f_update_device(dev);
873 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
874 int nr = attr->index;
875
876 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
877}
878
879static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
880 *devattr, char *buf)
881{
882 struct f71805f_data *data = f71805f_update_device(dev);
883 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
884 int nr = attr->index;
885
886 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
887}
888
889static ssize_t show_temp_type(struct device *dev, struct device_attribute
890 *devattr, char *buf)
891{
892 struct f71805f_data *data = f71805f_update_device(dev);
893 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
894 int nr = attr->index;
895
896 /* 3 is diode, 4 is thermistor */
897 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
898}
899
900static ssize_t set_temp_max(struct device *dev, struct device_attribute
901 *devattr, const char *buf, size_t count)
902{
903 struct f71805f_data *data = dev_get_drvdata(dev);
904 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
905 int nr = attr->index;
906 long val;
907 int err;
908
909 err = kstrtol(buf, 10, &val);
910 if (err)
911 return err;
912
913 mutex_lock(&data->update_lock);
914 data->temp_high[nr] = temp_to_reg(val);
915 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
916 mutex_unlock(&data->update_lock);
917
918 return count;
919}
920
921static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
922 *devattr, const char *buf, size_t count)
923{
924 struct f71805f_data *data = dev_get_drvdata(dev);
925 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
926 int nr = attr->index;
927 long val;
928 int err;
929
930 err = kstrtol(buf, 10, &val);
931 if (err)
932 return err;
933
934 mutex_lock(&data->update_lock);
935 data->temp_hyst[nr] = temp_to_reg(val);
936 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
937 mutex_unlock(&data->update_lock);
938
939 return count;
940}
941
942static ssize_t alarms_in_show(struct device *dev, struct device_attribute
943 *devattr, char *buf)
944{
945 struct f71805f_data *data = f71805f_update_device(dev);
946
947 return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
948}
949
950static ssize_t alarms_fan_show(struct device *dev, struct device_attribute
951 *devattr, char *buf)
952{
953 struct f71805f_data *data = f71805f_update_device(dev);
954
955 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
956}
957
958static ssize_t alarms_temp_show(struct device *dev, struct device_attribute
959 *devattr, char *buf)
960{
961 struct f71805f_data *data = f71805f_update_device(dev);
962
963 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
964}
965
966static ssize_t show_alarm(struct device *dev, struct device_attribute
967 *devattr, char *buf)
968{
969 struct f71805f_data *data = f71805f_update_device(dev);
970 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
971 int bitnr = attr->index;
972
973 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
974}
975
976static ssize_t name_show(struct device *dev, struct device_attribute
977 *devattr, char *buf)
978{
979 struct f71805f_data *data = dev_get_drvdata(dev);
980
981 return sprintf(buf, "%s\n", data->name);
982}
983
984static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
985static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO | S_IWUSR,
986 show_in0_max, set_in0_max, 0);
987static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO | S_IWUSR,
988 show_in0_min, set_in0_min, 0);
989static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
990static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
991 show_in_max, set_in_max, 1);
992static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
993 show_in_min, set_in_min, 1);
994static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
995static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
996 show_in_max, set_in_max, 2);
997static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
998 show_in_min, set_in_min, 2);
999static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
1000static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
1001 show_in_max, set_in_max, 3);
1002static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
1003 show_in_min, set_in_min, 3);
1004static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
1005static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
1006 show_in_max, set_in_max, 4);
1007static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
1008 show_in_min, set_in_min, 4);
1009static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
1010static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
1011 show_in_max, set_in_max, 5);
1012static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
1013 show_in_min, set_in_min, 5);
1014static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
1015static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
1016 show_in_max, set_in_max, 6);
1017static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
1018 show_in_min, set_in_min, 6);
1019static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
1020static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
1021 show_in_max, set_in_max, 7);
1022static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
1023 show_in_min, set_in_min, 7);
1024static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
1025static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
1026 show_in_max, set_in_max, 8);
1027static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
1028 show_in_min, set_in_min, 8);
1029static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
1030static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
1031 show_in0_max, set_in0_max, 9);
1032static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
1033 show_in0_min, set_in0_min, 9);
1034static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
1035static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
1036 show_in0_max, set_in0_max, 10);
1037static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
1038 show_in0_min, set_in0_min, 10);
1039
1040static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
1041static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
1042 show_fan_min, set_fan_min, 0);
1043static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
1044 show_fan_target, set_fan_target, 0);
1045static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
1046static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
1047 show_fan_min, set_fan_min, 1);
1048static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
1049 show_fan_target, set_fan_target, 1);
1050static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
1051static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
1052 show_fan_min, set_fan_min, 2);
1053static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
1054 show_fan_target, set_fan_target, 2);
1055
1056static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
1057static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
1058 show_temp_max, set_temp_max, 0);
1059static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
1060 show_temp_hyst, set_temp_hyst, 0);
1061static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
1062static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
1063static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
1064 show_temp_max, set_temp_max, 1);
1065static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
1066 show_temp_hyst, set_temp_hyst, 1);
1067static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
1068static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
1069static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
1070 show_temp_max, set_temp_max, 2);
1071static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
1072 show_temp_hyst, set_temp_hyst, 2);
1073static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
1074
1075/*
1076 * pwm (value) files are created read-only, write permission is
1077 * then added or removed dynamically as needed
1078 */
1079static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
1080static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1081 show_pwm_enable, set_pwm_enable, 0);
1082static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
1083 show_pwm_freq, set_pwm_freq, 0);
1084static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
1085static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
1086static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1087 show_pwm_enable, set_pwm_enable, 1);
1088static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
1089 show_pwm_freq, set_pwm_freq, 1);
1090static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
1091static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
1092static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1093 show_pwm_enable, set_pwm_enable, 2);
1094static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
1095 show_pwm_freq, set_pwm_freq, 2);
1096static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
1097
1098static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1099 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1100 0, 0);
1101static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
1102 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1103 0, 0);
1104static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1105 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1106 0, 1);
1107static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
1108 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1109 0, 1);
1110static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1111 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1112 0, 2);
1113static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
1114 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1115 0, 2);
1116
1117static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1118 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1119 1, 0);
1120static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
1121 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1122 1, 0);
1123static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1124 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1125 1, 1);
1126static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
1127 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1128 1, 1);
1129static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1130 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1131 1, 2);
1132static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
1133 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1134 1, 2);
1135
1136static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1137 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1138 2, 0);
1139static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
1140 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1141 2, 0);
1142static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1143 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1144 2, 1);
1145static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
1146 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1147 2, 1);
1148static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1149 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1150 2, 2);
1151static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
1152 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1153 2, 2);
1154
1155static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1156static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1157static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1158static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1159static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1160static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1161static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1162static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1163static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1164static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1165static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1166static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
1167static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
1168static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
1169static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
1170static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
1171static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
1172static DEVICE_ATTR_RO(alarms_in);
1173static DEVICE_ATTR_RO(alarms_fan);
1174static DEVICE_ATTR_RO(alarms_temp);
1175
1176static DEVICE_ATTR_RO(name);
1177
1178static struct attribute *f71805f_attributes[] = {
1179 &sensor_dev_attr_in0_input.dev_attr.attr,
1180 &sensor_dev_attr_in0_max.dev_attr.attr,
1181 &sensor_dev_attr_in0_min.dev_attr.attr,
1182 &sensor_dev_attr_in1_input.dev_attr.attr,
1183 &sensor_dev_attr_in1_max.dev_attr.attr,
1184 &sensor_dev_attr_in1_min.dev_attr.attr,
1185 &sensor_dev_attr_in2_input.dev_attr.attr,
1186 &sensor_dev_attr_in2_max.dev_attr.attr,
1187 &sensor_dev_attr_in2_min.dev_attr.attr,
1188 &sensor_dev_attr_in3_input.dev_attr.attr,
1189 &sensor_dev_attr_in3_max.dev_attr.attr,
1190 &sensor_dev_attr_in3_min.dev_attr.attr,
1191 &sensor_dev_attr_in5_input.dev_attr.attr,
1192 &sensor_dev_attr_in5_max.dev_attr.attr,
1193 &sensor_dev_attr_in5_min.dev_attr.attr,
1194 &sensor_dev_attr_in6_input.dev_attr.attr,
1195 &sensor_dev_attr_in6_max.dev_attr.attr,
1196 &sensor_dev_attr_in6_min.dev_attr.attr,
1197 &sensor_dev_attr_in7_input.dev_attr.attr,
1198 &sensor_dev_attr_in7_max.dev_attr.attr,
1199 &sensor_dev_attr_in7_min.dev_attr.attr,
1200
1201 &sensor_dev_attr_fan1_input.dev_attr.attr,
1202 &sensor_dev_attr_fan1_min.dev_attr.attr,
1203 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1204 &sensor_dev_attr_fan1_target.dev_attr.attr,
1205 &sensor_dev_attr_fan2_input.dev_attr.attr,
1206 &sensor_dev_attr_fan2_min.dev_attr.attr,
1207 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1208 &sensor_dev_attr_fan2_target.dev_attr.attr,
1209 &sensor_dev_attr_fan3_input.dev_attr.attr,
1210 &sensor_dev_attr_fan3_min.dev_attr.attr,
1211 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1212 &sensor_dev_attr_fan3_target.dev_attr.attr,
1213
1214 &sensor_dev_attr_pwm1.dev_attr.attr,
1215 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1216 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
1217 &sensor_dev_attr_pwm2.dev_attr.attr,
1218 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1219 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
1220 &sensor_dev_attr_pwm3.dev_attr.attr,
1221 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1222 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
1223
1224 &sensor_dev_attr_temp1_input.dev_attr.attr,
1225 &sensor_dev_attr_temp1_max.dev_attr.attr,
1226 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
1227 &sensor_dev_attr_temp1_type.dev_attr.attr,
1228 &sensor_dev_attr_temp2_input.dev_attr.attr,
1229 &sensor_dev_attr_temp2_max.dev_attr.attr,
1230 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
1231 &sensor_dev_attr_temp2_type.dev_attr.attr,
1232 &sensor_dev_attr_temp3_input.dev_attr.attr,
1233 &sensor_dev_attr_temp3_max.dev_attr.attr,
1234 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
1235 &sensor_dev_attr_temp3_type.dev_attr.attr,
1236
1237 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1238 &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
1239 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1240 &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
1241 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1242 &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
1243 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1244 &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
1245 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1246 &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
1247 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1248 &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
1249 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1250 &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
1251 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1252 &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
1253 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1254 &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
1255
1256 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1257 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1258 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1259 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1260 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1261 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1262 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1263 &dev_attr_alarms_in.attr,
1264 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1265 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1266 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1267 &dev_attr_alarms_temp.attr,
1268 &dev_attr_alarms_fan.attr,
1269
1270 &dev_attr_name.attr,
1271 NULL
1272};
1273
1274static const struct attribute_group f71805f_group = {
1275 .attrs = f71805f_attributes,
1276};
1277
1278static struct attribute *f71805f_attributes_optin[4][5] = {
1279 {
1280 &sensor_dev_attr_in4_input.dev_attr.attr,
1281 &sensor_dev_attr_in4_max.dev_attr.attr,
1282 &sensor_dev_attr_in4_min.dev_attr.attr,
1283 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1284 NULL
1285 }, {
1286 &sensor_dev_attr_in8_input.dev_attr.attr,
1287 &sensor_dev_attr_in8_max.dev_attr.attr,
1288 &sensor_dev_attr_in8_min.dev_attr.attr,
1289 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1290 NULL
1291 }, {
1292 &sensor_dev_attr_in9_input.dev_attr.attr,
1293 &sensor_dev_attr_in9_max.dev_attr.attr,
1294 &sensor_dev_attr_in9_min.dev_attr.attr,
1295 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1296 NULL
1297 }, {
1298 &sensor_dev_attr_in10_input.dev_attr.attr,
1299 &sensor_dev_attr_in10_max.dev_attr.attr,
1300 &sensor_dev_attr_in10_min.dev_attr.attr,
1301 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1302 NULL
1303 }
1304};
1305
1306static const struct attribute_group f71805f_group_optin[4] = {
1307 { .attrs = f71805f_attributes_optin[0] },
1308 { .attrs = f71805f_attributes_optin[1] },
1309 { .attrs = f71805f_attributes_optin[2] },
1310 { .attrs = f71805f_attributes_optin[3] },
1311};
1312
1313/*
1314 * We don't include pwm_freq files in the arrays above, because they must be
1315 * created conditionally (only if pwm_mode is 1 == PWM)
1316 */
1317static struct attribute *f71805f_attributes_pwm_freq[] = {
1318 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1319 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1320 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1321 NULL
1322};
1323
1324static const struct attribute_group f71805f_group_pwm_freq = {
1325 .attrs = f71805f_attributes_pwm_freq,
1326};
1327
1328/* We also need an indexed access to pwmN files to toggle writability */
1329static struct attribute *f71805f_attr_pwm[] = {
1330 &sensor_dev_attr_pwm1.dev_attr.attr,
1331 &sensor_dev_attr_pwm2.dev_attr.attr,
1332 &sensor_dev_attr_pwm3.dev_attr.attr,
1333};
1334
1335/*
1336 * Device registration and initialization
1337 */
1338
1339static void f71805f_init_device(struct f71805f_data *data)
1340{
1341 u8 reg;
1342 int i;
1343
1344 reg = f71805f_read8(data, F71805F_REG_START);
1345 if ((reg & 0x41) != 0x01) {
1346 pr_debug("Starting monitoring operations\n");
1347 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
1348 }
1349
1350 /*
1351 * Fan monitoring can be disabled. If it is, we won't be polling
1352 * the register values, and won't create the related sysfs files.
1353 */
1354 for (i = 0; i < 3; i++) {
1355 data->fan_ctrl[i] = f71805f_read8(data,
1356 F71805F_REG_FAN_CTRL(i));
1357 /*
1358 * Clear latch full bit, else "speed mode" fan speed control
1359 * doesn't work
1360 */
1361 if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
1362 data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
1363 f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
1364 data->fan_ctrl[i]);
1365 }
1366 }
1367}
1368
1369static int f71805f_probe(struct platform_device *pdev)
1370{
1371 struct f71805f_sio_data *sio_data = dev_get_platdata(&pdev->dev);
1372 struct f71805f_data *data;
1373 struct resource *res;
1374 int i, err;
1375
1376 static const char * const names[] = {
1377 "f71805f",
1378 "f71872f",
1379 };
1380
1381 data = devm_kzalloc(&pdev->dev, sizeof(struct f71805f_data),
1382 GFP_KERNEL);
1383 if (!data)
1384 return -ENOMEM;
1385
1386 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1387 if (!devm_request_region(&pdev->dev, res->start + ADDR_REG_OFFSET, 2,
1388 DRVNAME)) {
1389 dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
1390 (unsigned long)(res->start + ADDR_REG_OFFSET),
1391 (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
1392 return -EBUSY;
1393 }
1394 data->addr = res->start;
1395 data->name = names[sio_data->kind];
1396 mutex_init(&data->update_lock);
1397
1398 platform_set_drvdata(pdev, data);
1399
1400 /* Some voltage inputs depend on chip model and configuration */
1401 switch (sio_data->kind) {
1402 case f71805f:
1403 data->has_in = 0x1ff;
1404 break;
1405 case f71872f:
1406 data->has_in = 0x6ef;
1407 if (sio_data->fnsel1 & 0x01)
1408 data->has_in |= (1 << 4); /* in4 */
1409 if (sio_data->fnsel1 & 0x02)
1410 data->has_in |= (1 << 8); /* in8 */
1411 break;
1412 }
1413
1414 /* Initialize the F71805F chip */
1415 f71805f_init_device(data);
1416
1417 /* Register sysfs interface files */
1418 err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group);
1419 if (err)
1420 return err;
1421 if (data->has_in & (1 << 4)) { /* in4 */
1422 err = sysfs_create_group(&pdev->dev.kobj,
1423 &f71805f_group_optin[0]);
1424 if (err)
1425 goto exit_remove_files;
1426 }
1427 if (data->has_in & (1 << 8)) { /* in8 */
1428 err = sysfs_create_group(&pdev->dev.kobj,
1429 &f71805f_group_optin[1]);
1430 if (err)
1431 goto exit_remove_files;
1432 }
1433 if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
1434 err = sysfs_create_group(&pdev->dev.kobj,
1435 &f71805f_group_optin[2]);
1436 if (err)
1437 goto exit_remove_files;
1438 }
1439 if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
1440 err = sysfs_create_group(&pdev->dev.kobj,
1441 &f71805f_group_optin[3]);
1442 if (err)
1443 goto exit_remove_files;
1444 }
1445 for (i = 0; i < 3; i++) {
1446 /* If control mode is PWM, create pwm_freq file */
1447 if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
1448 err = sysfs_create_file(&pdev->dev.kobj,
1449 f71805f_attributes_pwm_freq[i]);
1450 if (err)
1451 goto exit_remove_files;
1452 }
1453 /* If PWM is in manual mode, add write permission */
1454 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
1455 err = sysfs_chmod_file(&pdev->dev.kobj,
1456 f71805f_attr_pwm[i],
1457 S_IRUGO | S_IWUSR);
1458 if (err) {
1459 dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
1460 i + 1);
1461 goto exit_remove_files;
1462 }
1463 }
1464 }
1465
1466 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1467 if (IS_ERR(data->hwmon_dev)) {
1468 err = PTR_ERR(data->hwmon_dev);
1469 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1470 goto exit_remove_files;
1471 }
1472
1473 return 0;
1474
1475exit_remove_files:
1476 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1477 for (i = 0; i < 4; i++)
1478 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1479 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1480 return err;
1481}
1482
1483static void f71805f_remove(struct platform_device *pdev)
1484{
1485 struct f71805f_data *data = platform_get_drvdata(pdev);
1486 int i;
1487
1488 hwmon_device_unregister(data->hwmon_dev);
1489 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1490 for (i = 0; i < 4; i++)
1491 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1492 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1493}
1494
1495static struct platform_driver f71805f_driver = {
1496 .driver = {
1497 .name = DRVNAME,
1498 },
1499 .probe = f71805f_probe,
1500 .remove_new = f71805f_remove,
1501};
1502
1503static int __init f71805f_device_add(unsigned short address,
1504 const struct f71805f_sio_data *sio_data)
1505{
1506 struct resource res = {
1507 .start = address,
1508 .end = address + REGION_LENGTH - 1,
1509 .flags = IORESOURCE_IO,
1510 };
1511 int err;
1512
1513 pdev = platform_device_alloc(DRVNAME, address);
1514 if (!pdev) {
1515 err = -ENOMEM;
1516 pr_err("Device allocation failed\n");
1517 goto exit;
1518 }
1519
1520 res.name = pdev->name;
1521 err = acpi_check_resource_conflict(&res);
1522 if (err)
1523 goto exit_device_put;
1524
1525 err = platform_device_add_resources(pdev, &res, 1);
1526 if (err) {
1527 pr_err("Device resource addition failed (%d)\n", err);
1528 goto exit_device_put;
1529 }
1530
1531 err = platform_device_add_data(pdev, sio_data,
1532 sizeof(struct f71805f_sio_data));
1533 if (err) {
1534 pr_err("Platform data allocation failed\n");
1535 goto exit_device_put;
1536 }
1537
1538 err = platform_device_add(pdev);
1539 if (err) {
1540 pr_err("Device addition failed (%d)\n", err);
1541 goto exit_device_put;
1542 }
1543
1544 return 0;
1545
1546exit_device_put:
1547 platform_device_put(pdev);
1548exit:
1549 return err;
1550}
1551
1552static int __init f71805f_find(int sioaddr, unsigned short *address,
1553 struct f71805f_sio_data *sio_data)
1554{
1555 int err;
1556 u16 devid;
1557
1558 static const char * const names[] = {
1559 "F71805F/FG",
1560 "F71872F/FG or F71806F/FG",
1561 };
1562
1563 err = superio_enter(sioaddr);
1564 if (err)
1565 return err;
1566
1567 err = -ENODEV;
1568 devid = superio_inw(sioaddr, SIO_REG_MANID);
1569 if (devid != SIO_FINTEK_ID)
1570 goto exit;
1571
1572 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
1573 switch (devid) {
1574 case SIO_F71805F_ID:
1575 sio_data->kind = f71805f;
1576 break;
1577 case SIO_F71872F_ID:
1578 sio_data->kind = f71872f;
1579 sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
1580 break;
1581 default:
1582 pr_info("Unsupported Fintek device, skipping\n");
1583 goto exit;
1584 }
1585
1586 superio_select(sioaddr, F71805F_LD_HWM);
1587 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
1588 pr_warn("Device not activated, skipping\n");
1589 goto exit;
1590 }
1591
1592 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1593 if (*address == 0) {
1594 pr_warn("Base address not set, skipping\n");
1595 goto exit;
1596 }
1597 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
1598
1599 err = 0;
1600 pr_info("Found %s chip at %#x, revision %u\n",
1601 names[sio_data->kind], *address,
1602 superio_inb(sioaddr, SIO_REG_DEVREV));
1603
1604exit:
1605 superio_exit(sioaddr);
1606 return err;
1607}
1608
1609static int __init f71805f_init(void)
1610{
1611 int err;
1612 unsigned short address;
1613 struct f71805f_sio_data sio_data;
1614
1615 if (f71805f_find(0x2e, &address, &sio_data)
1616 && f71805f_find(0x4e, &address, &sio_data))
1617 return -ENODEV;
1618
1619 err = platform_driver_register(&f71805f_driver);
1620 if (err)
1621 goto exit;
1622
1623 /* Sets global pdev as a side effect */
1624 err = f71805f_device_add(address, &sio_data);
1625 if (err)
1626 goto exit_driver;
1627
1628 return 0;
1629
1630exit_driver:
1631 platform_driver_unregister(&f71805f_driver);
1632exit:
1633 return err;
1634}
1635
1636static void __exit f71805f_exit(void)
1637{
1638 platform_device_unregister(pdev);
1639 platform_driver_unregister(&f71805f_driver);
1640}
1641
1642MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1643MODULE_LICENSE("GPL");
1644MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
1645
1646module_init(f71805f_init);
1647module_exit(f71805f_exit);
1/*
2 * f71805f.c - driver for the Fintek F71805F/FG and F71872F/FG Super-I/O
3 * chips integrated hardware monitoring features
4 * Copyright (C) 2005-2006 Jean Delvare <khali@linux-fr.org>
5 *
6 * The F71805F/FG is a LPC Super-I/O chip made by Fintek. It integrates
7 * complete hardware monitoring features: voltage, fan and temperature
8 * sensors, and manual and automatic fan speed control.
9 *
10 * The F71872F/FG is almost the same, with two more voltages monitored,
11 * and 6 VID inputs.
12 *
13 * The F71806F/FG is essentially the same as the F71872F/FG. It even has
14 * the same chip ID, so the driver can't differentiate between.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 */
30
31#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33#include <linux/module.h>
34#include <linux/init.h>
35#include <linux/slab.h>
36#include <linux/jiffies.h>
37#include <linux/platform_device.h>
38#include <linux/hwmon.h>
39#include <linux/hwmon-sysfs.h>
40#include <linux/err.h>
41#include <linux/mutex.h>
42#include <linux/sysfs.h>
43#include <linux/ioport.h>
44#include <linux/acpi.h>
45#include <linux/io.h>
46
47static unsigned short force_id;
48module_param(force_id, ushort, 0);
49MODULE_PARM_DESC(force_id, "Override the detected device ID");
50
51static struct platform_device *pdev;
52
53#define DRVNAME "f71805f"
54enum kinds { f71805f, f71872f };
55
56/*
57 * Super-I/O constants and functions
58 */
59
60#define F71805F_LD_HWM 0x04
61
62#define SIO_REG_LDSEL 0x07 /* Logical device select */
63#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
64#define SIO_REG_DEVREV 0x22 /* Device revision */
65#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
66#define SIO_REG_FNSEL1 0x29 /* Multi Function Select 1 (F71872F) */
67#define SIO_REG_ENABLE 0x30 /* Logical device enable */
68#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
69
70#define SIO_FINTEK_ID 0x1934
71#define SIO_F71805F_ID 0x0406
72#define SIO_F71872F_ID 0x0341
73
74static inline int
75superio_inb(int base, int reg)
76{
77 outb(reg, base);
78 return inb(base + 1);
79}
80
81static int
82superio_inw(int base, int reg)
83{
84 int val;
85 outb(reg++, base);
86 val = inb(base + 1) << 8;
87 outb(reg, base);
88 val |= inb(base + 1);
89 return val;
90}
91
92static inline void
93superio_select(int base, int ld)
94{
95 outb(SIO_REG_LDSEL, base);
96 outb(ld, base + 1);
97}
98
99static inline void
100superio_enter(int base)
101{
102 outb(0x87, base);
103 outb(0x87, base);
104}
105
106static inline void
107superio_exit(int base)
108{
109 outb(0xaa, base);
110}
111
112/*
113 * ISA constants
114 */
115
116#define REGION_LENGTH 8
117#define ADDR_REG_OFFSET 5
118#define DATA_REG_OFFSET 6
119
120/*
121 * Registers
122 */
123
124/* in nr from 0 to 10 (8-bit values) */
125#define F71805F_REG_IN(nr) (0x10 + (nr))
126#define F71805F_REG_IN_HIGH(nr) ((nr) < 10 ? 0x40 + 2 * (nr) : 0x2E)
127#define F71805F_REG_IN_LOW(nr) ((nr) < 10 ? 0x41 + 2 * (nr) : 0x2F)
128/* fan nr from 0 to 2 (12-bit values, two registers) */
129#define F71805F_REG_FAN(nr) (0x20 + 2 * (nr))
130#define F71805F_REG_FAN_LOW(nr) (0x28 + 2 * (nr))
131#define F71805F_REG_FAN_TARGET(nr) (0x69 + 16 * (nr))
132#define F71805F_REG_FAN_CTRL(nr) (0x60 + 16 * (nr))
133#define F71805F_REG_PWM_FREQ(nr) (0x63 + 16 * (nr))
134#define F71805F_REG_PWM_DUTY(nr) (0x6B + 16 * (nr))
135/* temp nr from 0 to 2 (8-bit values) */
136#define F71805F_REG_TEMP(nr) (0x1B + (nr))
137#define F71805F_REG_TEMP_HIGH(nr) (0x54 + 2 * (nr))
138#define F71805F_REG_TEMP_HYST(nr) (0x55 + 2 * (nr))
139#define F71805F_REG_TEMP_MODE 0x01
140/* pwm/fan pwmnr from 0 to 2, auto point apnr from 0 to 2 */
141/* map Fintek numbers to our numbers as follows: 9->0, 5->1, 1->2 */
142#define F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr) \
143 (0xA0 + 0x10 * (pwmnr) + (2 - (apnr)))
144#define F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr) \
145 (0xA4 + 0x10 * (pwmnr) + \
146 2 * (2 - (apnr)))
147
148#define F71805F_REG_START 0x00
149/* status nr from 0 to 2 */
150#define F71805F_REG_STATUS(nr) (0x36 + (nr))
151
152/* individual register bits */
153#define FAN_CTRL_DC_MODE 0x10
154#define FAN_CTRL_LATCH_FULL 0x08
155#define FAN_CTRL_MODE_MASK 0x03
156#define FAN_CTRL_MODE_SPEED 0x00
157#define FAN_CTRL_MODE_TEMPERATURE 0x01
158#define FAN_CTRL_MODE_MANUAL 0x02
159
160/*
161 * Data structures and manipulation thereof
162 */
163
164struct f71805f_auto_point {
165 u8 temp[3];
166 u16 fan[3];
167};
168
169struct f71805f_data {
170 unsigned short addr;
171 const char *name;
172 struct device *hwmon_dev;
173
174 struct mutex update_lock;
175 char valid; /* !=0 if following fields are valid */
176 unsigned long last_updated; /* In jiffies */
177 unsigned long last_limits; /* In jiffies */
178
179 /* Register values */
180 u8 in[11];
181 u8 in_high[11];
182 u8 in_low[11];
183 u16 has_in;
184 u16 fan[3];
185 u16 fan_low[3];
186 u16 fan_target[3];
187 u8 fan_ctrl[3];
188 u8 pwm[3];
189 u8 pwm_freq[3];
190 u8 temp[3];
191 u8 temp_high[3];
192 u8 temp_hyst[3];
193 u8 temp_mode;
194 unsigned long alarms;
195 struct f71805f_auto_point auto_points[3];
196};
197
198struct f71805f_sio_data {
199 enum kinds kind;
200 u8 fnsel1;
201};
202
203static inline long in_from_reg(u8 reg)
204{
205 return (reg * 8);
206}
207
208/* The 2 least significant bits are not used */
209static inline u8 in_to_reg(long val)
210{
211 if (val <= 0)
212 return 0;
213 if (val >= 2016)
214 return 0xfc;
215 return (((val + 16) / 32) << 2);
216}
217
218/* in0 is downscaled by a factor 2 internally */
219static inline long in0_from_reg(u8 reg)
220{
221 return (reg * 16);
222}
223
224static inline u8 in0_to_reg(long val)
225{
226 if (val <= 0)
227 return 0;
228 if (val >= 4032)
229 return 0xfc;
230 return (((val + 32) / 64) << 2);
231}
232
233/* The 4 most significant bits are not used */
234static inline long fan_from_reg(u16 reg)
235{
236 reg &= 0xfff;
237 if (!reg || reg == 0xfff)
238 return 0;
239 return (1500000 / reg);
240}
241
242static inline u16 fan_to_reg(long rpm)
243{
244 /* If the low limit is set below what the chip can measure,
245 store the largest possible 12-bit value in the registers,
246 so that no alarm will ever trigger. */
247 if (rpm < 367)
248 return 0xfff;
249 return (1500000 / rpm);
250}
251
252static inline unsigned long pwm_freq_from_reg(u8 reg)
253{
254 unsigned long clock = (reg & 0x80) ? 48000000UL : 1000000UL;
255
256 reg &= 0x7f;
257 if (reg == 0)
258 reg++;
259 return clock / (reg << 8);
260}
261
262static inline u8 pwm_freq_to_reg(unsigned long val)
263{
264 if (val >= 187500) /* The highest we can do */
265 return 0x80;
266 if (val >= 1475) /* Use 48 MHz clock */
267 return 0x80 | (48000000UL / (val << 8));
268 if (val < 31) /* The lowest we can do */
269 return 0x7f;
270 else /* Use 1 MHz clock */
271 return 1000000UL / (val << 8);
272}
273
274static inline int pwm_mode_from_reg(u8 reg)
275{
276 return !(reg & FAN_CTRL_DC_MODE);
277}
278
279static inline long temp_from_reg(u8 reg)
280{
281 return (reg * 1000);
282}
283
284static inline u8 temp_to_reg(long val)
285{
286 if (val < 0)
287 val = 0;
288 else if (val > 1000 * 0xff)
289 val = 0xff;
290 return ((val + 500) / 1000);
291}
292
293/*
294 * Device I/O access
295 */
296
297/* Must be called with data->update_lock held, except during initialization */
298static u8 f71805f_read8(struct f71805f_data *data, u8 reg)
299{
300 outb(reg, data->addr + ADDR_REG_OFFSET);
301 return inb(data->addr + DATA_REG_OFFSET);
302}
303
304/* Must be called with data->update_lock held, except during initialization */
305static void f71805f_write8(struct f71805f_data *data, u8 reg, u8 val)
306{
307 outb(reg, data->addr + ADDR_REG_OFFSET);
308 outb(val, data->addr + DATA_REG_OFFSET);
309}
310
311/* It is important to read the MSB first, because doing so latches the
312 value of the LSB, so we are sure both bytes belong to the same value.
313 Must be called with data->update_lock held, except during initialization */
314static u16 f71805f_read16(struct f71805f_data *data, u8 reg)
315{
316 u16 val;
317
318 outb(reg, data->addr + ADDR_REG_OFFSET);
319 val = inb(data->addr + DATA_REG_OFFSET) << 8;
320 outb(++reg, data->addr + ADDR_REG_OFFSET);
321 val |= inb(data->addr + DATA_REG_OFFSET);
322
323 return val;
324}
325
326/* Must be called with data->update_lock held, except during initialization */
327static void f71805f_write16(struct f71805f_data *data, u8 reg, u16 val)
328{
329 outb(reg, data->addr + ADDR_REG_OFFSET);
330 outb(val >> 8, data->addr + DATA_REG_OFFSET);
331 outb(++reg, data->addr + ADDR_REG_OFFSET);
332 outb(val & 0xff, data->addr + DATA_REG_OFFSET);
333}
334
335static struct f71805f_data *f71805f_update_device(struct device *dev)
336{
337 struct f71805f_data *data = dev_get_drvdata(dev);
338 int nr, apnr;
339
340 mutex_lock(&data->update_lock);
341
342 /* Limit registers cache is refreshed after 60 seconds */
343 if (time_after(jiffies, data->last_updated + 60 * HZ)
344 || !data->valid) {
345 for (nr = 0; nr < 11; nr++) {
346 if (!(data->has_in & (1 << nr)))
347 continue;
348 data->in_high[nr] = f71805f_read8(data,
349 F71805F_REG_IN_HIGH(nr));
350 data->in_low[nr] = f71805f_read8(data,
351 F71805F_REG_IN_LOW(nr));
352 }
353 for (nr = 0; nr < 3; nr++) {
354 data->fan_low[nr] = f71805f_read16(data,
355 F71805F_REG_FAN_LOW(nr));
356 data->fan_target[nr] = f71805f_read16(data,
357 F71805F_REG_FAN_TARGET(nr));
358 data->pwm_freq[nr] = f71805f_read8(data,
359 F71805F_REG_PWM_FREQ(nr));
360 }
361 for (nr = 0; nr < 3; nr++) {
362 data->temp_high[nr] = f71805f_read8(data,
363 F71805F_REG_TEMP_HIGH(nr));
364 data->temp_hyst[nr] = f71805f_read8(data,
365 F71805F_REG_TEMP_HYST(nr));
366 }
367 data->temp_mode = f71805f_read8(data, F71805F_REG_TEMP_MODE);
368 for (nr = 0; nr < 3; nr++) {
369 for (apnr = 0; apnr < 3; apnr++) {
370 data->auto_points[nr].temp[apnr] =
371 f71805f_read8(data,
372 F71805F_REG_PWM_AUTO_POINT_TEMP(nr,
373 apnr));
374 data->auto_points[nr].fan[apnr] =
375 f71805f_read16(data,
376 F71805F_REG_PWM_AUTO_POINT_FAN(nr,
377 apnr));
378 }
379 }
380
381 data->last_limits = jiffies;
382 }
383
384 /* Measurement registers cache is refreshed after 1 second */
385 if (time_after(jiffies, data->last_updated + HZ)
386 || !data->valid) {
387 for (nr = 0; nr < 11; nr++) {
388 if (!(data->has_in & (1 << nr)))
389 continue;
390 data->in[nr] = f71805f_read8(data,
391 F71805F_REG_IN(nr));
392 }
393 for (nr = 0; nr < 3; nr++) {
394 data->fan[nr] = f71805f_read16(data,
395 F71805F_REG_FAN(nr));
396 data->fan_ctrl[nr] = f71805f_read8(data,
397 F71805F_REG_FAN_CTRL(nr));
398 data->pwm[nr] = f71805f_read8(data,
399 F71805F_REG_PWM_DUTY(nr));
400 }
401 for (nr = 0; nr < 3; nr++) {
402 data->temp[nr] = f71805f_read8(data,
403 F71805F_REG_TEMP(nr));
404 }
405 data->alarms = f71805f_read8(data, F71805F_REG_STATUS(0))
406 + (f71805f_read8(data, F71805F_REG_STATUS(1)) << 8)
407 + (f71805f_read8(data, F71805F_REG_STATUS(2)) << 16);
408
409 data->last_updated = jiffies;
410 data->valid = 1;
411 }
412
413 mutex_unlock(&data->update_lock);
414
415 return data;
416}
417
418/*
419 * Sysfs interface
420 */
421
422static ssize_t show_in0(struct device *dev, struct device_attribute *devattr,
423 char *buf)
424{
425 struct f71805f_data *data = f71805f_update_device(dev);
426 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
427 int nr = attr->index;
428
429 return sprintf(buf, "%ld\n", in0_from_reg(data->in[nr]));
430}
431
432static ssize_t show_in0_max(struct device *dev, struct device_attribute
433 *devattr, char *buf)
434{
435 struct f71805f_data *data = f71805f_update_device(dev);
436 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
437 int nr = attr->index;
438
439 return sprintf(buf, "%ld\n", in0_from_reg(data->in_high[nr]));
440}
441
442static ssize_t show_in0_min(struct device *dev, struct device_attribute
443 *devattr, char *buf)
444{
445 struct f71805f_data *data = f71805f_update_device(dev);
446 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
447 int nr = attr->index;
448
449 return sprintf(buf, "%ld\n", in0_from_reg(data->in_low[nr]));
450}
451
452static ssize_t set_in0_max(struct device *dev, struct device_attribute
453 *devattr, const char *buf, size_t count)
454{
455 struct f71805f_data *data = dev_get_drvdata(dev);
456 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
457 int nr = attr->index;
458 long val = simple_strtol(buf, NULL, 10);
459
460 mutex_lock(&data->update_lock);
461 data->in_high[nr] = in0_to_reg(val);
462 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
463 mutex_unlock(&data->update_lock);
464
465 return count;
466}
467
468static ssize_t set_in0_min(struct device *dev, struct device_attribute
469 *devattr, const char *buf, size_t count)
470{
471 struct f71805f_data *data = dev_get_drvdata(dev);
472 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
473 int nr = attr->index;
474 long val = simple_strtol(buf, NULL, 10);
475
476 mutex_lock(&data->update_lock);
477 data->in_low[nr] = in0_to_reg(val);
478 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
479 mutex_unlock(&data->update_lock);
480
481 return count;
482}
483
484static ssize_t show_in(struct device *dev, struct device_attribute *devattr,
485 char *buf)
486{
487 struct f71805f_data *data = f71805f_update_device(dev);
488 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
489 int nr = attr->index;
490
491 return sprintf(buf, "%ld\n", in_from_reg(data->in[nr]));
492}
493
494static ssize_t show_in_max(struct device *dev, struct device_attribute
495 *devattr, char *buf)
496{
497 struct f71805f_data *data = f71805f_update_device(dev);
498 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
499 int nr = attr->index;
500
501 return sprintf(buf, "%ld\n", in_from_reg(data->in_high[nr]));
502}
503
504static ssize_t show_in_min(struct device *dev, struct device_attribute
505 *devattr, char *buf)
506{
507 struct f71805f_data *data = f71805f_update_device(dev);
508 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
509 int nr = attr->index;
510
511 return sprintf(buf, "%ld\n", in_from_reg(data->in_low[nr]));
512}
513
514static ssize_t set_in_max(struct device *dev, struct device_attribute
515 *devattr, const char *buf, size_t count)
516{
517 struct f71805f_data *data = dev_get_drvdata(dev);
518 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
519 int nr = attr->index;
520 long val = simple_strtol(buf, NULL, 10);
521
522 mutex_lock(&data->update_lock);
523 data->in_high[nr] = in_to_reg(val);
524 f71805f_write8(data, F71805F_REG_IN_HIGH(nr), data->in_high[nr]);
525 mutex_unlock(&data->update_lock);
526
527 return count;
528}
529
530static ssize_t set_in_min(struct device *dev, struct device_attribute
531 *devattr, const char *buf, size_t count)
532{
533 struct f71805f_data *data = dev_get_drvdata(dev);
534 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
535 int nr = attr->index;
536 long val = simple_strtol(buf, NULL, 10);
537
538 mutex_lock(&data->update_lock);
539 data->in_low[nr] = in_to_reg(val);
540 f71805f_write8(data, F71805F_REG_IN_LOW(nr), data->in_low[nr]);
541 mutex_unlock(&data->update_lock);
542
543 return count;
544}
545
546static ssize_t show_fan(struct device *dev, struct device_attribute *devattr,
547 char *buf)
548{
549 struct f71805f_data *data = f71805f_update_device(dev);
550 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
551 int nr = attr->index;
552
553 return sprintf(buf, "%ld\n", fan_from_reg(data->fan[nr]));
554}
555
556static ssize_t show_fan_min(struct device *dev, struct device_attribute
557 *devattr, char *buf)
558{
559 struct f71805f_data *data = f71805f_update_device(dev);
560 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
561 int nr = attr->index;
562
563 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_low[nr]));
564}
565
566static ssize_t show_fan_target(struct device *dev, struct device_attribute
567 *devattr, char *buf)
568{
569 struct f71805f_data *data = f71805f_update_device(dev);
570 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
571 int nr = attr->index;
572
573 return sprintf(buf, "%ld\n", fan_from_reg(data->fan_target[nr]));
574}
575
576static ssize_t set_fan_min(struct device *dev, struct device_attribute
577 *devattr, const char *buf, size_t count)
578{
579 struct f71805f_data *data = dev_get_drvdata(dev);
580 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
581 int nr = attr->index;
582 long val = simple_strtol(buf, NULL, 10);
583
584 mutex_lock(&data->update_lock);
585 data->fan_low[nr] = fan_to_reg(val);
586 f71805f_write16(data, F71805F_REG_FAN_LOW(nr), data->fan_low[nr]);
587 mutex_unlock(&data->update_lock);
588
589 return count;
590}
591
592static ssize_t set_fan_target(struct device *dev, struct device_attribute
593 *devattr, const char *buf, size_t count)
594{
595 struct f71805f_data *data = dev_get_drvdata(dev);
596 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
597 int nr = attr->index;
598 long val = simple_strtol(buf, NULL, 10);
599
600 mutex_lock(&data->update_lock);
601 data->fan_target[nr] = fan_to_reg(val);
602 f71805f_write16(data, F71805F_REG_FAN_TARGET(nr),
603 data->fan_target[nr]);
604 mutex_unlock(&data->update_lock);
605
606 return count;
607}
608
609static ssize_t show_pwm(struct device *dev, struct device_attribute *devattr,
610 char *buf)
611{
612 struct f71805f_data *data = f71805f_update_device(dev);
613 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
614 int nr = attr->index;
615
616 return sprintf(buf, "%d\n", (int)data->pwm[nr]);
617}
618
619static ssize_t show_pwm_enable(struct device *dev, struct device_attribute
620 *devattr, char *buf)
621{
622 struct f71805f_data *data = f71805f_update_device(dev);
623 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
624 int nr = attr->index;
625 int mode;
626
627 switch (data->fan_ctrl[nr] & FAN_CTRL_MODE_MASK) {
628 case FAN_CTRL_MODE_SPEED:
629 mode = 3;
630 break;
631 case FAN_CTRL_MODE_TEMPERATURE:
632 mode = 2;
633 break;
634 default: /* MANUAL */
635 mode = 1;
636 }
637
638 return sprintf(buf, "%d\n", mode);
639}
640
641static ssize_t show_pwm_freq(struct device *dev, struct device_attribute
642 *devattr, char *buf)
643{
644 struct f71805f_data *data = f71805f_update_device(dev);
645 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
646 int nr = attr->index;
647
648 return sprintf(buf, "%lu\n", pwm_freq_from_reg(data->pwm_freq[nr]));
649}
650
651static ssize_t show_pwm_mode(struct device *dev, struct device_attribute
652 *devattr, char *buf)
653{
654 struct f71805f_data *data = f71805f_update_device(dev);
655 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
656 int nr = attr->index;
657
658 return sprintf(buf, "%d\n", pwm_mode_from_reg(data->fan_ctrl[nr]));
659}
660
661static ssize_t set_pwm(struct device *dev, struct device_attribute *devattr,
662 const char *buf, size_t count)
663{
664 struct f71805f_data *data = dev_get_drvdata(dev);
665 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
666 int nr = attr->index;
667 unsigned long val = simple_strtoul(buf, NULL, 10);
668
669 if (val > 255)
670 return -EINVAL;
671
672 mutex_lock(&data->update_lock);
673 data->pwm[nr] = val;
674 f71805f_write8(data, F71805F_REG_PWM_DUTY(nr), data->pwm[nr]);
675 mutex_unlock(&data->update_lock);
676
677 return count;
678}
679
680static struct attribute *f71805f_attr_pwm[];
681
682static ssize_t set_pwm_enable(struct device *dev, struct device_attribute
683 *devattr, const char *buf, size_t count)
684{
685 struct f71805f_data *data = dev_get_drvdata(dev);
686 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
687 int nr = attr->index;
688 unsigned long val = simple_strtoul(buf, NULL, 10);
689 u8 reg;
690
691 if (val < 1 || val > 3)
692 return -EINVAL;
693
694 if (val > 1) { /* Automatic mode, user can't set PWM value */
695 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
696 S_IRUGO))
697 dev_dbg(dev, "chmod -w pwm%d failed\n", nr + 1);
698 }
699
700 mutex_lock(&data->update_lock);
701 reg = f71805f_read8(data, F71805F_REG_FAN_CTRL(nr))
702 & ~FAN_CTRL_MODE_MASK;
703 switch (val) {
704 case 1:
705 reg |= FAN_CTRL_MODE_MANUAL;
706 break;
707 case 2:
708 reg |= FAN_CTRL_MODE_TEMPERATURE;
709 break;
710 case 3:
711 reg |= FAN_CTRL_MODE_SPEED;
712 break;
713 }
714 data->fan_ctrl[nr] = reg;
715 f71805f_write8(data, F71805F_REG_FAN_CTRL(nr), reg);
716 mutex_unlock(&data->update_lock);
717
718 if (val == 1) { /* Manual mode, user can set PWM value */
719 if (sysfs_chmod_file(&dev->kobj, f71805f_attr_pwm[nr],
720 S_IRUGO | S_IWUSR))
721 dev_dbg(dev, "chmod +w pwm%d failed\n", nr + 1);
722 }
723
724 return count;
725}
726
727static ssize_t set_pwm_freq(struct device *dev, struct device_attribute
728 *devattr, const char *buf, size_t count)
729{
730 struct f71805f_data *data = dev_get_drvdata(dev);
731 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
732 int nr = attr->index;
733 unsigned long val = simple_strtoul(buf, NULL, 10);
734
735 mutex_lock(&data->update_lock);
736 data->pwm_freq[nr] = pwm_freq_to_reg(val);
737 f71805f_write8(data, F71805F_REG_PWM_FREQ(nr), data->pwm_freq[nr]);
738 mutex_unlock(&data->update_lock);
739
740 return count;
741}
742
743static ssize_t show_pwm_auto_point_temp(struct device *dev,
744 struct device_attribute *devattr,
745 char* buf)
746{
747 struct f71805f_data *data = dev_get_drvdata(dev);
748 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
749 int pwmnr = attr->nr;
750 int apnr = attr->index;
751
752 return sprintf(buf, "%ld\n",
753 temp_from_reg(data->auto_points[pwmnr].temp[apnr]));
754}
755
756static ssize_t set_pwm_auto_point_temp(struct device *dev,
757 struct device_attribute *devattr,
758 const char* buf, size_t count)
759{
760 struct f71805f_data *data = dev_get_drvdata(dev);
761 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
762 int pwmnr = attr->nr;
763 int apnr = attr->index;
764 unsigned long val = simple_strtol(buf, NULL, 10);
765
766 mutex_lock(&data->update_lock);
767 data->auto_points[pwmnr].temp[apnr] = temp_to_reg(val);
768 f71805f_write8(data, F71805F_REG_PWM_AUTO_POINT_TEMP(pwmnr, apnr),
769 data->auto_points[pwmnr].temp[apnr]);
770 mutex_unlock(&data->update_lock);
771
772 return count;
773}
774
775static ssize_t show_pwm_auto_point_fan(struct device *dev,
776 struct device_attribute *devattr,
777 char* buf)
778{
779 struct f71805f_data *data = dev_get_drvdata(dev);
780 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
781 int pwmnr = attr->nr;
782 int apnr = attr->index;
783
784 return sprintf(buf, "%ld\n",
785 fan_from_reg(data->auto_points[pwmnr].fan[apnr]));
786}
787
788static ssize_t set_pwm_auto_point_fan(struct device *dev,
789 struct device_attribute *devattr,
790 const char* buf, size_t count)
791{
792 struct f71805f_data *data = dev_get_drvdata(dev);
793 struct sensor_device_attribute_2 *attr = to_sensor_dev_attr_2(devattr);
794 int pwmnr = attr->nr;
795 int apnr = attr->index;
796 unsigned long val = simple_strtoul(buf, NULL, 10);
797
798 mutex_lock(&data->update_lock);
799 data->auto_points[pwmnr].fan[apnr] = fan_to_reg(val);
800 f71805f_write16(data, F71805F_REG_PWM_AUTO_POINT_FAN(pwmnr, apnr),
801 data->auto_points[pwmnr].fan[apnr]);
802 mutex_unlock(&data->update_lock);
803
804 return count;
805}
806
807static ssize_t show_temp(struct device *dev, struct device_attribute *devattr,
808 char *buf)
809{
810 struct f71805f_data *data = f71805f_update_device(dev);
811 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
812 int nr = attr->index;
813
814 return sprintf(buf, "%ld\n", temp_from_reg(data->temp[nr]));
815}
816
817static ssize_t show_temp_max(struct device *dev, struct device_attribute
818 *devattr, char *buf)
819{
820 struct f71805f_data *data = f71805f_update_device(dev);
821 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
822 int nr = attr->index;
823
824 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_high[nr]));
825}
826
827static ssize_t show_temp_hyst(struct device *dev, struct device_attribute
828 *devattr, char *buf)
829{
830 struct f71805f_data *data = f71805f_update_device(dev);
831 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
832 int nr = attr->index;
833
834 return sprintf(buf, "%ld\n", temp_from_reg(data->temp_hyst[nr]));
835}
836
837static ssize_t show_temp_type(struct device *dev, struct device_attribute
838 *devattr, char *buf)
839{
840 struct f71805f_data *data = f71805f_update_device(dev);
841 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
842 int nr = attr->index;
843
844 /* 3 is diode, 4 is thermistor */
845 return sprintf(buf, "%u\n", (data->temp_mode & (1 << nr)) ? 3 : 4);
846}
847
848static ssize_t set_temp_max(struct device *dev, struct device_attribute
849 *devattr, const char *buf, size_t count)
850{
851 struct f71805f_data *data = dev_get_drvdata(dev);
852 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
853 int nr = attr->index;
854 long val = simple_strtol(buf, NULL, 10);
855
856 mutex_lock(&data->update_lock);
857 data->temp_high[nr] = temp_to_reg(val);
858 f71805f_write8(data, F71805F_REG_TEMP_HIGH(nr), data->temp_high[nr]);
859 mutex_unlock(&data->update_lock);
860
861 return count;
862}
863
864static ssize_t set_temp_hyst(struct device *dev, struct device_attribute
865 *devattr, const char *buf, size_t count)
866{
867 struct f71805f_data *data = dev_get_drvdata(dev);
868 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
869 int nr = attr->index;
870 long val = simple_strtol(buf, NULL, 10);
871
872 mutex_lock(&data->update_lock);
873 data->temp_hyst[nr] = temp_to_reg(val);
874 f71805f_write8(data, F71805F_REG_TEMP_HYST(nr), data->temp_hyst[nr]);
875 mutex_unlock(&data->update_lock);
876
877 return count;
878}
879
880static ssize_t show_alarms_in(struct device *dev, struct device_attribute
881 *devattr, char *buf)
882{
883 struct f71805f_data *data = f71805f_update_device(dev);
884
885 return sprintf(buf, "%lu\n", data->alarms & 0x7ff);
886}
887
888static ssize_t show_alarms_fan(struct device *dev, struct device_attribute
889 *devattr, char *buf)
890{
891 struct f71805f_data *data = f71805f_update_device(dev);
892
893 return sprintf(buf, "%lu\n", (data->alarms >> 16) & 0x07);
894}
895
896static ssize_t show_alarms_temp(struct device *dev, struct device_attribute
897 *devattr, char *buf)
898{
899 struct f71805f_data *data = f71805f_update_device(dev);
900
901 return sprintf(buf, "%lu\n", (data->alarms >> 11) & 0x07);
902}
903
904static ssize_t show_alarm(struct device *dev, struct device_attribute
905 *devattr, char *buf)
906{
907 struct f71805f_data *data = f71805f_update_device(dev);
908 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
909 int bitnr = attr->index;
910
911 return sprintf(buf, "%lu\n", (data->alarms >> bitnr) & 1);
912}
913
914static ssize_t show_name(struct device *dev, struct device_attribute
915 *devattr, char *buf)
916{
917 struct f71805f_data *data = dev_get_drvdata(dev);
918
919 return sprintf(buf, "%s\n", data->name);
920}
921
922static SENSOR_DEVICE_ATTR(in0_input, S_IRUGO, show_in0, NULL, 0);
923static SENSOR_DEVICE_ATTR(in0_max, S_IRUGO| S_IWUSR,
924 show_in0_max, set_in0_max, 0);
925static SENSOR_DEVICE_ATTR(in0_min, S_IRUGO| S_IWUSR,
926 show_in0_min, set_in0_min, 0);
927static SENSOR_DEVICE_ATTR(in1_input, S_IRUGO, show_in, NULL, 1);
928static SENSOR_DEVICE_ATTR(in1_max, S_IRUGO | S_IWUSR,
929 show_in_max, set_in_max, 1);
930static SENSOR_DEVICE_ATTR(in1_min, S_IRUGO | S_IWUSR,
931 show_in_min, set_in_min, 1);
932static SENSOR_DEVICE_ATTR(in2_input, S_IRUGO, show_in, NULL, 2);
933static SENSOR_DEVICE_ATTR(in2_max, S_IRUGO | S_IWUSR,
934 show_in_max, set_in_max, 2);
935static SENSOR_DEVICE_ATTR(in2_min, S_IRUGO | S_IWUSR,
936 show_in_min, set_in_min, 2);
937static SENSOR_DEVICE_ATTR(in3_input, S_IRUGO, show_in, NULL, 3);
938static SENSOR_DEVICE_ATTR(in3_max, S_IRUGO | S_IWUSR,
939 show_in_max, set_in_max, 3);
940static SENSOR_DEVICE_ATTR(in3_min, S_IRUGO | S_IWUSR,
941 show_in_min, set_in_min, 3);
942static SENSOR_DEVICE_ATTR(in4_input, S_IRUGO, show_in, NULL, 4);
943static SENSOR_DEVICE_ATTR(in4_max, S_IRUGO | S_IWUSR,
944 show_in_max, set_in_max, 4);
945static SENSOR_DEVICE_ATTR(in4_min, S_IRUGO | S_IWUSR,
946 show_in_min, set_in_min, 4);
947static SENSOR_DEVICE_ATTR(in5_input, S_IRUGO, show_in, NULL, 5);
948static SENSOR_DEVICE_ATTR(in5_max, S_IRUGO | S_IWUSR,
949 show_in_max, set_in_max, 5);
950static SENSOR_DEVICE_ATTR(in5_min, S_IRUGO | S_IWUSR,
951 show_in_min, set_in_min, 5);
952static SENSOR_DEVICE_ATTR(in6_input, S_IRUGO, show_in, NULL, 6);
953static SENSOR_DEVICE_ATTR(in6_max, S_IRUGO | S_IWUSR,
954 show_in_max, set_in_max, 6);
955static SENSOR_DEVICE_ATTR(in6_min, S_IRUGO | S_IWUSR,
956 show_in_min, set_in_min, 6);
957static SENSOR_DEVICE_ATTR(in7_input, S_IRUGO, show_in, NULL, 7);
958static SENSOR_DEVICE_ATTR(in7_max, S_IRUGO | S_IWUSR,
959 show_in_max, set_in_max, 7);
960static SENSOR_DEVICE_ATTR(in7_min, S_IRUGO | S_IWUSR,
961 show_in_min, set_in_min, 7);
962static SENSOR_DEVICE_ATTR(in8_input, S_IRUGO, show_in, NULL, 8);
963static SENSOR_DEVICE_ATTR(in8_max, S_IRUGO | S_IWUSR,
964 show_in_max, set_in_max, 8);
965static SENSOR_DEVICE_ATTR(in8_min, S_IRUGO | S_IWUSR,
966 show_in_min, set_in_min, 8);
967static SENSOR_DEVICE_ATTR(in9_input, S_IRUGO, show_in0, NULL, 9);
968static SENSOR_DEVICE_ATTR(in9_max, S_IRUGO | S_IWUSR,
969 show_in0_max, set_in0_max, 9);
970static SENSOR_DEVICE_ATTR(in9_min, S_IRUGO | S_IWUSR,
971 show_in0_min, set_in0_min, 9);
972static SENSOR_DEVICE_ATTR(in10_input, S_IRUGO, show_in0, NULL, 10);
973static SENSOR_DEVICE_ATTR(in10_max, S_IRUGO | S_IWUSR,
974 show_in0_max, set_in0_max, 10);
975static SENSOR_DEVICE_ATTR(in10_min, S_IRUGO | S_IWUSR,
976 show_in0_min, set_in0_min, 10);
977
978static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0);
979static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
980 show_fan_min, set_fan_min, 0);
981static SENSOR_DEVICE_ATTR(fan1_target, S_IRUGO | S_IWUSR,
982 show_fan_target, set_fan_target, 0);
983static SENSOR_DEVICE_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1);
984static SENSOR_DEVICE_ATTR(fan2_min, S_IRUGO | S_IWUSR,
985 show_fan_min, set_fan_min, 1);
986static SENSOR_DEVICE_ATTR(fan2_target, S_IRUGO | S_IWUSR,
987 show_fan_target, set_fan_target, 1);
988static SENSOR_DEVICE_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2);
989static SENSOR_DEVICE_ATTR(fan3_min, S_IRUGO | S_IWUSR,
990 show_fan_min, set_fan_min, 2);
991static SENSOR_DEVICE_ATTR(fan3_target, S_IRUGO | S_IWUSR,
992 show_fan_target, set_fan_target, 2);
993
994static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, 0);
995static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR,
996 show_temp_max, set_temp_max, 0);
997static SENSOR_DEVICE_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR,
998 show_temp_hyst, set_temp_hyst, 0);
999static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0);
1000static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 1);
1001static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR,
1002 show_temp_max, set_temp_max, 1);
1003static SENSOR_DEVICE_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR,
1004 show_temp_hyst, set_temp_hyst, 1);
1005static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1);
1006static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 2);
1007static SENSOR_DEVICE_ATTR(temp3_max, S_IRUGO | S_IWUSR,
1008 show_temp_max, set_temp_max, 2);
1009static SENSOR_DEVICE_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR,
1010 show_temp_hyst, set_temp_hyst, 2);
1011static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2);
1012
1013/* pwm (value) files are created read-only, write permission is
1014 then added or removed dynamically as needed */
1015static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO, show_pwm, set_pwm, 0);
1016static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1017 show_pwm_enable, set_pwm_enable, 0);
1018static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR,
1019 show_pwm_freq, set_pwm_freq, 0);
1020static SENSOR_DEVICE_ATTR(pwm1_mode, S_IRUGO, show_pwm_mode, NULL, 0);
1021static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO, show_pwm, set_pwm, 1);
1022static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1023 show_pwm_enable, set_pwm_enable, 1);
1024static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO | S_IWUSR,
1025 show_pwm_freq, set_pwm_freq, 1);
1026static SENSOR_DEVICE_ATTR(pwm2_mode, S_IRUGO, show_pwm_mode, NULL, 1);
1027static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO, show_pwm, set_pwm, 2);
1028static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1029 show_pwm_enable, set_pwm_enable, 2);
1030static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO | S_IWUSR,
1031 show_pwm_freq, set_pwm_freq, 2);
1032static SENSOR_DEVICE_ATTR(pwm3_mode, S_IRUGO, show_pwm_mode, NULL, 2);
1033
1034static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1035 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1036 0, 0);
1037static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_fan, S_IRUGO | S_IWUSR,
1038 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1039 0, 0);
1040static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1041 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1042 0, 1);
1043static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_fan, S_IRUGO | S_IWUSR,
1044 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1045 0, 1);
1046static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1047 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1048 0, 2);
1049static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_fan, S_IRUGO | S_IWUSR,
1050 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1051 0, 2);
1052
1053static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1054 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1055 1, 0);
1056static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_fan, S_IRUGO | S_IWUSR,
1057 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1058 1, 0);
1059static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1060 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1061 1, 1);
1062static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_fan, S_IRUGO | S_IWUSR,
1063 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1064 1, 1);
1065static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1066 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1067 1, 2);
1068static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_fan, S_IRUGO | S_IWUSR,
1069 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1070 1, 2);
1071
1072static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1073 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1074 2, 0);
1075static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_fan, S_IRUGO | S_IWUSR,
1076 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1077 2, 0);
1078static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1079 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1080 2, 1);
1081static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_fan, S_IRUGO | S_IWUSR,
1082 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1083 2, 1);
1084static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1085 show_pwm_auto_point_temp, set_pwm_auto_point_temp,
1086 2, 2);
1087static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_fan, S_IRUGO | S_IWUSR,
1088 show_pwm_auto_point_fan, set_pwm_auto_point_fan,
1089 2, 2);
1090
1091static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0);
1092static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1);
1093static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2);
1094static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3);
1095static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 4);
1096static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 5);
1097static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 6);
1098static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 7);
1099static SENSOR_DEVICE_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 8);
1100static SENSOR_DEVICE_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 9);
1101static SENSOR_DEVICE_ATTR(in10_alarm, S_IRUGO, show_alarm, NULL, 10);
1102static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 11);
1103static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 12);
1104static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13);
1105static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 16);
1106static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 17);
1107static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 18);
1108static DEVICE_ATTR(alarms_in, S_IRUGO, show_alarms_in, NULL);
1109static DEVICE_ATTR(alarms_fan, S_IRUGO, show_alarms_fan, NULL);
1110static DEVICE_ATTR(alarms_temp, S_IRUGO, show_alarms_temp, NULL);
1111
1112static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1113
1114static struct attribute *f71805f_attributes[] = {
1115 &sensor_dev_attr_in0_input.dev_attr.attr,
1116 &sensor_dev_attr_in0_max.dev_attr.attr,
1117 &sensor_dev_attr_in0_min.dev_attr.attr,
1118 &sensor_dev_attr_in1_input.dev_attr.attr,
1119 &sensor_dev_attr_in1_max.dev_attr.attr,
1120 &sensor_dev_attr_in1_min.dev_attr.attr,
1121 &sensor_dev_attr_in2_input.dev_attr.attr,
1122 &sensor_dev_attr_in2_max.dev_attr.attr,
1123 &sensor_dev_attr_in2_min.dev_attr.attr,
1124 &sensor_dev_attr_in3_input.dev_attr.attr,
1125 &sensor_dev_attr_in3_max.dev_attr.attr,
1126 &sensor_dev_attr_in3_min.dev_attr.attr,
1127 &sensor_dev_attr_in5_input.dev_attr.attr,
1128 &sensor_dev_attr_in5_max.dev_attr.attr,
1129 &sensor_dev_attr_in5_min.dev_attr.attr,
1130 &sensor_dev_attr_in6_input.dev_attr.attr,
1131 &sensor_dev_attr_in6_max.dev_attr.attr,
1132 &sensor_dev_attr_in6_min.dev_attr.attr,
1133 &sensor_dev_attr_in7_input.dev_attr.attr,
1134 &sensor_dev_attr_in7_max.dev_attr.attr,
1135 &sensor_dev_attr_in7_min.dev_attr.attr,
1136
1137 &sensor_dev_attr_fan1_input.dev_attr.attr,
1138 &sensor_dev_attr_fan1_min.dev_attr.attr,
1139 &sensor_dev_attr_fan1_alarm.dev_attr.attr,
1140 &sensor_dev_attr_fan1_target.dev_attr.attr,
1141 &sensor_dev_attr_fan2_input.dev_attr.attr,
1142 &sensor_dev_attr_fan2_min.dev_attr.attr,
1143 &sensor_dev_attr_fan2_alarm.dev_attr.attr,
1144 &sensor_dev_attr_fan2_target.dev_attr.attr,
1145 &sensor_dev_attr_fan3_input.dev_attr.attr,
1146 &sensor_dev_attr_fan3_min.dev_attr.attr,
1147 &sensor_dev_attr_fan3_alarm.dev_attr.attr,
1148 &sensor_dev_attr_fan3_target.dev_attr.attr,
1149
1150 &sensor_dev_attr_pwm1.dev_attr.attr,
1151 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
1152 &sensor_dev_attr_pwm1_mode.dev_attr.attr,
1153 &sensor_dev_attr_pwm2.dev_attr.attr,
1154 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
1155 &sensor_dev_attr_pwm2_mode.dev_attr.attr,
1156 &sensor_dev_attr_pwm3.dev_attr.attr,
1157 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
1158 &sensor_dev_attr_pwm3_mode.dev_attr.attr,
1159
1160 &sensor_dev_attr_temp1_input.dev_attr.attr,
1161 &sensor_dev_attr_temp1_max.dev_attr.attr,
1162 &sensor_dev_attr_temp1_max_hyst.dev_attr.attr,
1163 &sensor_dev_attr_temp1_type.dev_attr.attr,
1164 &sensor_dev_attr_temp2_input.dev_attr.attr,
1165 &sensor_dev_attr_temp2_max.dev_attr.attr,
1166 &sensor_dev_attr_temp2_max_hyst.dev_attr.attr,
1167 &sensor_dev_attr_temp2_type.dev_attr.attr,
1168 &sensor_dev_attr_temp3_input.dev_attr.attr,
1169 &sensor_dev_attr_temp3_max.dev_attr.attr,
1170 &sensor_dev_attr_temp3_max_hyst.dev_attr.attr,
1171 &sensor_dev_attr_temp3_type.dev_attr.attr,
1172
1173 &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
1174 &sensor_dev_attr_pwm1_auto_point1_fan.dev_attr.attr,
1175 &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
1176 &sensor_dev_attr_pwm1_auto_point2_fan.dev_attr.attr,
1177 &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
1178 &sensor_dev_attr_pwm1_auto_point3_fan.dev_attr.attr,
1179 &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
1180 &sensor_dev_attr_pwm2_auto_point1_fan.dev_attr.attr,
1181 &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
1182 &sensor_dev_attr_pwm2_auto_point2_fan.dev_attr.attr,
1183 &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
1184 &sensor_dev_attr_pwm2_auto_point3_fan.dev_attr.attr,
1185 &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
1186 &sensor_dev_attr_pwm3_auto_point1_fan.dev_attr.attr,
1187 &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
1188 &sensor_dev_attr_pwm3_auto_point2_fan.dev_attr.attr,
1189 &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
1190 &sensor_dev_attr_pwm3_auto_point3_fan.dev_attr.attr,
1191
1192 &sensor_dev_attr_in0_alarm.dev_attr.attr,
1193 &sensor_dev_attr_in1_alarm.dev_attr.attr,
1194 &sensor_dev_attr_in2_alarm.dev_attr.attr,
1195 &sensor_dev_attr_in3_alarm.dev_attr.attr,
1196 &sensor_dev_attr_in5_alarm.dev_attr.attr,
1197 &sensor_dev_attr_in6_alarm.dev_attr.attr,
1198 &sensor_dev_attr_in7_alarm.dev_attr.attr,
1199 &dev_attr_alarms_in.attr,
1200 &sensor_dev_attr_temp1_alarm.dev_attr.attr,
1201 &sensor_dev_attr_temp2_alarm.dev_attr.attr,
1202 &sensor_dev_attr_temp3_alarm.dev_attr.attr,
1203 &dev_attr_alarms_temp.attr,
1204 &dev_attr_alarms_fan.attr,
1205
1206 &dev_attr_name.attr,
1207 NULL
1208};
1209
1210static const struct attribute_group f71805f_group = {
1211 .attrs = f71805f_attributes,
1212};
1213
1214static struct attribute *f71805f_attributes_optin[4][5] = {
1215 {
1216 &sensor_dev_attr_in4_input.dev_attr.attr,
1217 &sensor_dev_attr_in4_max.dev_attr.attr,
1218 &sensor_dev_attr_in4_min.dev_attr.attr,
1219 &sensor_dev_attr_in4_alarm.dev_attr.attr,
1220 NULL
1221 }, {
1222 &sensor_dev_attr_in8_input.dev_attr.attr,
1223 &sensor_dev_attr_in8_max.dev_attr.attr,
1224 &sensor_dev_attr_in8_min.dev_attr.attr,
1225 &sensor_dev_attr_in8_alarm.dev_attr.attr,
1226 NULL
1227 }, {
1228 &sensor_dev_attr_in9_input.dev_attr.attr,
1229 &sensor_dev_attr_in9_max.dev_attr.attr,
1230 &sensor_dev_attr_in9_min.dev_attr.attr,
1231 &sensor_dev_attr_in9_alarm.dev_attr.attr,
1232 NULL
1233 }, {
1234 &sensor_dev_attr_in10_input.dev_attr.attr,
1235 &sensor_dev_attr_in10_max.dev_attr.attr,
1236 &sensor_dev_attr_in10_min.dev_attr.attr,
1237 &sensor_dev_attr_in10_alarm.dev_attr.attr,
1238 NULL
1239 }
1240};
1241
1242static const struct attribute_group f71805f_group_optin[4] = {
1243 { .attrs = f71805f_attributes_optin[0] },
1244 { .attrs = f71805f_attributes_optin[1] },
1245 { .attrs = f71805f_attributes_optin[2] },
1246 { .attrs = f71805f_attributes_optin[3] },
1247};
1248
1249/* We don't include pwm_freq files in the arrays above, because they must be
1250 created conditionally (only if pwm_mode is 1 == PWM) */
1251static struct attribute *f71805f_attributes_pwm_freq[] = {
1252 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
1253 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
1254 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
1255 NULL
1256};
1257
1258static const struct attribute_group f71805f_group_pwm_freq = {
1259 .attrs = f71805f_attributes_pwm_freq,
1260};
1261
1262/* We also need an indexed access to pwmN files to toggle writability */
1263static struct attribute *f71805f_attr_pwm[] = {
1264 &sensor_dev_attr_pwm1.dev_attr.attr,
1265 &sensor_dev_attr_pwm2.dev_attr.attr,
1266 &sensor_dev_attr_pwm3.dev_attr.attr,
1267};
1268
1269/*
1270 * Device registration and initialization
1271 */
1272
1273static void __devinit f71805f_init_device(struct f71805f_data *data)
1274{
1275 u8 reg;
1276 int i;
1277
1278 reg = f71805f_read8(data, F71805F_REG_START);
1279 if ((reg & 0x41) != 0x01) {
1280 printk(KERN_DEBUG DRVNAME ": Starting monitoring "
1281 "operations\n");
1282 f71805f_write8(data, F71805F_REG_START, (reg | 0x01) & ~0x40);
1283 }
1284
1285 /* Fan monitoring can be disabled. If it is, we won't be polling
1286 the register values, and won't create the related sysfs files. */
1287 for (i = 0; i < 3; i++) {
1288 data->fan_ctrl[i] = f71805f_read8(data,
1289 F71805F_REG_FAN_CTRL(i));
1290 /* Clear latch full bit, else "speed mode" fan speed control
1291 doesn't work */
1292 if (data->fan_ctrl[i] & FAN_CTRL_LATCH_FULL) {
1293 data->fan_ctrl[i] &= ~FAN_CTRL_LATCH_FULL;
1294 f71805f_write8(data, F71805F_REG_FAN_CTRL(i),
1295 data->fan_ctrl[i]);
1296 }
1297 }
1298}
1299
1300static int __devinit f71805f_probe(struct platform_device *pdev)
1301{
1302 struct f71805f_sio_data *sio_data = pdev->dev.platform_data;
1303 struct f71805f_data *data;
1304 struct resource *res;
1305 int i, err;
1306
1307 static const char *names[] = {
1308 "f71805f",
1309 "f71872f",
1310 };
1311
1312 if (!(data = kzalloc(sizeof(struct f71805f_data), GFP_KERNEL))) {
1313 err = -ENOMEM;
1314 pr_err("Out of memory\n");
1315 goto exit;
1316 }
1317
1318 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1319 if (!request_region(res->start + ADDR_REG_OFFSET, 2, DRVNAME)) {
1320 err = -EBUSY;
1321 dev_err(&pdev->dev, "Failed to request region 0x%lx-0x%lx\n",
1322 (unsigned long)(res->start + ADDR_REG_OFFSET),
1323 (unsigned long)(res->start + ADDR_REG_OFFSET + 1));
1324 goto exit_free;
1325 }
1326 data->addr = res->start;
1327 data->name = names[sio_data->kind];
1328 mutex_init(&data->update_lock);
1329
1330 platform_set_drvdata(pdev, data);
1331
1332 /* Some voltage inputs depend on chip model and configuration */
1333 switch (sio_data->kind) {
1334 case f71805f:
1335 data->has_in = 0x1ff;
1336 break;
1337 case f71872f:
1338 data->has_in = 0x6ef;
1339 if (sio_data->fnsel1 & 0x01)
1340 data->has_in |= (1 << 4); /* in4 */
1341 if (sio_data->fnsel1 & 0x02)
1342 data->has_in |= (1 << 8); /* in8 */
1343 break;
1344 }
1345
1346 /* Initialize the F71805F chip */
1347 f71805f_init_device(data);
1348
1349 /* Register sysfs interface files */
1350 if ((err = sysfs_create_group(&pdev->dev.kobj, &f71805f_group)))
1351 goto exit_release_region;
1352 if (data->has_in & (1 << 4)) { /* in4 */
1353 if ((err = sysfs_create_group(&pdev->dev.kobj,
1354 &f71805f_group_optin[0])))
1355 goto exit_remove_files;
1356 }
1357 if (data->has_in & (1 << 8)) { /* in8 */
1358 if ((err = sysfs_create_group(&pdev->dev.kobj,
1359 &f71805f_group_optin[1])))
1360 goto exit_remove_files;
1361 }
1362 if (data->has_in & (1 << 9)) { /* in9 (F71872F/FG only) */
1363 if ((err = sysfs_create_group(&pdev->dev.kobj,
1364 &f71805f_group_optin[2])))
1365 goto exit_remove_files;
1366 }
1367 if (data->has_in & (1 << 10)) { /* in9 (F71872F/FG only) */
1368 if ((err = sysfs_create_group(&pdev->dev.kobj,
1369 &f71805f_group_optin[3])))
1370 goto exit_remove_files;
1371 }
1372 for (i = 0; i < 3; i++) {
1373 /* If control mode is PWM, create pwm_freq file */
1374 if (!(data->fan_ctrl[i] & FAN_CTRL_DC_MODE)) {
1375 if ((err = sysfs_create_file(&pdev->dev.kobj,
1376 f71805f_attributes_pwm_freq[i])))
1377 goto exit_remove_files;
1378 }
1379 /* If PWM is in manual mode, add write permission */
1380 if (data->fan_ctrl[i] & FAN_CTRL_MODE_MANUAL) {
1381 if ((err = sysfs_chmod_file(&pdev->dev.kobj,
1382 f71805f_attr_pwm[i],
1383 S_IRUGO | S_IWUSR))) {
1384 dev_err(&pdev->dev, "chmod +w pwm%d failed\n",
1385 i + 1);
1386 goto exit_remove_files;
1387 }
1388 }
1389 }
1390
1391 data->hwmon_dev = hwmon_device_register(&pdev->dev);
1392 if (IS_ERR(data->hwmon_dev)) {
1393 err = PTR_ERR(data->hwmon_dev);
1394 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
1395 goto exit_remove_files;
1396 }
1397
1398 return 0;
1399
1400exit_remove_files:
1401 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1402 for (i = 0; i < 4; i++)
1403 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1404 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1405exit_release_region:
1406 release_region(res->start + ADDR_REG_OFFSET, 2);
1407exit_free:
1408 platform_set_drvdata(pdev, NULL);
1409 kfree(data);
1410exit:
1411 return err;
1412}
1413
1414static int __devexit f71805f_remove(struct platform_device *pdev)
1415{
1416 struct f71805f_data *data = platform_get_drvdata(pdev);
1417 struct resource *res;
1418 int i;
1419
1420 hwmon_device_unregister(data->hwmon_dev);
1421 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group);
1422 for (i = 0; i < 4; i++)
1423 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_optin[i]);
1424 sysfs_remove_group(&pdev->dev.kobj, &f71805f_group_pwm_freq);
1425 platform_set_drvdata(pdev, NULL);
1426 kfree(data);
1427
1428 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1429 release_region(res->start + ADDR_REG_OFFSET, 2);
1430
1431 return 0;
1432}
1433
1434static struct platform_driver f71805f_driver = {
1435 .driver = {
1436 .owner = THIS_MODULE,
1437 .name = DRVNAME,
1438 },
1439 .probe = f71805f_probe,
1440 .remove = __devexit_p(f71805f_remove),
1441};
1442
1443static int __init f71805f_device_add(unsigned short address,
1444 const struct f71805f_sio_data *sio_data)
1445{
1446 struct resource res = {
1447 .start = address,
1448 .end = address + REGION_LENGTH - 1,
1449 .flags = IORESOURCE_IO,
1450 };
1451 int err;
1452
1453 pdev = platform_device_alloc(DRVNAME, address);
1454 if (!pdev) {
1455 err = -ENOMEM;
1456 pr_err("Device allocation failed\n");
1457 goto exit;
1458 }
1459
1460 res.name = pdev->name;
1461 err = acpi_check_resource_conflict(&res);
1462 if (err)
1463 goto exit_device_put;
1464
1465 err = platform_device_add_resources(pdev, &res, 1);
1466 if (err) {
1467 pr_err("Device resource addition failed (%d)\n", err);
1468 goto exit_device_put;
1469 }
1470
1471 err = platform_device_add_data(pdev, sio_data,
1472 sizeof(struct f71805f_sio_data));
1473 if (err) {
1474 pr_err("Platform data allocation failed\n");
1475 goto exit_device_put;
1476 }
1477
1478 err = platform_device_add(pdev);
1479 if (err) {
1480 pr_err("Device addition failed (%d)\n", err);
1481 goto exit_device_put;
1482 }
1483
1484 return 0;
1485
1486exit_device_put:
1487 platform_device_put(pdev);
1488exit:
1489 return err;
1490}
1491
1492static int __init f71805f_find(int sioaddr, unsigned short *address,
1493 struct f71805f_sio_data *sio_data)
1494{
1495 int err = -ENODEV;
1496 u16 devid;
1497
1498 static const char *names[] = {
1499 "F71805F/FG",
1500 "F71872F/FG or F71806F/FG",
1501 };
1502
1503 superio_enter(sioaddr);
1504
1505 devid = superio_inw(sioaddr, SIO_REG_MANID);
1506 if (devid != SIO_FINTEK_ID)
1507 goto exit;
1508
1509 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
1510 switch (devid) {
1511 case SIO_F71805F_ID:
1512 sio_data->kind = f71805f;
1513 break;
1514 case SIO_F71872F_ID:
1515 sio_data->kind = f71872f;
1516 sio_data->fnsel1 = superio_inb(sioaddr, SIO_REG_FNSEL1);
1517 break;
1518 default:
1519 pr_info("Unsupported Fintek device, skipping\n");
1520 goto exit;
1521 }
1522
1523 superio_select(sioaddr, F71805F_LD_HWM);
1524 if (!(superio_inb(sioaddr, SIO_REG_ENABLE) & 0x01)) {
1525 pr_warn("Device not activated, skipping\n");
1526 goto exit;
1527 }
1528
1529 *address = superio_inw(sioaddr, SIO_REG_ADDR);
1530 if (*address == 0) {
1531 pr_warn("Base address not set, skipping\n");
1532 goto exit;
1533 }
1534 *address &= ~(REGION_LENGTH - 1); /* Ignore 3 LSB */
1535
1536 err = 0;
1537 pr_info("Found %s chip at %#x, revision %u\n",
1538 names[sio_data->kind], *address,
1539 superio_inb(sioaddr, SIO_REG_DEVREV));
1540
1541exit:
1542 superio_exit(sioaddr);
1543 return err;
1544}
1545
1546static int __init f71805f_init(void)
1547{
1548 int err;
1549 unsigned short address;
1550 struct f71805f_sio_data sio_data;
1551
1552 if (f71805f_find(0x2e, &address, &sio_data)
1553 && f71805f_find(0x4e, &address, &sio_data))
1554 return -ENODEV;
1555
1556 err = platform_driver_register(&f71805f_driver);
1557 if (err)
1558 goto exit;
1559
1560 /* Sets global pdev as a side effect */
1561 err = f71805f_device_add(address, &sio_data);
1562 if (err)
1563 goto exit_driver;
1564
1565 return 0;
1566
1567exit_driver:
1568 platform_driver_unregister(&f71805f_driver);
1569exit:
1570 return err;
1571}
1572
1573static void __exit f71805f_exit(void)
1574{
1575 platform_device_unregister(pdev);
1576 platform_driver_unregister(&f71805f_driver);
1577}
1578
1579MODULE_AUTHOR("Jean Delvare <khali@linux-fr>");
1580MODULE_LICENSE("GPL");
1581MODULE_DESCRIPTION("F71805F/F71872F hardware monitoring driver");
1582
1583module_init(f71805f_init);
1584module_exit(f71805f_exit);