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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 */
27
28#include <linux/i2c.h>
29#include <linux/slab.h>
30
31#include <drm/drm_atomic_helper.h>
32#include <drm/drm_crtc.h>
33
34#include "i915_drv.h"
35#include "i915_reg.h"
36#include "intel_connector.h"
37#include "intel_de.h"
38#include "intel_display_types.h"
39#include "intel_dvo.h"
40#include "intel_dvo_dev.h"
41#include "intel_dvo_regs.h"
42#include "intel_gmbus.h"
43#include "intel_panel.h"
44
45#define INTEL_DVO_CHIP_NONE 0
46#define INTEL_DVO_CHIP_LVDS 1
47#define INTEL_DVO_CHIP_TMDS 2
48#define INTEL_DVO_CHIP_TVOUT 4
49#define INTEL_DVO_CHIP_LVDS_NO_FIXED 5
50
51#define SIL164_ADDR 0x38
52#define CH7xxx_ADDR 0x76
53#define TFP410_ADDR 0x38
54#define NS2501_ADDR 0x38
55
56static const struct intel_dvo_device intel_dvo_devices[] = {
57 {
58 .type = INTEL_DVO_CHIP_TMDS,
59 .name = "sil164",
60 .port = PORT_C,
61 .slave_addr = SIL164_ADDR,
62 .dev_ops = &sil164_ops,
63 },
64 {
65 .type = INTEL_DVO_CHIP_TMDS,
66 .name = "ch7xxx",
67 .port = PORT_C,
68 .slave_addr = CH7xxx_ADDR,
69 .dev_ops = &ch7xxx_ops,
70 },
71 {
72 .type = INTEL_DVO_CHIP_TMDS,
73 .name = "ch7xxx",
74 .port = PORT_C,
75 .slave_addr = 0x75, /* For some ch7010 */
76 .dev_ops = &ch7xxx_ops,
77 },
78 {
79 .type = INTEL_DVO_CHIP_LVDS,
80 .name = "ivch",
81 .port = PORT_A,
82 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
83 .dev_ops = &ivch_ops,
84 },
85 {
86 .type = INTEL_DVO_CHIP_TMDS,
87 .name = "tfp410",
88 .port = PORT_C,
89 .slave_addr = TFP410_ADDR,
90 .dev_ops = &tfp410_ops,
91 },
92 {
93 .type = INTEL_DVO_CHIP_LVDS,
94 .name = "ch7017",
95 .port = PORT_C,
96 .slave_addr = 0x75,
97 .gpio = GMBUS_PIN_DPB,
98 .dev_ops = &ch7017_ops,
99 },
100 {
101 .type = INTEL_DVO_CHIP_LVDS_NO_FIXED,
102 .name = "ns2501",
103 .port = PORT_B,
104 .slave_addr = NS2501_ADDR,
105 .dev_ops = &ns2501_ops,
106 },
107};
108
109struct intel_dvo {
110 struct intel_encoder base;
111
112 struct intel_dvo_device dev;
113
114 struct intel_connector *attached_connector;
115};
116
117static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
118{
119 return container_of(encoder, struct intel_dvo, base);
120}
121
122static struct intel_dvo *intel_attached_dvo(struct intel_connector *connector)
123{
124 return enc_to_dvo(intel_attached_encoder(connector));
125}
126
127static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
128{
129 struct drm_i915_private *i915 = to_i915(connector->base.dev);
130 struct intel_encoder *encoder = intel_attached_encoder(connector);
131 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
132 enum port port = encoder->port;
133 u32 tmp;
134
135 tmp = intel_de_read(i915, DVO(port));
136
137 if (!(tmp & DVO_ENABLE))
138 return false;
139
140 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
141}
142
143static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
144 enum pipe *pipe)
145{
146 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
147 enum port port = encoder->port;
148 u32 tmp;
149
150 tmp = intel_de_read(i915, DVO(port));
151
152 *pipe = REG_FIELD_GET(DVO_PIPE_SEL_MASK, tmp);
153
154 return tmp & DVO_ENABLE;
155}
156
157static void intel_dvo_get_config(struct intel_encoder *encoder,
158 struct intel_crtc_state *pipe_config)
159{
160 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
161 enum port port = encoder->port;
162 u32 tmp, flags = 0;
163
164 pipe_config->output_types |= BIT(INTEL_OUTPUT_DVO);
165
166 tmp = intel_de_read(i915, DVO(port));
167 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
168 flags |= DRM_MODE_FLAG_PHSYNC;
169 else
170 flags |= DRM_MODE_FLAG_NHSYNC;
171 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
172 flags |= DRM_MODE_FLAG_PVSYNC;
173 else
174 flags |= DRM_MODE_FLAG_NVSYNC;
175
176 pipe_config->hw.adjusted_mode.flags |= flags;
177
178 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock;
179}
180
181static void intel_disable_dvo(struct intel_atomic_state *state,
182 struct intel_encoder *encoder,
183 const struct intel_crtc_state *old_crtc_state,
184 const struct drm_connector_state *old_conn_state)
185{
186 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
187 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
188 enum port port = encoder->port;
189
190 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
191
192 intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0);
193 intel_de_posting_read(i915, DVO(port));
194}
195
196static void intel_enable_dvo(struct intel_atomic_state *state,
197 struct intel_encoder *encoder,
198 const struct intel_crtc_state *pipe_config,
199 const struct drm_connector_state *conn_state)
200{
201 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
202 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
203 enum port port = encoder->port;
204
205 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
206 &pipe_config->hw.mode,
207 &pipe_config->hw.adjusted_mode);
208
209 intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE);
210 intel_de_posting_read(i915, DVO(port));
211
212 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
213}
214
215static enum drm_mode_status
216intel_dvo_mode_valid(struct drm_connector *_connector,
217 struct drm_display_mode *mode)
218{
219 struct intel_connector *connector = to_intel_connector(_connector);
220 struct drm_i915_private *i915 = to_i915(connector->base.dev);
221 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
222 const struct drm_display_mode *fixed_mode =
223 intel_panel_fixed_mode(connector, mode);
224 int max_dotclk = to_i915(connector->base.dev)->max_dotclk_freq;
225 int target_clock = mode->clock;
226 enum drm_mode_status status;
227
228 status = intel_cpu_transcoder_mode_valid(i915, mode);
229 if (status != MODE_OK)
230 return status;
231
232 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
233 return MODE_NO_DBLESCAN;
234
235 /* XXX: Validate clock range */
236
237 if (fixed_mode) {
238 enum drm_mode_status status;
239
240 status = intel_panel_mode_valid(connector, mode);
241 if (status != MODE_OK)
242 return status;
243
244 target_clock = fixed_mode->clock;
245 }
246
247 if (target_clock > max_dotclk)
248 return MODE_CLOCK_HIGH;
249
250 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
251}
252
253static int intel_dvo_compute_config(struct intel_encoder *encoder,
254 struct intel_crtc_state *pipe_config,
255 struct drm_connector_state *conn_state)
256{
257 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
258 struct intel_connector *connector = to_intel_connector(conn_state->connector);
259 struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
260 const struct drm_display_mode *fixed_mode =
261 intel_panel_fixed_mode(intel_dvo->attached_connector, adjusted_mode);
262
263 /*
264 * If we have timings from the BIOS for the panel, put them in
265 * to the adjusted mode. The CRTC will be set up for this mode,
266 * with the panel scaling set up to source from the H/VDisplay
267 * of the original mode.
268 */
269 if (fixed_mode) {
270 int ret;
271
272 ret = intel_panel_compute_config(connector, adjusted_mode);
273 if (ret)
274 return ret;
275 }
276
277 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
278 return -EINVAL;
279
280 pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
281 pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
282
283 return 0;
284}
285
286static void intel_dvo_pre_enable(struct intel_atomic_state *state,
287 struct intel_encoder *encoder,
288 const struct intel_crtc_state *pipe_config,
289 const struct drm_connector_state *conn_state)
290{
291 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
292 struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
293 const struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
294 enum port port = encoder->port;
295 enum pipe pipe = crtc->pipe;
296 u32 dvo_val;
297
298 /* Save the active data order, since I don't know what it should be set to. */
299 dvo_val = intel_de_read(i915, DVO(port)) &
300 (DVO_DEDICATED_INT_ENABLE |
301 DVO_PRESERVE_MASK | DVO_ACT_DATA_ORDER_MASK);
302 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
303 DVO_BLANK_ACTIVE_HIGH;
304
305 dvo_val |= DVO_PIPE_SEL(pipe);
306 dvo_val |= DVO_PIPE_STALL;
307 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
308 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
309 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
310 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
311
312 intel_de_write(i915, DVO_SRCDIM(port),
313 DVO_SRCDIM_HORIZONTAL(adjusted_mode->crtc_hdisplay) |
314 DVO_SRCDIM_VERTICAL(adjusted_mode->crtc_vdisplay));
315 intel_de_write(i915, DVO(port), dvo_val);
316}
317
318static enum drm_connector_status
319intel_dvo_detect(struct drm_connector *_connector, bool force)
320{
321 struct intel_connector *connector = to_intel_connector(_connector);
322 struct drm_i915_private *i915 = to_i915(connector->base.dev);
323 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
324
325 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s]\n",
326 connector->base.base.id, connector->base.name);
327
328 if (!intel_display_device_enabled(i915))
329 return connector_status_disconnected;
330
331 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
332}
333
334static int intel_dvo_get_modes(struct drm_connector *_connector)
335{
336 struct intel_connector *connector = to_intel_connector(_connector);
337 int num_modes;
338
339 /*
340 * We should probably have an i2c driver get_modes function for those
341 * devices which will have a fixed set of modes determined by the chip
342 * (TV-out, for example), but for now with just TMDS and LVDS,
343 * that's not the case.
344 */
345 num_modes = intel_ddc_get_modes(&connector->base, connector->base.ddc);
346 if (num_modes)
347 return num_modes;
348
349 return intel_panel_get_modes(connector);
350}
351
352static const struct drm_connector_funcs intel_dvo_connector_funcs = {
353 .detect = intel_dvo_detect,
354 .late_register = intel_connector_register,
355 .early_unregister = intel_connector_unregister,
356 .destroy = intel_connector_destroy,
357 .fill_modes = drm_helper_probe_single_connector_modes,
358 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
359 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
360};
361
362static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
363 .mode_valid = intel_dvo_mode_valid,
364 .get_modes = intel_dvo_get_modes,
365};
366
367static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
368{
369 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
370
371 if (intel_dvo->dev.dev_ops->destroy)
372 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
373
374 intel_encoder_destroy(encoder);
375}
376
377static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
378 .destroy = intel_dvo_enc_destroy,
379};
380
381static int intel_dvo_encoder_type(const struct intel_dvo_device *dvo)
382{
383 switch (dvo->type) {
384 case INTEL_DVO_CHIP_TMDS:
385 return DRM_MODE_ENCODER_TMDS;
386 case INTEL_DVO_CHIP_LVDS_NO_FIXED:
387 case INTEL_DVO_CHIP_LVDS:
388 return DRM_MODE_ENCODER_LVDS;
389 default:
390 MISSING_CASE(dvo->type);
391 return DRM_MODE_ENCODER_NONE;
392 }
393}
394
395static int intel_dvo_connector_type(const struct intel_dvo_device *dvo)
396{
397 switch (dvo->type) {
398 case INTEL_DVO_CHIP_TMDS:
399 return DRM_MODE_CONNECTOR_DVII;
400 case INTEL_DVO_CHIP_LVDS_NO_FIXED:
401 case INTEL_DVO_CHIP_LVDS:
402 return DRM_MODE_CONNECTOR_LVDS;
403 default:
404 MISSING_CASE(dvo->type);
405 return DRM_MODE_CONNECTOR_Unknown;
406 }
407}
408
409static bool intel_dvo_init_dev(struct drm_i915_private *dev_priv,
410 struct intel_dvo *intel_dvo,
411 const struct intel_dvo_device *dvo)
412{
413 struct i2c_adapter *i2c;
414 u32 dpll[I915_MAX_PIPES];
415 enum pipe pipe;
416 int gpio;
417 bool ret;
418
419 /*
420 * Allow the I2C driver info to specify the GPIO to be used in
421 * special cases, but otherwise default to what's defined
422 * in the spec.
423 */
424 if (intel_gmbus_is_valid_pin(dev_priv, dvo->gpio))
425 gpio = dvo->gpio;
426 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
427 gpio = GMBUS_PIN_SSC;
428 else
429 gpio = GMBUS_PIN_DPB;
430
431 /*
432 * Set up the I2C bus necessary for the chip we're probing.
433 * It appears that everything is on GPIOE except for panels
434 * on i830 laptops, which are on GPIOB (DVOA).
435 */
436 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
437
438 intel_dvo->dev = *dvo;
439
440 /*
441 * GMBUS NAK handling seems to be unstable, hence let the
442 * transmitter detection run in bit banging mode for now.
443 */
444 intel_gmbus_force_bit(i2c, true);
445
446 /*
447 * ns2501 requires the DVO 2x clock before it will
448 * respond to i2c accesses, so make sure we have
449 * the clock enabled before we attempt to initialize
450 * the device.
451 */
452 for_each_pipe(dev_priv, pipe)
453 dpll[pipe] = intel_de_rmw(dev_priv, DPLL(pipe), 0, DPLL_DVO_2X_MODE);
454
455 ret = dvo->dev_ops->init(&intel_dvo->dev, i2c);
456
457 /* restore the DVO 2x clock state to original */
458 for_each_pipe(dev_priv, pipe) {
459 intel_de_write(dev_priv, DPLL(pipe), dpll[pipe]);
460 }
461
462 intel_gmbus_force_bit(i2c, false);
463
464 return ret;
465}
466
467static bool intel_dvo_probe(struct drm_i915_private *i915,
468 struct intel_dvo *intel_dvo)
469{
470 int i;
471
472 /* Now, try to find a controller */
473 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
474 if (intel_dvo_init_dev(i915, intel_dvo,
475 &intel_dvo_devices[i]))
476 return true;
477 }
478
479 return false;
480}
481
482void intel_dvo_init(struct drm_i915_private *i915)
483{
484 struct intel_connector *connector;
485 struct intel_encoder *encoder;
486 struct intel_dvo *intel_dvo;
487
488 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
489 if (!intel_dvo)
490 return;
491
492 connector = intel_connector_alloc();
493 if (!connector) {
494 kfree(intel_dvo);
495 return;
496 }
497
498 intel_dvo->attached_connector = connector;
499
500 encoder = &intel_dvo->base;
501
502 encoder->disable = intel_disable_dvo;
503 encoder->enable = intel_enable_dvo;
504 encoder->get_hw_state = intel_dvo_get_hw_state;
505 encoder->get_config = intel_dvo_get_config;
506 encoder->compute_config = intel_dvo_compute_config;
507 encoder->pre_enable = intel_dvo_pre_enable;
508 connector->get_hw_state = intel_dvo_connector_get_hw_state;
509
510 if (!intel_dvo_probe(i915, intel_dvo)) {
511 kfree(intel_dvo);
512 intel_connector_free(connector);
513 return;
514 }
515
516 assert_port_valid(i915, intel_dvo->dev.port);
517
518 encoder->type = INTEL_OUTPUT_DVO;
519 encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
520 encoder->port = intel_dvo->dev.port;
521 encoder->pipe_mask = ~0;
522
523 if (intel_dvo->dev.type != INTEL_DVO_CHIP_LVDS)
524 encoder->cloneable = BIT(INTEL_OUTPUT_ANALOG) |
525 BIT(INTEL_OUTPUT_DVO);
526
527 drm_encoder_init(&i915->drm, &encoder->base,
528 &intel_dvo_enc_funcs,
529 intel_dvo_encoder_type(&intel_dvo->dev),
530 "DVO %c", port_name(encoder->port));
531
532 drm_dbg_kms(&i915->drm, "[ENCODER:%d:%s] detected %s\n",
533 encoder->base.base.id, encoder->base.name,
534 intel_dvo->dev.name);
535
536 if (intel_dvo->dev.type == INTEL_DVO_CHIP_TMDS)
537 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
538 DRM_CONNECTOR_POLL_DISCONNECT;
539
540 drm_connector_init_with_ddc(&i915->drm, &connector->base,
541 &intel_dvo_connector_funcs,
542 intel_dvo_connector_type(&intel_dvo->dev),
543 intel_gmbus_get_adapter(i915, GMBUS_PIN_DPC));
544
545 drm_connector_helper_add(&connector->base,
546 &intel_dvo_connector_helper_funcs);
547 connector->base.display_info.subpixel_order = SubPixelHorizontalRGB;
548
549 intel_connector_attach_encoder(connector, encoder);
550
551 if (intel_dvo->dev.type == INTEL_DVO_CHIP_LVDS) {
552 /*
553 * For our LVDS chipsets, we should hopefully be able
554 * to dig the fixed panel mode out of the BIOS data.
555 * However, it's in a different format from the BIOS
556 * data on chipsets with integrated LVDS (stored in AIM
557 * headers, likely), so for now, just get the current
558 * mode being output through DVO.
559 */
560 intel_panel_add_encoder_fixed_mode(connector, encoder);
561
562 intel_panel_init(connector, NULL);
563 }
564}