1SMBus Protocol Summary
  2======================
  3
  4The following is a summary of the SMBus protocol. It applies to
  5all revisions of the protocol (1.0, 1.1, and 2.0).
  6Certain protocol features which are not supported by
  7this package are briefly described at the end of this document.
  8
  9Some adapters understand only the SMBus (System Management Bus) protocol,
 10which is a subset from the I2C protocol. Fortunately, many devices use
 11only the same subset, which makes it possible to put them on an SMBus.
 12
 13If you write a driver for some I2C device, please try to use the SMBus
 14commands if at all possible (if the device uses only that subset of the
 15I2C protocol). This makes it possible to use the device driver on both
 16SMBus adapters and I2C adapters (the SMBus command set is automatically
 17translated to I2C on I2C adapters, but plain I2C commands can not be
 18handled at all on most pure SMBus adapters).
 19
 20Below is a list of SMBus protocol operations, and the functions executing
 21them.  Note that the names used in the SMBus protocol specifications usually
 22don't match these function names.  For some of the operations which pass a
 23single data byte, the functions using SMBus protocol operation names execute
 24a different protocol operation entirely.
 25
 26
 27Key to symbols
 28==============
 29
 30S     (1 bit) : Start bit
 31P     (1 bit) : Stop bit
 32Rd/Wr (1 bit) : Read/Write bit. Rd equals 1, Wr equals 0.
 33A, NA (1 bit) : Accept and reverse accept bit. 
 34Addr  (7 bits): I2C 7 bit address. Note that this can be expanded as usual to 
 35                get a 10 bit I2C address.
 36Comm  (8 bits): Command byte, a data byte which often selects a register on
 37                the device.
 38Data  (8 bits): A plain data byte. Sometimes, I write DataLow, DataHigh
 39                for 16 bit data.
 40Count (8 bits): A data byte containing the length of a block operation.
 41
 42[..]: Data sent by I2C device, as opposed to data sent by the host adapter.
 43
 44
 45SMBus Quick Command
 46===================
 47
 48This sends a single bit to the device, at the place of the Rd/Wr bit.
 49
 50A Addr Rd/Wr [A] P
 51
 52
 53SMBus Receive Byte:  i2c_smbus_read_byte()
 54==========================================
 55
 56This reads a single byte from a device, without specifying a device
 57register. Some devices are so simple that this interface is enough; for
 58others, it is a shorthand if you want to read the same register as in
 59the previous SMBus command.
 60
 61S Addr Rd [A] [Data] NA P
 62
 63
 64SMBus Send Byte:  i2c_smbus_write_byte()
 65========================================
 66
 67This operation is the reverse of Receive Byte: it sends a single byte
 68to a device.  See Receive Byte for more information.
 69
 70S Addr Wr [A] Data [A] P
 71
 72
 73SMBus Read Byte:  i2c_smbus_read_byte_data()
 74============================================
 75
 76This reads a single byte from a device, from a designated register.
 77The register is specified through the Comm byte.
 78
 79S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P
 80
 81
 82SMBus Read Word:  i2c_smbus_read_word_data()
 83============================================
 84
 85This operation is very like Read Byte; again, data is read from a
 86device, from a designated register that is specified through the Comm
 87byte. But this time, the data is a complete word (16 bits).
 88
 89S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P
 90
 91
 92SMBus Write Byte:  i2c_smbus_write_byte_data()
 93==============================================
 94
 95This writes a single byte to a device, to a designated register. The
 96register is specified through the Comm byte. This is the opposite of
 97the Read Byte operation.
 98
 99S Addr Wr [A] Comm [A] Data [A] P
100
101
102SMBus Write Word:  i2c_smbus_write_word_data()
103==============================================
104
105This is the opposite of the Read Word operation. 16 bits
106of data is written to a device, to the designated register that is
107specified through the Comm byte. 
108
109S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P
110
111
112SMBus Process Call:  i2c_smbus_process_call()
113=============================================
114
115This command selects a device register (through the Comm byte), sends
11616 bits of data to it, and reads 16 bits of data in return.
117
118S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 
119                             S Addr Rd [A] [DataLow] A [DataHigh] NA P
120
121
122SMBus Block Read:  i2c_smbus_read_block_data()
123==============================================
124
125This command reads a block of up to 32 bytes from a device, from a 
126designated register that is specified through the Comm byte. The amount
127of data is specified by the device in the Count byte.
128
129S Addr Wr [A] Comm [A] 
130           S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P
131
132
133SMBus Block Write:  i2c_smbus_write_block_data()
134================================================
135
136The opposite of the Block Read command, this writes up to 32 bytes to 
137a device, to a designated register that is specified through the
138Comm byte. The amount of data is specified in the Count byte.
139
140S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P
141
142
143SMBus Block Write - Block Read Process Call
144===========================================
145
146SMBus Block Write - Block Read Process Call was introduced in
147Revision 2.0 of the specification.
148
149This command selects a device register (through the Comm byte), sends
1501 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return.
151
152S Addr Wr [A] Comm [A] Count [A] Data [A] ...
153                             S Addr Rd [A] [Count] A [Data] ... A P
154
155
156SMBus Host Notify
157=================
158
159This command is sent from a SMBus device acting as a master to the
160SMBus host acting as a slave.
161It is the same form as Write Word, with the command code replaced by the
162alerting device's address.
163
164[S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P]
165
166
167Packet Error Checking (PEC)
168===========================
169
170Packet Error Checking was introduced in Revision 1.1 of the specification.
171
172PEC adds a CRC-8 error-checking byte to transfers using it, immediately
173before the terminating STOP.
174
175
176Address Resolution Protocol (ARP)
177=================================
178
179The Address Resolution Protocol was introduced in Revision 2.0 of
180the specification. It is a higher-layer protocol which uses the
181messages above.
182
183ARP adds device enumeration and dynamic address assignment to
184the protocol. All ARP communications use slave address 0x61 and
185require PEC checksums.
186
187
188SMBus Alert
189===========
190
191SMBus Alert was introduced in Revision 1.0 of the specification.
192
193The SMBus alert protocol allows several SMBus slave devices to share a
194single interrupt pin on the SMBus master, while still allowing the master
195to know which slave triggered the interrupt.
196
197This is implemented the following way in the Linux kernel:
198* I2C bus drivers which support SMBus alert should call
199  i2c_setup_smbus_alert() to setup SMBus alert support.
200* I2C drivers for devices which can trigger SMBus alerts should implement
201  the optional alert() callback.
202
203
204I2C Block Transactions
205======================
206
207The following I2C block transactions are supported by the
208SMBus layer and are described here for completeness.
209They are *NOT* defined by the SMBus specification.
210
211I2C block transactions do not limit the number of bytes transferred
212but the SMBus layer places a limit of 32 bytes.
213
214
215I2C Block Read:  i2c_smbus_read_i2c_block_data()
216================================================
217
218This command reads a block of bytes from a device, from a 
219designated register that is specified through the Comm byte.
220
221S Addr Wr [A] Comm [A] 
222           S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
223
224
225I2C Block Read (2 Comm bytes)
226=============================
227
228This command reads a block of bytes from a device, from a 
229designated register that is specified through the two Comm bytes.
230
231S Addr Wr [A] Comm1 [A] Comm2 [A] 
232           S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P
233
234
235I2C Block Write:  i2c_smbus_write_i2c_block_data()
236==================================================
237
238The opposite of the Block Read command, this writes bytes to 
239a device, to a designated register that is specified through the
240Comm byte. Note that command lengths of 0, 2, or more bytes are
241supported as they are indistinguishable from data.
242
243S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P