1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Copyright (C) 2005-2006 by Texas Instruments
 
 
 
 
 
 4 */
 5
 6#ifndef __MUSB_OMAP243X_H__
 7#define __MUSB_OMAP243X_H__
 8
 9#include <linux/platform_data/usb-omap.h>
10
11/*
12 * OMAP2430-specific definitions
13 */
14
15#define OTG_REVISION		0x400
16
17#define OTG_SYSCONFIG		0x404
18#	define	MIDLEMODE	12	/* bit position */
19#	define	FORCESTDBY		(0 << MIDLEMODE)
20#	define	NOSTDBY			(1 << MIDLEMODE)
21#	define	SMARTSTDBY		(2 << MIDLEMODE)
22
23#	define	SIDLEMODE		3	/* bit position */
24#	define	FORCEIDLE		(0 << SIDLEMODE)
25#	define	NOIDLE			(1 << SIDLEMODE)
26#	define	SMARTIDLE		(2 << SIDLEMODE)
27
28#	define	ENABLEWAKEUP		(1 << 2)
29#	define	SOFTRST			(1 << 1)
30#	define	AUTOIDLE		(1 << 0)
31
32#define OTG_SYSSTATUS		0x408
33#	define	RESETDONE		(1 << 0)
34
35#define OTG_INTERFSEL		0x40c
36#	define	EXTCP			(1 << 2)
37#	define	PHYSEL			0	/* bit position */
38#	define	UTMI_8BIT		(0 << PHYSEL)
39#	define	ULPI_12PIN		(1 << PHYSEL)
40#	define	ULPI_8PIN		(2 << PHYSEL)
41
42#define OTG_SIMENABLE		0x410
43#	define	TM1			(1 << 0)
44
45#define OTG_FORCESTDBY		0x414
46#	define	ENABLEFORCE		(1 << 0)
47
48#endif	/* __MUSB_OMAP243X_H__ */

 
 1/*
 2 * Copyright (C) 2005-2006 by Texas Instruments
 3 *
 4 * The Inventra Controller Driver for Linux is free software; you
 5 * can redistribute it and/or modify it under the terms of the GNU
 6 * General Public License version 2 as published by the Free Software
 7 * Foundation.
 8 */
 9
10#ifndef __MUSB_OMAP243X_H__
11#define __MUSB_OMAP243X_H__
12
13#include <plat/usb.h>
14
15/*
16 * OMAP2430-specific definitions
17 */
18
19#define OTG_REVISION		0x400
20
21#define OTG_SYSCONFIG		0x404
22#	define	MIDLEMODE	12	/* bit position */
23#	define	FORCESTDBY		(0 << MIDLEMODE)
24#	define	NOSTDBY			(1 << MIDLEMODE)
25#	define	SMARTSTDBY		(2 << MIDLEMODE)
26
27#	define	SIDLEMODE		3	/* bit position */
28#	define	FORCEIDLE		(0 << SIDLEMODE)
29#	define	NOIDLE			(1 << SIDLEMODE)
30#	define	SMARTIDLE		(2 << SIDLEMODE)
31
32#	define	ENABLEWAKEUP		(1 << 2)
33#	define	SOFTRST			(1 << 1)
34#	define	AUTOIDLE		(1 << 0)
35
36#define OTG_SYSSTATUS		0x408
37#	define	RESETDONE		(1 << 0)
38
39#define OTG_INTERFSEL		0x40c
40#	define	EXTCP			(1 << 2)
41#	define	PHYSEL			0	/* bit position */
42#	define	UTMI_8BIT		(0 << PHYSEL)
43#	define	ULPI_12PIN		(1 << PHYSEL)
44#	define	ULPI_8PIN		(2 << PHYSEL)
45
46#define OTG_SIMENABLE		0x410
47#	define	TM1			(1 << 0)
48
49#define OTG_FORCESTDBY		0x414
50#	define	ENABLEFORCE		(1 << 0)
51
52#endif	/* __MUSB_OMAP243X_H__ */