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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Derived from arch/i386/kernel/irq.c
4 * Copyright (C) 1992 Linus Torvalds
5 * Adapted from arch/i386 by Gary Thomas
6 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
7 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
8 * Copyright (C) 1996-2001 Cort Dougan
9 * Adapted for Power Macintosh by Paul Mackerras
10 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
11 *
12 * This file contains the code used by various IRQ handling routines:
13 * asking for different IRQ's should be done through these routines
14 * instead of just grabbing them. Thus setups with different IRQ numbers
15 * shouldn't result in any weird surprises, and installing new handlers
16 * should be easier.
17 *
18 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
19 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
20 * mask register (of which only 16 are defined), hence the weird shifting
21 * and complement of the cached_irq_mask. I want to be able to stuff
22 * this right into the SIU SMASK register.
23 * Many of the prep/chrp functions are conditional compiled on CONFIG_PPC_8xx
24 * to reduce code space and undefined function references.
25 */
26
27#undef DEBUG
28
29#include <linux/export.h>
30#include <linux/threads.h>
31#include <linux/kernel_stat.h>
32#include <linux/signal.h>
33#include <linux/sched.h>
34#include <linux/ptrace.h>
35#include <linux/ioport.h>
36#include <linux/interrupt.h>
37#include <linux/timex.h>
38#include <linux/init.h>
39#include <linux/slab.h>
40#include <linux/delay.h>
41#include <linux/irq.h>
42#include <linux/seq_file.h>
43#include <linux/cpumask.h>
44#include <linux/profile.h>
45#include <linux/bitops.h>
46#include <linux/list.h>
47#include <linux/radix-tree.h>
48#include <linux/mutex.h>
49#include <linux/pci.h>
50#include <linux/debugfs.h>
51#include <linux/of.h>
52#include <linux/of_irq.h>
53#include <linux/vmalloc.h>
54#include <linux/pgtable.h>
55#include <linux/static_call.h>
56
57#include <linux/uaccess.h>
58#include <asm/interrupt.h>
59#include <asm/io.h>
60#include <asm/irq.h>
61#include <asm/cache.h>
62#include <asm/ptrace.h>
63#include <asm/machdep.h>
64#include <asm/udbg.h>
65#include <asm/smp.h>
66#include <asm/hw_irq.h>
67#include <asm/softirq_stack.h>
68#include <asm/ppc_asm.h>
69
70#define CREATE_TRACE_POINTS
71#include <asm/trace.h>
72#include <asm/cpu_has_feature.h>
73
74DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
75EXPORT_PER_CPU_SYMBOL(irq_stat);
76
77#ifdef CONFIG_PPC32
78atomic_t ppc_n_lost_interrupts;
79
80#ifdef CONFIG_TAU_INT
81extern int tau_initialized;
82u32 tau_interrupts(unsigned long cpu);
83#endif
84#endif /* CONFIG_PPC32 */
85
86int arch_show_interrupts(struct seq_file *p, int prec)
87{
88 int j;
89
90#if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
91 if (tau_initialized) {
92 seq_printf(p, "%*s: ", prec, "TAU");
93 for_each_online_cpu(j)
94 seq_printf(p, "%10u ", tau_interrupts(j));
95 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
96 }
97#endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
98
99 seq_printf(p, "%*s: ", prec, "LOC");
100 for_each_online_cpu(j)
101 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_event);
102 seq_printf(p, " Local timer interrupts for timer event device\n");
103
104 seq_printf(p, "%*s: ", prec, "BCT");
105 for_each_online_cpu(j)
106 seq_printf(p, "%10u ", per_cpu(irq_stat, j).broadcast_irqs_event);
107 seq_printf(p, " Broadcast timer interrupts for timer event device\n");
108
109 seq_printf(p, "%*s: ", prec, "LOC");
110 for_each_online_cpu(j)
111 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs_others);
112 seq_printf(p, " Local timer interrupts for others\n");
113
114 seq_printf(p, "%*s: ", prec, "SPU");
115 for_each_online_cpu(j)
116 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
117 seq_printf(p, " Spurious interrupts\n");
118
119 seq_printf(p, "%*s: ", prec, "PMI");
120 for_each_online_cpu(j)
121 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
122 seq_printf(p, " Performance monitoring interrupts\n");
123
124 seq_printf(p, "%*s: ", prec, "MCE");
125 for_each_online_cpu(j)
126 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
127 seq_printf(p, " Machine check exceptions\n");
128
129#ifdef CONFIG_PPC_BOOK3S_64
130 if (cpu_has_feature(CPU_FTR_HVMODE)) {
131 seq_printf(p, "%*s: ", prec, "HMI");
132 for_each_online_cpu(j)
133 seq_printf(p, "%10u ", paca_ptrs[j]->hmi_irqs);
134 seq_printf(p, " Hypervisor Maintenance Interrupts\n");
135 }
136#endif
137
138 seq_printf(p, "%*s: ", prec, "NMI");
139 for_each_online_cpu(j)
140 seq_printf(p, "%10u ", per_cpu(irq_stat, j).sreset_irqs);
141 seq_printf(p, " System Reset interrupts\n");
142
143#ifdef CONFIG_PPC_WATCHDOG
144 seq_printf(p, "%*s: ", prec, "WDG");
145 for_each_online_cpu(j)
146 seq_printf(p, "%10u ", per_cpu(irq_stat, j).soft_nmi_irqs);
147 seq_printf(p, " Watchdog soft-NMI interrupts\n");
148#endif
149
150#ifdef CONFIG_PPC_DOORBELL
151 if (cpu_has_feature(CPU_FTR_DBELL)) {
152 seq_printf(p, "%*s: ", prec, "DBL");
153 for_each_online_cpu(j)
154 seq_printf(p, "%10u ", per_cpu(irq_stat, j).doorbell_irqs);
155 seq_printf(p, " Doorbell interrupts\n");
156 }
157#endif
158
159 return 0;
160}
161
162/*
163 * /proc/stat helpers
164 */
165u64 arch_irq_stat_cpu(unsigned int cpu)
166{
167 u64 sum = per_cpu(irq_stat, cpu).timer_irqs_event;
168
169 sum += per_cpu(irq_stat, cpu).broadcast_irqs_event;
170 sum += per_cpu(irq_stat, cpu).pmu_irqs;
171 sum += per_cpu(irq_stat, cpu).mce_exceptions;
172 sum += per_cpu(irq_stat, cpu).spurious_irqs;
173 sum += per_cpu(irq_stat, cpu).timer_irqs_others;
174#ifdef CONFIG_PPC_BOOK3S_64
175 sum += paca_ptrs[cpu]->hmi_irqs;
176#endif
177 sum += per_cpu(irq_stat, cpu).sreset_irqs;
178#ifdef CONFIG_PPC_WATCHDOG
179 sum += per_cpu(irq_stat, cpu).soft_nmi_irqs;
180#endif
181#ifdef CONFIG_PPC_DOORBELL
182 sum += per_cpu(irq_stat, cpu).doorbell_irqs;
183#endif
184
185 return sum;
186}
187
188static inline void check_stack_overflow(unsigned long sp)
189{
190 if (!IS_ENABLED(CONFIG_DEBUG_STACKOVERFLOW))
191 return;
192
193 sp &= THREAD_SIZE - 1;
194
195 /* check for stack overflow: is there less than 1/4th free? */
196 if (unlikely(sp < THREAD_SIZE / 4)) {
197 pr_err("do_IRQ: stack overflow: %ld\n", sp);
198 dump_stack();
199 }
200}
201
202#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
203static __always_inline void call_do_softirq(const void *sp)
204{
205 /* Temporarily switch r1 to sp, call __do_softirq() then restore r1. */
206 asm volatile (
207 PPC_STLU " %%r1, %[offset](%[sp]) ;"
208 "mr %%r1, %[sp] ;"
209#ifdef CONFIG_PPC_KERNEL_PCREL
210 "bl %[callee]@notoc ;"
211#else
212 "bl %[callee] ;"
213#endif
214 PPC_LL " %%r1, 0(%%r1) ;"
215 : // Outputs
216 : // Inputs
217 [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_MIN_SIZE),
218 [callee] "i" (__do_softirq)
219 : // Clobbers
220 "lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6",
221 "cr7", "r0", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
222 "r11", "r12"
223 );
224}
225#endif
226
227DEFINE_STATIC_CALL_RET0(ppc_get_irq, *ppc_md.get_irq);
228
229static void __do_irq(struct pt_regs *regs, unsigned long oldsp)
230{
231 unsigned int irq;
232
233 trace_irq_entry(regs);
234
235 check_stack_overflow(oldsp);
236
237 /*
238 * Query the platform PIC for the interrupt & ack it.
239 *
240 * This will typically lower the interrupt line to the CPU
241 */
242 irq = static_call(ppc_get_irq)();
243
244 /* We can hard enable interrupts now to allow perf interrupts */
245 if (should_hard_irq_enable(regs))
246 do_hard_irq_enable();
247
248 /* And finally process it */
249 if (unlikely(!irq))
250 __this_cpu_inc(irq_stat.spurious_irqs);
251 else
252 generic_handle_irq(irq);
253
254 trace_irq_exit(regs);
255}
256
257static __always_inline void call_do_irq(struct pt_regs *regs, void *sp)
258{
259 register unsigned long r3 asm("r3") = (unsigned long)regs;
260
261 /* Temporarily switch r1 to sp, call __do_irq() then restore r1. */
262 asm volatile (
263 PPC_STLU " %%r1, %[offset](%[sp]) ;"
264 "mr %%r4, %%r1 ;"
265 "mr %%r1, %[sp] ;"
266#ifdef CONFIG_PPC_KERNEL_PCREL
267 "bl %[callee]@notoc ;"
268#else
269 "bl %[callee] ;"
270#endif
271 PPC_LL " %%r1, 0(%%r1) ;"
272 : // Outputs
273 "+r" (r3)
274 : // Inputs
275 [sp] "b" (sp), [offset] "i" (THREAD_SIZE - STACK_FRAME_MIN_SIZE),
276 [callee] "i" (__do_irq)
277 : // Clobbers
278 "lr", "xer", "ctr", "memory", "cr0", "cr1", "cr5", "cr6",
279 "cr7", "r0", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
280 "r11", "r12"
281 );
282}
283
284void __do_IRQ(struct pt_regs *regs)
285{
286 struct pt_regs *old_regs = set_irq_regs(regs);
287 void *cursp, *irqsp, *sirqsp;
288
289 /* Switch to the irq stack to handle this */
290 cursp = (void *)(current_stack_pointer & ~(THREAD_SIZE - 1));
291 irqsp = hardirq_ctx[raw_smp_processor_id()];
292 sirqsp = softirq_ctx[raw_smp_processor_id()];
293
294 /* Already there ? If not switch stack and call */
295 if (unlikely(cursp == irqsp || cursp == sirqsp))
296 __do_irq(regs, current_stack_pointer);
297 else
298 call_do_irq(regs, irqsp);
299
300 set_irq_regs(old_regs);
301}
302
303DEFINE_INTERRUPT_HANDLER_ASYNC(do_IRQ)
304{
305 __do_IRQ(regs);
306}
307
308static void *__init alloc_vm_stack(void)
309{
310 return __vmalloc_node(THREAD_SIZE, THREAD_ALIGN, THREADINFO_GFP,
311 NUMA_NO_NODE, (void *)_RET_IP_);
312}
313
314static void __init vmap_irqstack_init(void)
315{
316 int i;
317
318 for_each_possible_cpu(i) {
319 softirq_ctx[i] = alloc_vm_stack();
320 hardirq_ctx[i] = alloc_vm_stack();
321 }
322}
323
324
325void __init init_IRQ(void)
326{
327 if (IS_ENABLED(CONFIG_VMAP_STACK))
328 vmap_irqstack_init();
329
330 if (ppc_md.init_IRQ)
331 ppc_md.init_IRQ();
332
333 if (!WARN_ON(!ppc_md.get_irq))
334 static_call_update(ppc_get_irq, ppc_md.get_irq);
335}
336
337#ifdef CONFIG_BOOKE_OR_40x
338void *critirq_ctx[NR_CPUS] __read_mostly;
339void *dbgirq_ctx[NR_CPUS] __read_mostly;
340void *mcheckirq_ctx[NR_CPUS] __read_mostly;
341#endif
342
343void *softirq_ctx[NR_CPUS] __read_mostly;
344void *hardirq_ctx[NR_CPUS] __read_mostly;
345
346#ifdef CONFIG_SOFTIRQ_ON_OWN_STACK
347void do_softirq_own_stack(void)
348{
349 call_do_softirq(softirq_ctx[smp_processor_id()]);
350}
351#endif
352
353irq_hw_number_t virq_to_hw(unsigned int virq)
354{
355 struct irq_data *irq_data = irq_get_irq_data(virq);
356 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq;
357}
358EXPORT_SYMBOL_GPL(virq_to_hw);
359
360#ifdef CONFIG_SMP
361int irq_choose_cpu(const struct cpumask *mask)
362{
363 int cpuid;
364
365 if (cpumask_equal(mask, cpu_online_mask)) {
366 static int irq_rover;
367 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
368 unsigned long flags;
369
370 /* Round-robin distribution... */
371do_round_robin:
372 raw_spin_lock_irqsave(&irq_rover_lock, flags);
373
374 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
375 if (irq_rover >= nr_cpu_ids)
376 irq_rover = cpumask_first(cpu_online_mask);
377
378 cpuid = irq_rover;
379
380 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
381 } else {
382 cpuid = cpumask_first_and(mask, cpu_online_mask);
383 if (cpuid >= nr_cpu_ids)
384 goto do_round_robin;
385 }
386
387 return get_hard_smp_processor_id(cpuid);
388}
389#else
390int irq_choose_cpu(const struct cpumask *mask)
391{
392 return hard_smp_processor_id();
393}
394#endif
1/*
2 * Derived from arch/i386/kernel/irq.c
3 * Copyright (C) 1992 Linus Torvalds
4 * Adapted from arch/i386 by Gary Thomas
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 * Updated and modified by Cort Dougan <cort@fsmlabs.com>
7 * Copyright (C) 1996-2001 Cort Dougan
8 * Adapted for Power Macintosh by Paul Mackerras
9 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 *
16 * This file contains the code used by various IRQ handling routines:
17 * asking for different IRQ's should be done through these routines
18 * instead of just grabbing them. Thus setups with different IRQ numbers
19 * shouldn't result in any weird surprises, and installing new handlers
20 * should be easier.
21 *
22 * The MPC8xx has an interrupt mask in the SIU. If a bit is set, the
23 * interrupt is _enabled_. As expected, IRQ0 is bit 0 in the 32-bit
24 * mask register (of which only 16 are defined), hence the weird shifting
25 * and complement of the cached_irq_mask. I want to be able to stuff
26 * this right into the SIU SMASK register.
27 * Many of the prep/chrp functions are conditional compiled on CONFIG_8xx
28 * to reduce code space and undefined function references.
29 */
30
31#undef DEBUG
32
33#include <linux/module.h>
34#include <linux/threads.h>
35#include <linux/kernel_stat.h>
36#include <linux/signal.h>
37#include <linux/sched.h>
38#include <linux/ptrace.h>
39#include <linux/ioport.h>
40#include <linux/interrupt.h>
41#include <linux/timex.h>
42#include <linux/init.h>
43#include <linux/slab.h>
44#include <linux/delay.h>
45#include <linux/irq.h>
46#include <linux/seq_file.h>
47#include <linux/cpumask.h>
48#include <linux/profile.h>
49#include <linux/bitops.h>
50#include <linux/list.h>
51#include <linux/radix-tree.h>
52#include <linux/mutex.h>
53#include <linux/bootmem.h>
54#include <linux/pci.h>
55#include <linux/debugfs.h>
56#include <linux/of.h>
57#include <linux/of_irq.h>
58
59#include <asm/uaccess.h>
60#include <asm/system.h>
61#include <asm/io.h>
62#include <asm/pgtable.h>
63#include <asm/irq.h>
64#include <asm/cache.h>
65#include <asm/prom.h>
66#include <asm/ptrace.h>
67#include <asm/machdep.h>
68#include <asm/udbg.h>
69#include <asm/smp.h>
70
71#ifdef CONFIG_PPC64
72#include <asm/paca.h>
73#include <asm/firmware.h>
74#include <asm/lv1call.h>
75#endif
76#define CREATE_TRACE_POINTS
77#include <asm/trace.h>
78
79DEFINE_PER_CPU_SHARED_ALIGNED(irq_cpustat_t, irq_stat);
80EXPORT_PER_CPU_SYMBOL(irq_stat);
81
82int __irq_offset_value;
83
84#ifdef CONFIG_PPC32
85EXPORT_SYMBOL(__irq_offset_value);
86atomic_t ppc_n_lost_interrupts;
87
88#ifdef CONFIG_TAU_INT
89extern int tau_initialized;
90extern int tau_interrupts(int);
91#endif
92#endif /* CONFIG_PPC32 */
93
94#ifdef CONFIG_PPC64
95
96#ifndef CONFIG_SPARSE_IRQ
97EXPORT_SYMBOL(irq_desc);
98#endif
99
100int distribute_irqs = 1;
101
102static inline notrace unsigned long get_hard_enabled(void)
103{
104 unsigned long enabled;
105
106 __asm__ __volatile__("lbz %0,%1(13)"
107 : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
108
109 return enabled;
110}
111
112static inline notrace void set_soft_enabled(unsigned long enable)
113{
114 __asm__ __volatile__("stb %0,%1(13)"
115 : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
116}
117
118notrace void arch_local_irq_restore(unsigned long en)
119{
120 /*
121 * get_paca()->soft_enabled = en;
122 * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
123 * That was allowed before, and in such a case we do need to take care
124 * that gcc will set soft_enabled directly via r13, not choose to use
125 * an intermediate register, lest we're preempted to a different cpu.
126 */
127 set_soft_enabled(en);
128 if (!en)
129 return;
130
131#ifdef CONFIG_PPC_STD_MMU_64
132 if (firmware_has_feature(FW_FEATURE_ISERIES)) {
133 /*
134 * Do we need to disable preemption here? Not really: in the
135 * unlikely event that we're preempted to a different cpu in
136 * between getting r13, loading its lppaca_ptr, and loading
137 * its any_int, we might call iseries_handle_interrupts without
138 * an interrupt pending on the new cpu, but that's no disaster,
139 * is it? And the business of preempting us off the old cpu
140 * would itself involve a local_irq_restore which handles the
141 * interrupt to that cpu.
142 *
143 * But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
144 * to avoid any preemption checking added into get_paca().
145 */
146 if (local_paca->lppaca_ptr->int_dword.any_int)
147 iseries_handle_interrupts();
148 }
149#endif /* CONFIG_PPC_STD_MMU_64 */
150
151 /*
152 * if (get_paca()->hard_enabled) return;
153 * But again we need to take care that gcc gets hard_enabled directly
154 * via r13, not choose to use an intermediate register, lest we're
155 * preempted to a different cpu in between the two instructions.
156 */
157 if (get_hard_enabled())
158 return;
159
160 /*
161 * Need to hard-enable interrupts here. Since currently disabled,
162 * no need to take further asm precautions against preemption; but
163 * use local_paca instead of get_paca() to avoid preemption checking.
164 */
165 local_paca->hard_enabled = en;
166
167#ifndef CONFIG_BOOKE
168 /* On server, re-trigger the decrementer if it went negative since
169 * some processors only trigger on edge transitions of the sign bit.
170 *
171 * BookE has a level sensitive decrementer (latches in TSR) so we
172 * don't need that
173 */
174 if ((int)mfspr(SPRN_DEC) < 0)
175 mtspr(SPRN_DEC, 1);
176#endif /* CONFIG_BOOKE */
177
178 /*
179 * Force the delivery of pending soft-disabled interrupts on PS3.
180 * Any HV call will have this side effect.
181 */
182 if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
183 u64 tmp;
184 lv1_get_version_info(&tmp);
185 }
186
187 __hard_irq_enable();
188}
189EXPORT_SYMBOL(arch_local_irq_restore);
190#endif /* CONFIG_PPC64 */
191
192int arch_show_interrupts(struct seq_file *p, int prec)
193{
194 int j;
195
196#if defined(CONFIG_PPC32) && defined(CONFIG_TAU_INT)
197 if (tau_initialized) {
198 seq_printf(p, "%*s: ", prec, "TAU");
199 for_each_online_cpu(j)
200 seq_printf(p, "%10u ", tau_interrupts(j));
201 seq_puts(p, " PowerPC Thermal Assist (cpu temp)\n");
202 }
203#endif /* CONFIG_PPC32 && CONFIG_TAU_INT */
204
205 seq_printf(p, "%*s: ", prec, "LOC");
206 for_each_online_cpu(j)
207 seq_printf(p, "%10u ", per_cpu(irq_stat, j).timer_irqs);
208 seq_printf(p, " Local timer interrupts\n");
209
210 seq_printf(p, "%*s: ", prec, "SPU");
211 for_each_online_cpu(j)
212 seq_printf(p, "%10u ", per_cpu(irq_stat, j).spurious_irqs);
213 seq_printf(p, " Spurious interrupts\n");
214
215 seq_printf(p, "%*s: ", prec, "CNT");
216 for_each_online_cpu(j)
217 seq_printf(p, "%10u ", per_cpu(irq_stat, j).pmu_irqs);
218 seq_printf(p, " Performance monitoring interrupts\n");
219
220 seq_printf(p, "%*s: ", prec, "MCE");
221 for_each_online_cpu(j)
222 seq_printf(p, "%10u ", per_cpu(irq_stat, j).mce_exceptions);
223 seq_printf(p, " Machine check exceptions\n");
224
225 return 0;
226}
227
228/*
229 * /proc/stat helpers
230 */
231u64 arch_irq_stat_cpu(unsigned int cpu)
232{
233 u64 sum = per_cpu(irq_stat, cpu).timer_irqs;
234
235 sum += per_cpu(irq_stat, cpu).pmu_irqs;
236 sum += per_cpu(irq_stat, cpu).mce_exceptions;
237 sum += per_cpu(irq_stat, cpu).spurious_irqs;
238
239 return sum;
240}
241
242#ifdef CONFIG_HOTPLUG_CPU
243void migrate_irqs(void)
244{
245 struct irq_desc *desc;
246 unsigned int irq;
247 static int warned;
248 cpumask_var_t mask;
249 const struct cpumask *map = cpu_online_mask;
250
251 alloc_cpumask_var(&mask, GFP_KERNEL);
252
253 for_each_irq(irq) {
254 struct irq_data *data;
255 struct irq_chip *chip;
256
257 desc = irq_to_desc(irq);
258 if (!desc)
259 continue;
260
261 data = irq_desc_get_irq_data(desc);
262 if (irqd_is_per_cpu(data))
263 continue;
264
265 chip = irq_data_get_irq_chip(data);
266
267 cpumask_and(mask, data->affinity, map);
268 if (cpumask_any(mask) >= nr_cpu_ids) {
269 printk("Breaking affinity for irq %i\n", irq);
270 cpumask_copy(mask, map);
271 }
272 if (chip->irq_set_affinity)
273 chip->irq_set_affinity(data, mask, true);
274 else if (desc->action && !(warned++))
275 printk("Cannot set affinity for irq %i\n", irq);
276 }
277
278 free_cpumask_var(mask);
279
280 local_irq_enable();
281 mdelay(1);
282 local_irq_disable();
283}
284#endif
285
286static inline void handle_one_irq(unsigned int irq)
287{
288 struct thread_info *curtp, *irqtp;
289 unsigned long saved_sp_limit;
290 struct irq_desc *desc;
291
292 desc = irq_to_desc(irq);
293 if (!desc)
294 return;
295
296 /* Switch to the irq stack to handle this */
297 curtp = current_thread_info();
298 irqtp = hardirq_ctx[smp_processor_id()];
299
300 if (curtp == irqtp) {
301 /* We're already on the irq stack, just handle it */
302 desc->handle_irq(irq, desc);
303 return;
304 }
305
306 saved_sp_limit = current->thread.ksp_limit;
307
308 irqtp->task = curtp->task;
309 irqtp->flags = 0;
310
311 /* Copy the softirq bits in preempt_count so that the
312 * softirq checks work in the hardirq context. */
313 irqtp->preempt_count = (irqtp->preempt_count & ~SOFTIRQ_MASK) |
314 (curtp->preempt_count & SOFTIRQ_MASK);
315
316 current->thread.ksp_limit = (unsigned long)irqtp +
317 _ALIGN_UP(sizeof(struct thread_info), 16);
318
319 call_handle_irq(irq, desc, irqtp, desc->handle_irq);
320 current->thread.ksp_limit = saved_sp_limit;
321 irqtp->task = NULL;
322
323 /* Set any flag that may have been set on the
324 * alternate stack
325 */
326 if (irqtp->flags)
327 set_bits(irqtp->flags, &curtp->flags);
328}
329
330static inline void check_stack_overflow(void)
331{
332#ifdef CONFIG_DEBUG_STACKOVERFLOW
333 long sp;
334
335 sp = __get_SP() & (THREAD_SIZE-1);
336
337 /* check for stack overflow: is there less than 2KB free? */
338 if (unlikely(sp < (sizeof(struct thread_info) + 2048))) {
339 printk("do_IRQ: stack overflow: %ld\n",
340 sp - sizeof(struct thread_info));
341 dump_stack();
342 }
343#endif
344}
345
346void do_IRQ(struct pt_regs *regs)
347{
348 struct pt_regs *old_regs = set_irq_regs(regs);
349 unsigned int irq;
350
351 trace_irq_entry(regs);
352
353 irq_enter();
354
355 check_stack_overflow();
356
357 irq = ppc_md.get_irq();
358
359 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE)
360 handle_one_irq(irq);
361 else if (irq != NO_IRQ_IGNORE)
362 __get_cpu_var(irq_stat).spurious_irqs++;
363
364 irq_exit();
365 set_irq_regs(old_regs);
366
367#ifdef CONFIG_PPC_ISERIES
368 if (firmware_has_feature(FW_FEATURE_ISERIES) &&
369 get_lppaca()->int_dword.fields.decr_int) {
370 get_lppaca()->int_dword.fields.decr_int = 0;
371 /* Signal a fake decrementer interrupt */
372 timer_interrupt(regs);
373 }
374#endif
375
376 trace_irq_exit(regs);
377}
378
379void __init init_IRQ(void)
380{
381 if (ppc_md.init_IRQ)
382 ppc_md.init_IRQ();
383
384 exc_lvl_ctx_init();
385
386 irq_ctx_init();
387}
388
389#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
390struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
391struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
392struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
393
394void exc_lvl_ctx_init(void)
395{
396 struct thread_info *tp;
397 int i, cpu_nr;
398
399 for_each_possible_cpu(i) {
400#ifdef CONFIG_PPC64
401 cpu_nr = i;
402#else
403 cpu_nr = get_hard_smp_processor_id(i);
404#endif
405 memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
406 tp = critirq_ctx[cpu_nr];
407 tp->cpu = cpu_nr;
408 tp->preempt_count = 0;
409
410#ifdef CONFIG_BOOKE
411 memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE);
412 tp = dbgirq_ctx[cpu_nr];
413 tp->cpu = cpu_nr;
414 tp->preempt_count = 0;
415
416 memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE);
417 tp = mcheckirq_ctx[cpu_nr];
418 tp->cpu = cpu_nr;
419 tp->preempt_count = HARDIRQ_OFFSET;
420#endif
421 }
422}
423#endif
424
425struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
426struct thread_info *hardirq_ctx[NR_CPUS] __read_mostly;
427
428void irq_ctx_init(void)
429{
430 struct thread_info *tp;
431 int i;
432
433 for_each_possible_cpu(i) {
434 memset((void *)softirq_ctx[i], 0, THREAD_SIZE);
435 tp = softirq_ctx[i];
436 tp->cpu = i;
437 tp->preempt_count = 0;
438
439 memset((void *)hardirq_ctx[i], 0, THREAD_SIZE);
440 tp = hardirq_ctx[i];
441 tp->cpu = i;
442 tp->preempt_count = HARDIRQ_OFFSET;
443 }
444}
445
446static inline void do_softirq_onstack(void)
447{
448 struct thread_info *curtp, *irqtp;
449 unsigned long saved_sp_limit = current->thread.ksp_limit;
450
451 curtp = current_thread_info();
452 irqtp = softirq_ctx[smp_processor_id()];
453 irqtp->task = curtp->task;
454 irqtp->flags = 0;
455 current->thread.ksp_limit = (unsigned long)irqtp +
456 _ALIGN_UP(sizeof(struct thread_info), 16);
457 call_do_softirq(irqtp);
458 current->thread.ksp_limit = saved_sp_limit;
459 irqtp->task = NULL;
460
461 /* Set any flag that may have been set on the
462 * alternate stack
463 */
464 if (irqtp->flags)
465 set_bits(irqtp->flags, &curtp->flags);
466}
467
468void do_softirq(void)
469{
470 unsigned long flags;
471
472 if (in_interrupt())
473 return;
474
475 local_irq_save(flags);
476
477 if (local_softirq_pending())
478 do_softirq_onstack();
479
480 local_irq_restore(flags);
481}
482
483
484/*
485 * IRQ controller and virtual interrupts
486 */
487
488/* The main irq map itself is an array of NR_IRQ entries containing the
489 * associate host and irq number. An entry with a host of NULL is free.
490 * An entry can be allocated if it's free, the allocator always then sets
491 * hwirq first to the host's invalid irq number and then fills ops.
492 */
493struct irq_map_entry {
494 irq_hw_number_t hwirq;
495 struct irq_host *host;
496};
497
498static LIST_HEAD(irq_hosts);
499static DEFINE_RAW_SPINLOCK(irq_big_lock);
500static DEFINE_MUTEX(revmap_trees_mutex);
501static struct irq_map_entry irq_map[NR_IRQS];
502static unsigned int irq_virq_count = NR_IRQS;
503static struct irq_host *irq_default_host;
504
505irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
506{
507 return irq_map[d->irq].hwirq;
508}
509EXPORT_SYMBOL_GPL(irqd_to_hwirq);
510
511irq_hw_number_t virq_to_hw(unsigned int virq)
512{
513 return irq_map[virq].hwirq;
514}
515EXPORT_SYMBOL_GPL(virq_to_hw);
516
517bool virq_is_host(unsigned int virq, struct irq_host *host)
518{
519 return irq_map[virq].host == host;
520}
521EXPORT_SYMBOL_GPL(virq_is_host);
522
523static int default_irq_host_match(struct irq_host *h, struct device_node *np)
524{
525 return h->of_node != NULL && h->of_node == np;
526}
527
528struct irq_host *irq_alloc_host(struct device_node *of_node,
529 unsigned int revmap_type,
530 unsigned int revmap_arg,
531 struct irq_host_ops *ops,
532 irq_hw_number_t inval_irq)
533{
534 struct irq_host *host;
535 unsigned int size = sizeof(struct irq_host);
536 unsigned int i;
537 unsigned int *rmap;
538 unsigned long flags;
539
540 /* Allocate structure and revmap table if using linear mapping */
541 if (revmap_type == IRQ_HOST_MAP_LINEAR)
542 size += revmap_arg * sizeof(unsigned int);
543 host = kzalloc(size, GFP_KERNEL);
544 if (host == NULL)
545 return NULL;
546
547 /* Fill structure */
548 host->revmap_type = revmap_type;
549 host->inval_irq = inval_irq;
550 host->ops = ops;
551 host->of_node = of_node_get(of_node);
552
553 if (host->ops->match == NULL)
554 host->ops->match = default_irq_host_match;
555
556 raw_spin_lock_irqsave(&irq_big_lock, flags);
557
558 /* If it's a legacy controller, check for duplicates and
559 * mark it as allocated (we use irq 0 host pointer for that
560 */
561 if (revmap_type == IRQ_HOST_MAP_LEGACY) {
562 if (irq_map[0].host != NULL) {
563 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
564 of_node_put(host->of_node);
565 kfree(host);
566 return NULL;
567 }
568 irq_map[0].host = host;
569 }
570
571 list_add(&host->link, &irq_hosts);
572 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
573
574 /* Additional setups per revmap type */
575 switch(revmap_type) {
576 case IRQ_HOST_MAP_LEGACY:
577 /* 0 is always the invalid number for legacy */
578 host->inval_irq = 0;
579 /* setup us as the host for all legacy interrupts */
580 for (i = 1; i < NUM_ISA_INTERRUPTS; i++) {
581 irq_map[i].hwirq = i;
582 smp_wmb();
583 irq_map[i].host = host;
584 smp_wmb();
585
586 /* Legacy flags are left to default at this point,
587 * one can then use irq_create_mapping() to
588 * explicitly change them
589 */
590 ops->map(host, i, i);
591
592 /* Clear norequest flags */
593 irq_clear_status_flags(i, IRQ_NOREQUEST);
594 }
595 break;
596 case IRQ_HOST_MAP_LINEAR:
597 rmap = (unsigned int *)(host + 1);
598 for (i = 0; i < revmap_arg; i++)
599 rmap[i] = NO_IRQ;
600 host->revmap_data.linear.size = revmap_arg;
601 smp_wmb();
602 host->revmap_data.linear.revmap = rmap;
603 break;
604 case IRQ_HOST_MAP_TREE:
605 INIT_RADIX_TREE(&host->revmap_data.tree, GFP_KERNEL);
606 break;
607 default:
608 break;
609 }
610
611 pr_debug("irq: Allocated host of type %d @0x%p\n", revmap_type, host);
612
613 return host;
614}
615
616struct irq_host *irq_find_host(struct device_node *node)
617{
618 struct irq_host *h, *found = NULL;
619 unsigned long flags;
620
621 /* We might want to match the legacy controller last since
622 * it might potentially be set to match all interrupts in
623 * the absence of a device node. This isn't a problem so far
624 * yet though...
625 */
626 raw_spin_lock_irqsave(&irq_big_lock, flags);
627 list_for_each_entry(h, &irq_hosts, link)
628 if (h->ops->match(h, node)) {
629 found = h;
630 break;
631 }
632 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
633 return found;
634}
635EXPORT_SYMBOL_GPL(irq_find_host);
636
637void irq_set_default_host(struct irq_host *host)
638{
639 pr_debug("irq: Default host set to @0x%p\n", host);
640
641 irq_default_host = host;
642}
643
644void irq_set_virq_count(unsigned int count)
645{
646 pr_debug("irq: Trying to set virq count to %d\n", count);
647
648 BUG_ON(count < NUM_ISA_INTERRUPTS);
649 if (count < NR_IRQS)
650 irq_virq_count = count;
651}
652
653static int irq_setup_virq(struct irq_host *host, unsigned int virq,
654 irq_hw_number_t hwirq)
655{
656 int res;
657
658 res = irq_alloc_desc_at(virq, 0);
659 if (res != virq) {
660 pr_debug("irq: -> allocating desc failed\n");
661 goto error;
662 }
663
664 /* map it */
665 smp_wmb();
666 irq_map[virq].hwirq = hwirq;
667 smp_mb();
668
669 if (host->ops->map(host, virq, hwirq)) {
670 pr_debug("irq: -> mapping failed, freeing\n");
671 goto errdesc;
672 }
673
674 irq_clear_status_flags(virq, IRQ_NOREQUEST);
675
676 return 0;
677
678errdesc:
679 irq_free_descs(virq, 1);
680error:
681 irq_free_virt(virq, 1);
682 return -1;
683}
684
685unsigned int irq_create_direct_mapping(struct irq_host *host)
686{
687 unsigned int virq;
688
689 if (host == NULL)
690 host = irq_default_host;
691
692 BUG_ON(host == NULL);
693 WARN_ON(host->revmap_type != IRQ_HOST_MAP_NOMAP);
694
695 virq = irq_alloc_virt(host, 1, 0);
696 if (virq == NO_IRQ) {
697 pr_debug("irq: create_direct virq allocation failed\n");
698 return NO_IRQ;
699 }
700
701 pr_debug("irq: create_direct obtained virq %d\n", virq);
702
703 if (irq_setup_virq(host, virq, virq))
704 return NO_IRQ;
705
706 return virq;
707}
708
709unsigned int irq_create_mapping(struct irq_host *host,
710 irq_hw_number_t hwirq)
711{
712 unsigned int virq, hint;
713
714 pr_debug("irq: irq_create_mapping(0x%p, 0x%lx)\n", host, hwirq);
715
716 /* Look for default host if nececssary */
717 if (host == NULL)
718 host = irq_default_host;
719 if (host == NULL) {
720 printk(KERN_WARNING "irq_create_mapping called for"
721 " NULL host, hwirq=%lx\n", hwirq);
722 WARN_ON(1);
723 return NO_IRQ;
724 }
725 pr_debug("irq: -> using host @%p\n", host);
726
727 /* Check if mapping already exists */
728 virq = irq_find_mapping(host, hwirq);
729 if (virq != NO_IRQ) {
730 pr_debug("irq: -> existing mapping on virq %d\n", virq);
731 return virq;
732 }
733
734 /* Get a virtual interrupt number */
735 if (host->revmap_type == IRQ_HOST_MAP_LEGACY) {
736 /* Handle legacy */
737 virq = (unsigned int)hwirq;
738 if (virq == 0 || virq >= NUM_ISA_INTERRUPTS)
739 return NO_IRQ;
740 return virq;
741 } else {
742 /* Allocate a virtual interrupt number */
743 hint = hwirq % irq_virq_count;
744 virq = irq_alloc_virt(host, 1, hint);
745 if (virq == NO_IRQ) {
746 pr_debug("irq: -> virq allocation failed\n");
747 return NO_IRQ;
748 }
749 }
750
751 if (irq_setup_virq(host, virq, hwirq))
752 return NO_IRQ;
753
754 pr_debug("irq: irq %lu on host %s mapped to virtual irq %u\n",
755 hwirq, host->of_node ? host->of_node->full_name : "null", virq);
756
757 return virq;
758}
759EXPORT_SYMBOL_GPL(irq_create_mapping);
760
761unsigned int irq_create_of_mapping(struct device_node *controller,
762 const u32 *intspec, unsigned int intsize)
763{
764 struct irq_host *host;
765 irq_hw_number_t hwirq;
766 unsigned int type = IRQ_TYPE_NONE;
767 unsigned int virq;
768
769 if (controller == NULL)
770 host = irq_default_host;
771 else
772 host = irq_find_host(controller);
773 if (host == NULL) {
774 printk(KERN_WARNING "irq: no irq host found for %s !\n",
775 controller->full_name);
776 return NO_IRQ;
777 }
778
779 /* If host has no translation, then we assume interrupt line */
780 if (host->ops->xlate == NULL)
781 hwirq = intspec[0];
782 else {
783 if (host->ops->xlate(host, controller, intspec, intsize,
784 &hwirq, &type))
785 return NO_IRQ;
786 }
787
788 /* Create mapping */
789 virq = irq_create_mapping(host, hwirq);
790 if (virq == NO_IRQ)
791 return virq;
792
793 /* Set type if specified and different than the current one */
794 if (type != IRQ_TYPE_NONE &&
795 type != (irqd_get_trigger_type(irq_get_irq_data(virq))))
796 irq_set_irq_type(virq, type);
797 return virq;
798}
799EXPORT_SYMBOL_GPL(irq_create_of_mapping);
800
801void irq_dispose_mapping(unsigned int virq)
802{
803 struct irq_host *host;
804 irq_hw_number_t hwirq;
805
806 if (virq == NO_IRQ)
807 return;
808
809 host = irq_map[virq].host;
810 if (WARN_ON(host == NULL))
811 return;
812
813 /* Never unmap legacy interrupts */
814 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
815 return;
816
817 irq_set_status_flags(virq, IRQ_NOREQUEST);
818
819 /* remove chip and handler */
820 irq_set_chip_and_handler(virq, NULL, NULL);
821
822 /* Make sure it's completed */
823 synchronize_irq(virq);
824
825 /* Tell the PIC about it */
826 if (host->ops->unmap)
827 host->ops->unmap(host, virq);
828 smp_mb();
829
830 /* Clear reverse map */
831 hwirq = irq_map[virq].hwirq;
832 switch(host->revmap_type) {
833 case IRQ_HOST_MAP_LINEAR:
834 if (hwirq < host->revmap_data.linear.size)
835 host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
836 break;
837 case IRQ_HOST_MAP_TREE:
838 mutex_lock(&revmap_trees_mutex);
839 radix_tree_delete(&host->revmap_data.tree, hwirq);
840 mutex_unlock(&revmap_trees_mutex);
841 break;
842 }
843
844 /* Destroy map */
845 smp_mb();
846 irq_map[virq].hwirq = host->inval_irq;
847
848 irq_free_descs(virq, 1);
849 /* Free it */
850 irq_free_virt(virq, 1);
851}
852EXPORT_SYMBOL_GPL(irq_dispose_mapping);
853
854unsigned int irq_find_mapping(struct irq_host *host,
855 irq_hw_number_t hwirq)
856{
857 unsigned int i;
858 unsigned int hint = hwirq % irq_virq_count;
859
860 /* Look for default host if nececssary */
861 if (host == NULL)
862 host = irq_default_host;
863 if (host == NULL)
864 return NO_IRQ;
865
866 /* legacy -> bail early */
867 if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
868 return hwirq;
869
870 /* Slow path does a linear search of the map */
871 if (hint < NUM_ISA_INTERRUPTS)
872 hint = NUM_ISA_INTERRUPTS;
873 i = hint;
874 do {
875 if (irq_map[i].host == host &&
876 irq_map[i].hwirq == hwirq)
877 return i;
878 i++;
879 if (i >= irq_virq_count)
880 i = NUM_ISA_INTERRUPTS;
881 } while(i != hint);
882 return NO_IRQ;
883}
884EXPORT_SYMBOL_GPL(irq_find_mapping);
885
886#ifdef CONFIG_SMP
887int irq_choose_cpu(const struct cpumask *mask)
888{
889 int cpuid;
890
891 if (cpumask_equal(mask, cpu_all_mask)) {
892 static int irq_rover;
893 static DEFINE_RAW_SPINLOCK(irq_rover_lock);
894 unsigned long flags;
895
896 /* Round-robin distribution... */
897do_round_robin:
898 raw_spin_lock_irqsave(&irq_rover_lock, flags);
899
900 irq_rover = cpumask_next(irq_rover, cpu_online_mask);
901 if (irq_rover >= nr_cpu_ids)
902 irq_rover = cpumask_first(cpu_online_mask);
903
904 cpuid = irq_rover;
905
906 raw_spin_unlock_irqrestore(&irq_rover_lock, flags);
907 } else {
908 cpuid = cpumask_first_and(mask, cpu_online_mask);
909 if (cpuid >= nr_cpu_ids)
910 goto do_round_robin;
911 }
912
913 return get_hard_smp_processor_id(cpuid);
914}
915#else
916int irq_choose_cpu(const struct cpumask *mask)
917{
918 return hard_smp_processor_id();
919}
920#endif
921
922unsigned int irq_radix_revmap_lookup(struct irq_host *host,
923 irq_hw_number_t hwirq)
924{
925 struct irq_map_entry *ptr;
926 unsigned int virq;
927
928 if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_TREE))
929 return irq_find_mapping(host, hwirq);
930
931 /*
932 * The ptr returned references the static global irq_map.
933 * but freeing an irq can delete nodes along the path to
934 * do the lookup via call_rcu.
935 */
936 rcu_read_lock();
937 ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq);
938 rcu_read_unlock();
939
940 /*
941 * If found in radix tree, then fine.
942 * Else fallback to linear lookup - this should not happen in practice
943 * as it means that we failed to insert the node in the radix tree.
944 */
945 if (ptr)
946 virq = ptr - irq_map;
947 else
948 virq = irq_find_mapping(host, hwirq);
949
950 return virq;
951}
952
953void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
954 irq_hw_number_t hwirq)
955{
956 if (WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE))
957 return;
958
959 if (virq != NO_IRQ) {
960 mutex_lock(&revmap_trees_mutex);
961 radix_tree_insert(&host->revmap_data.tree, hwirq,
962 &irq_map[virq]);
963 mutex_unlock(&revmap_trees_mutex);
964 }
965}
966
967unsigned int irq_linear_revmap(struct irq_host *host,
968 irq_hw_number_t hwirq)
969{
970 unsigned int *revmap;
971
972 if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_LINEAR))
973 return irq_find_mapping(host, hwirq);
974
975 /* Check revmap bounds */
976 if (unlikely(hwirq >= host->revmap_data.linear.size))
977 return irq_find_mapping(host, hwirq);
978
979 /* Check if revmap was allocated */
980 revmap = host->revmap_data.linear.revmap;
981 if (unlikely(revmap == NULL))
982 return irq_find_mapping(host, hwirq);
983
984 /* Fill up revmap with slow path if no mapping found */
985 if (unlikely(revmap[hwirq] == NO_IRQ))
986 revmap[hwirq] = irq_find_mapping(host, hwirq);
987
988 return revmap[hwirq];
989}
990
991unsigned int irq_alloc_virt(struct irq_host *host,
992 unsigned int count,
993 unsigned int hint)
994{
995 unsigned long flags;
996 unsigned int i, j, found = NO_IRQ;
997
998 if (count == 0 || count > (irq_virq_count - NUM_ISA_INTERRUPTS))
999 return NO_IRQ;
1000
1001 raw_spin_lock_irqsave(&irq_big_lock, flags);
1002
1003 /* Use hint for 1 interrupt if any */
1004 if (count == 1 && hint >= NUM_ISA_INTERRUPTS &&
1005 hint < irq_virq_count && irq_map[hint].host == NULL) {
1006 found = hint;
1007 goto hint_found;
1008 }
1009
1010 /* Look for count consecutive numbers in the allocatable
1011 * (non-legacy) space
1012 */
1013 for (i = NUM_ISA_INTERRUPTS, j = 0; i < irq_virq_count; i++) {
1014 if (irq_map[i].host != NULL)
1015 j = 0;
1016 else
1017 j++;
1018
1019 if (j == count) {
1020 found = i - count + 1;
1021 break;
1022 }
1023 }
1024 if (found == NO_IRQ) {
1025 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
1026 return NO_IRQ;
1027 }
1028 hint_found:
1029 for (i = found; i < (found + count); i++) {
1030 irq_map[i].hwirq = host->inval_irq;
1031 smp_wmb();
1032 irq_map[i].host = host;
1033 }
1034 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
1035 return found;
1036}
1037
1038void irq_free_virt(unsigned int virq, unsigned int count)
1039{
1040 unsigned long flags;
1041 unsigned int i;
1042
1043 WARN_ON (virq < NUM_ISA_INTERRUPTS);
1044 WARN_ON (count == 0 || (virq + count) > irq_virq_count);
1045
1046 if (virq < NUM_ISA_INTERRUPTS) {
1047 if (virq + count < NUM_ISA_INTERRUPTS)
1048 return;
1049 count =- NUM_ISA_INTERRUPTS - virq;
1050 virq = NUM_ISA_INTERRUPTS;
1051 }
1052
1053 if (count > irq_virq_count || virq > irq_virq_count - count) {
1054 if (virq > irq_virq_count)
1055 return;
1056 count = irq_virq_count - virq;
1057 }
1058
1059 raw_spin_lock_irqsave(&irq_big_lock, flags);
1060 for (i = virq; i < (virq + count); i++) {
1061 struct irq_host *host;
1062
1063 host = irq_map[i].host;
1064 irq_map[i].hwirq = host->inval_irq;
1065 smp_wmb();
1066 irq_map[i].host = NULL;
1067 }
1068 raw_spin_unlock_irqrestore(&irq_big_lock, flags);
1069}
1070
1071int arch_early_irq_init(void)
1072{
1073 return 0;
1074}
1075
1076#ifdef CONFIG_VIRQ_DEBUG
1077static int virq_debug_show(struct seq_file *m, void *private)
1078{
1079 unsigned long flags;
1080 struct irq_desc *desc;
1081 const char *p;
1082 static const char none[] = "none";
1083 void *data;
1084 int i;
1085
1086 seq_printf(m, "%-5s %-7s %-15s %-18s %s\n", "virq", "hwirq",
1087 "chip name", "chip data", "host name");
1088
1089 for (i = 1; i < nr_irqs; i++) {
1090 desc = irq_to_desc(i);
1091 if (!desc)
1092 continue;
1093
1094 raw_spin_lock_irqsave(&desc->lock, flags);
1095
1096 if (desc->action && desc->action->handler) {
1097 struct irq_chip *chip;
1098
1099 seq_printf(m, "%5d ", i);
1100 seq_printf(m, "0x%05lx ", irq_map[i].hwirq);
1101
1102 chip = irq_desc_get_chip(desc);
1103 if (chip && chip->name)
1104 p = chip->name;
1105 else
1106 p = none;
1107 seq_printf(m, "%-15s ", p);
1108
1109 data = irq_desc_get_chip_data(desc);
1110 seq_printf(m, "0x%16p ", data);
1111
1112 if (irq_map[i].host && irq_map[i].host->of_node)
1113 p = irq_map[i].host->of_node->full_name;
1114 else
1115 p = none;
1116 seq_printf(m, "%s\n", p);
1117 }
1118
1119 raw_spin_unlock_irqrestore(&desc->lock, flags);
1120 }
1121
1122 return 0;
1123}
1124
1125static int virq_debug_open(struct inode *inode, struct file *file)
1126{
1127 return single_open(file, virq_debug_show, inode->i_private);
1128}
1129
1130static const struct file_operations virq_debug_fops = {
1131 .open = virq_debug_open,
1132 .read = seq_read,
1133 .llseek = seq_lseek,
1134 .release = single_release,
1135};
1136
1137static int __init irq_debugfs_init(void)
1138{
1139 if (debugfs_create_file("virq_mapping", S_IRUGO, powerpc_debugfs_root,
1140 NULL, &virq_debug_fops) == NULL)
1141 return -ENOMEM;
1142
1143 return 0;
1144}
1145__initcall(irq_debugfs_init);
1146#endif /* CONFIG_VIRQ_DEBUG */
1147
1148#ifdef CONFIG_PPC64
1149static int __init setup_noirqdistrib(char *str)
1150{
1151 distribute_irqs = 0;
1152 return 1;
1153}
1154
1155__setup("noirqdistrib", setup_noirqdistrib);
1156#endif /* CONFIG_PPC64 */