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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 | /* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved */ #ifndef _DPU_HW_WB_H #define _DPU_HW_WB_H #include "dpu_hw_catalog.h" #include "dpu_hw_mdss.h" #include "dpu_hw_top.h" #include "dpu_hw_util.h" #include "dpu_hw_pingpong.h" struct dpu_hw_wb; struct dpu_hw_wb_cfg { struct dpu_hw_fmt_layout dest; enum dpu_intf_mode intf_mode; struct drm_rect roi; struct drm_rect crop; }; /** * enum CDP preload ahead address size */ enum { DPU_WB_CDP_PRELOAD_AHEAD_32, DPU_WB_CDP_PRELOAD_AHEAD_64 }; /** * struct dpu_hw_wb_qos_cfg : Writeback pipe QoS configuration * @danger_lut: LUT for generate danger level based on fill level * @safe_lut: LUT for generate safe level based on fill level * @creq_lut: LUT for generate creq level based on fill level * @danger_safe_en: enable danger safe generation */ struct dpu_hw_wb_qos_cfg { u32 danger_lut; u32 safe_lut; u64 creq_lut; bool danger_safe_en; }; /** * * struct dpu_hw_wb_ops : Interface to the wb hw driver functions * Assumption is these functions will be called after clocks are enabled * @setup_outaddress: setup output address from the writeback job * @setup_outformat: setup output format of writeback block from writeback job * @setup_qos_lut: setup qos LUT for writeback block based on input * @setup_cdp: setup chroma down prefetch block for writeback block * @bind_pingpong_blk: enable/disable the connection with ping-pong block */ struct dpu_hw_wb_ops { void (*setup_outaddress)(struct dpu_hw_wb *ctx, struct dpu_hw_wb_cfg *wb); void (*setup_outformat)(struct dpu_hw_wb *ctx, struct dpu_hw_wb_cfg *wb); void (*setup_roi)(struct dpu_hw_wb *ctx, struct dpu_hw_wb_cfg *wb); void (*setup_qos_lut)(struct dpu_hw_wb *ctx, struct dpu_hw_wb_qos_cfg *cfg); void (*setup_cdp)(struct dpu_hw_wb *ctx, struct dpu_hw_cdp_cfg *cfg); void (*bind_pingpong_blk)(struct dpu_hw_wb *ctx, bool enable, const enum dpu_pingpong pp); }; /** * struct dpu_hw_wb : WB driver object * @hw: block hardware details * @mdp: pointer to associated mdp portion of the catalog * @idx: hardware index number within type * @wb_hw_caps: hardware capabilities * @ops: function pointers * @hw_mdp: MDP top level hardware block */ struct dpu_hw_wb { struct dpu_hw_blk_reg_map hw; const struct dpu_mdp_cfg *mdp; /* wb path */ int idx; const struct dpu_wb_cfg *caps; /* ops */ struct dpu_hw_wb_ops ops; struct dpu_hw_mdp *hw_mdp; }; /** * dpu_hw_wb_init(): Initializes and return writeback hw driver object. * @idx: wb_path index for which driver object is required * @addr: mapped register io address of MDP * @m : pointer to mdss catalog data */ struct dpu_hw_wb *dpu_hw_wb_init(enum dpu_wb idx, void __iomem *addr, const struct dpu_mdss_cfg *m); /** * dpu_hw_wb_destroy(): Destroy writeback hw driver object. * @hw_wb: Pointer to writeback hw driver object */ void dpu_hw_wb_destroy(struct dpu_hw_wb *hw_wb); #endif /*_DPU_HW_WB_H */ |