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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 | /* SPDX-License-Identifier: GPL-2.0-only */ /* * IO definitions for the Hexagon architecture * * Copyright (c) 2010-2013, The Linux Foundation. All rights reserved. */ #ifndef _ASM_IO_H #define _ASM_IO_H #ifdef __KERNEL__ #include <linux/types.h> #include <asm/iomap.h> #include <asm/page.h> #include <asm/cacheflush.h> /* * We don't have PCI yet. * _IO_BASE is pointing at what should be unused virtual space. */ #define IO_SPACE_LIMIT 0xffff #define _IO_BASE ((void __iomem *)0xfe000000) #define IOMEM(x) ((void __force __iomem *)(x)) extern int remap_area_pages(unsigned long start, unsigned long phys_addr, unsigned long end, unsigned long flags); extern void iounmap(const volatile void __iomem *addr); /* Defined in lib/io.c, needed for smc91x driver. */ extern void __raw_readsw(const void __iomem *addr, void *data, int wordlen); extern void __raw_writesw(void __iomem *addr, const void *data, int wordlen); extern void __raw_readsl(const void __iomem *addr, void *data, int wordlen); extern void __raw_writesl(void __iomem *addr, const void *data, int wordlen); #define readsw(p, d, l) __raw_readsw(p, d, l) #define writesw(p, d, l) __raw_writesw(p, d, l) #define readsl(p, d, l) __raw_readsl(p, d, l) #define writesl(p, d, l) __raw_writesl(p, d, l) /* * virt_to_phys - map virtual address to physical * @address: address to map */ static inline unsigned long virt_to_phys(volatile void *address) { return __pa(address); } /* * phys_to_virt - map physical address to virtual * @address: address to map */ static inline void *phys_to_virt(unsigned long address) { return __va(address); } /* * convert a physical pointer to a virtual kernel pointer for * /dev/mem access. */ #define xlate_dev_mem_ptr(p) __va(p) /* * IO port access primitives. Hexagon doesn't have special IO access * instructions; all I/O is memory mapped. * * in/out are used for "ports", but we don't have "port instructions", * so these are really just memory mapped too. */ /* * readb - read byte from memory mapped device * @addr: pointer to memory * * Operates on "I/O bus memory space" */ static inline u8 readb(const volatile void __iomem *addr) { u8 val; asm volatile( "%0 = memb(%1);" : "=&r" (val) : "r" (addr) ); return val; } static inline u16 readw(const volatile void __iomem *addr) { u16 val; asm volatile( "%0 = memh(%1);" : "=&r" (val) : "r" (addr) ); return val; } static inline u32 readl(const volatile void __iomem *addr) { u32 val; asm volatile( "%0 = memw(%1);" : "=&r" (val) : "r" (addr) ); return val; } /* * writeb - write a byte to a memory location * @data: data to write to * @addr: pointer to memory * */ static inline void writeb(u8 data, volatile void __iomem *addr) { asm volatile( "memb(%0) = %1;" : : "r" (addr), "r" (data) : "memory" ); } static inline void writew(u16 data, volatile void __iomem *addr) { asm volatile( "memh(%0) = %1;" : : "r" (addr), "r" (data) : "memory" ); } static inline void writel(u32 data, volatile void __iomem *addr) { asm volatile( "memw(%0) = %1;" : : "r" (addr), "r" (data) : "memory" ); } #define __raw_writeb writeb #define __raw_writew writew #define __raw_writel writel #define __raw_readb readb #define __raw_readw readw #define __raw_readl readl /* * http://comments.gmane.org/gmane.linux.ports.arm.kernel/117626 */ #define readb_relaxed __raw_readb #define readw_relaxed __raw_readw #define readl_relaxed __raw_readl #define writeb_relaxed __raw_writeb #define writew_relaxed __raw_writew #define writel_relaxed __raw_writel void __iomem *ioremap(unsigned long phys_addr, unsigned long size); #define ioremap_uc(X, Y) ioremap((X), (Y)) #define __raw_writel writel static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count) { memcpy(dst, (void *) src, count); } static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count) { memcpy((void *) dst, src, count); } static inline void memset_io(volatile void __iomem *addr, int value, size_t size) { memset((void __force *)addr, value, size); } #define PCI_IO_ADDR (volatile void __iomem *) /* * inb - read byte from I/O port or something * @port: address in I/O space * * Operates on "I/O bus I/O space" */ static inline u8 inb(unsigned long port) { return readb(_IO_BASE + (port & IO_SPACE_LIMIT)); } static inline u16 inw(unsigned long port) { return readw(_IO_BASE + (port & IO_SPACE_LIMIT)); } static inline u32 inl(unsigned long port) { return readl(_IO_BASE + (port & IO_SPACE_LIMIT)); } /* * outb - write a byte to a memory location * @data: data to write to * @addr: address in I/O space */ static inline void outb(u8 data, unsigned long port) { writeb(data, _IO_BASE + (port & IO_SPACE_LIMIT)); } static inline void outw(u16 data, unsigned long port) { writew(data, _IO_BASE + (port & IO_SPACE_LIMIT)); } static inline void outl(u32 data, unsigned long port) { writel(data, _IO_BASE + (port & IO_SPACE_LIMIT)); } #define outb_p outb #define outw_p outw #define outl_p outl #define inb_p inb #define inw_p inw #define inl_p inl static inline void insb(unsigned long port, void *buffer, int count) { if (count) { u8 *buf = buffer; do { u8 x = inb(port); *buf++ = x; } while (--count); } } static inline void insw(unsigned long port, void *buffer, int count) { if (count) { u16 *buf = buffer; do { u16 x = inw(port); *buf++ = x; } while (--count); } } static inline void insl(unsigned long port, void *buffer, int count) { if (count) { u32 *buf = buffer; do { u32 x = inw(port); *buf++ = x; } while (--count); } } static inline void outsb(unsigned long port, const void *buffer, int count) { if (count) { const u8 *buf = buffer; do { outb(*buf++, port); } while (--count); } } static inline void outsw(unsigned long port, const void *buffer, int count) { if (count) { const u16 *buf = buffer; do { outw(*buf++, port); } while (--count); } } static inline void outsl(unsigned long port, const void *buffer, int count) { if (count) { const u32 *buf = buffer; do { outl(*buf++, port); } while (--count); } } /* * These defines are necessary to use the generic io.h for filling in * the missing parts of the API contract. This is because the platform * uses (inline) functions rather than defines and the generic helper * fills in the undefined. */ #define virt_to_phys virt_to_phys #define phys_to_virt phys_to_virt #define memset_io memset_io #define memcpy_fromio memcpy_fromio #define memcpy_toio memcpy_toio #define readb readb #define readw readw #define readl readl #define writeb writeb #define writew writew #define writel writel #define insb insb #define insw insw #define insl insl #define outsb outsb #define outsw outsw #define outsl outsl #include <asm-generic/io.h> #endif /* __KERNEL__ */ #endif |