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1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra Display Controller
8
9maintainers:
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12
13properties:
14 $nodename:
15 pattern: "^dc@[0-9a-f]+$"
16
17 compatible:
18 oneOf:
19 - enum:
20 - nvidia,tegra20-dc
21 - nvidia,tegra30-dc
22 - nvidia,tegra114-dc
23 - nvidia,tegra124-dc
24 - nvidia,tegra210-dc
25
26 - items:
27 - const: nvidia,tegra124-dc
28 - const: nvidia,tegra132-dc
29
30 reg:
31 maxItems: 1
32
33 interrupts:
34 maxItems: 1
35
36 clocks:
37 minItems: 1
38 items:
39 - description: display controller pixel clock
40 - description: parent clock # optional
41
42 clock-names:
43 minItems: 1
44 items:
45 - const: dc
46 - const: parent # optional
47
48 resets:
49 items:
50 - description: module reset
51
52 reset-names:
53 items:
54 - const: dc
55
56 interconnect-names: true
57 interconnects: true
58
59 iommus:
60 maxItems: 1
61
62 operating-points-v2:
63 $ref: "/schemas/types.yaml#/definitions/phandle"
64
65 power-domains:
66 items:
67 - description: phandle to the core power domain
68
69 memory-region: true
70
71 nvidia,head:
72 $ref: /schemas/types.yaml#/definitions/uint32
73 description: The number of the display controller head. This is used to setup the various
74 types of output to receive video data from the given head.
75
76 nvidia,outputs:
77 $ref: /schemas/types.yaml#/definitions/phandle-array
78 description: A list of phandles of outputs that this display controller can drive.
79
80 rgb:
81 type: object
82
83allOf:
84 - if:
85 properties:
86 compatible:
87 contains:
88 enum:
89 - nvidia,tegra20-dc
90 - nvidia,tegra30-dc
91 - nvidia,tegra114-dc
92 then:
93 properties:
94 interconnects:
95 items:
96 - description: window A memory client
97 - description: window B memory client
98 - description: window B memory client (vertical filter)
99 - description: window C memory client
100 - description: cursor memory client
101
102 interconnect-names:
103 items:
104 - const: wina
105 - const: winb
106 - const: winb-vfilter
107 - const: winc
108 - const: cursor
109
110 rgb:
111 description: Each display controller node has a child node, named "rgb", that represents
112 the RGB output associated with the controller.
113 type: object
114 properties:
115 nvidia,ddc-i2c-bus:
116 $ref: /schemas/types.yaml#/definitions/phandle
117 description: phandle of an I2C controller used for DDC EDID probing
118
119 nvidia,hpd-gpio:
120 description: specifies a GPIO used for hotplug detection
121 maxItems: 1
122
123 nvidia,edid:
124 $ref: /schemas/types.yaml#/definitions/uint8-array
125 description: supplies a binary EDID blob
126
127 nvidia,panel:
128 $ref: /schemas/types.yaml#/definitions/phandle
129 description: phandle of a display panel
130
131 - if:
132 properties:
133 compatible:
134 contains:
135 enum:
136 - nvidia,tegra124-dc
137 then:
138 properties:
139 interconnects:
140 minItems: 4
141 items:
142 - description: window A memory client
143 - description: window B memory client
144 - description: window C memory client
145 - description: cursor memory client
146 - description: window D memory client
147 - description: window T memory client
148
149 interconnect-names:
150 minItems: 4
151 items:
152 - const: wina
153 - const: winb
154 - const: winc
155 - const: cursor
156 - const: wind
157 - const: wint
158
159additionalProperties: false
160
161required:
162 - compatible
163 - reg
164 - interrupts
165 - clocks
166 - clock-names
167 - resets
168 - reset-names
169
170examples:
171 - |
172 #include <dt-bindings/clock/tegra20-car.h>
173 #include <dt-bindings/interrupt-controller/arm-gic.h>
174
175 dc@54200000 {
176 compatible = "nvidia,tegra20-dc";
177 reg = <0x54200000 0x00040000>;
178 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
179 clocks = <&tegra_car TEGRA20_CLK_DISP1>;
180 clock-names = "dc";
181 resets = <&tegra_car 27>;
182 reset-names = "dc";
183 };