1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * Copyright (c) 2023, Linaro Limited
 4 */
 5
 6#ifndef QCOM_PHY_QMP_QSERDES_COM_V6_H_
 7#define QCOM_PHY_QMP_QSERDES_COM_V6_H_
 8
 9/* Only for QMP V6 PHY - QSERDES COM registers */
10
11#define QSERDES_V6_COM_SSC_STEP_SIZE1_MODE1			0x00
12#define QSERDES_V6_COM_SSC_STEP_SIZE2_MODE1			0x04
13#define QSERDES_V6_COM_CP_CTRL_MODE1				0x10
14#define QSERDES_V6_COM_PLL_RCTRL_MODE1				0x14
15#define QSERDES_V6_COM_PLL_CCTRL_MODE1				0x18
16#define QSERDES_V6_COM_CORECLK_DIV_MODE1			0x1c
17#define QSERDES_V6_COM_LOCK_CMP1_MODE1				0x20
18#define QSERDES_V6_COM_LOCK_CMP2_MODE1				0x24
19#define QSERDES_V6_COM_DEC_START_MODE1				0x28
20#define QSERDES_V6_COM_DEC_START_MSB_MODE1			0x2c
21#define QSERDES_V6_COM_DIV_FRAC_START1_MODE1			0x30
22#define QSERDES_V6_COM_DIV_FRAC_START2_MODE1			0x34
23#define QSERDES_V6_COM_DIV_FRAC_START3_MODE1			0x38
24#define QSERDES_V6_COM_HSCLK_SEL_1				0x3c
25#define QSERDES_V6_COM_INTEGLOOP_GAIN0_MODE1			0x40
26#define QSERDES_V6_COM_INTEGLOOP_GAIN1_MODE1			0x44
27#define QSERDES_V6_COM_VCO_TUNE1_MODE1				0x48
28#define QSERDES_V6_COM_VCO_TUNE2_MODE1				0x4c
29#define QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE1		0x50
30#define QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE1		0x54
31#define QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE1_MODE0		0x58
32#define QSERDES_V6_COM_BIN_VCOCAL_CMP_CODE2_MODE0		0x5c
33#define QSERDES_V6_COM_SSC_STEP_SIZE1_MODE0			0x60
34#define QSERDES_V6_COM_SSC_STEP_SIZE2_MODE0			0x64
35#define QSERDES_V6_COM_CP_CTRL_MODE0				0x70
36#define QSERDES_V6_COM_PLL_RCTRL_MODE0				0x74
37#define QSERDES_V6_COM_PLL_CCTRL_MODE0				0x78
38#define QSERDES_V6_COM_PLL_CORE_CLK_DIV_MODE0			0x7c
39#define QSERDES_V6_COM_LOCK_CMP1_MODE0				0x80
40#define QSERDES_V6_COM_LOCK_CMP2_MODE0				0x84
41#define QSERDES_V6_COM_DEC_START_MODE0				0x88
42#define QSERDES_V6_COM_DEC_START_MSB_MODE0			0x8c
43#define QSERDES_V6_COM_DIV_FRAC_START1_MODE0			0x90
44#define QSERDES_V6_COM_DIV_FRAC_START2_MODE0			0x94
45#define QSERDES_V6_COM_DIV_FRAC_START3_MODE0			0x98
46#define QSERDES_V6_COM_HSCLK_HS_SWITCH_SEL_1			0x9c
47#define QSERDES_V6_COM_INTEGLOOP_GAIN0_MODE0			0xa0
48#define QSERDES_V6_COM_INTEGLOOP_GAIN1_MODE0			0xa4
49#define QSERDES_V6_COM_VCO_TUNE1_MODE0				0xa8
50#define QSERDES_V6_COM_VCO_TUNE2_MODE0				0xac
51#define QSERDES_V6_COM_BG_TIMER					0xbc
52#define QSERDES_V6_COM_SSC_EN_CENTER				0xc0
53#define QSERDES_V6_COM_SSC_ADJ_PER1				0xc4
54#define QSERDES_V6_COM_SSC_PER1					0xcc
55#define QSERDES_V6_COM_SSC_PER2					0xd0
56#define QSERDES_V6_COM_PLL_POST_DIV_MUX				0xd8
57#define QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN			0xdc
58#define QSERDES_V6_COM_CLK_ENABLE1				0xe0
59#define QSERDES_V6_COM_SYS_CLK_CTRL				0xe4
60#define QSERDES_V6_COM_SYSCLK_BUF_ENABLE			0xe8
61#define QSERDES_V6_COM_PLL_IVCO					0xf4
62#define QSERDES_V6_COM_PLL_IVCO_MODE1				0xf8
63#define QSERDES_V6_COM_CMN_IETRIM				0xfc
64#define QSERDES_V6_COM_CMN_IPTRIM				0x100
65#define QSERDES_V6_COM_SYSCLK_EN_SEL				0x110
66#define QSERDES_V6_COM_RESETSM_CNTRL				0x118
67#define QSERDES_V6_COM_LOCK_CMP_EN				0x120
68#define QSERDES_V6_COM_LOCK_CMP_CFG				0x124
69#define QSERDES_V6_COM_VCO_TUNE_CTRL				0x13c
70#define QSERDES_V6_COM_VCO_TUNE_MAP				0x140
71#define QSERDES_V6_COM_VCO_TUNE_INITVAL2			0x148
72#define QSERDES_V6_COM_VCO_TUNE_MAXVAL2				0x158
73#define QSERDES_V6_COM_CLK_SELECT				0x164
74#define QSERDES_V6_COM_CORE_CLK_EN				0x170
75#define QSERDES_V6_COM_CMN_CONFIG_1				0x174
76#define QSERDES_V6_COM_SVS_MODE_CLK_SEL				0x17c
77#define QSERDES_V6_COM_CMN_MISC_1				0x184
78#define QSERDES_V6_COM_CMN_MODE					0x188
79#define QSERDES_V6_COM_PLL_VCO_DC_LEVEL_CTRL			0x198
80#define QSERDES_V6_COM_AUTO_GAIN_ADJ_CTRL_1			0x1a4
81#define QSERDES_V6_COM_AUTO_GAIN_ADJ_CTRL_2			0x1a8
82#define QSERDES_V6_COM_AUTO_GAIN_ADJ_CTRL_3			0x1ac
83#define QSERDES_V6_COM_ADDITIONAL_MISC				0x1b4
84#define QSERDES_V6_COM_ADDITIONAL_MISC_2			0x1b8
85#define QSERDES_V6_COM_ADDITIONAL_MISC_3			0x1bc
86#define QSERDES_V6_COM_CMN_STATUS				0x1d0
87#define QSERDES_V6_COM_C_READY_STATUS				0x1f8
88
89#endif