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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2002 Andi Kleen, SuSE Labs.
4 * Thanks to Ben LaHaise for precious feedback.
5 */
6#include <linux/highmem.h>
7#include <linux/memblock.h>
8#include <linux/sched.h>
9#include <linux/mm.h>
10#include <linux/interrupt.h>
11#include <linux/seq_file.h>
12#include <linux/debugfs.h>
13#include <linux/pfn.h>
14#include <linux/percpu.h>
15#include <linux/gfp.h>
16#include <linux/pci.h>
17#include <linux/vmalloc.h>
18#include <linux/libnvdimm.h>
19#include <linux/vmstat.h>
20#include <linux/kernel.h>
21#include <linux/cc_platform.h>
22#include <linux/set_memory.h>
23#include <linux/memregion.h>
24
25#include <asm/e820/api.h>
26#include <asm/processor.h>
27#include <asm/tlbflush.h>
28#include <asm/sections.h>
29#include <asm/setup.h>
30#include <linux/uaccess.h>
31#include <asm/pgalloc.h>
32#include <asm/proto.h>
33#include <asm/memtype.h>
34#include <asm/hyperv-tlfs.h>
35#include <asm/mshyperv.h>
36
37#include "../mm_internal.h"
38
39/*
40 * The current flushing context - we pass it instead of 5 arguments:
41 */
42struct cpa_data {
43 unsigned long *vaddr;
44 pgd_t *pgd;
45 pgprot_t mask_set;
46 pgprot_t mask_clr;
47 unsigned long numpages;
48 unsigned long curpage;
49 unsigned long pfn;
50 unsigned int flags;
51 unsigned int force_split : 1,
52 force_static_prot : 1,
53 force_flush_all : 1;
54 struct page **pages;
55};
56
57enum cpa_warn {
58 CPA_CONFLICT,
59 CPA_PROTECT,
60 CPA_DETECT,
61};
62
63static const int cpa_warn_level = CPA_PROTECT;
64
65/*
66 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
67 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
68 * entries change the page attribute in parallel to some other cpu
69 * splitting a large page entry along with changing the attribute.
70 */
71static DEFINE_SPINLOCK(cpa_lock);
72
73#define CPA_FLUSHTLB 1
74#define CPA_ARRAY 2
75#define CPA_PAGES_ARRAY 4
76#define CPA_NO_CHECK_ALIAS 8 /* Do not search for aliases */
77
78static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)
79{
80 return __pgprot(cachemode2protval(pcm));
81}
82
83#ifdef CONFIG_PROC_FS
84static unsigned long direct_pages_count[PG_LEVEL_NUM];
85
86void update_page_count(int level, unsigned long pages)
87{
88 /* Protect against CPA */
89 spin_lock(&pgd_lock);
90 direct_pages_count[level] += pages;
91 spin_unlock(&pgd_lock);
92}
93
94static void split_page_count(int level)
95{
96 if (direct_pages_count[level] == 0)
97 return;
98
99 direct_pages_count[level]--;
100 if (system_state == SYSTEM_RUNNING) {
101 if (level == PG_LEVEL_2M)
102 count_vm_event(DIRECT_MAP_LEVEL2_SPLIT);
103 else if (level == PG_LEVEL_1G)
104 count_vm_event(DIRECT_MAP_LEVEL3_SPLIT);
105 }
106 direct_pages_count[level - 1] += PTRS_PER_PTE;
107}
108
109void arch_report_meminfo(struct seq_file *m)
110{
111 seq_printf(m, "DirectMap4k: %8lu kB\n",
112 direct_pages_count[PG_LEVEL_4K] << 2);
113#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
114 seq_printf(m, "DirectMap2M: %8lu kB\n",
115 direct_pages_count[PG_LEVEL_2M] << 11);
116#else
117 seq_printf(m, "DirectMap4M: %8lu kB\n",
118 direct_pages_count[PG_LEVEL_2M] << 12);
119#endif
120 if (direct_gbpages)
121 seq_printf(m, "DirectMap1G: %8lu kB\n",
122 direct_pages_count[PG_LEVEL_1G] << 20);
123}
124#else
125static inline void split_page_count(int level) { }
126#endif
127
128#ifdef CONFIG_X86_CPA_STATISTICS
129
130static unsigned long cpa_1g_checked;
131static unsigned long cpa_1g_sameprot;
132static unsigned long cpa_1g_preserved;
133static unsigned long cpa_2m_checked;
134static unsigned long cpa_2m_sameprot;
135static unsigned long cpa_2m_preserved;
136static unsigned long cpa_4k_install;
137
138static inline void cpa_inc_1g_checked(void)
139{
140 cpa_1g_checked++;
141}
142
143static inline void cpa_inc_2m_checked(void)
144{
145 cpa_2m_checked++;
146}
147
148static inline void cpa_inc_4k_install(void)
149{
150 data_race(cpa_4k_install++);
151}
152
153static inline void cpa_inc_lp_sameprot(int level)
154{
155 if (level == PG_LEVEL_1G)
156 cpa_1g_sameprot++;
157 else
158 cpa_2m_sameprot++;
159}
160
161static inline void cpa_inc_lp_preserved(int level)
162{
163 if (level == PG_LEVEL_1G)
164 cpa_1g_preserved++;
165 else
166 cpa_2m_preserved++;
167}
168
169static int cpastats_show(struct seq_file *m, void *p)
170{
171 seq_printf(m, "1G pages checked: %16lu\n", cpa_1g_checked);
172 seq_printf(m, "1G pages sameprot: %16lu\n", cpa_1g_sameprot);
173 seq_printf(m, "1G pages preserved: %16lu\n", cpa_1g_preserved);
174 seq_printf(m, "2M pages checked: %16lu\n", cpa_2m_checked);
175 seq_printf(m, "2M pages sameprot: %16lu\n", cpa_2m_sameprot);
176 seq_printf(m, "2M pages preserved: %16lu\n", cpa_2m_preserved);
177 seq_printf(m, "4K pages set-checked: %16lu\n", cpa_4k_install);
178 return 0;
179}
180
181static int cpastats_open(struct inode *inode, struct file *file)
182{
183 return single_open(file, cpastats_show, NULL);
184}
185
186static const struct file_operations cpastats_fops = {
187 .open = cpastats_open,
188 .read = seq_read,
189 .llseek = seq_lseek,
190 .release = single_release,
191};
192
193static int __init cpa_stats_init(void)
194{
195 debugfs_create_file("cpa_stats", S_IRUSR, arch_debugfs_dir, NULL,
196 &cpastats_fops);
197 return 0;
198}
199late_initcall(cpa_stats_init);
200#else
201static inline void cpa_inc_1g_checked(void) { }
202static inline void cpa_inc_2m_checked(void) { }
203static inline void cpa_inc_4k_install(void) { }
204static inline void cpa_inc_lp_sameprot(int level) { }
205static inline void cpa_inc_lp_preserved(int level) { }
206#endif
207
208
209static inline int
210within(unsigned long addr, unsigned long start, unsigned long end)
211{
212 return addr >= start && addr < end;
213}
214
215static inline int
216within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
217{
218 return addr >= start && addr <= end;
219}
220
221#ifdef CONFIG_X86_64
222
223/*
224 * The kernel image is mapped into two places in the virtual address space
225 * (addresses without KASLR, of course):
226 *
227 * 1. The kernel direct map (0xffff880000000000)
228 * 2. The "high kernel map" (0xffffffff81000000)
229 *
230 * We actually execute out of #2. If we get the address of a kernel symbol, it
231 * points to #2, but almost all physical-to-virtual translations point to #1.
232 *
233 * This is so that we can have both a directmap of all physical memory *and*
234 * take full advantage of the the limited (s32) immediate addressing range (2G)
235 * of x86_64.
236 *
237 * See Documentation/x86/x86_64/mm.rst for more detail.
238 */
239
240static inline unsigned long highmap_start_pfn(void)
241{
242 return __pa_symbol(_text) >> PAGE_SHIFT;
243}
244
245static inline unsigned long highmap_end_pfn(void)
246{
247 /* Do not reference physical address outside the kernel. */
248 return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
249}
250
251static bool __cpa_pfn_in_highmap(unsigned long pfn)
252{
253 /*
254 * Kernel text has an alias mapping at a high address, known
255 * here as "highmap".
256 */
257 return within_inclusive(pfn, highmap_start_pfn(), highmap_end_pfn());
258}
259
260#else
261
262static bool __cpa_pfn_in_highmap(unsigned long pfn)
263{
264 /* There is no highmap on 32-bit */
265 return false;
266}
267
268#endif
269
270/*
271 * See set_mce_nospec().
272 *
273 * Machine check recovery code needs to change cache mode of poisoned pages to
274 * UC to avoid speculative access logging another error. But passing the
275 * address of the 1:1 mapping to set_memory_uc() is a fine way to encourage a
276 * speculative access. So we cheat and flip the top bit of the address. This
277 * works fine for the code that updates the page tables. But at the end of the
278 * process we need to flush the TLB and cache and the non-canonical address
279 * causes a #GP fault when used by the INVLPG and CLFLUSH instructions.
280 *
281 * But in the common case we already have a canonical address. This code
282 * will fix the top bit if needed and is a no-op otherwise.
283 */
284static inline unsigned long fix_addr(unsigned long addr)
285{
286#ifdef CONFIG_X86_64
287 return (long)(addr << 1) >> 1;
288#else
289 return addr;
290#endif
291}
292
293static unsigned long __cpa_addr(struct cpa_data *cpa, unsigned long idx)
294{
295 if (cpa->flags & CPA_PAGES_ARRAY) {
296 struct page *page = cpa->pages[idx];
297
298 if (unlikely(PageHighMem(page)))
299 return 0;
300
301 return (unsigned long)page_address(page);
302 }
303
304 if (cpa->flags & CPA_ARRAY)
305 return cpa->vaddr[idx];
306
307 return *cpa->vaddr + idx * PAGE_SIZE;
308}
309
310/*
311 * Flushing functions
312 */
313
314static void clflush_cache_range_opt(void *vaddr, unsigned int size)
315{
316 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
317 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
318 void *vend = vaddr + size;
319
320 if (p >= vend)
321 return;
322
323 for (; p < vend; p += clflush_size)
324 clflushopt(p);
325}
326
327/**
328 * clflush_cache_range - flush a cache range with clflush
329 * @vaddr: virtual start address
330 * @size: number of bytes to flush
331 *
332 * CLFLUSHOPT is an unordered instruction which needs fencing with MFENCE or
333 * SFENCE to avoid ordering issues.
334 */
335void clflush_cache_range(void *vaddr, unsigned int size)
336{
337 mb();
338 clflush_cache_range_opt(vaddr, size);
339 mb();
340}
341EXPORT_SYMBOL_GPL(clflush_cache_range);
342
343#ifdef CONFIG_ARCH_HAS_PMEM_API
344void arch_invalidate_pmem(void *addr, size_t size)
345{
346 clflush_cache_range(addr, size);
347}
348EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
349#endif
350
351#ifdef CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
352bool cpu_cache_has_invalidate_memregion(void)
353{
354 return !cpu_feature_enabled(X86_FEATURE_HYPERVISOR);
355}
356EXPORT_SYMBOL_NS_GPL(cpu_cache_has_invalidate_memregion, DEVMEM);
357
358int cpu_cache_invalidate_memregion(int res_desc)
359{
360 if (WARN_ON_ONCE(!cpu_cache_has_invalidate_memregion()))
361 return -ENXIO;
362 wbinvd_on_all_cpus();
363 return 0;
364}
365EXPORT_SYMBOL_NS_GPL(cpu_cache_invalidate_memregion, DEVMEM);
366#endif
367
368static void __cpa_flush_all(void *arg)
369{
370 unsigned long cache = (unsigned long)arg;
371
372 /*
373 * Flush all to work around Errata in early athlons regarding
374 * large page flushing.
375 */
376 __flush_tlb_all();
377
378 if (cache && boot_cpu_data.x86 >= 4)
379 wbinvd();
380}
381
382static void cpa_flush_all(unsigned long cache)
383{
384 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
385
386 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
387}
388
389static void __cpa_flush_tlb(void *data)
390{
391 struct cpa_data *cpa = data;
392 unsigned int i;
393
394 for (i = 0; i < cpa->numpages; i++)
395 flush_tlb_one_kernel(fix_addr(__cpa_addr(cpa, i)));
396}
397
398static void cpa_flush(struct cpa_data *data, int cache)
399{
400 struct cpa_data *cpa = data;
401 unsigned int i;
402
403 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
404
405 if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
406 cpa_flush_all(cache);
407 return;
408 }
409
410 if (cpa->force_flush_all || cpa->numpages > tlb_single_page_flush_ceiling)
411 flush_tlb_all();
412 else
413 on_each_cpu(__cpa_flush_tlb, cpa, 1);
414
415 if (!cache)
416 return;
417
418 mb();
419 for (i = 0; i < cpa->numpages; i++) {
420 unsigned long addr = __cpa_addr(cpa, i);
421 unsigned int level;
422
423 pte_t *pte = lookup_address(addr, &level);
424
425 /*
426 * Only flush present addresses:
427 */
428 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
429 clflush_cache_range_opt((void *)fix_addr(addr), PAGE_SIZE);
430 }
431 mb();
432}
433
434static bool overlaps(unsigned long r1_start, unsigned long r1_end,
435 unsigned long r2_start, unsigned long r2_end)
436{
437 return (r1_start <= r2_end && r1_end >= r2_start) ||
438 (r2_start <= r1_end && r2_end >= r1_start);
439}
440
441#ifdef CONFIG_PCI_BIOS
442/*
443 * The BIOS area between 640k and 1Mb needs to be executable for PCI BIOS
444 * based config access (CONFIG_PCI_GOBIOS) support.
445 */
446#define BIOS_PFN PFN_DOWN(BIOS_BEGIN)
447#define BIOS_PFN_END PFN_DOWN(BIOS_END - 1)
448
449static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
450{
451 if (pcibios_enabled && overlaps(spfn, epfn, BIOS_PFN, BIOS_PFN_END))
452 return _PAGE_NX;
453 return 0;
454}
455#else
456static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
457{
458 return 0;
459}
460#endif
461
462/*
463 * The .rodata section needs to be read-only. Using the pfn catches all
464 * aliases. This also includes __ro_after_init, so do not enforce until
465 * kernel_set_to_readonly is true.
466 */
467static pgprotval_t protect_rodata(unsigned long spfn, unsigned long epfn)
468{
469 unsigned long epfn_ro, spfn_ro = PFN_DOWN(__pa_symbol(__start_rodata));
470
471 /*
472 * Note: __end_rodata is at page aligned and not inclusive, so
473 * subtract 1 to get the last enforced PFN in the rodata area.
474 */
475 epfn_ro = PFN_DOWN(__pa_symbol(__end_rodata)) - 1;
476
477 if (kernel_set_to_readonly && overlaps(spfn, epfn, spfn_ro, epfn_ro))
478 return _PAGE_RW;
479 return 0;
480}
481
482/*
483 * Protect kernel text against becoming non executable by forbidding
484 * _PAGE_NX. This protects only the high kernel mapping (_text -> _etext)
485 * out of which the kernel actually executes. Do not protect the low
486 * mapping.
487 *
488 * This does not cover __inittext since that is gone after boot.
489 */
490static pgprotval_t protect_kernel_text(unsigned long start, unsigned long end)
491{
492 unsigned long t_end = (unsigned long)_etext - 1;
493 unsigned long t_start = (unsigned long)_text;
494
495 if (overlaps(start, end, t_start, t_end))
496 return _PAGE_NX;
497 return 0;
498}
499
500#if defined(CONFIG_X86_64)
501/*
502 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
503 * kernel text mappings for the large page aligned text, rodata sections
504 * will be always read-only. For the kernel identity mappings covering the
505 * holes caused by this alignment can be anything that user asks.
506 *
507 * This will preserve the large page mappings for kernel text/data at no
508 * extra cost.
509 */
510static pgprotval_t protect_kernel_text_ro(unsigned long start,
511 unsigned long end)
512{
513 unsigned long t_end = (unsigned long)__end_rodata_hpage_align - 1;
514 unsigned long t_start = (unsigned long)_text;
515 unsigned int level;
516
517 if (!kernel_set_to_readonly || !overlaps(start, end, t_start, t_end))
518 return 0;
519 /*
520 * Don't enforce the !RW mapping for the kernel text mapping, if
521 * the current mapping is already using small page mapping. No
522 * need to work hard to preserve large page mappings in this case.
523 *
524 * This also fixes the Linux Xen paravirt guest boot failure caused
525 * by unexpected read-only mappings for kernel identity
526 * mappings. In this paravirt guest case, the kernel text mapping
527 * and the kernel identity mapping share the same page-table pages,
528 * so the protections for kernel text and identity mappings have to
529 * be the same.
530 */
531 if (lookup_address(start, &level) && (level != PG_LEVEL_4K))
532 return _PAGE_RW;
533 return 0;
534}
535#else
536static pgprotval_t protect_kernel_text_ro(unsigned long start,
537 unsigned long end)
538{
539 return 0;
540}
541#endif
542
543static inline bool conflicts(pgprot_t prot, pgprotval_t val)
544{
545 return (pgprot_val(prot) & ~val) != pgprot_val(prot);
546}
547
548static inline void check_conflict(int warnlvl, pgprot_t prot, pgprotval_t val,
549 unsigned long start, unsigned long end,
550 unsigned long pfn, const char *txt)
551{
552 static const char *lvltxt[] = {
553 [CPA_CONFLICT] = "conflict",
554 [CPA_PROTECT] = "protect",
555 [CPA_DETECT] = "detect",
556 };
557
558 if (warnlvl > cpa_warn_level || !conflicts(prot, val))
559 return;
560
561 pr_warn("CPA %8s %10s: 0x%016lx - 0x%016lx PFN %lx req %016llx prevent %016llx\n",
562 lvltxt[warnlvl], txt, start, end, pfn, (unsigned long long)pgprot_val(prot),
563 (unsigned long long)val);
564}
565
566/*
567 * Certain areas of memory on x86 require very specific protection flags,
568 * for example the BIOS area or kernel text. Callers don't always get this
569 * right (again, ioremap() on BIOS memory is not uncommon) so this function
570 * checks and fixes these known static required protection bits.
571 */
572static inline pgprot_t static_protections(pgprot_t prot, unsigned long start,
573 unsigned long pfn, unsigned long npg,
574 unsigned long lpsize, int warnlvl)
575{
576 pgprotval_t forbidden, res;
577 unsigned long end;
578
579 /*
580 * There is no point in checking RW/NX conflicts when the requested
581 * mapping is setting the page !PRESENT.
582 */
583 if (!(pgprot_val(prot) & _PAGE_PRESENT))
584 return prot;
585
586 /* Operate on the virtual address */
587 end = start + npg * PAGE_SIZE - 1;
588
589 res = protect_kernel_text(start, end);
590 check_conflict(warnlvl, prot, res, start, end, pfn, "Text NX");
591 forbidden = res;
592
593 /*
594 * Special case to preserve a large page. If the change spawns the
595 * full large page mapping then there is no point to split it
596 * up. Happens with ftrace and is going to be removed once ftrace
597 * switched to text_poke().
598 */
599 if (lpsize != (npg * PAGE_SIZE) || (start & (lpsize - 1))) {
600 res = protect_kernel_text_ro(start, end);
601 check_conflict(warnlvl, prot, res, start, end, pfn, "Text RO");
602 forbidden |= res;
603 }
604
605 /* Check the PFN directly */
606 res = protect_pci_bios(pfn, pfn + npg - 1);
607 check_conflict(warnlvl, prot, res, start, end, pfn, "PCIBIOS NX");
608 forbidden |= res;
609
610 res = protect_rodata(pfn, pfn + npg - 1);
611 check_conflict(warnlvl, prot, res, start, end, pfn, "Rodata RO");
612 forbidden |= res;
613
614 return __pgprot(pgprot_val(prot) & ~forbidden);
615}
616
617/*
618 * Validate strict W^X semantics.
619 */
620static inline pgprot_t verify_rwx(pgprot_t old, pgprot_t new, unsigned long start,
621 unsigned long pfn, unsigned long npg)
622{
623 unsigned long end;
624
625 /*
626 * 32-bit has some unfixable W+X issues, like EFI code
627 * and writeable data being in the same page. Disable
628 * detection and enforcement there.
629 */
630 if (IS_ENABLED(CONFIG_X86_32))
631 return new;
632
633 /* Only verify when NX is supported: */
634 if (!(__supported_pte_mask & _PAGE_NX))
635 return new;
636
637 if (!((pgprot_val(old) ^ pgprot_val(new)) & (_PAGE_RW | _PAGE_NX)))
638 return new;
639
640 if ((pgprot_val(new) & (_PAGE_RW | _PAGE_NX)) != _PAGE_RW)
641 return new;
642
643 end = start + npg * PAGE_SIZE - 1;
644 WARN_ONCE(1, "CPA detected W^X violation: %016llx -> %016llx range: 0x%016lx - 0x%016lx PFN %lx\n",
645 (unsigned long long)pgprot_val(old),
646 (unsigned long long)pgprot_val(new),
647 start, end, pfn);
648
649 /*
650 * For now, allow all permission change attempts by returning the
651 * attempted permissions. This can 'return old' to actively
652 * refuse the permission change at a later time.
653 */
654 return new;
655}
656
657/*
658 * Lookup the page table entry for a virtual address in a specific pgd.
659 * Return a pointer to the entry and the level of the mapping.
660 */
661pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
662 unsigned int *level)
663{
664 p4d_t *p4d;
665 pud_t *pud;
666 pmd_t *pmd;
667
668 *level = PG_LEVEL_NONE;
669
670 if (pgd_none(*pgd))
671 return NULL;
672
673 p4d = p4d_offset(pgd, address);
674 if (p4d_none(*p4d))
675 return NULL;
676
677 *level = PG_LEVEL_512G;
678 if (p4d_large(*p4d) || !p4d_present(*p4d))
679 return (pte_t *)p4d;
680
681 pud = pud_offset(p4d, address);
682 if (pud_none(*pud))
683 return NULL;
684
685 *level = PG_LEVEL_1G;
686 if (pud_large(*pud) || !pud_present(*pud))
687 return (pte_t *)pud;
688
689 pmd = pmd_offset(pud, address);
690 if (pmd_none(*pmd))
691 return NULL;
692
693 *level = PG_LEVEL_2M;
694 if (pmd_large(*pmd) || !pmd_present(*pmd))
695 return (pte_t *)pmd;
696
697 *level = PG_LEVEL_4K;
698
699 return pte_offset_kernel(pmd, address);
700}
701
702/*
703 * Lookup the page table entry for a virtual address. Return a pointer
704 * to the entry and the level of the mapping.
705 *
706 * Note: We return pud and pmd either when the entry is marked large
707 * or when the present bit is not set. Otherwise we would return a
708 * pointer to a nonexisting mapping.
709 */
710pte_t *lookup_address(unsigned long address, unsigned int *level)
711{
712 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
713}
714EXPORT_SYMBOL_GPL(lookup_address);
715
716static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
717 unsigned int *level)
718{
719 if (cpa->pgd)
720 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
721 address, level);
722
723 return lookup_address(address, level);
724}
725
726/*
727 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
728 * or NULL if not present.
729 */
730pmd_t *lookup_pmd_address(unsigned long address)
731{
732 pgd_t *pgd;
733 p4d_t *p4d;
734 pud_t *pud;
735
736 pgd = pgd_offset_k(address);
737 if (pgd_none(*pgd))
738 return NULL;
739
740 p4d = p4d_offset(pgd, address);
741 if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
742 return NULL;
743
744 pud = pud_offset(p4d, address);
745 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
746 return NULL;
747
748 return pmd_offset(pud, address);
749}
750
751/*
752 * This is necessary because __pa() does not work on some
753 * kinds of memory, like vmalloc() or the alloc_remap()
754 * areas on 32-bit NUMA systems. The percpu areas can
755 * end up in this kind of memory, for instance.
756 *
757 * This could be optimized, but it is only intended to be
758 * used at initialization time, and keeping it
759 * unoptimized should increase the testing coverage for
760 * the more obscure platforms.
761 */
762phys_addr_t slow_virt_to_phys(void *__virt_addr)
763{
764 unsigned long virt_addr = (unsigned long)__virt_addr;
765 phys_addr_t phys_addr;
766 unsigned long offset;
767 enum pg_level level;
768 pte_t *pte;
769
770 pte = lookup_address(virt_addr, &level);
771 BUG_ON(!pte);
772
773 /*
774 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
775 * before being left-shifted PAGE_SHIFT bits -- this trick is to
776 * make 32-PAE kernel work correctly.
777 */
778 switch (level) {
779 case PG_LEVEL_1G:
780 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
781 offset = virt_addr & ~PUD_MASK;
782 break;
783 case PG_LEVEL_2M:
784 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
785 offset = virt_addr & ~PMD_MASK;
786 break;
787 default:
788 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
789 offset = virt_addr & ~PAGE_MASK;
790 }
791
792 return (phys_addr_t)(phys_addr | offset);
793}
794EXPORT_SYMBOL_GPL(slow_virt_to_phys);
795
796/*
797 * Set the new pmd in all the pgds we know about:
798 */
799static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
800{
801 /* change init_mm */
802 set_pte_atomic(kpte, pte);
803#ifdef CONFIG_X86_32
804 if (!SHARED_KERNEL_PMD) {
805 struct page *page;
806
807 list_for_each_entry(page, &pgd_list, lru) {
808 pgd_t *pgd;
809 p4d_t *p4d;
810 pud_t *pud;
811 pmd_t *pmd;
812
813 pgd = (pgd_t *)page_address(page) + pgd_index(address);
814 p4d = p4d_offset(pgd, address);
815 pud = pud_offset(p4d, address);
816 pmd = pmd_offset(pud, address);
817 set_pte_atomic((pte_t *)pmd, pte);
818 }
819 }
820#endif
821}
822
823static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot)
824{
825 /*
826 * _PAGE_GLOBAL means "global page" for present PTEs.
827 * But, it is also used to indicate _PAGE_PROTNONE
828 * for non-present PTEs.
829 *
830 * This ensures that a _PAGE_GLOBAL PTE going from
831 * present to non-present is not confused as
832 * _PAGE_PROTNONE.
833 */
834 if (!(pgprot_val(prot) & _PAGE_PRESENT))
835 pgprot_val(prot) &= ~_PAGE_GLOBAL;
836
837 return prot;
838}
839
840static int __should_split_large_page(pte_t *kpte, unsigned long address,
841 struct cpa_data *cpa)
842{
843 unsigned long numpages, pmask, psize, lpaddr, pfn, old_pfn;
844 pgprot_t old_prot, new_prot, req_prot, chk_prot;
845 pte_t new_pte, *tmp;
846 enum pg_level level;
847
848 /*
849 * Check for races, another CPU might have split this page
850 * up already:
851 */
852 tmp = _lookup_address_cpa(cpa, address, &level);
853 if (tmp != kpte)
854 return 1;
855
856 switch (level) {
857 case PG_LEVEL_2M:
858 old_prot = pmd_pgprot(*(pmd_t *)kpte);
859 old_pfn = pmd_pfn(*(pmd_t *)kpte);
860 cpa_inc_2m_checked();
861 break;
862 case PG_LEVEL_1G:
863 old_prot = pud_pgprot(*(pud_t *)kpte);
864 old_pfn = pud_pfn(*(pud_t *)kpte);
865 cpa_inc_1g_checked();
866 break;
867 default:
868 return -EINVAL;
869 }
870
871 psize = page_level_size(level);
872 pmask = page_level_mask(level);
873
874 /*
875 * Calculate the number of pages, which fit into this large
876 * page starting at address:
877 */
878 lpaddr = (address + psize) & pmask;
879 numpages = (lpaddr - address) >> PAGE_SHIFT;
880 if (numpages < cpa->numpages)
881 cpa->numpages = numpages;
882
883 /*
884 * We are safe now. Check whether the new pgprot is the same:
885 * Convert protection attributes to 4k-format, as cpa->mask* are set
886 * up accordingly.
887 */
888
889 /* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
890 req_prot = pgprot_large_2_4k(old_prot);
891
892 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
893 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
894
895 /*
896 * req_prot is in format of 4k pages. It must be converted to large
897 * page format: the caching mode includes the PAT bit located at
898 * different bit positions in the two formats.
899 */
900 req_prot = pgprot_4k_2_large(req_prot);
901 req_prot = pgprot_clear_protnone_bits(req_prot);
902 if (pgprot_val(req_prot) & _PAGE_PRESENT)
903 pgprot_val(req_prot) |= _PAGE_PSE;
904
905 /*
906 * old_pfn points to the large page base pfn. So we need to add the
907 * offset of the virtual address:
908 */
909 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
910 cpa->pfn = pfn;
911
912 /*
913 * Calculate the large page base address and the number of 4K pages
914 * in the large page
915 */
916 lpaddr = address & pmask;
917 numpages = psize >> PAGE_SHIFT;
918
919 /*
920 * Sanity check that the existing mapping is correct versus the static
921 * protections. static_protections() guards against !PRESENT, so no
922 * extra conditional required here.
923 */
924 chk_prot = static_protections(old_prot, lpaddr, old_pfn, numpages,
925 psize, CPA_CONFLICT);
926
927 if (WARN_ON_ONCE(pgprot_val(chk_prot) != pgprot_val(old_prot))) {
928 /*
929 * Split the large page and tell the split code to
930 * enforce static protections.
931 */
932 cpa->force_static_prot = 1;
933 return 1;
934 }
935
936 /*
937 * Optimization: If the requested pgprot is the same as the current
938 * pgprot, then the large page can be preserved and no updates are
939 * required independent of alignment and length of the requested
940 * range. The above already established that the current pgprot is
941 * correct, which in consequence makes the requested pgprot correct
942 * as well if it is the same. The static protection scan below will
943 * not come to a different conclusion.
944 */
945 if (pgprot_val(req_prot) == pgprot_val(old_prot)) {
946 cpa_inc_lp_sameprot(level);
947 return 0;
948 }
949
950 /*
951 * If the requested range does not cover the full page, split it up
952 */
953 if (address != lpaddr || cpa->numpages != numpages)
954 return 1;
955
956 /*
957 * Check whether the requested pgprot is conflicting with a static
958 * protection requirement in the large page.
959 */
960 new_prot = static_protections(req_prot, lpaddr, old_pfn, numpages,
961 psize, CPA_DETECT);
962
963 new_prot = verify_rwx(old_prot, new_prot, lpaddr, old_pfn, numpages);
964
965 /*
966 * If there is a conflict, split the large page.
967 *
968 * There used to be a 4k wise evaluation trying really hard to
969 * preserve the large pages, but experimentation has shown, that this
970 * does not help at all. There might be corner cases which would
971 * preserve one large page occasionally, but it's really not worth the
972 * extra code and cycles for the common case.
973 */
974 if (pgprot_val(req_prot) != pgprot_val(new_prot))
975 return 1;
976
977 /* All checks passed. Update the large page mapping. */
978 new_pte = pfn_pte(old_pfn, new_prot);
979 __set_pmd_pte(kpte, address, new_pte);
980 cpa->flags |= CPA_FLUSHTLB;
981 cpa_inc_lp_preserved(level);
982 return 0;
983}
984
985static int should_split_large_page(pte_t *kpte, unsigned long address,
986 struct cpa_data *cpa)
987{
988 int do_split;
989
990 if (cpa->force_split)
991 return 1;
992
993 spin_lock(&pgd_lock);
994 do_split = __should_split_large_page(kpte, address, cpa);
995 spin_unlock(&pgd_lock);
996
997 return do_split;
998}
999
1000static void split_set_pte(struct cpa_data *cpa, pte_t *pte, unsigned long pfn,
1001 pgprot_t ref_prot, unsigned long address,
1002 unsigned long size)
1003{
1004 unsigned int npg = PFN_DOWN(size);
1005 pgprot_t prot;
1006
1007 /*
1008 * If should_split_large_page() discovered an inconsistent mapping,
1009 * remove the invalid protection in the split mapping.
1010 */
1011 if (!cpa->force_static_prot)
1012 goto set;
1013
1014 /* Hand in lpsize = 0 to enforce the protection mechanism */
1015 prot = static_protections(ref_prot, address, pfn, npg, 0, CPA_PROTECT);
1016
1017 if (pgprot_val(prot) == pgprot_val(ref_prot))
1018 goto set;
1019
1020 /*
1021 * If this is splitting a PMD, fix it up. PUD splits cannot be
1022 * fixed trivially as that would require to rescan the newly
1023 * installed PMD mappings after returning from split_large_page()
1024 * so an eventual further split can allocate the necessary PTE
1025 * pages. Warn for now and revisit it in case this actually
1026 * happens.
1027 */
1028 if (size == PAGE_SIZE)
1029 ref_prot = prot;
1030 else
1031 pr_warn_once("CPA: Cannot fixup static protections for PUD split\n");
1032set:
1033 set_pte(pte, pfn_pte(pfn, ref_prot));
1034}
1035
1036static int
1037__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
1038 struct page *base)
1039{
1040 unsigned long lpaddr, lpinc, ref_pfn, pfn, pfninc = 1;
1041 pte_t *pbase = (pte_t *)page_address(base);
1042 unsigned int i, level;
1043 pgprot_t ref_prot;
1044 pte_t *tmp;
1045
1046 spin_lock(&pgd_lock);
1047 /*
1048 * Check for races, another CPU might have split this page
1049 * up for us already:
1050 */
1051 tmp = _lookup_address_cpa(cpa, address, &level);
1052 if (tmp != kpte) {
1053 spin_unlock(&pgd_lock);
1054 return 1;
1055 }
1056
1057 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
1058
1059 switch (level) {
1060 case PG_LEVEL_2M:
1061 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
1062 /*
1063 * Clear PSE (aka _PAGE_PAT) and move
1064 * PAT bit to correct position.
1065 */
1066 ref_prot = pgprot_large_2_4k(ref_prot);
1067 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
1068 lpaddr = address & PMD_MASK;
1069 lpinc = PAGE_SIZE;
1070 break;
1071
1072 case PG_LEVEL_1G:
1073 ref_prot = pud_pgprot(*(pud_t *)kpte);
1074 ref_pfn = pud_pfn(*(pud_t *)kpte);
1075 pfninc = PMD_SIZE >> PAGE_SHIFT;
1076 lpaddr = address & PUD_MASK;
1077 lpinc = PMD_SIZE;
1078 /*
1079 * Clear the PSE flags if the PRESENT flag is not set
1080 * otherwise pmd_present/pmd_huge will return true
1081 * even on a non present pmd.
1082 */
1083 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
1084 pgprot_val(ref_prot) &= ~_PAGE_PSE;
1085 break;
1086
1087 default:
1088 spin_unlock(&pgd_lock);
1089 return 1;
1090 }
1091
1092 ref_prot = pgprot_clear_protnone_bits(ref_prot);
1093
1094 /*
1095 * Get the target pfn from the original entry:
1096 */
1097 pfn = ref_pfn;
1098 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc, lpaddr += lpinc)
1099 split_set_pte(cpa, pbase + i, pfn, ref_prot, lpaddr, lpinc);
1100
1101 if (virt_addr_valid(address)) {
1102 unsigned long pfn = PFN_DOWN(__pa(address));
1103
1104 if (pfn_range_is_mapped(pfn, pfn + 1))
1105 split_page_count(level);
1106 }
1107
1108 /*
1109 * Install the new, split up pagetable.
1110 *
1111 * We use the standard kernel pagetable protections for the new
1112 * pagetable protections, the actual ptes set above control the
1113 * primary protection behavior:
1114 */
1115 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
1116
1117 /*
1118 * Do a global flush tlb after splitting the large page
1119 * and before we do the actual change page attribute in the PTE.
1120 *
1121 * Without this, we violate the TLB application note, that says:
1122 * "The TLBs may contain both ordinary and large-page
1123 * translations for a 4-KByte range of linear addresses. This
1124 * may occur if software modifies the paging structures so that
1125 * the page size used for the address range changes. If the two
1126 * translations differ with respect to page frame or attributes
1127 * (e.g., permissions), processor behavior is undefined and may
1128 * be implementation-specific."
1129 *
1130 * We do this global tlb flush inside the cpa_lock, so that we
1131 * don't allow any other cpu, with stale tlb entries change the
1132 * page attribute in parallel, that also falls into the
1133 * just split large page entry.
1134 */
1135 flush_tlb_all();
1136 spin_unlock(&pgd_lock);
1137
1138 return 0;
1139}
1140
1141static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
1142 unsigned long address)
1143{
1144 struct page *base;
1145
1146 if (!debug_pagealloc_enabled())
1147 spin_unlock(&cpa_lock);
1148 base = alloc_pages(GFP_KERNEL, 0);
1149 if (!debug_pagealloc_enabled())
1150 spin_lock(&cpa_lock);
1151 if (!base)
1152 return -ENOMEM;
1153
1154 if (__split_large_page(cpa, kpte, address, base))
1155 __free_page(base);
1156
1157 return 0;
1158}
1159
1160static bool try_to_free_pte_page(pte_t *pte)
1161{
1162 int i;
1163
1164 for (i = 0; i < PTRS_PER_PTE; i++)
1165 if (!pte_none(pte[i]))
1166 return false;
1167
1168 free_page((unsigned long)pte);
1169 return true;
1170}
1171
1172static bool try_to_free_pmd_page(pmd_t *pmd)
1173{
1174 int i;
1175
1176 for (i = 0; i < PTRS_PER_PMD; i++)
1177 if (!pmd_none(pmd[i]))
1178 return false;
1179
1180 free_page((unsigned long)pmd);
1181 return true;
1182}
1183
1184static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
1185{
1186 pte_t *pte = pte_offset_kernel(pmd, start);
1187
1188 while (start < end) {
1189 set_pte(pte, __pte(0));
1190
1191 start += PAGE_SIZE;
1192 pte++;
1193 }
1194
1195 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
1196 pmd_clear(pmd);
1197 return true;
1198 }
1199 return false;
1200}
1201
1202static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
1203 unsigned long start, unsigned long end)
1204{
1205 if (unmap_pte_range(pmd, start, end))
1206 if (try_to_free_pmd_page(pud_pgtable(*pud)))
1207 pud_clear(pud);
1208}
1209
1210static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
1211{
1212 pmd_t *pmd = pmd_offset(pud, start);
1213
1214 /*
1215 * Not on a 2MB page boundary?
1216 */
1217 if (start & (PMD_SIZE - 1)) {
1218 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1219 unsigned long pre_end = min_t(unsigned long, end, next_page);
1220
1221 __unmap_pmd_range(pud, pmd, start, pre_end);
1222
1223 start = pre_end;
1224 pmd++;
1225 }
1226
1227 /*
1228 * Try to unmap in 2M chunks.
1229 */
1230 while (end - start >= PMD_SIZE) {
1231 if (pmd_large(*pmd))
1232 pmd_clear(pmd);
1233 else
1234 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
1235
1236 start += PMD_SIZE;
1237 pmd++;
1238 }
1239
1240 /*
1241 * 4K leftovers?
1242 */
1243 if (start < end)
1244 return __unmap_pmd_range(pud, pmd, start, end);
1245
1246 /*
1247 * Try again to free the PMD page if haven't succeeded above.
1248 */
1249 if (!pud_none(*pud))
1250 if (try_to_free_pmd_page(pud_pgtable(*pud)))
1251 pud_clear(pud);
1252}
1253
1254static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
1255{
1256 pud_t *pud = pud_offset(p4d, start);
1257
1258 /*
1259 * Not on a GB page boundary?
1260 */
1261 if (start & (PUD_SIZE - 1)) {
1262 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1263 unsigned long pre_end = min_t(unsigned long, end, next_page);
1264
1265 unmap_pmd_range(pud, start, pre_end);
1266
1267 start = pre_end;
1268 pud++;
1269 }
1270
1271 /*
1272 * Try to unmap in 1G chunks?
1273 */
1274 while (end - start >= PUD_SIZE) {
1275
1276 if (pud_large(*pud))
1277 pud_clear(pud);
1278 else
1279 unmap_pmd_range(pud, start, start + PUD_SIZE);
1280
1281 start += PUD_SIZE;
1282 pud++;
1283 }
1284
1285 /*
1286 * 2M leftovers?
1287 */
1288 if (start < end)
1289 unmap_pmd_range(pud, start, end);
1290
1291 /*
1292 * No need to try to free the PUD page because we'll free it in
1293 * populate_pgd's error path
1294 */
1295}
1296
1297static int alloc_pte_page(pmd_t *pmd)
1298{
1299 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
1300 if (!pte)
1301 return -1;
1302
1303 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
1304 return 0;
1305}
1306
1307static int alloc_pmd_page(pud_t *pud)
1308{
1309 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
1310 if (!pmd)
1311 return -1;
1312
1313 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
1314 return 0;
1315}
1316
1317static void populate_pte(struct cpa_data *cpa,
1318 unsigned long start, unsigned long end,
1319 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
1320{
1321 pte_t *pte;
1322
1323 pte = pte_offset_kernel(pmd, start);
1324
1325 pgprot = pgprot_clear_protnone_bits(pgprot);
1326
1327 while (num_pages-- && start < end) {
1328 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
1329
1330 start += PAGE_SIZE;
1331 cpa->pfn++;
1332 pte++;
1333 }
1334}
1335
1336static long populate_pmd(struct cpa_data *cpa,
1337 unsigned long start, unsigned long end,
1338 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
1339{
1340 long cur_pages = 0;
1341 pmd_t *pmd;
1342 pgprot_t pmd_pgprot;
1343
1344 /*
1345 * Not on a 2M boundary?
1346 */
1347 if (start & (PMD_SIZE - 1)) {
1348 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
1349 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1350
1351 pre_end = min_t(unsigned long, pre_end, next_page);
1352 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1353 cur_pages = min_t(unsigned int, num_pages, cur_pages);
1354
1355 /*
1356 * Need a PTE page?
1357 */
1358 pmd = pmd_offset(pud, start);
1359 if (pmd_none(*pmd))
1360 if (alloc_pte_page(pmd))
1361 return -1;
1362
1363 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
1364
1365 start = pre_end;
1366 }
1367
1368 /*
1369 * We mapped them all?
1370 */
1371 if (num_pages == cur_pages)
1372 return cur_pages;
1373
1374 pmd_pgprot = pgprot_4k_2_large(pgprot);
1375
1376 while (end - start >= PMD_SIZE) {
1377
1378 /*
1379 * We cannot use a 1G page so allocate a PMD page if needed.
1380 */
1381 if (pud_none(*pud))
1382 if (alloc_pmd_page(pud))
1383 return -1;
1384
1385 pmd = pmd_offset(pud, start);
1386
1387 set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
1388 canon_pgprot(pmd_pgprot))));
1389
1390 start += PMD_SIZE;
1391 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
1392 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1393 }
1394
1395 /*
1396 * Map trailing 4K pages.
1397 */
1398 if (start < end) {
1399 pmd = pmd_offset(pud, start);
1400 if (pmd_none(*pmd))
1401 if (alloc_pte_page(pmd))
1402 return -1;
1403
1404 populate_pte(cpa, start, end, num_pages - cur_pages,
1405 pmd, pgprot);
1406 }
1407 return num_pages;
1408}
1409
1410static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1411 pgprot_t pgprot)
1412{
1413 pud_t *pud;
1414 unsigned long end;
1415 long cur_pages = 0;
1416 pgprot_t pud_pgprot;
1417
1418 end = start + (cpa->numpages << PAGE_SHIFT);
1419
1420 /*
1421 * Not on a Gb page boundary? => map everything up to it with
1422 * smaller pages.
1423 */
1424 if (start & (PUD_SIZE - 1)) {
1425 unsigned long pre_end;
1426 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1427
1428 pre_end = min_t(unsigned long, end, next_page);
1429 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1430 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1431
1432 pud = pud_offset(p4d, start);
1433
1434 /*
1435 * Need a PMD page?
1436 */
1437 if (pud_none(*pud))
1438 if (alloc_pmd_page(pud))
1439 return -1;
1440
1441 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1442 pud, pgprot);
1443 if (cur_pages < 0)
1444 return cur_pages;
1445
1446 start = pre_end;
1447 }
1448
1449 /* We mapped them all? */
1450 if (cpa->numpages == cur_pages)
1451 return cur_pages;
1452
1453 pud = pud_offset(p4d, start);
1454 pud_pgprot = pgprot_4k_2_large(pgprot);
1455
1456 /*
1457 * Map everything starting from the Gb boundary, possibly with 1G pages
1458 */
1459 while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1460 set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn,
1461 canon_pgprot(pud_pgprot))));
1462
1463 start += PUD_SIZE;
1464 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1465 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1466 pud++;
1467 }
1468
1469 /* Map trailing leftover */
1470 if (start < end) {
1471 long tmp;
1472
1473 pud = pud_offset(p4d, start);
1474 if (pud_none(*pud))
1475 if (alloc_pmd_page(pud))
1476 return -1;
1477
1478 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1479 pud, pgprot);
1480 if (tmp < 0)
1481 return cur_pages;
1482
1483 cur_pages += tmp;
1484 }
1485 return cur_pages;
1486}
1487
1488/*
1489 * Restrictions for kernel page table do not necessarily apply when mapping in
1490 * an alternate PGD.
1491 */
1492static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1493{
1494 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1495 pud_t *pud = NULL; /* shut up gcc */
1496 p4d_t *p4d;
1497 pgd_t *pgd_entry;
1498 long ret;
1499
1500 pgd_entry = cpa->pgd + pgd_index(addr);
1501
1502 if (pgd_none(*pgd_entry)) {
1503 p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
1504 if (!p4d)
1505 return -1;
1506
1507 set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1508 }
1509
1510 /*
1511 * Allocate a PUD page and hand it down for mapping.
1512 */
1513 p4d = p4d_offset(pgd_entry, addr);
1514 if (p4d_none(*p4d)) {
1515 pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
1516 if (!pud)
1517 return -1;
1518
1519 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1520 }
1521
1522 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1523 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1524
1525 ret = populate_pud(cpa, addr, p4d, pgprot);
1526 if (ret < 0) {
1527 /*
1528 * Leave the PUD page in place in case some other CPU or thread
1529 * already found it, but remove any useless entries we just
1530 * added to it.
1531 */
1532 unmap_pud_range(p4d, addr,
1533 addr + (cpa->numpages << PAGE_SHIFT));
1534 return ret;
1535 }
1536
1537 cpa->numpages = ret;
1538 return 0;
1539}
1540
1541static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1542 int primary)
1543{
1544 if (cpa->pgd) {
1545 /*
1546 * Right now, we only execute this code path when mapping
1547 * the EFI virtual memory map regions, no other users
1548 * provide a ->pgd value. This may change in the future.
1549 */
1550 return populate_pgd(cpa, vaddr);
1551 }
1552
1553 /*
1554 * Ignore all non primary paths.
1555 */
1556 if (!primary) {
1557 cpa->numpages = 1;
1558 return 0;
1559 }
1560
1561 /*
1562 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1563 * to have holes.
1564 * Also set numpages to '1' indicating that we processed cpa req for
1565 * one virtual address page and its pfn. TBD: numpages can be set based
1566 * on the initial value and the level returned by lookup_address().
1567 */
1568 if (within(vaddr, PAGE_OFFSET,
1569 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1570 cpa->numpages = 1;
1571 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1572 return 0;
1573
1574 } else if (__cpa_pfn_in_highmap(cpa->pfn)) {
1575 /* Faults in the highmap are OK, so do not warn: */
1576 return -EFAULT;
1577 } else {
1578 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1579 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1580 *cpa->vaddr);
1581
1582 return -EFAULT;
1583 }
1584}
1585
1586static int __change_page_attr(struct cpa_data *cpa, int primary)
1587{
1588 unsigned long address;
1589 int do_split, err;
1590 unsigned int level;
1591 pte_t *kpte, old_pte;
1592
1593 address = __cpa_addr(cpa, cpa->curpage);
1594repeat:
1595 kpte = _lookup_address_cpa(cpa, address, &level);
1596 if (!kpte)
1597 return __cpa_process_fault(cpa, address, primary);
1598
1599 old_pte = *kpte;
1600 if (pte_none(old_pte))
1601 return __cpa_process_fault(cpa, address, primary);
1602
1603 if (level == PG_LEVEL_4K) {
1604 pte_t new_pte;
1605 pgprot_t old_prot = pte_pgprot(old_pte);
1606 pgprot_t new_prot = pte_pgprot(old_pte);
1607 unsigned long pfn = pte_pfn(old_pte);
1608
1609 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1610 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1611
1612 cpa_inc_4k_install();
1613 /* Hand in lpsize = 0 to enforce the protection mechanism */
1614 new_prot = static_protections(new_prot, address, pfn, 1, 0,
1615 CPA_PROTECT);
1616
1617 new_prot = verify_rwx(old_prot, new_prot, address, pfn, 1);
1618
1619 new_prot = pgprot_clear_protnone_bits(new_prot);
1620
1621 /*
1622 * We need to keep the pfn from the existing PTE,
1623 * after all we're only going to change it's attributes
1624 * not the memory it points to
1625 */
1626 new_pte = pfn_pte(pfn, new_prot);
1627 cpa->pfn = pfn;
1628 /*
1629 * Do we really change anything ?
1630 */
1631 if (pte_val(old_pte) != pte_val(new_pte)) {
1632 set_pte_atomic(kpte, new_pte);
1633 cpa->flags |= CPA_FLUSHTLB;
1634 }
1635 cpa->numpages = 1;
1636 return 0;
1637 }
1638
1639 /*
1640 * Check, whether we can keep the large page intact
1641 * and just change the pte:
1642 */
1643 do_split = should_split_large_page(kpte, address, cpa);
1644 /*
1645 * When the range fits into the existing large page,
1646 * return. cp->numpages and cpa->tlbflush have been updated in
1647 * try_large_page:
1648 */
1649 if (do_split <= 0)
1650 return do_split;
1651
1652 /*
1653 * We have to split the large page:
1654 */
1655 err = split_large_page(cpa, kpte, address);
1656 if (!err)
1657 goto repeat;
1658
1659 return err;
1660}
1661
1662static int __change_page_attr_set_clr(struct cpa_data *cpa, int primary);
1663
1664/*
1665 * Check the directmap and "high kernel map" 'aliases'.
1666 */
1667static int cpa_process_alias(struct cpa_data *cpa)
1668{
1669 struct cpa_data alias_cpa;
1670 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1671 unsigned long vaddr;
1672 int ret;
1673
1674 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1675 return 0;
1676
1677 /*
1678 * No need to redo, when the primary call touched the direct
1679 * mapping already:
1680 */
1681 vaddr = __cpa_addr(cpa, cpa->curpage);
1682 if (!(within(vaddr, PAGE_OFFSET,
1683 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1684
1685 alias_cpa = *cpa;
1686 alias_cpa.vaddr = &laddr;
1687 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1688 alias_cpa.curpage = 0;
1689
1690 /* Directmap always has NX set, do not modify. */
1691 if (__supported_pte_mask & _PAGE_NX) {
1692 alias_cpa.mask_clr.pgprot &= ~_PAGE_NX;
1693 alias_cpa.mask_set.pgprot &= ~_PAGE_NX;
1694 }
1695
1696 cpa->force_flush_all = 1;
1697
1698 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1699 if (ret)
1700 return ret;
1701 }
1702
1703#ifdef CONFIG_X86_64
1704 /*
1705 * If the primary call didn't touch the high mapping already
1706 * and the physical address is inside the kernel map, we need
1707 * to touch the high mapped kernel as well:
1708 */
1709 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1710 __cpa_pfn_in_highmap(cpa->pfn)) {
1711 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1712 __START_KERNEL_map - phys_base;
1713 alias_cpa = *cpa;
1714 alias_cpa.vaddr = &temp_cpa_vaddr;
1715 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1716 alias_cpa.curpage = 0;
1717
1718 /*
1719 * [_text, _brk_end) also covers data, do not modify NX except
1720 * in cases where the highmap is the primary target.
1721 */
1722 if (__supported_pte_mask & _PAGE_NX) {
1723 alias_cpa.mask_clr.pgprot &= ~_PAGE_NX;
1724 alias_cpa.mask_set.pgprot &= ~_PAGE_NX;
1725 }
1726
1727 cpa->force_flush_all = 1;
1728 /*
1729 * The high mapping range is imprecise, so ignore the
1730 * return value.
1731 */
1732 __change_page_attr_set_clr(&alias_cpa, 0);
1733 }
1734#endif
1735
1736 return 0;
1737}
1738
1739static int __change_page_attr_set_clr(struct cpa_data *cpa, int primary)
1740{
1741 unsigned long numpages = cpa->numpages;
1742 unsigned long rempages = numpages;
1743 int ret = 0;
1744
1745 /*
1746 * No changes, easy!
1747 */
1748 if (!(pgprot_val(cpa->mask_set) | pgprot_val(cpa->mask_clr)) &&
1749 !cpa->force_split)
1750 return ret;
1751
1752 while (rempages) {
1753 /*
1754 * Store the remaining nr of pages for the large page
1755 * preservation check.
1756 */
1757 cpa->numpages = rempages;
1758 /* for array changes, we can't use large page */
1759 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1760 cpa->numpages = 1;
1761
1762 if (!debug_pagealloc_enabled())
1763 spin_lock(&cpa_lock);
1764 ret = __change_page_attr(cpa, primary);
1765 if (!debug_pagealloc_enabled())
1766 spin_unlock(&cpa_lock);
1767 if (ret)
1768 goto out;
1769
1770 if (primary && !(cpa->flags & CPA_NO_CHECK_ALIAS)) {
1771 ret = cpa_process_alias(cpa);
1772 if (ret)
1773 goto out;
1774 }
1775
1776 /*
1777 * Adjust the number of pages with the result of the
1778 * CPA operation. Either a large page has been
1779 * preserved or a single page update happened.
1780 */
1781 BUG_ON(cpa->numpages > rempages || !cpa->numpages);
1782 rempages -= cpa->numpages;
1783 cpa->curpage += cpa->numpages;
1784 }
1785
1786out:
1787 /* Restore the original numpages */
1788 cpa->numpages = numpages;
1789 return ret;
1790}
1791
1792static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1793 pgprot_t mask_set, pgprot_t mask_clr,
1794 int force_split, int in_flag,
1795 struct page **pages)
1796{
1797 struct cpa_data cpa;
1798 int ret, cache;
1799
1800 memset(&cpa, 0, sizeof(cpa));
1801
1802 /*
1803 * Check, if we are requested to set a not supported
1804 * feature. Clearing non-supported features is OK.
1805 */
1806 mask_set = canon_pgprot(mask_set);
1807
1808 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1809 return 0;
1810
1811 /* Ensure we are PAGE_SIZE aligned */
1812 if (in_flag & CPA_ARRAY) {
1813 int i;
1814 for (i = 0; i < numpages; i++) {
1815 if (addr[i] & ~PAGE_MASK) {
1816 addr[i] &= PAGE_MASK;
1817 WARN_ON_ONCE(1);
1818 }
1819 }
1820 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1821 /*
1822 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1823 * No need to check in that case
1824 */
1825 if (*addr & ~PAGE_MASK) {
1826 *addr &= PAGE_MASK;
1827 /*
1828 * People should not be passing in unaligned addresses:
1829 */
1830 WARN_ON_ONCE(1);
1831 }
1832 }
1833
1834 /* Must avoid aliasing mappings in the highmem code */
1835 kmap_flush_unused();
1836
1837 vm_unmap_aliases();
1838
1839 cpa.vaddr = addr;
1840 cpa.pages = pages;
1841 cpa.numpages = numpages;
1842 cpa.mask_set = mask_set;
1843 cpa.mask_clr = mask_clr;
1844 cpa.flags = in_flag;
1845 cpa.curpage = 0;
1846 cpa.force_split = force_split;
1847
1848 ret = __change_page_attr_set_clr(&cpa, 1);
1849
1850 /*
1851 * Check whether we really changed something:
1852 */
1853 if (!(cpa.flags & CPA_FLUSHTLB))
1854 goto out;
1855
1856 /*
1857 * No need to flush, when we did not set any of the caching
1858 * attributes:
1859 */
1860 cache = !!pgprot2cachemode(mask_set);
1861
1862 /*
1863 * On error; flush everything to be sure.
1864 */
1865 if (ret) {
1866 cpa_flush_all(cache);
1867 goto out;
1868 }
1869
1870 cpa_flush(&cpa, cache);
1871out:
1872 return ret;
1873}
1874
1875static inline int change_page_attr_set(unsigned long *addr, int numpages,
1876 pgprot_t mask, int array)
1877{
1878 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1879 (array ? CPA_ARRAY : 0), NULL);
1880}
1881
1882static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1883 pgprot_t mask, int array)
1884{
1885 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1886 (array ? CPA_ARRAY : 0), NULL);
1887}
1888
1889static inline int cpa_set_pages_array(struct page **pages, int numpages,
1890 pgprot_t mask)
1891{
1892 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1893 CPA_PAGES_ARRAY, pages);
1894}
1895
1896static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1897 pgprot_t mask)
1898{
1899 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1900 CPA_PAGES_ARRAY, pages);
1901}
1902
1903/*
1904 * __set_memory_prot is an internal helper for callers that have been passed
1905 * a pgprot_t value from upper layers and a reservation has already been taken.
1906 * If you want to set the pgprot to a specific page protocol, use the
1907 * set_memory_xx() functions.
1908 */
1909int __set_memory_prot(unsigned long addr, int numpages, pgprot_t prot)
1910{
1911 return change_page_attr_set_clr(&addr, numpages, prot,
1912 __pgprot(~pgprot_val(prot)), 0, 0,
1913 NULL);
1914}
1915
1916int _set_memory_uc(unsigned long addr, int numpages)
1917{
1918 /*
1919 * for now UC MINUS. see comments in ioremap()
1920 * If you really need strong UC use ioremap_uc(), but note
1921 * that you cannot override IO areas with set_memory_*() as
1922 * these helpers cannot work with IO memory.
1923 */
1924 return change_page_attr_set(&addr, numpages,
1925 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1926 0);
1927}
1928
1929int set_memory_uc(unsigned long addr, int numpages)
1930{
1931 int ret;
1932
1933 /*
1934 * for now UC MINUS. see comments in ioremap()
1935 */
1936 ret = memtype_reserve(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1937 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1938 if (ret)
1939 goto out_err;
1940
1941 ret = _set_memory_uc(addr, numpages);
1942 if (ret)
1943 goto out_free;
1944
1945 return 0;
1946
1947out_free:
1948 memtype_free(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1949out_err:
1950 return ret;
1951}
1952EXPORT_SYMBOL(set_memory_uc);
1953
1954int _set_memory_wc(unsigned long addr, int numpages)
1955{
1956 int ret;
1957
1958 ret = change_page_attr_set(&addr, numpages,
1959 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1960 0);
1961 if (!ret) {
1962 ret = change_page_attr_set_clr(&addr, numpages,
1963 cachemode2pgprot(_PAGE_CACHE_MODE_WC),
1964 __pgprot(_PAGE_CACHE_MASK),
1965 0, 0, NULL);
1966 }
1967 return ret;
1968}
1969
1970int set_memory_wc(unsigned long addr, int numpages)
1971{
1972 int ret;
1973
1974 ret = memtype_reserve(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1975 _PAGE_CACHE_MODE_WC, NULL);
1976 if (ret)
1977 return ret;
1978
1979 ret = _set_memory_wc(addr, numpages);
1980 if (ret)
1981 memtype_free(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1982
1983 return ret;
1984}
1985EXPORT_SYMBOL(set_memory_wc);
1986
1987int _set_memory_wt(unsigned long addr, int numpages)
1988{
1989 return change_page_attr_set(&addr, numpages,
1990 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1991}
1992
1993int _set_memory_wb(unsigned long addr, int numpages)
1994{
1995 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1996 return change_page_attr_clear(&addr, numpages,
1997 __pgprot(_PAGE_CACHE_MASK), 0);
1998}
1999
2000int set_memory_wb(unsigned long addr, int numpages)
2001{
2002 int ret;
2003
2004 ret = _set_memory_wb(addr, numpages);
2005 if (ret)
2006 return ret;
2007
2008 memtype_free(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
2009 return 0;
2010}
2011EXPORT_SYMBOL(set_memory_wb);
2012
2013/* Prevent speculative access to a page by marking it not-present */
2014#ifdef CONFIG_X86_64
2015int set_mce_nospec(unsigned long pfn)
2016{
2017 unsigned long decoy_addr;
2018 int rc;
2019
2020 /* SGX pages are not in the 1:1 map */
2021 if (arch_is_platform_page(pfn << PAGE_SHIFT))
2022 return 0;
2023 /*
2024 * We would like to just call:
2025 * set_memory_XX((unsigned long)pfn_to_kaddr(pfn), 1);
2026 * but doing that would radically increase the odds of a
2027 * speculative access to the poison page because we'd have
2028 * the virtual address of the kernel 1:1 mapping sitting
2029 * around in registers.
2030 * Instead we get tricky. We create a non-canonical address
2031 * that looks just like the one we want, but has bit 63 flipped.
2032 * This relies on set_memory_XX() properly sanitizing any __pa()
2033 * results with __PHYSICAL_MASK or PTE_PFN_MASK.
2034 */
2035 decoy_addr = (pfn << PAGE_SHIFT) + (PAGE_OFFSET ^ BIT(63));
2036
2037 rc = set_memory_np(decoy_addr, 1);
2038 if (rc)
2039 pr_warn("Could not invalidate pfn=0x%lx from 1:1 map\n", pfn);
2040 return rc;
2041}
2042
2043static int set_memory_p(unsigned long *addr, int numpages)
2044{
2045 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_PRESENT), 0);
2046}
2047
2048/* Restore full speculative operation to the pfn. */
2049int clear_mce_nospec(unsigned long pfn)
2050{
2051 unsigned long addr = (unsigned long) pfn_to_kaddr(pfn);
2052
2053 return set_memory_p(&addr, 1);
2054}
2055EXPORT_SYMBOL_GPL(clear_mce_nospec);
2056#endif /* CONFIG_X86_64 */
2057
2058int set_memory_x(unsigned long addr, int numpages)
2059{
2060 if (!(__supported_pte_mask & _PAGE_NX))
2061 return 0;
2062
2063 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
2064}
2065
2066int set_memory_nx(unsigned long addr, int numpages)
2067{
2068 if (!(__supported_pte_mask & _PAGE_NX))
2069 return 0;
2070
2071 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
2072}
2073
2074int set_memory_ro(unsigned long addr, int numpages)
2075{
2076 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
2077}
2078
2079int set_memory_rox(unsigned long addr, int numpages)
2080{
2081 pgprot_t clr = __pgprot(_PAGE_RW);
2082
2083 if (__supported_pte_mask & _PAGE_NX)
2084 clr.pgprot |= _PAGE_NX;
2085
2086 return change_page_attr_clear(&addr, numpages, clr, 0);
2087}
2088
2089int set_memory_rw(unsigned long addr, int numpages)
2090{
2091 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
2092}
2093
2094int set_memory_np(unsigned long addr, int numpages)
2095{
2096 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
2097}
2098
2099int set_memory_np_noalias(unsigned long addr, int numpages)
2100{
2101 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
2102 __pgprot(_PAGE_PRESENT), 0,
2103 CPA_NO_CHECK_ALIAS, NULL);
2104}
2105
2106int set_memory_4k(unsigned long addr, int numpages)
2107{
2108 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
2109 __pgprot(0), 1, 0, NULL);
2110}
2111
2112int set_memory_nonglobal(unsigned long addr, int numpages)
2113{
2114 return change_page_attr_clear(&addr, numpages,
2115 __pgprot(_PAGE_GLOBAL), 0);
2116}
2117
2118int set_memory_global(unsigned long addr, int numpages)
2119{
2120 return change_page_attr_set(&addr, numpages,
2121 __pgprot(_PAGE_GLOBAL), 0);
2122}
2123
2124/*
2125 * __set_memory_enc_pgtable() is used for the hypervisors that get
2126 * informed about "encryption" status via page tables.
2127 */
2128static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
2129{
2130 pgprot_t empty = __pgprot(0);
2131 struct cpa_data cpa;
2132 int ret;
2133
2134 /* Should not be working on unaligned addresses */
2135 if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr))
2136 addr &= PAGE_MASK;
2137
2138 memset(&cpa, 0, sizeof(cpa));
2139 cpa.vaddr = &addr;
2140 cpa.numpages = numpages;
2141 cpa.mask_set = enc ? pgprot_encrypted(empty) : pgprot_decrypted(empty);
2142 cpa.mask_clr = enc ? pgprot_decrypted(empty) : pgprot_encrypted(empty);
2143 cpa.pgd = init_mm.pgd;
2144
2145 /* Must avoid aliasing mappings in the highmem code */
2146 kmap_flush_unused();
2147 vm_unmap_aliases();
2148
2149 /* Flush the caches as needed before changing the encryption attribute. */
2150 if (x86_platform.guest.enc_tlb_flush_required(enc))
2151 cpa_flush(&cpa, x86_platform.guest.enc_cache_flush_required());
2152
2153 /* Notify hypervisor that we are about to set/clr encryption attribute. */
2154 x86_platform.guest.enc_status_change_prepare(addr, numpages, enc);
2155
2156 ret = __change_page_attr_set_clr(&cpa, 1);
2157
2158 /*
2159 * After changing the encryption attribute, we need to flush TLBs again
2160 * in case any speculative TLB caching occurred (but no need to flush
2161 * caches again). We could just use cpa_flush_all(), but in case TLB
2162 * flushing gets optimized in the cpa_flush() path use the same logic
2163 * as above.
2164 */
2165 cpa_flush(&cpa, 0);
2166
2167 /* Notify hypervisor that we have successfully set/clr encryption attribute. */
2168 if (!ret) {
2169 if (!x86_platform.guest.enc_status_change_finish(addr, numpages, enc))
2170 ret = -EIO;
2171 }
2172
2173 return ret;
2174}
2175
2176static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
2177{
2178 if (hv_is_isolation_supported())
2179 return hv_set_mem_host_visibility(addr, numpages, !enc);
2180
2181 if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
2182 return __set_memory_enc_pgtable(addr, numpages, enc);
2183
2184 return 0;
2185}
2186
2187int set_memory_encrypted(unsigned long addr, int numpages)
2188{
2189 return __set_memory_enc_dec(addr, numpages, true);
2190}
2191EXPORT_SYMBOL_GPL(set_memory_encrypted);
2192
2193int set_memory_decrypted(unsigned long addr, int numpages)
2194{
2195 return __set_memory_enc_dec(addr, numpages, false);
2196}
2197EXPORT_SYMBOL_GPL(set_memory_decrypted);
2198
2199int set_pages_uc(struct page *page, int numpages)
2200{
2201 unsigned long addr = (unsigned long)page_address(page);
2202
2203 return set_memory_uc(addr, numpages);
2204}
2205EXPORT_SYMBOL(set_pages_uc);
2206
2207static int _set_pages_array(struct page **pages, int numpages,
2208 enum page_cache_mode new_type)
2209{
2210 unsigned long start;
2211 unsigned long end;
2212 enum page_cache_mode set_type;
2213 int i;
2214 int free_idx;
2215 int ret;
2216
2217 for (i = 0; i < numpages; i++) {
2218 if (PageHighMem(pages[i]))
2219 continue;
2220 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2221 end = start + PAGE_SIZE;
2222 if (memtype_reserve(start, end, new_type, NULL))
2223 goto err_out;
2224 }
2225
2226 /* If WC, set to UC- first and then WC */
2227 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
2228 _PAGE_CACHE_MODE_UC_MINUS : new_type;
2229
2230 ret = cpa_set_pages_array(pages, numpages,
2231 cachemode2pgprot(set_type));
2232 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
2233 ret = change_page_attr_set_clr(NULL, numpages,
2234 cachemode2pgprot(
2235 _PAGE_CACHE_MODE_WC),
2236 __pgprot(_PAGE_CACHE_MASK),
2237 0, CPA_PAGES_ARRAY, pages);
2238 if (ret)
2239 goto err_out;
2240 return 0; /* Success */
2241err_out:
2242 free_idx = i;
2243 for (i = 0; i < free_idx; i++) {
2244 if (PageHighMem(pages[i]))
2245 continue;
2246 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2247 end = start + PAGE_SIZE;
2248 memtype_free(start, end);
2249 }
2250 return -EINVAL;
2251}
2252
2253int set_pages_array_uc(struct page **pages, int numpages)
2254{
2255 return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_UC_MINUS);
2256}
2257EXPORT_SYMBOL(set_pages_array_uc);
2258
2259int set_pages_array_wc(struct page **pages, int numpages)
2260{
2261 return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_WC);
2262}
2263EXPORT_SYMBOL(set_pages_array_wc);
2264
2265int set_pages_wb(struct page *page, int numpages)
2266{
2267 unsigned long addr = (unsigned long)page_address(page);
2268
2269 return set_memory_wb(addr, numpages);
2270}
2271EXPORT_SYMBOL(set_pages_wb);
2272
2273int set_pages_array_wb(struct page **pages, int numpages)
2274{
2275 int retval;
2276 unsigned long start;
2277 unsigned long end;
2278 int i;
2279
2280 /* WB cache mode is hard wired to all cache attribute bits being 0 */
2281 retval = cpa_clear_pages_array(pages, numpages,
2282 __pgprot(_PAGE_CACHE_MASK));
2283 if (retval)
2284 return retval;
2285
2286 for (i = 0; i < numpages; i++) {
2287 if (PageHighMem(pages[i]))
2288 continue;
2289 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2290 end = start + PAGE_SIZE;
2291 memtype_free(start, end);
2292 }
2293
2294 return 0;
2295}
2296EXPORT_SYMBOL(set_pages_array_wb);
2297
2298int set_pages_ro(struct page *page, int numpages)
2299{
2300 unsigned long addr = (unsigned long)page_address(page);
2301
2302 return set_memory_ro(addr, numpages);
2303}
2304
2305int set_pages_rw(struct page *page, int numpages)
2306{
2307 unsigned long addr = (unsigned long)page_address(page);
2308
2309 return set_memory_rw(addr, numpages);
2310}
2311
2312static int __set_pages_p(struct page *page, int numpages)
2313{
2314 unsigned long tempaddr = (unsigned long) page_address(page);
2315 struct cpa_data cpa = { .vaddr = &tempaddr,
2316 .pgd = NULL,
2317 .numpages = numpages,
2318 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2319 .mask_clr = __pgprot(0),
2320 .flags = CPA_NO_CHECK_ALIAS };
2321
2322 /*
2323 * No alias checking needed for setting present flag. otherwise,
2324 * we may need to break large pages for 64-bit kernel text
2325 * mappings (this adds to complexity if we want to do this from
2326 * atomic context especially). Let's keep it simple!
2327 */
2328 return __change_page_attr_set_clr(&cpa, 1);
2329}
2330
2331static int __set_pages_np(struct page *page, int numpages)
2332{
2333 unsigned long tempaddr = (unsigned long) page_address(page);
2334 struct cpa_data cpa = { .vaddr = &tempaddr,
2335 .pgd = NULL,
2336 .numpages = numpages,
2337 .mask_set = __pgprot(0),
2338 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2339 .flags = CPA_NO_CHECK_ALIAS };
2340
2341 /*
2342 * No alias checking needed for setting not present flag. otherwise,
2343 * we may need to break large pages for 64-bit kernel text
2344 * mappings (this adds to complexity if we want to do this from
2345 * atomic context especially). Let's keep it simple!
2346 */
2347 return __change_page_attr_set_clr(&cpa, 1);
2348}
2349
2350int set_direct_map_invalid_noflush(struct page *page)
2351{
2352 return __set_pages_np(page, 1);
2353}
2354
2355int set_direct_map_default_noflush(struct page *page)
2356{
2357 return __set_pages_p(page, 1);
2358}
2359
2360#ifdef CONFIG_DEBUG_PAGEALLOC
2361void __kernel_map_pages(struct page *page, int numpages, int enable)
2362{
2363 if (PageHighMem(page))
2364 return;
2365 if (!enable) {
2366 debug_check_no_locks_freed(page_address(page),
2367 numpages * PAGE_SIZE);
2368 }
2369
2370 /*
2371 * The return value is ignored as the calls cannot fail.
2372 * Large pages for identity mappings are not used at boot time
2373 * and hence no memory allocations during large page split.
2374 */
2375 if (enable)
2376 __set_pages_p(page, numpages);
2377 else
2378 __set_pages_np(page, numpages);
2379
2380 /*
2381 * We should perform an IPI and flush all tlbs,
2382 * but that can deadlock->flush only current cpu.
2383 * Preemption needs to be disabled around __flush_tlb_all() due to
2384 * CR3 reload in __native_flush_tlb().
2385 */
2386 preempt_disable();
2387 __flush_tlb_all();
2388 preempt_enable();
2389
2390 arch_flush_lazy_mmu_mode();
2391}
2392#endif /* CONFIG_DEBUG_PAGEALLOC */
2393
2394bool kernel_page_present(struct page *page)
2395{
2396 unsigned int level;
2397 pte_t *pte;
2398
2399 if (PageHighMem(page))
2400 return false;
2401
2402 pte = lookup_address((unsigned long)page_address(page), &level);
2403 return (pte_val(*pte) & _PAGE_PRESENT);
2404}
2405
2406int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2407 unsigned numpages, unsigned long page_flags)
2408{
2409 int retval = -EINVAL;
2410
2411 struct cpa_data cpa = {
2412 .vaddr = &address,
2413 .pfn = pfn,
2414 .pgd = pgd,
2415 .numpages = numpages,
2416 .mask_set = __pgprot(0),
2417 .mask_clr = __pgprot(~page_flags & (_PAGE_NX|_PAGE_RW)),
2418 .flags = CPA_NO_CHECK_ALIAS,
2419 };
2420
2421 WARN_ONCE(num_online_cpus() > 1, "Don't call after initializing SMP");
2422
2423 if (!(__supported_pte_mask & _PAGE_NX))
2424 goto out;
2425
2426 if (!(page_flags & _PAGE_ENC))
2427 cpa.mask_clr = pgprot_encrypted(cpa.mask_clr);
2428
2429 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2430
2431 retval = __change_page_attr_set_clr(&cpa, 1);
2432 __flush_tlb_all();
2433
2434out:
2435 return retval;
2436}
2437
2438/*
2439 * __flush_tlb_all() flushes mappings only on current CPU and hence this
2440 * function shouldn't be used in an SMP environment. Presently, it's used only
2441 * during boot (way before smp_init()) by EFI subsystem and hence is ok.
2442 */
2443int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address,
2444 unsigned long numpages)
2445{
2446 int retval;
2447
2448 /*
2449 * The typical sequence for unmapping is to find a pte through
2450 * lookup_address_in_pgd() (ideally, it should never return NULL because
2451 * the address is already mapped) and change it's protections. As pfn is
2452 * the *target* of a mapping, it's not useful while unmapping.
2453 */
2454 struct cpa_data cpa = {
2455 .vaddr = &address,
2456 .pfn = 0,
2457 .pgd = pgd,
2458 .numpages = numpages,
2459 .mask_set = __pgprot(0),
2460 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2461 .flags = CPA_NO_CHECK_ALIAS,
2462 };
2463
2464 WARN_ONCE(num_online_cpus() > 1, "Don't call after initializing SMP");
2465
2466 retval = __change_page_attr_set_clr(&cpa, 1);
2467 __flush_tlb_all();
2468
2469 return retval;
2470}
2471
2472/*
2473 * The testcases use internal knowledge of the implementation that shouldn't
2474 * be exposed to the rest of the kernel. Include these directly here.
2475 */
2476#ifdef CONFIG_CPA_DEBUG
2477#include "cpa-test.c"
2478#endif
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2002 Andi Kleen, SuSE Labs.
4 * Thanks to Ben LaHaise for precious feedback.
5 */
6#include <linux/highmem.h>
7#include <linux/memblock.h>
8#include <linux/sched.h>
9#include <linux/mm.h>
10#include <linux/interrupt.h>
11#include <linux/seq_file.h>
12#include <linux/proc_fs.h>
13#include <linux/debugfs.h>
14#include <linux/pfn.h>
15#include <linux/percpu.h>
16#include <linux/gfp.h>
17#include <linux/pci.h>
18#include <linux/vmalloc.h>
19#include <linux/libnvdimm.h>
20#include <linux/vmstat.h>
21#include <linux/kernel.h>
22#include <linux/cc_platform.h>
23#include <linux/set_memory.h>
24#include <linux/memregion.h>
25
26#include <asm/e820/api.h>
27#include <asm/processor.h>
28#include <asm/tlbflush.h>
29#include <asm/sections.h>
30#include <asm/setup.h>
31#include <linux/uaccess.h>
32#include <asm/pgalloc.h>
33#include <asm/proto.h>
34#include <asm/memtype.h>
35#include <asm/hyperv-tlfs.h>
36#include <asm/mshyperv.h>
37
38#include "../mm_internal.h"
39
40/*
41 * The current flushing context - we pass it instead of 5 arguments:
42 */
43struct cpa_data {
44 unsigned long *vaddr;
45 pgd_t *pgd;
46 pgprot_t mask_set;
47 pgprot_t mask_clr;
48 unsigned long numpages;
49 unsigned long curpage;
50 unsigned long pfn;
51 unsigned int flags;
52 unsigned int force_split : 1,
53 force_static_prot : 1,
54 force_flush_all : 1;
55 struct page **pages;
56};
57
58enum cpa_warn {
59 CPA_CONFLICT,
60 CPA_PROTECT,
61 CPA_DETECT,
62};
63
64static const int cpa_warn_level = CPA_PROTECT;
65
66/*
67 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
68 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
69 * entries change the page attribute in parallel to some other cpu
70 * splitting a large page entry along with changing the attribute.
71 */
72static DEFINE_SPINLOCK(cpa_lock);
73
74#define CPA_FLUSHTLB 1
75#define CPA_ARRAY 2
76#define CPA_PAGES_ARRAY 4
77#define CPA_NO_CHECK_ALIAS 8 /* Do not search for aliases */
78
79static inline pgprot_t cachemode2pgprot(enum page_cache_mode pcm)
80{
81 return __pgprot(cachemode2protval(pcm));
82}
83
84#ifdef CONFIG_PROC_FS
85static unsigned long direct_pages_count[PG_LEVEL_NUM];
86
87void update_page_count(int level, unsigned long pages)
88{
89 /* Protect against CPA */
90 spin_lock(&pgd_lock);
91 direct_pages_count[level] += pages;
92 spin_unlock(&pgd_lock);
93}
94
95static void split_page_count(int level)
96{
97 if (direct_pages_count[level] == 0)
98 return;
99
100 direct_pages_count[level]--;
101 if (system_state == SYSTEM_RUNNING) {
102 if (level == PG_LEVEL_2M)
103 count_vm_event(DIRECT_MAP_LEVEL2_SPLIT);
104 else if (level == PG_LEVEL_1G)
105 count_vm_event(DIRECT_MAP_LEVEL3_SPLIT);
106 }
107 direct_pages_count[level - 1] += PTRS_PER_PTE;
108}
109
110void arch_report_meminfo(struct seq_file *m)
111{
112 seq_printf(m, "DirectMap4k: %8lu kB\n",
113 direct_pages_count[PG_LEVEL_4K] << 2);
114#if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
115 seq_printf(m, "DirectMap2M: %8lu kB\n",
116 direct_pages_count[PG_LEVEL_2M] << 11);
117#else
118 seq_printf(m, "DirectMap4M: %8lu kB\n",
119 direct_pages_count[PG_LEVEL_2M] << 12);
120#endif
121 if (direct_gbpages)
122 seq_printf(m, "DirectMap1G: %8lu kB\n",
123 direct_pages_count[PG_LEVEL_1G] << 20);
124}
125#else
126static inline void split_page_count(int level) { }
127#endif
128
129#ifdef CONFIG_X86_CPA_STATISTICS
130
131static unsigned long cpa_1g_checked;
132static unsigned long cpa_1g_sameprot;
133static unsigned long cpa_1g_preserved;
134static unsigned long cpa_2m_checked;
135static unsigned long cpa_2m_sameprot;
136static unsigned long cpa_2m_preserved;
137static unsigned long cpa_4k_install;
138
139static inline void cpa_inc_1g_checked(void)
140{
141 cpa_1g_checked++;
142}
143
144static inline void cpa_inc_2m_checked(void)
145{
146 cpa_2m_checked++;
147}
148
149static inline void cpa_inc_4k_install(void)
150{
151 data_race(cpa_4k_install++);
152}
153
154static inline void cpa_inc_lp_sameprot(int level)
155{
156 if (level == PG_LEVEL_1G)
157 cpa_1g_sameprot++;
158 else
159 cpa_2m_sameprot++;
160}
161
162static inline void cpa_inc_lp_preserved(int level)
163{
164 if (level == PG_LEVEL_1G)
165 cpa_1g_preserved++;
166 else
167 cpa_2m_preserved++;
168}
169
170static int cpastats_show(struct seq_file *m, void *p)
171{
172 seq_printf(m, "1G pages checked: %16lu\n", cpa_1g_checked);
173 seq_printf(m, "1G pages sameprot: %16lu\n", cpa_1g_sameprot);
174 seq_printf(m, "1G pages preserved: %16lu\n", cpa_1g_preserved);
175 seq_printf(m, "2M pages checked: %16lu\n", cpa_2m_checked);
176 seq_printf(m, "2M pages sameprot: %16lu\n", cpa_2m_sameprot);
177 seq_printf(m, "2M pages preserved: %16lu\n", cpa_2m_preserved);
178 seq_printf(m, "4K pages set-checked: %16lu\n", cpa_4k_install);
179 return 0;
180}
181
182static int cpastats_open(struct inode *inode, struct file *file)
183{
184 return single_open(file, cpastats_show, NULL);
185}
186
187static const struct file_operations cpastats_fops = {
188 .open = cpastats_open,
189 .read = seq_read,
190 .llseek = seq_lseek,
191 .release = single_release,
192};
193
194static int __init cpa_stats_init(void)
195{
196 debugfs_create_file("cpa_stats", S_IRUSR, arch_debugfs_dir, NULL,
197 &cpastats_fops);
198 return 0;
199}
200late_initcall(cpa_stats_init);
201#else
202static inline void cpa_inc_1g_checked(void) { }
203static inline void cpa_inc_2m_checked(void) { }
204static inline void cpa_inc_4k_install(void) { }
205static inline void cpa_inc_lp_sameprot(int level) { }
206static inline void cpa_inc_lp_preserved(int level) { }
207#endif
208
209
210static inline int
211within(unsigned long addr, unsigned long start, unsigned long end)
212{
213 return addr >= start && addr < end;
214}
215
216static inline int
217within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
218{
219 return addr >= start && addr <= end;
220}
221
222#ifdef CONFIG_X86_64
223
224/*
225 * The kernel image is mapped into two places in the virtual address space
226 * (addresses without KASLR, of course):
227 *
228 * 1. The kernel direct map (0xffff880000000000)
229 * 2. The "high kernel map" (0xffffffff81000000)
230 *
231 * We actually execute out of #2. If we get the address of a kernel symbol, it
232 * points to #2, but almost all physical-to-virtual translations point to #1.
233 *
234 * This is so that we can have both a directmap of all physical memory *and*
235 * take full advantage of the limited (s32) immediate addressing range (2G)
236 * of x86_64.
237 *
238 * See Documentation/arch/x86/x86_64/mm.rst for more detail.
239 */
240
241static inline unsigned long highmap_start_pfn(void)
242{
243 return __pa_symbol(_text) >> PAGE_SHIFT;
244}
245
246static inline unsigned long highmap_end_pfn(void)
247{
248 /* Do not reference physical address outside the kernel. */
249 return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
250}
251
252static bool __cpa_pfn_in_highmap(unsigned long pfn)
253{
254 /*
255 * Kernel text has an alias mapping at a high address, known
256 * here as "highmap".
257 */
258 return within_inclusive(pfn, highmap_start_pfn(), highmap_end_pfn());
259}
260
261#else
262
263static bool __cpa_pfn_in_highmap(unsigned long pfn)
264{
265 /* There is no highmap on 32-bit */
266 return false;
267}
268
269#endif
270
271/*
272 * See set_mce_nospec().
273 *
274 * Machine check recovery code needs to change cache mode of poisoned pages to
275 * UC to avoid speculative access logging another error. But passing the
276 * address of the 1:1 mapping to set_memory_uc() is a fine way to encourage a
277 * speculative access. So we cheat and flip the top bit of the address. This
278 * works fine for the code that updates the page tables. But at the end of the
279 * process we need to flush the TLB and cache and the non-canonical address
280 * causes a #GP fault when used by the INVLPG and CLFLUSH instructions.
281 *
282 * But in the common case we already have a canonical address. This code
283 * will fix the top bit if needed and is a no-op otherwise.
284 */
285static inline unsigned long fix_addr(unsigned long addr)
286{
287#ifdef CONFIG_X86_64
288 return (long)(addr << 1) >> 1;
289#else
290 return addr;
291#endif
292}
293
294static unsigned long __cpa_addr(struct cpa_data *cpa, unsigned long idx)
295{
296 if (cpa->flags & CPA_PAGES_ARRAY) {
297 struct page *page = cpa->pages[idx];
298
299 if (unlikely(PageHighMem(page)))
300 return 0;
301
302 return (unsigned long)page_address(page);
303 }
304
305 if (cpa->flags & CPA_ARRAY)
306 return cpa->vaddr[idx];
307
308 return *cpa->vaddr + idx * PAGE_SIZE;
309}
310
311/*
312 * Flushing functions
313 */
314
315static void clflush_cache_range_opt(void *vaddr, unsigned int size)
316{
317 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
318 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
319 void *vend = vaddr + size;
320
321 if (p >= vend)
322 return;
323
324 for (; p < vend; p += clflush_size)
325 clflushopt(p);
326}
327
328/**
329 * clflush_cache_range - flush a cache range with clflush
330 * @vaddr: virtual start address
331 * @size: number of bytes to flush
332 *
333 * CLFLUSHOPT is an unordered instruction which needs fencing with MFENCE or
334 * SFENCE to avoid ordering issues.
335 */
336void clflush_cache_range(void *vaddr, unsigned int size)
337{
338 mb();
339 clflush_cache_range_opt(vaddr, size);
340 mb();
341}
342EXPORT_SYMBOL_GPL(clflush_cache_range);
343
344#ifdef CONFIG_ARCH_HAS_PMEM_API
345void arch_invalidate_pmem(void *addr, size_t size)
346{
347 clflush_cache_range(addr, size);
348}
349EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
350#endif
351
352#ifdef CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION
353bool cpu_cache_has_invalidate_memregion(void)
354{
355 return !cpu_feature_enabled(X86_FEATURE_HYPERVISOR);
356}
357EXPORT_SYMBOL_NS_GPL(cpu_cache_has_invalidate_memregion, DEVMEM);
358
359int cpu_cache_invalidate_memregion(int res_desc)
360{
361 if (WARN_ON_ONCE(!cpu_cache_has_invalidate_memregion()))
362 return -ENXIO;
363 wbinvd_on_all_cpus();
364 return 0;
365}
366EXPORT_SYMBOL_NS_GPL(cpu_cache_invalidate_memregion, DEVMEM);
367#endif
368
369static void __cpa_flush_all(void *arg)
370{
371 unsigned long cache = (unsigned long)arg;
372
373 /*
374 * Flush all to work around Errata in early athlons regarding
375 * large page flushing.
376 */
377 __flush_tlb_all();
378
379 if (cache && boot_cpu_data.x86 >= 4)
380 wbinvd();
381}
382
383static void cpa_flush_all(unsigned long cache)
384{
385 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
386
387 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
388}
389
390static void __cpa_flush_tlb(void *data)
391{
392 struct cpa_data *cpa = data;
393 unsigned int i;
394
395 for (i = 0; i < cpa->numpages; i++)
396 flush_tlb_one_kernel(fix_addr(__cpa_addr(cpa, i)));
397}
398
399static void cpa_flush(struct cpa_data *data, int cache)
400{
401 struct cpa_data *cpa = data;
402 unsigned int i;
403
404 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
405
406 if (cache && !static_cpu_has(X86_FEATURE_CLFLUSH)) {
407 cpa_flush_all(cache);
408 return;
409 }
410
411 if (cpa->force_flush_all || cpa->numpages > tlb_single_page_flush_ceiling)
412 flush_tlb_all();
413 else
414 on_each_cpu(__cpa_flush_tlb, cpa, 1);
415
416 if (!cache)
417 return;
418
419 mb();
420 for (i = 0; i < cpa->numpages; i++) {
421 unsigned long addr = __cpa_addr(cpa, i);
422 unsigned int level;
423
424 pte_t *pte = lookup_address(addr, &level);
425
426 /*
427 * Only flush present addresses:
428 */
429 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
430 clflush_cache_range_opt((void *)fix_addr(addr), PAGE_SIZE);
431 }
432 mb();
433}
434
435static bool overlaps(unsigned long r1_start, unsigned long r1_end,
436 unsigned long r2_start, unsigned long r2_end)
437{
438 return (r1_start <= r2_end && r1_end >= r2_start) ||
439 (r2_start <= r1_end && r2_end >= r1_start);
440}
441
442#ifdef CONFIG_PCI_BIOS
443/*
444 * The BIOS area between 640k and 1Mb needs to be executable for PCI BIOS
445 * based config access (CONFIG_PCI_GOBIOS) support.
446 */
447#define BIOS_PFN PFN_DOWN(BIOS_BEGIN)
448#define BIOS_PFN_END PFN_DOWN(BIOS_END - 1)
449
450static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
451{
452 if (pcibios_enabled && overlaps(spfn, epfn, BIOS_PFN, BIOS_PFN_END))
453 return _PAGE_NX;
454 return 0;
455}
456#else
457static pgprotval_t protect_pci_bios(unsigned long spfn, unsigned long epfn)
458{
459 return 0;
460}
461#endif
462
463/*
464 * The .rodata section needs to be read-only. Using the pfn catches all
465 * aliases. This also includes __ro_after_init, so do not enforce until
466 * kernel_set_to_readonly is true.
467 */
468static pgprotval_t protect_rodata(unsigned long spfn, unsigned long epfn)
469{
470 unsigned long epfn_ro, spfn_ro = PFN_DOWN(__pa_symbol(__start_rodata));
471
472 /*
473 * Note: __end_rodata is at page aligned and not inclusive, so
474 * subtract 1 to get the last enforced PFN in the rodata area.
475 */
476 epfn_ro = PFN_DOWN(__pa_symbol(__end_rodata)) - 1;
477
478 if (kernel_set_to_readonly && overlaps(spfn, epfn, spfn_ro, epfn_ro))
479 return _PAGE_RW;
480 return 0;
481}
482
483/*
484 * Protect kernel text against becoming non executable by forbidding
485 * _PAGE_NX. This protects only the high kernel mapping (_text -> _etext)
486 * out of which the kernel actually executes. Do not protect the low
487 * mapping.
488 *
489 * This does not cover __inittext since that is gone after boot.
490 */
491static pgprotval_t protect_kernel_text(unsigned long start, unsigned long end)
492{
493 unsigned long t_end = (unsigned long)_etext - 1;
494 unsigned long t_start = (unsigned long)_text;
495
496 if (overlaps(start, end, t_start, t_end))
497 return _PAGE_NX;
498 return 0;
499}
500
501#if defined(CONFIG_X86_64)
502/*
503 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
504 * kernel text mappings for the large page aligned text, rodata sections
505 * will be always read-only. For the kernel identity mappings covering the
506 * holes caused by this alignment can be anything that user asks.
507 *
508 * This will preserve the large page mappings for kernel text/data at no
509 * extra cost.
510 */
511static pgprotval_t protect_kernel_text_ro(unsigned long start,
512 unsigned long end)
513{
514 unsigned long t_end = (unsigned long)__end_rodata_hpage_align - 1;
515 unsigned long t_start = (unsigned long)_text;
516 unsigned int level;
517
518 if (!kernel_set_to_readonly || !overlaps(start, end, t_start, t_end))
519 return 0;
520 /*
521 * Don't enforce the !RW mapping for the kernel text mapping, if
522 * the current mapping is already using small page mapping. No
523 * need to work hard to preserve large page mappings in this case.
524 *
525 * This also fixes the Linux Xen paravirt guest boot failure caused
526 * by unexpected read-only mappings for kernel identity
527 * mappings. In this paravirt guest case, the kernel text mapping
528 * and the kernel identity mapping share the same page-table pages,
529 * so the protections for kernel text and identity mappings have to
530 * be the same.
531 */
532 if (lookup_address(start, &level) && (level != PG_LEVEL_4K))
533 return _PAGE_RW;
534 return 0;
535}
536#else
537static pgprotval_t protect_kernel_text_ro(unsigned long start,
538 unsigned long end)
539{
540 return 0;
541}
542#endif
543
544static inline bool conflicts(pgprot_t prot, pgprotval_t val)
545{
546 return (pgprot_val(prot) & ~val) != pgprot_val(prot);
547}
548
549static inline void check_conflict(int warnlvl, pgprot_t prot, pgprotval_t val,
550 unsigned long start, unsigned long end,
551 unsigned long pfn, const char *txt)
552{
553 static const char *lvltxt[] = {
554 [CPA_CONFLICT] = "conflict",
555 [CPA_PROTECT] = "protect",
556 [CPA_DETECT] = "detect",
557 };
558
559 if (warnlvl > cpa_warn_level || !conflicts(prot, val))
560 return;
561
562 pr_warn("CPA %8s %10s: 0x%016lx - 0x%016lx PFN %lx req %016llx prevent %016llx\n",
563 lvltxt[warnlvl], txt, start, end, pfn, (unsigned long long)pgprot_val(prot),
564 (unsigned long long)val);
565}
566
567/*
568 * Certain areas of memory on x86 require very specific protection flags,
569 * for example the BIOS area or kernel text. Callers don't always get this
570 * right (again, ioremap() on BIOS memory is not uncommon) so this function
571 * checks and fixes these known static required protection bits.
572 */
573static inline pgprot_t static_protections(pgprot_t prot, unsigned long start,
574 unsigned long pfn, unsigned long npg,
575 unsigned long lpsize, int warnlvl)
576{
577 pgprotval_t forbidden, res;
578 unsigned long end;
579
580 /*
581 * There is no point in checking RW/NX conflicts when the requested
582 * mapping is setting the page !PRESENT.
583 */
584 if (!(pgprot_val(prot) & _PAGE_PRESENT))
585 return prot;
586
587 /* Operate on the virtual address */
588 end = start + npg * PAGE_SIZE - 1;
589
590 res = protect_kernel_text(start, end);
591 check_conflict(warnlvl, prot, res, start, end, pfn, "Text NX");
592 forbidden = res;
593
594 /*
595 * Special case to preserve a large page. If the change spawns the
596 * full large page mapping then there is no point to split it
597 * up. Happens with ftrace and is going to be removed once ftrace
598 * switched to text_poke().
599 */
600 if (lpsize != (npg * PAGE_SIZE) || (start & (lpsize - 1))) {
601 res = protect_kernel_text_ro(start, end);
602 check_conflict(warnlvl, prot, res, start, end, pfn, "Text RO");
603 forbidden |= res;
604 }
605
606 /* Check the PFN directly */
607 res = protect_pci_bios(pfn, pfn + npg - 1);
608 check_conflict(warnlvl, prot, res, start, end, pfn, "PCIBIOS NX");
609 forbidden |= res;
610
611 res = protect_rodata(pfn, pfn + npg - 1);
612 check_conflict(warnlvl, prot, res, start, end, pfn, "Rodata RO");
613 forbidden |= res;
614
615 return __pgprot(pgprot_val(prot) & ~forbidden);
616}
617
618/*
619 * Validate strict W^X semantics.
620 */
621static inline pgprot_t verify_rwx(pgprot_t old, pgprot_t new, unsigned long start,
622 unsigned long pfn, unsigned long npg,
623 bool nx, bool rw)
624{
625 unsigned long end;
626
627 /*
628 * 32-bit has some unfixable W+X issues, like EFI code
629 * and writeable data being in the same page. Disable
630 * detection and enforcement there.
631 */
632 if (IS_ENABLED(CONFIG_X86_32))
633 return new;
634
635 /* Only verify when NX is supported: */
636 if (!(__supported_pte_mask & _PAGE_NX))
637 return new;
638
639 if (!((pgprot_val(old) ^ pgprot_val(new)) & (_PAGE_RW | _PAGE_NX)))
640 return new;
641
642 if ((pgprot_val(new) & (_PAGE_RW | _PAGE_NX)) != _PAGE_RW)
643 return new;
644
645 /* Non-leaf translation entries can disable writing or execution. */
646 if (!rw || nx)
647 return new;
648
649 end = start + npg * PAGE_SIZE - 1;
650 WARN_ONCE(1, "CPA detected W^X violation: %016llx -> %016llx range: 0x%016lx - 0x%016lx PFN %lx\n",
651 (unsigned long long)pgprot_val(old),
652 (unsigned long long)pgprot_val(new),
653 start, end, pfn);
654
655 /*
656 * For now, allow all permission change attempts by returning the
657 * attempted permissions. This can 'return old' to actively
658 * refuse the permission change at a later time.
659 */
660 return new;
661}
662
663/*
664 * Lookup the page table entry for a virtual address in a specific pgd.
665 * Return a pointer to the entry, the level of the mapping, and the effective
666 * NX and RW bits of all page table levels.
667 */
668pte_t *lookup_address_in_pgd_attr(pgd_t *pgd, unsigned long address,
669 unsigned int *level, bool *nx, bool *rw)
670{
671 p4d_t *p4d;
672 pud_t *pud;
673 pmd_t *pmd;
674
675 *level = PG_LEVEL_NONE;
676 *nx = false;
677 *rw = true;
678
679 if (pgd_none(*pgd))
680 return NULL;
681
682 *nx |= pgd_flags(*pgd) & _PAGE_NX;
683 *rw &= pgd_flags(*pgd) & _PAGE_RW;
684
685 p4d = p4d_offset(pgd, address);
686 if (p4d_none(*p4d))
687 return NULL;
688
689 *level = PG_LEVEL_512G;
690 if (p4d_leaf(*p4d) || !p4d_present(*p4d))
691 return (pte_t *)p4d;
692
693 *nx |= p4d_flags(*p4d) & _PAGE_NX;
694 *rw &= p4d_flags(*p4d) & _PAGE_RW;
695
696 pud = pud_offset(p4d, address);
697 if (pud_none(*pud))
698 return NULL;
699
700 *level = PG_LEVEL_1G;
701 if (pud_leaf(*pud) || !pud_present(*pud))
702 return (pte_t *)pud;
703
704 *nx |= pud_flags(*pud) & _PAGE_NX;
705 *rw &= pud_flags(*pud) & _PAGE_RW;
706
707 pmd = pmd_offset(pud, address);
708 if (pmd_none(*pmd))
709 return NULL;
710
711 *level = PG_LEVEL_2M;
712 if (pmd_leaf(*pmd) || !pmd_present(*pmd))
713 return (pte_t *)pmd;
714
715 *nx |= pmd_flags(*pmd) & _PAGE_NX;
716 *rw &= pmd_flags(*pmd) & _PAGE_RW;
717
718 *level = PG_LEVEL_4K;
719
720 return pte_offset_kernel(pmd, address);
721}
722
723/*
724 * Lookup the page table entry for a virtual address in a specific pgd.
725 * Return a pointer to the entry and the level of the mapping.
726 */
727pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
728 unsigned int *level)
729{
730 bool nx, rw;
731
732 return lookup_address_in_pgd_attr(pgd, address, level, &nx, &rw);
733}
734
735/*
736 * Lookup the page table entry for a virtual address. Return a pointer
737 * to the entry and the level of the mapping.
738 *
739 * Note: We return pud and pmd either when the entry is marked large
740 * or when the present bit is not set. Otherwise we would return a
741 * pointer to a nonexisting mapping.
742 */
743pte_t *lookup_address(unsigned long address, unsigned int *level)
744{
745 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
746}
747EXPORT_SYMBOL_GPL(lookup_address);
748
749static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
750 unsigned int *level, bool *nx, bool *rw)
751{
752 pgd_t *pgd;
753
754 if (!cpa->pgd)
755 pgd = pgd_offset_k(address);
756 else
757 pgd = cpa->pgd + pgd_index(address);
758
759 return lookup_address_in_pgd_attr(pgd, address, level, nx, rw);
760}
761
762/*
763 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
764 * or NULL if not present.
765 */
766pmd_t *lookup_pmd_address(unsigned long address)
767{
768 pgd_t *pgd;
769 p4d_t *p4d;
770 pud_t *pud;
771
772 pgd = pgd_offset_k(address);
773 if (pgd_none(*pgd))
774 return NULL;
775
776 p4d = p4d_offset(pgd, address);
777 if (p4d_none(*p4d) || p4d_leaf(*p4d) || !p4d_present(*p4d))
778 return NULL;
779
780 pud = pud_offset(p4d, address);
781 if (pud_none(*pud) || pud_leaf(*pud) || !pud_present(*pud))
782 return NULL;
783
784 return pmd_offset(pud, address);
785}
786
787/*
788 * This is necessary because __pa() does not work on some
789 * kinds of memory, like vmalloc() or the alloc_remap()
790 * areas on 32-bit NUMA systems. The percpu areas can
791 * end up in this kind of memory, for instance.
792 *
793 * Note that as long as the PTEs are well-formed with correct PFNs, this
794 * works without checking the PRESENT bit in the leaf PTE. This is unlike
795 * the similar vmalloc_to_page() and derivatives. Callers may depend on
796 * this behavior.
797 *
798 * This could be optimized, but it is only used in paths that are not perf
799 * sensitive, and keeping it unoptimized should increase the testing coverage
800 * for the more obscure platforms.
801 */
802phys_addr_t slow_virt_to_phys(void *__virt_addr)
803{
804 unsigned long virt_addr = (unsigned long)__virt_addr;
805 phys_addr_t phys_addr;
806 unsigned long offset;
807 enum pg_level level;
808 pte_t *pte;
809
810 pte = lookup_address(virt_addr, &level);
811 BUG_ON(!pte);
812
813 /*
814 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
815 * before being left-shifted PAGE_SHIFT bits -- this trick is to
816 * make 32-PAE kernel work correctly.
817 */
818 switch (level) {
819 case PG_LEVEL_1G:
820 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
821 offset = virt_addr & ~PUD_MASK;
822 break;
823 case PG_LEVEL_2M:
824 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
825 offset = virt_addr & ~PMD_MASK;
826 break;
827 default:
828 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
829 offset = virt_addr & ~PAGE_MASK;
830 }
831
832 return (phys_addr_t)(phys_addr | offset);
833}
834EXPORT_SYMBOL_GPL(slow_virt_to_phys);
835
836/*
837 * Set the new pmd in all the pgds we know about:
838 */
839static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
840{
841 /* change init_mm */
842 set_pte_atomic(kpte, pte);
843#ifdef CONFIG_X86_32
844 if (!SHARED_KERNEL_PMD) {
845 struct page *page;
846
847 list_for_each_entry(page, &pgd_list, lru) {
848 pgd_t *pgd;
849 p4d_t *p4d;
850 pud_t *pud;
851 pmd_t *pmd;
852
853 pgd = (pgd_t *)page_address(page) + pgd_index(address);
854 p4d = p4d_offset(pgd, address);
855 pud = pud_offset(p4d, address);
856 pmd = pmd_offset(pud, address);
857 set_pte_atomic((pte_t *)pmd, pte);
858 }
859 }
860#endif
861}
862
863static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot)
864{
865 /*
866 * _PAGE_GLOBAL means "global page" for present PTEs.
867 * But, it is also used to indicate _PAGE_PROTNONE
868 * for non-present PTEs.
869 *
870 * This ensures that a _PAGE_GLOBAL PTE going from
871 * present to non-present is not confused as
872 * _PAGE_PROTNONE.
873 */
874 if (!(pgprot_val(prot) & _PAGE_PRESENT))
875 pgprot_val(prot) &= ~_PAGE_GLOBAL;
876
877 return prot;
878}
879
880static int __should_split_large_page(pte_t *kpte, unsigned long address,
881 struct cpa_data *cpa)
882{
883 unsigned long numpages, pmask, psize, lpaddr, pfn, old_pfn;
884 pgprot_t old_prot, new_prot, req_prot, chk_prot;
885 pte_t new_pte, *tmp;
886 enum pg_level level;
887 bool nx, rw;
888
889 /*
890 * Check for races, another CPU might have split this page
891 * up already:
892 */
893 tmp = _lookup_address_cpa(cpa, address, &level, &nx, &rw);
894 if (tmp != kpte)
895 return 1;
896
897 switch (level) {
898 case PG_LEVEL_2M:
899 old_prot = pmd_pgprot(*(pmd_t *)kpte);
900 old_pfn = pmd_pfn(*(pmd_t *)kpte);
901 cpa_inc_2m_checked();
902 break;
903 case PG_LEVEL_1G:
904 old_prot = pud_pgprot(*(pud_t *)kpte);
905 old_pfn = pud_pfn(*(pud_t *)kpte);
906 cpa_inc_1g_checked();
907 break;
908 default:
909 return -EINVAL;
910 }
911
912 psize = page_level_size(level);
913 pmask = page_level_mask(level);
914
915 /*
916 * Calculate the number of pages, which fit into this large
917 * page starting at address:
918 */
919 lpaddr = (address + psize) & pmask;
920 numpages = (lpaddr - address) >> PAGE_SHIFT;
921 if (numpages < cpa->numpages)
922 cpa->numpages = numpages;
923
924 /*
925 * We are safe now. Check whether the new pgprot is the same:
926 * Convert protection attributes to 4k-format, as cpa->mask* are set
927 * up accordingly.
928 */
929
930 /* Clear PSE (aka _PAGE_PAT) and move PAT bit to correct position */
931 req_prot = pgprot_large_2_4k(old_prot);
932
933 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
934 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
935
936 /*
937 * req_prot is in format of 4k pages. It must be converted to large
938 * page format: the caching mode includes the PAT bit located at
939 * different bit positions in the two formats.
940 */
941 req_prot = pgprot_4k_2_large(req_prot);
942 req_prot = pgprot_clear_protnone_bits(req_prot);
943 if (pgprot_val(req_prot) & _PAGE_PRESENT)
944 pgprot_val(req_prot) |= _PAGE_PSE;
945
946 /*
947 * old_pfn points to the large page base pfn. So we need to add the
948 * offset of the virtual address:
949 */
950 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
951 cpa->pfn = pfn;
952
953 /*
954 * Calculate the large page base address and the number of 4K pages
955 * in the large page
956 */
957 lpaddr = address & pmask;
958 numpages = psize >> PAGE_SHIFT;
959
960 /*
961 * Sanity check that the existing mapping is correct versus the static
962 * protections. static_protections() guards against !PRESENT, so no
963 * extra conditional required here.
964 */
965 chk_prot = static_protections(old_prot, lpaddr, old_pfn, numpages,
966 psize, CPA_CONFLICT);
967
968 if (WARN_ON_ONCE(pgprot_val(chk_prot) != pgprot_val(old_prot))) {
969 /*
970 * Split the large page and tell the split code to
971 * enforce static protections.
972 */
973 cpa->force_static_prot = 1;
974 return 1;
975 }
976
977 /*
978 * Optimization: If the requested pgprot is the same as the current
979 * pgprot, then the large page can be preserved and no updates are
980 * required independent of alignment and length of the requested
981 * range. The above already established that the current pgprot is
982 * correct, which in consequence makes the requested pgprot correct
983 * as well if it is the same. The static protection scan below will
984 * not come to a different conclusion.
985 */
986 if (pgprot_val(req_prot) == pgprot_val(old_prot)) {
987 cpa_inc_lp_sameprot(level);
988 return 0;
989 }
990
991 /*
992 * If the requested range does not cover the full page, split it up
993 */
994 if (address != lpaddr || cpa->numpages != numpages)
995 return 1;
996
997 /*
998 * Check whether the requested pgprot is conflicting with a static
999 * protection requirement in the large page.
1000 */
1001 new_prot = static_protections(req_prot, lpaddr, old_pfn, numpages,
1002 psize, CPA_DETECT);
1003
1004 new_prot = verify_rwx(old_prot, new_prot, lpaddr, old_pfn, numpages,
1005 nx, rw);
1006
1007 /*
1008 * If there is a conflict, split the large page.
1009 *
1010 * There used to be a 4k wise evaluation trying really hard to
1011 * preserve the large pages, but experimentation has shown, that this
1012 * does not help at all. There might be corner cases which would
1013 * preserve one large page occasionally, but it's really not worth the
1014 * extra code and cycles for the common case.
1015 */
1016 if (pgprot_val(req_prot) != pgprot_val(new_prot))
1017 return 1;
1018
1019 /* All checks passed. Update the large page mapping. */
1020 new_pte = pfn_pte(old_pfn, new_prot);
1021 __set_pmd_pte(kpte, address, new_pte);
1022 cpa->flags |= CPA_FLUSHTLB;
1023 cpa_inc_lp_preserved(level);
1024 return 0;
1025}
1026
1027static int should_split_large_page(pte_t *kpte, unsigned long address,
1028 struct cpa_data *cpa)
1029{
1030 int do_split;
1031
1032 if (cpa->force_split)
1033 return 1;
1034
1035 spin_lock(&pgd_lock);
1036 do_split = __should_split_large_page(kpte, address, cpa);
1037 spin_unlock(&pgd_lock);
1038
1039 return do_split;
1040}
1041
1042static void split_set_pte(struct cpa_data *cpa, pte_t *pte, unsigned long pfn,
1043 pgprot_t ref_prot, unsigned long address,
1044 unsigned long size)
1045{
1046 unsigned int npg = PFN_DOWN(size);
1047 pgprot_t prot;
1048
1049 /*
1050 * If should_split_large_page() discovered an inconsistent mapping,
1051 * remove the invalid protection in the split mapping.
1052 */
1053 if (!cpa->force_static_prot)
1054 goto set;
1055
1056 /* Hand in lpsize = 0 to enforce the protection mechanism */
1057 prot = static_protections(ref_prot, address, pfn, npg, 0, CPA_PROTECT);
1058
1059 if (pgprot_val(prot) == pgprot_val(ref_prot))
1060 goto set;
1061
1062 /*
1063 * If this is splitting a PMD, fix it up. PUD splits cannot be
1064 * fixed trivially as that would require to rescan the newly
1065 * installed PMD mappings after returning from split_large_page()
1066 * so an eventual further split can allocate the necessary PTE
1067 * pages. Warn for now and revisit it in case this actually
1068 * happens.
1069 */
1070 if (size == PAGE_SIZE)
1071 ref_prot = prot;
1072 else
1073 pr_warn_once("CPA: Cannot fixup static protections for PUD split\n");
1074set:
1075 set_pte(pte, pfn_pte(pfn, ref_prot));
1076}
1077
1078static int
1079__split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
1080 struct page *base)
1081{
1082 unsigned long lpaddr, lpinc, ref_pfn, pfn, pfninc = 1;
1083 pte_t *pbase = (pte_t *)page_address(base);
1084 unsigned int i, level;
1085 pgprot_t ref_prot;
1086 bool nx, rw;
1087 pte_t *tmp;
1088
1089 spin_lock(&pgd_lock);
1090 /*
1091 * Check for races, another CPU might have split this page
1092 * up for us already:
1093 */
1094 tmp = _lookup_address_cpa(cpa, address, &level, &nx, &rw);
1095 if (tmp != kpte) {
1096 spin_unlock(&pgd_lock);
1097 return 1;
1098 }
1099
1100 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
1101
1102 switch (level) {
1103 case PG_LEVEL_2M:
1104 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
1105 /*
1106 * Clear PSE (aka _PAGE_PAT) and move
1107 * PAT bit to correct position.
1108 */
1109 ref_prot = pgprot_large_2_4k(ref_prot);
1110 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
1111 lpaddr = address & PMD_MASK;
1112 lpinc = PAGE_SIZE;
1113 break;
1114
1115 case PG_LEVEL_1G:
1116 ref_prot = pud_pgprot(*(pud_t *)kpte);
1117 ref_pfn = pud_pfn(*(pud_t *)kpte);
1118 pfninc = PMD_SIZE >> PAGE_SHIFT;
1119 lpaddr = address & PUD_MASK;
1120 lpinc = PMD_SIZE;
1121 /*
1122 * Clear the PSE flags if the PRESENT flag is not set
1123 * otherwise pmd_present/pmd_huge will return true
1124 * even on a non present pmd.
1125 */
1126 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
1127 pgprot_val(ref_prot) &= ~_PAGE_PSE;
1128 break;
1129
1130 default:
1131 spin_unlock(&pgd_lock);
1132 return 1;
1133 }
1134
1135 ref_prot = pgprot_clear_protnone_bits(ref_prot);
1136
1137 /*
1138 * Get the target pfn from the original entry:
1139 */
1140 pfn = ref_pfn;
1141 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc, lpaddr += lpinc)
1142 split_set_pte(cpa, pbase + i, pfn, ref_prot, lpaddr, lpinc);
1143
1144 if (virt_addr_valid(address)) {
1145 unsigned long pfn = PFN_DOWN(__pa(address));
1146
1147 if (pfn_range_is_mapped(pfn, pfn + 1))
1148 split_page_count(level);
1149 }
1150
1151 /*
1152 * Install the new, split up pagetable.
1153 *
1154 * We use the standard kernel pagetable protections for the new
1155 * pagetable protections, the actual ptes set above control the
1156 * primary protection behavior:
1157 */
1158 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
1159
1160 /*
1161 * Do a global flush tlb after splitting the large page
1162 * and before we do the actual change page attribute in the PTE.
1163 *
1164 * Without this, we violate the TLB application note, that says:
1165 * "The TLBs may contain both ordinary and large-page
1166 * translations for a 4-KByte range of linear addresses. This
1167 * may occur if software modifies the paging structures so that
1168 * the page size used for the address range changes. If the two
1169 * translations differ with respect to page frame or attributes
1170 * (e.g., permissions), processor behavior is undefined and may
1171 * be implementation-specific."
1172 *
1173 * We do this global tlb flush inside the cpa_lock, so that we
1174 * don't allow any other cpu, with stale tlb entries change the
1175 * page attribute in parallel, that also falls into the
1176 * just split large page entry.
1177 */
1178 flush_tlb_all();
1179 spin_unlock(&pgd_lock);
1180
1181 return 0;
1182}
1183
1184static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
1185 unsigned long address)
1186{
1187 struct page *base;
1188
1189 if (!debug_pagealloc_enabled())
1190 spin_unlock(&cpa_lock);
1191 base = alloc_pages(GFP_KERNEL, 0);
1192 if (!debug_pagealloc_enabled())
1193 spin_lock(&cpa_lock);
1194 if (!base)
1195 return -ENOMEM;
1196
1197 if (__split_large_page(cpa, kpte, address, base))
1198 __free_page(base);
1199
1200 return 0;
1201}
1202
1203static bool try_to_free_pte_page(pte_t *pte)
1204{
1205 int i;
1206
1207 for (i = 0; i < PTRS_PER_PTE; i++)
1208 if (!pte_none(pte[i]))
1209 return false;
1210
1211 free_page((unsigned long)pte);
1212 return true;
1213}
1214
1215static bool try_to_free_pmd_page(pmd_t *pmd)
1216{
1217 int i;
1218
1219 for (i = 0; i < PTRS_PER_PMD; i++)
1220 if (!pmd_none(pmd[i]))
1221 return false;
1222
1223 free_page((unsigned long)pmd);
1224 return true;
1225}
1226
1227static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
1228{
1229 pte_t *pte = pte_offset_kernel(pmd, start);
1230
1231 while (start < end) {
1232 set_pte(pte, __pte(0));
1233
1234 start += PAGE_SIZE;
1235 pte++;
1236 }
1237
1238 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
1239 pmd_clear(pmd);
1240 return true;
1241 }
1242 return false;
1243}
1244
1245static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
1246 unsigned long start, unsigned long end)
1247{
1248 if (unmap_pte_range(pmd, start, end))
1249 if (try_to_free_pmd_page(pud_pgtable(*pud)))
1250 pud_clear(pud);
1251}
1252
1253static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
1254{
1255 pmd_t *pmd = pmd_offset(pud, start);
1256
1257 /*
1258 * Not on a 2MB page boundary?
1259 */
1260 if (start & (PMD_SIZE - 1)) {
1261 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1262 unsigned long pre_end = min_t(unsigned long, end, next_page);
1263
1264 __unmap_pmd_range(pud, pmd, start, pre_end);
1265
1266 start = pre_end;
1267 pmd++;
1268 }
1269
1270 /*
1271 * Try to unmap in 2M chunks.
1272 */
1273 while (end - start >= PMD_SIZE) {
1274 if (pmd_leaf(*pmd))
1275 pmd_clear(pmd);
1276 else
1277 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
1278
1279 start += PMD_SIZE;
1280 pmd++;
1281 }
1282
1283 /*
1284 * 4K leftovers?
1285 */
1286 if (start < end)
1287 return __unmap_pmd_range(pud, pmd, start, end);
1288
1289 /*
1290 * Try again to free the PMD page if haven't succeeded above.
1291 */
1292 if (!pud_none(*pud))
1293 if (try_to_free_pmd_page(pud_pgtable(*pud)))
1294 pud_clear(pud);
1295}
1296
1297static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
1298{
1299 pud_t *pud = pud_offset(p4d, start);
1300
1301 /*
1302 * Not on a GB page boundary?
1303 */
1304 if (start & (PUD_SIZE - 1)) {
1305 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1306 unsigned long pre_end = min_t(unsigned long, end, next_page);
1307
1308 unmap_pmd_range(pud, start, pre_end);
1309
1310 start = pre_end;
1311 pud++;
1312 }
1313
1314 /*
1315 * Try to unmap in 1G chunks?
1316 */
1317 while (end - start >= PUD_SIZE) {
1318
1319 if (pud_leaf(*pud))
1320 pud_clear(pud);
1321 else
1322 unmap_pmd_range(pud, start, start + PUD_SIZE);
1323
1324 start += PUD_SIZE;
1325 pud++;
1326 }
1327
1328 /*
1329 * 2M leftovers?
1330 */
1331 if (start < end)
1332 unmap_pmd_range(pud, start, end);
1333
1334 /*
1335 * No need to try to free the PUD page because we'll free it in
1336 * populate_pgd's error path
1337 */
1338}
1339
1340static int alloc_pte_page(pmd_t *pmd)
1341{
1342 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL);
1343 if (!pte)
1344 return -1;
1345
1346 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
1347 return 0;
1348}
1349
1350static int alloc_pmd_page(pud_t *pud)
1351{
1352 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL);
1353 if (!pmd)
1354 return -1;
1355
1356 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
1357 return 0;
1358}
1359
1360static void populate_pte(struct cpa_data *cpa,
1361 unsigned long start, unsigned long end,
1362 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
1363{
1364 pte_t *pte;
1365
1366 pte = pte_offset_kernel(pmd, start);
1367
1368 pgprot = pgprot_clear_protnone_bits(pgprot);
1369
1370 while (num_pages-- && start < end) {
1371 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
1372
1373 start += PAGE_SIZE;
1374 cpa->pfn++;
1375 pte++;
1376 }
1377}
1378
1379static long populate_pmd(struct cpa_data *cpa,
1380 unsigned long start, unsigned long end,
1381 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
1382{
1383 long cur_pages = 0;
1384 pmd_t *pmd;
1385 pgprot_t pmd_pgprot;
1386
1387 /*
1388 * Not on a 2M boundary?
1389 */
1390 if (start & (PMD_SIZE - 1)) {
1391 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
1392 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
1393
1394 pre_end = min_t(unsigned long, pre_end, next_page);
1395 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1396 cur_pages = min_t(unsigned int, num_pages, cur_pages);
1397
1398 /*
1399 * Need a PTE page?
1400 */
1401 pmd = pmd_offset(pud, start);
1402 if (pmd_none(*pmd))
1403 if (alloc_pte_page(pmd))
1404 return -1;
1405
1406 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
1407
1408 start = pre_end;
1409 }
1410
1411 /*
1412 * We mapped them all?
1413 */
1414 if (num_pages == cur_pages)
1415 return cur_pages;
1416
1417 pmd_pgprot = pgprot_4k_2_large(pgprot);
1418
1419 while (end - start >= PMD_SIZE) {
1420
1421 /*
1422 * We cannot use a 1G page so allocate a PMD page if needed.
1423 */
1424 if (pud_none(*pud))
1425 if (alloc_pmd_page(pud))
1426 return -1;
1427
1428 pmd = pmd_offset(pud, start);
1429
1430 set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn,
1431 canon_pgprot(pmd_pgprot))));
1432
1433 start += PMD_SIZE;
1434 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
1435 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1436 }
1437
1438 /*
1439 * Map trailing 4K pages.
1440 */
1441 if (start < end) {
1442 pmd = pmd_offset(pud, start);
1443 if (pmd_none(*pmd))
1444 if (alloc_pte_page(pmd))
1445 return -1;
1446
1447 populate_pte(cpa, start, end, num_pages - cur_pages,
1448 pmd, pgprot);
1449 }
1450 return num_pages;
1451}
1452
1453static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1454 pgprot_t pgprot)
1455{
1456 pud_t *pud;
1457 unsigned long end;
1458 long cur_pages = 0;
1459 pgprot_t pud_pgprot;
1460
1461 end = start + (cpa->numpages << PAGE_SHIFT);
1462
1463 /*
1464 * Not on a Gb page boundary? => map everything up to it with
1465 * smaller pages.
1466 */
1467 if (start & (PUD_SIZE - 1)) {
1468 unsigned long pre_end;
1469 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1470
1471 pre_end = min_t(unsigned long, end, next_page);
1472 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1473 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1474
1475 pud = pud_offset(p4d, start);
1476
1477 /*
1478 * Need a PMD page?
1479 */
1480 if (pud_none(*pud))
1481 if (alloc_pmd_page(pud))
1482 return -1;
1483
1484 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1485 pud, pgprot);
1486 if (cur_pages < 0)
1487 return cur_pages;
1488
1489 start = pre_end;
1490 }
1491
1492 /* We mapped them all? */
1493 if (cpa->numpages == cur_pages)
1494 return cur_pages;
1495
1496 pud = pud_offset(p4d, start);
1497 pud_pgprot = pgprot_4k_2_large(pgprot);
1498
1499 /*
1500 * Map everything starting from the Gb boundary, possibly with 1G pages
1501 */
1502 while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1503 set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn,
1504 canon_pgprot(pud_pgprot))));
1505
1506 start += PUD_SIZE;
1507 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1508 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1509 pud++;
1510 }
1511
1512 /* Map trailing leftover */
1513 if (start < end) {
1514 long tmp;
1515
1516 pud = pud_offset(p4d, start);
1517 if (pud_none(*pud))
1518 if (alloc_pmd_page(pud))
1519 return -1;
1520
1521 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1522 pud, pgprot);
1523 if (tmp < 0)
1524 return cur_pages;
1525
1526 cur_pages += tmp;
1527 }
1528 return cur_pages;
1529}
1530
1531/*
1532 * Restrictions for kernel page table do not necessarily apply when mapping in
1533 * an alternate PGD.
1534 */
1535static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1536{
1537 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1538 pud_t *pud = NULL; /* shut up gcc */
1539 p4d_t *p4d;
1540 pgd_t *pgd_entry;
1541 long ret;
1542
1543 pgd_entry = cpa->pgd + pgd_index(addr);
1544
1545 if (pgd_none(*pgd_entry)) {
1546 p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL);
1547 if (!p4d)
1548 return -1;
1549
1550 set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1551 }
1552
1553 /*
1554 * Allocate a PUD page and hand it down for mapping.
1555 */
1556 p4d = p4d_offset(pgd_entry, addr);
1557 if (p4d_none(*p4d)) {
1558 pud = (pud_t *)get_zeroed_page(GFP_KERNEL);
1559 if (!pud)
1560 return -1;
1561
1562 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1563 }
1564
1565 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1566 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1567
1568 ret = populate_pud(cpa, addr, p4d, pgprot);
1569 if (ret < 0) {
1570 /*
1571 * Leave the PUD page in place in case some other CPU or thread
1572 * already found it, but remove any useless entries we just
1573 * added to it.
1574 */
1575 unmap_pud_range(p4d, addr,
1576 addr + (cpa->numpages << PAGE_SHIFT));
1577 return ret;
1578 }
1579
1580 cpa->numpages = ret;
1581 return 0;
1582}
1583
1584static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1585 int primary)
1586{
1587 if (cpa->pgd) {
1588 /*
1589 * Right now, we only execute this code path when mapping
1590 * the EFI virtual memory map regions, no other users
1591 * provide a ->pgd value. This may change in the future.
1592 */
1593 return populate_pgd(cpa, vaddr);
1594 }
1595
1596 /*
1597 * Ignore all non primary paths.
1598 */
1599 if (!primary) {
1600 cpa->numpages = 1;
1601 return 0;
1602 }
1603
1604 /*
1605 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1606 * to have holes.
1607 * Also set numpages to '1' indicating that we processed cpa req for
1608 * one virtual address page and its pfn. TBD: numpages can be set based
1609 * on the initial value and the level returned by lookup_address().
1610 */
1611 if (within(vaddr, PAGE_OFFSET,
1612 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1613 cpa->numpages = 1;
1614 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1615 return 0;
1616
1617 } else if (__cpa_pfn_in_highmap(cpa->pfn)) {
1618 /* Faults in the highmap are OK, so do not warn: */
1619 return -EFAULT;
1620 } else {
1621 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1622 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1623 *cpa->vaddr);
1624
1625 return -EFAULT;
1626 }
1627}
1628
1629static int __change_page_attr(struct cpa_data *cpa, int primary)
1630{
1631 unsigned long address;
1632 int do_split, err;
1633 unsigned int level;
1634 pte_t *kpte, old_pte;
1635 bool nx, rw;
1636
1637 address = __cpa_addr(cpa, cpa->curpage);
1638repeat:
1639 kpte = _lookup_address_cpa(cpa, address, &level, &nx, &rw);
1640 if (!kpte)
1641 return __cpa_process_fault(cpa, address, primary);
1642
1643 old_pte = *kpte;
1644 if (pte_none(old_pte))
1645 return __cpa_process_fault(cpa, address, primary);
1646
1647 if (level == PG_LEVEL_4K) {
1648 pte_t new_pte;
1649 pgprot_t old_prot = pte_pgprot(old_pte);
1650 pgprot_t new_prot = pte_pgprot(old_pte);
1651 unsigned long pfn = pte_pfn(old_pte);
1652
1653 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1654 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1655
1656 cpa_inc_4k_install();
1657 /* Hand in lpsize = 0 to enforce the protection mechanism */
1658 new_prot = static_protections(new_prot, address, pfn, 1, 0,
1659 CPA_PROTECT);
1660
1661 new_prot = verify_rwx(old_prot, new_prot, address, pfn, 1,
1662 nx, rw);
1663
1664 new_prot = pgprot_clear_protnone_bits(new_prot);
1665
1666 /*
1667 * We need to keep the pfn from the existing PTE,
1668 * after all we're only going to change its attributes
1669 * not the memory it points to
1670 */
1671 new_pte = pfn_pte(pfn, new_prot);
1672 cpa->pfn = pfn;
1673 /*
1674 * Do we really change anything ?
1675 */
1676 if (pte_val(old_pte) != pte_val(new_pte)) {
1677 set_pte_atomic(kpte, new_pte);
1678 cpa->flags |= CPA_FLUSHTLB;
1679 }
1680 cpa->numpages = 1;
1681 return 0;
1682 }
1683
1684 /*
1685 * Check, whether we can keep the large page intact
1686 * and just change the pte:
1687 */
1688 do_split = should_split_large_page(kpte, address, cpa);
1689 /*
1690 * When the range fits into the existing large page,
1691 * return. cp->numpages and cpa->tlbflush have been updated in
1692 * try_large_page:
1693 */
1694 if (do_split <= 0)
1695 return do_split;
1696
1697 /*
1698 * We have to split the large page:
1699 */
1700 err = split_large_page(cpa, kpte, address);
1701 if (!err)
1702 goto repeat;
1703
1704 return err;
1705}
1706
1707static int __change_page_attr_set_clr(struct cpa_data *cpa, int primary);
1708
1709/*
1710 * Check the directmap and "high kernel map" 'aliases'.
1711 */
1712static int cpa_process_alias(struct cpa_data *cpa)
1713{
1714 struct cpa_data alias_cpa;
1715 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1716 unsigned long vaddr;
1717 int ret;
1718
1719 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1720 return 0;
1721
1722 /*
1723 * No need to redo, when the primary call touched the direct
1724 * mapping already:
1725 */
1726 vaddr = __cpa_addr(cpa, cpa->curpage);
1727 if (!(within(vaddr, PAGE_OFFSET,
1728 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1729
1730 alias_cpa = *cpa;
1731 alias_cpa.vaddr = &laddr;
1732 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1733 alias_cpa.curpage = 0;
1734
1735 /* Directmap always has NX set, do not modify. */
1736 if (__supported_pte_mask & _PAGE_NX) {
1737 alias_cpa.mask_clr.pgprot &= ~_PAGE_NX;
1738 alias_cpa.mask_set.pgprot &= ~_PAGE_NX;
1739 }
1740
1741 cpa->force_flush_all = 1;
1742
1743 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1744 if (ret)
1745 return ret;
1746 }
1747
1748#ifdef CONFIG_X86_64
1749 /*
1750 * If the primary call didn't touch the high mapping already
1751 * and the physical address is inside the kernel map, we need
1752 * to touch the high mapped kernel as well:
1753 */
1754 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1755 __cpa_pfn_in_highmap(cpa->pfn)) {
1756 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1757 __START_KERNEL_map - phys_base;
1758 alias_cpa = *cpa;
1759 alias_cpa.vaddr = &temp_cpa_vaddr;
1760 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1761 alias_cpa.curpage = 0;
1762
1763 /*
1764 * [_text, _brk_end) also covers data, do not modify NX except
1765 * in cases where the highmap is the primary target.
1766 */
1767 if (__supported_pte_mask & _PAGE_NX) {
1768 alias_cpa.mask_clr.pgprot &= ~_PAGE_NX;
1769 alias_cpa.mask_set.pgprot &= ~_PAGE_NX;
1770 }
1771
1772 cpa->force_flush_all = 1;
1773 /*
1774 * The high mapping range is imprecise, so ignore the
1775 * return value.
1776 */
1777 __change_page_attr_set_clr(&alias_cpa, 0);
1778 }
1779#endif
1780
1781 return 0;
1782}
1783
1784static int __change_page_attr_set_clr(struct cpa_data *cpa, int primary)
1785{
1786 unsigned long numpages = cpa->numpages;
1787 unsigned long rempages = numpages;
1788 int ret = 0;
1789
1790 /*
1791 * No changes, easy!
1792 */
1793 if (!(pgprot_val(cpa->mask_set) | pgprot_val(cpa->mask_clr)) &&
1794 !cpa->force_split)
1795 return ret;
1796
1797 while (rempages) {
1798 /*
1799 * Store the remaining nr of pages for the large page
1800 * preservation check.
1801 */
1802 cpa->numpages = rempages;
1803 /* for array changes, we can't use large page */
1804 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1805 cpa->numpages = 1;
1806
1807 if (!debug_pagealloc_enabled())
1808 spin_lock(&cpa_lock);
1809 ret = __change_page_attr(cpa, primary);
1810 if (!debug_pagealloc_enabled())
1811 spin_unlock(&cpa_lock);
1812 if (ret)
1813 goto out;
1814
1815 if (primary && !(cpa->flags & CPA_NO_CHECK_ALIAS)) {
1816 ret = cpa_process_alias(cpa);
1817 if (ret)
1818 goto out;
1819 }
1820
1821 /*
1822 * Adjust the number of pages with the result of the
1823 * CPA operation. Either a large page has been
1824 * preserved or a single page update happened.
1825 */
1826 BUG_ON(cpa->numpages > rempages || !cpa->numpages);
1827 rempages -= cpa->numpages;
1828 cpa->curpage += cpa->numpages;
1829 }
1830
1831out:
1832 /* Restore the original numpages */
1833 cpa->numpages = numpages;
1834 return ret;
1835}
1836
1837static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1838 pgprot_t mask_set, pgprot_t mask_clr,
1839 int force_split, int in_flag,
1840 struct page **pages)
1841{
1842 struct cpa_data cpa;
1843 int ret, cache;
1844
1845 memset(&cpa, 0, sizeof(cpa));
1846
1847 /*
1848 * Check, if we are requested to set a not supported
1849 * feature. Clearing non-supported features is OK.
1850 */
1851 mask_set = canon_pgprot(mask_set);
1852
1853 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1854 return 0;
1855
1856 /* Ensure we are PAGE_SIZE aligned */
1857 if (in_flag & CPA_ARRAY) {
1858 int i;
1859 for (i = 0; i < numpages; i++) {
1860 if (addr[i] & ~PAGE_MASK) {
1861 addr[i] &= PAGE_MASK;
1862 WARN_ON_ONCE(1);
1863 }
1864 }
1865 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1866 /*
1867 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1868 * No need to check in that case
1869 */
1870 if (*addr & ~PAGE_MASK) {
1871 *addr &= PAGE_MASK;
1872 /*
1873 * People should not be passing in unaligned addresses:
1874 */
1875 WARN_ON_ONCE(1);
1876 }
1877 }
1878
1879 /* Must avoid aliasing mappings in the highmem code */
1880 kmap_flush_unused();
1881
1882 vm_unmap_aliases();
1883
1884 cpa.vaddr = addr;
1885 cpa.pages = pages;
1886 cpa.numpages = numpages;
1887 cpa.mask_set = mask_set;
1888 cpa.mask_clr = mask_clr;
1889 cpa.flags = in_flag;
1890 cpa.curpage = 0;
1891 cpa.force_split = force_split;
1892
1893 ret = __change_page_attr_set_clr(&cpa, 1);
1894
1895 /*
1896 * Check whether we really changed something:
1897 */
1898 if (!(cpa.flags & CPA_FLUSHTLB))
1899 goto out;
1900
1901 /*
1902 * No need to flush, when we did not set any of the caching
1903 * attributes:
1904 */
1905 cache = !!pgprot2cachemode(mask_set);
1906
1907 /*
1908 * On error; flush everything to be sure.
1909 */
1910 if (ret) {
1911 cpa_flush_all(cache);
1912 goto out;
1913 }
1914
1915 cpa_flush(&cpa, cache);
1916out:
1917 return ret;
1918}
1919
1920static inline int change_page_attr_set(unsigned long *addr, int numpages,
1921 pgprot_t mask, int array)
1922{
1923 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1924 (array ? CPA_ARRAY : 0), NULL);
1925}
1926
1927static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1928 pgprot_t mask, int array)
1929{
1930 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1931 (array ? CPA_ARRAY : 0), NULL);
1932}
1933
1934static inline int cpa_set_pages_array(struct page **pages, int numpages,
1935 pgprot_t mask)
1936{
1937 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1938 CPA_PAGES_ARRAY, pages);
1939}
1940
1941static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1942 pgprot_t mask)
1943{
1944 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1945 CPA_PAGES_ARRAY, pages);
1946}
1947
1948/*
1949 * __set_memory_prot is an internal helper for callers that have been passed
1950 * a pgprot_t value from upper layers and a reservation has already been taken.
1951 * If you want to set the pgprot to a specific page protocol, use the
1952 * set_memory_xx() functions.
1953 */
1954int __set_memory_prot(unsigned long addr, int numpages, pgprot_t prot)
1955{
1956 return change_page_attr_set_clr(&addr, numpages, prot,
1957 __pgprot(~pgprot_val(prot)), 0, 0,
1958 NULL);
1959}
1960
1961int _set_memory_uc(unsigned long addr, int numpages)
1962{
1963 /*
1964 * for now UC MINUS. see comments in ioremap()
1965 * If you really need strong UC use ioremap_uc(), but note
1966 * that you cannot override IO areas with set_memory_*() as
1967 * these helpers cannot work with IO memory.
1968 */
1969 return change_page_attr_set(&addr, numpages,
1970 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1971 0);
1972}
1973
1974int set_memory_uc(unsigned long addr, int numpages)
1975{
1976 int ret;
1977
1978 /*
1979 * for now UC MINUS. see comments in ioremap()
1980 */
1981 ret = memtype_reserve(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1982 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1983 if (ret)
1984 goto out_err;
1985
1986 ret = _set_memory_uc(addr, numpages);
1987 if (ret)
1988 goto out_free;
1989
1990 return 0;
1991
1992out_free:
1993 memtype_free(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1994out_err:
1995 return ret;
1996}
1997EXPORT_SYMBOL(set_memory_uc);
1998
1999int _set_memory_wc(unsigned long addr, int numpages)
2000{
2001 int ret;
2002
2003 ret = change_page_attr_set(&addr, numpages,
2004 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
2005 0);
2006 if (!ret) {
2007 ret = change_page_attr_set_clr(&addr, numpages,
2008 cachemode2pgprot(_PAGE_CACHE_MODE_WC),
2009 __pgprot(_PAGE_CACHE_MASK),
2010 0, 0, NULL);
2011 }
2012 return ret;
2013}
2014
2015int set_memory_wc(unsigned long addr, int numpages)
2016{
2017 int ret;
2018
2019 ret = memtype_reserve(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
2020 _PAGE_CACHE_MODE_WC, NULL);
2021 if (ret)
2022 return ret;
2023
2024 ret = _set_memory_wc(addr, numpages);
2025 if (ret)
2026 memtype_free(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
2027
2028 return ret;
2029}
2030EXPORT_SYMBOL(set_memory_wc);
2031
2032int _set_memory_wt(unsigned long addr, int numpages)
2033{
2034 return change_page_attr_set(&addr, numpages,
2035 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
2036}
2037
2038int _set_memory_wb(unsigned long addr, int numpages)
2039{
2040 /* WB cache mode is hard wired to all cache attribute bits being 0 */
2041 return change_page_attr_clear(&addr, numpages,
2042 __pgprot(_PAGE_CACHE_MASK), 0);
2043}
2044
2045int set_memory_wb(unsigned long addr, int numpages)
2046{
2047 int ret;
2048
2049 ret = _set_memory_wb(addr, numpages);
2050 if (ret)
2051 return ret;
2052
2053 memtype_free(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
2054 return 0;
2055}
2056EXPORT_SYMBOL(set_memory_wb);
2057
2058/* Prevent speculative access to a page by marking it not-present */
2059#ifdef CONFIG_X86_64
2060int set_mce_nospec(unsigned long pfn)
2061{
2062 unsigned long decoy_addr;
2063 int rc;
2064
2065 /* SGX pages are not in the 1:1 map */
2066 if (arch_is_platform_page(pfn << PAGE_SHIFT))
2067 return 0;
2068 /*
2069 * We would like to just call:
2070 * set_memory_XX((unsigned long)pfn_to_kaddr(pfn), 1);
2071 * but doing that would radically increase the odds of a
2072 * speculative access to the poison page because we'd have
2073 * the virtual address of the kernel 1:1 mapping sitting
2074 * around in registers.
2075 * Instead we get tricky. We create a non-canonical address
2076 * that looks just like the one we want, but has bit 63 flipped.
2077 * This relies on set_memory_XX() properly sanitizing any __pa()
2078 * results with __PHYSICAL_MASK or PTE_PFN_MASK.
2079 */
2080 decoy_addr = (pfn << PAGE_SHIFT) + (PAGE_OFFSET ^ BIT(63));
2081
2082 rc = set_memory_np(decoy_addr, 1);
2083 if (rc)
2084 pr_warn("Could not invalidate pfn=0x%lx from 1:1 map\n", pfn);
2085 return rc;
2086}
2087
2088/* Restore full speculative operation to the pfn. */
2089int clear_mce_nospec(unsigned long pfn)
2090{
2091 unsigned long addr = (unsigned long) pfn_to_kaddr(pfn);
2092
2093 return set_memory_p(addr, 1);
2094}
2095EXPORT_SYMBOL_GPL(clear_mce_nospec);
2096#endif /* CONFIG_X86_64 */
2097
2098int set_memory_x(unsigned long addr, int numpages)
2099{
2100 if (!(__supported_pte_mask & _PAGE_NX))
2101 return 0;
2102
2103 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
2104}
2105
2106int set_memory_nx(unsigned long addr, int numpages)
2107{
2108 if (!(__supported_pte_mask & _PAGE_NX))
2109 return 0;
2110
2111 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
2112}
2113
2114int set_memory_ro(unsigned long addr, int numpages)
2115{
2116 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW | _PAGE_DIRTY), 0);
2117}
2118
2119int set_memory_rox(unsigned long addr, int numpages)
2120{
2121 pgprot_t clr = __pgprot(_PAGE_RW | _PAGE_DIRTY);
2122
2123 if (__supported_pte_mask & _PAGE_NX)
2124 clr.pgprot |= _PAGE_NX;
2125
2126 return change_page_attr_clear(&addr, numpages, clr, 0);
2127}
2128
2129int set_memory_rw(unsigned long addr, int numpages)
2130{
2131 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
2132}
2133
2134int set_memory_np(unsigned long addr, int numpages)
2135{
2136 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
2137}
2138
2139int set_memory_np_noalias(unsigned long addr, int numpages)
2140{
2141 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
2142 __pgprot(_PAGE_PRESENT), 0,
2143 CPA_NO_CHECK_ALIAS, NULL);
2144}
2145
2146int set_memory_p(unsigned long addr, int numpages)
2147{
2148 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
2149}
2150
2151int set_memory_4k(unsigned long addr, int numpages)
2152{
2153 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
2154 __pgprot(0), 1, 0, NULL);
2155}
2156
2157int set_memory_nonglobal(unsigned long addr, int numpages)
2158{
2159 return change_page_attr_clear(&addr, numpages,
2160 __pgprot(_PAGE_GLOBAL), 0);
2161}
2162
2163int set_memory_global(unsigned long addr, int numpages)
2164{
2165 return change_page_attr_set(&addr, numpages,
2166 __pgprot(_PAGE_GLOBAL), 0);
2167}
2168
2169/*
2170 * __set_memory_enc_pgtable() is used for the hypervisors that get
2171 * informed about "encryption" status via page tables.
2172 */
2173static int __set_memory_enc_pgtable(unsigned long addr, int numpages, bool enc)
2174{
2175 pgprot_t empty = __pgprot(0);
2176 struct cpa_data cpa;
2177 int ret;
2178
2179 /* Should not be working on unaligned addresses */
2180 if (WARN_ONCE(addr & ~PAGE_MASK, "misaligned address: %#lx\n", addr))
2181 addr &= PAGE_MASK;
2182
2183 memset(&cpa, 0, sizeof(cpa));
2184 cpa.vaddr = &addr;
2185 cpa.numpages = numpages;
2186 cpa.mask_set = enc ? pgprot_encrypted(empty) : pgprot_decrypted(empty);
2187 cpa.mask_clr = enc ? pgprot_decrypted(empty) : pgprot_encrypted(empty);
2188 cpa.pgd = init_mm.pgd;
2189
2190 /* Must avoid aliasing mappings in the highmem code */
2191 kmap_flush_unused();
2192 vm_unmap_aliases();
2193
2194 /* Flush the caches as needed before changing the encryption attribute. */
2195 if (x86_platform.guest.enc_tlb_flush_required(enc))
2196 cpa_flush(&cpa, x86_platform.guest.enc_cache_flush_required());
2197
2198 /* Notify hypervisor that we are about to set/clr encryption attribute. */
2199 if (!x86_platform.guest.enc_status_change_prepare(addr, numpages, enc))
2200 goto vmm_fail;
2201
2202 ret = __change_page_attr_set_clr(&cpa, 1);
2203
2204 /*
2205 * After changing the encryption attribute, we need to flush TLBs again
2206 * in case any speculative TLB caching occurred (but no need to flush
2207 * caches again). We could just use cpa_flush_all(), but in case TLB
2208 * flushing gets optimized in the cpa_flush() path use the same logic
2209 * as above.
2210 */
2211 cpa_flush(&cpa, 0);
2212
2213 if (ret)
2214 return ret;
2215
2216 /* Notify hypervisor that we have successfully set/clr encryption attribute. */
2217 if (!x86_platform.guest.enc_status_change_finish(addr, numpages, enc))
2218 goto vmm_fail;
2219
2220 return 0;
2221
2222vmm_fail:
2223 WARN_ONCE(1, "CPA VMM failure to convert memory (addr=%p, numpages=%d) to %s.\n",
2224 (void *)addr, numpages, enc ? "private" : "shared");
2225
2226 return -EIO;
2227}
2228
2229static int __set_memory_enc_dec(unsigned long addr, int numpages, bool enc)
2230{
2231 if (cc_platform_has(CC_ATTR_MEM_ENCRYPT))
2232 return __set_memory_enc_pgtable(addr, numpages, enc);
2233
2234 return 0;
2235}
2236
2237int set_memory_encrypted(unsigned long addr, int numpages)
2238{
2239 return __set_memory_enc_dec(addr, numpages, true);
2240}
2241EXPORT_SYMBOL_GPL(set_memory_encrypted);
2242
2243int set_memory_decrypted(unsigned long addr, int numpages)
2244{
2245 return __set_memory_enc_dec(addr, numpages, false);
2246}
2247EXPORT_SYMBOL_GPL(set_memory_decrypted);
2248
2249int set_pages_uc(struct page *page, int numpages)
2250{
2251 unsigned long addr = (unsigned long)page_address(page);
2252
2253 return set_memory_uc(addr, numpages);
2254}
2255EXPORT_SYMBOL(set_pages_uc);
2256
2257static int _set_pages_array(struct page **pages, int numpages,
2258 enum page_cache_mode new_type)
2259{
2260 unsigned long start;
2261 unsigned long end;
2262 enum page_cache_mode set_type;
2263 int i;
2264 int free_idx;
2265 int ret;
2266
2267 for (i = 0; i < numpages; i++) {
2268 if (PageHighMem(pages[i]))
2269 continue;
2270 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2271 end = start + PAGE_SIZE;
2272 if (memtype_reserve(start, end, new_type, NULL))
2273 goto err_out;
2274 }
2275
2276 /* If WC, set to UC- first and then WC */
2277 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
2278 _PAGE_CACHE_MODE_UC_MINUS : new_type;
2279
2280 ret = cpa_set_pages_array(pages, numpages,
2281 cachemode2pgprot(set_type));
2282 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
2283 ret = change_page_attr_set_clr(NULL, numpages,
2284 cachemode2pgprot(
2285 _PAGE_CACHE_MODE_WC),
2286 __pgprot(_PAGE_CACHE_MASK),
2287 0, CPA_PAGES_ARRAY, pages);
2288 if (ret)
2289 goto err_out;
2290 return 0; /* Success */
2291err_out:
2292 free_idx = i;
2293 for (i = 0; i < free_idx; i++) {
2294 if (PageHighMem(pages[i]))
2295 continue;
2296 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2297 end = start + PAGE_SIZE;
2298 memtype_free(start, end);
2299 }
2300 return -EINVAL;
2301}
2302
2303int set_pages_array_uc(struct page **pages, int numpages)
2304{
2305 return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_UC_MINUS);
2306}
2307EXPORT_SYMBOL(set_pages_array_uc);
2308
2309int set_pages_array_wc(struct page **pages, int numpages)
2310{
2311 return _set_pages_array(pages, numpages, _PAGE_CACHE_MODE_WC);
2312}
2313EXPORT_SYMBOL(set_pages_array_wc);
2314
2315int set_pages_wb(struct page *page, int numpages)
2316{
2317 unsigned long addr = (unsigned long)page_address(page);
2318
2319 return set_memory_wb(addr, numpages);
2320}
2321EXPORT_SYMBOL(set_pages_wb);
2322
2323int set_pages_array_wb(struct page **pages, int numpages)
2324{
2325 int retval;
2326 unsigned long start;
2327 unsigned long end;
2328 int i;
2329
2330 /* WB cache mode is hard wired to all cache attribute bits being 0 */
2331 retval = cpa_clear_pages_array(pages, numpages,
2332 __pgprot(_PAGE_CACHE_MASK));
2333 if (retval)
2334 return retval;
2335
2336 for (i = 0; i < numpages; i++) {
2337 if (PageHighMem(pages[i]))
2338 continue;
2339 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
2340 end = start + PAGE_SIZE;
2341 memtype_free(start, end);
2342 }
2343
2344 return 0;
2345}
2346EXPORT_SYMBOL(set_pages_array_wb);
2347
2348int set_pages_ro(struct page *page, int numpages)
2349{
2350 unsigned long addr = (unsigned long)page_address(page);
2351
2352 return set_memory_ro(addr, numpages);
2353}
2354
2355int set_pages_rw(struct page *page, int numpages)
2356{
2357 unsigned long addr = (unsigned long)page_address(page);
2358
2359 return set_memory_rw(addr, numpages);
2360}
2361
2362static int __set_pages_p(struct page *page, int numpages)
2363{
2364 unsigned long tempaddr = (unsigned long) page_address(page);
2365 struct cpa_data cpa = { .vaddr = &tempaddr,
2366 .pgd = NULL,
2367 .numpages = numpages,
2368 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2369 .mask_clr = __pgprot(0),
2370 .flags = CPA_NO_CHECK_ALIAS };
2371
2372 /*
2373 * No alias checking needed for setting present flag. otherwise,
2374 * we may need to break large pages for 64-bit kernel text
2375 * mappings (this adds to complexity if we want to do this from
2376 * atomic context especially). Let's keep it simple!
2377 */
2378 return __change_page_attr_set_clr(&cpa, 1);
2379}
2380
2381static int __set_pages_np(struct page *page, int numpages)
2382{
2383 unsigned long tempaddr = (unsigned long) page_address(page);
2384 struct cpa_data cpa = { .vaddr = &tempaddr,
2385 .pgd = NULL,
2386 .numpages = numpages,
2387 .mask_set = __pgprot(0),
2388 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2389 .flags = CPA_NO_CHECK_ALIAS };
2390
2391 /*
2392 * No alias checking needed for setting not present flag. otherwise,
2393 * we may need to break large pages for 64-bit kernel text
2394 * mappings (this adds to complexity if we want to do this from
2395 * atomic context especially). Let's keep it simple!
2396 */
2397 return __change_page_attr_set_clr(&cpa, 1);
2398}
2399
2400int set_direct_map_invalid_noflush(struct page *page)
2401{
2402 return __set_pages_np(page, 1);
2403}
2404
2405int set_direct_map_default_noflush(struct page *page)
2406{
2407 return __set_pages_p(page, 1);
2408}
2409
2410#ifdef CONFIG_DEBUG_PAGEALLOC
2411void __kernel_map_pages(struct page *page, int numpages, int enable)
2412{
2413 if (PageHighMem(page))
2414 return;
2415 if (!enable) {
2416 debug_check_no_locks_freed(page_address(page),
2417 numpages * PAGE_SIZE);
2418 }
2419
2420 /*
2421 * The return value is ignored as the calls cannot fail.
2422 * Large pages for identity mappings are not used at boot time
2423 * and hence no memory allocations during large page split.
2424 */
2425 if (enable)
2426 __set_pages_p(page, numpages);
2427 else
2428 __set_pages_np(page, numpages);
2429
2430 /*
2431 * We should perform an IPI and flush all tlbs,
2432 * but that can deadlock->flush only current cpu.
2433 * Preemption needs to be disabled around __flush_tlb_all() due to
2434 * CR3 reload in __native_flush_tlb().
2435 */
2436 preempt_disable();
2437 __flush_tlb_all();
2438 preempt_enable();
2439
2440 arch_flush_lazy_mmu_mode();
2441}
2442#endif /* CONFIG_DEBUG_PAGEALLOC */
2443
2444bool kernel_page_present(struct page *page)
2445{
2446 unsigned int level;
2447 pte_t *pte;
2448
2449 if (PageHighMem(page))
2450 return false;
2451
2452 pte = lookup_address((unsigned long)page_address(page), &level);
2453 return (pte_val(*pte) & _PAGE_PRESENT);
2454}
2455
2456int __init kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2457 unsigned numpages, unsigned long page_flags)
2458{
2459 int retval = -EINVAL;
2460
2461 struct cpa_data cpa = {
2462 .vaddr = &address,
2463 .pfn = pfn,
2464 .pgd = pgd,
2465 .numpages = numpages,
2466 .mask_set = __pgprot(0),
2467 .mask_clr = __pgprot(~page_flags & (_PAGE_NX|_PAGE_RW)),
2468 .flags = CPA_NO_CHECK_ALIAS,
2469 };
2470
2471 WARN_ONCE(num_online_cpus() > 1, "Don't call after initializing SMP");
2472
2473 if (!(__supported_pte_mask & _PAGE_NX))
2474 goto out;
2475
2476 if (!(page_flags & _PAGE_ENC))
2477 cpa.mask_clr = pgprot_encrypted(cpa.mask_clr);
2478
2479 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2480
2481 retval = __change_page_attr_set_clr(&cpa, 1);
2482 __flush_tlb_all();
2483
2484out:
2485 return retval;
2486}
2487
2488/*
2489 * __flush_tlb_all() flushes mappings only on current CPU and hence this
2490 * function shouldn't be used in an SMP environment. Presently, it's used only
2491 * during boot (way before smp_init()) by EFI subsystem and hence is ok.
2492 */
2493int __init kernel_unmap_pages_in_pgd(pgd_t *pgd, unsigned long address,
2494 unsigned long numpages)
2495{
2496 int retval;
2497
2498 /*
2499 * The typical sequence for unmapping is to find a pte through
2500 * lookup_address_in_pgd() (ideally, it should never return NULL because
2501 * the address is already mapped) and change its protections. As pfn is
2502 * the *target* of a mapping, it's not useful while unmapping.
2503 */
2504 struct cpa_data cpa = {
2505 .vaddr = &address,
2506 .pfn = 0,
2507 .pgd = pgd,
2508 .numpages = numpages,
2509 .mask_set = __pgprot(0),
2510 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
2511 .flags = CPA_NO_CHECK_ALIAS,
2512 };
2513
2514 WARN_ONCE(num_online_cpus() > 1, "Don't call after initializing SMP");
2515
2516 retval = __change_page_attr_set_clr(&cpa, 1);
2517 __flush_tlb_all();
2518
2519 return retval;
2520}
2521
2522/*
2523 * The testcases use internal knowledge of the implementation that shouldn't
2524 * be exposed to the rest of the kernel. Include these directly here.
2525 */
2526#ifdef CONFIG_CPA_DEBUG
2527#include "cpa-test.c"
2528#endif