1// SPDX-License-Identifier: GPL-2.0
   2#include <linux/module.h>
   3#include <linux/kernel.h>
   4#include <linux/init.h>
   5#include <linux/platform_device.h>
   6#include <linux/clkdev.h>
   7#include <linux/clk-provider.h>
   8#include <linux/dma-mapping.h>
   9#include <linux/dmaengine.h>
  10#include <linux/spi/pxa2xx_spi.h>
  11#include <linux/platform_data/i2c-pxa.h>
  12#include <linux/soc/pxa/cpu.h>
  13
  14#include "udc.h"
  15#include <linux/platform_data/usb-pxa3xx-ulpi.h>
  16#include <linux/platform_data/video-pxafb.h>
  17#include <linux/platform_data/mmc-pxamci.h>
  18#include <linux/platform_data/irda-pxaficp.h>
  19#include "irqs.h"
  20#include <linux/platform_data/usb-ohci-pxa27x.h>
  21#include <linux/platform_data/keypad-pxa27x.h>
  22#include <linux/platform_data/media/camera-pxa.h>
  23#include <linux/platform_data/asoc-pxa.h>
  24#include <linux/platform_data/mmp_dma.h>
  25#include <linux/platform_data/mtd-nand-pxa3xx.h>
  26
  27#include "regs-ost.h"
  28#include "reset.h"
  29#include "devices.h"
  30#include "generic.h"
  31
  32void __init pxa_register_device(struct platform_device *dev, void *data)
  33{
  34	int ret;
  35
  36	dev->dev.platform_data = data;
  37
  38	ret = platform_device_register(dev);
  39	if (ret)
  40		dev_err(&dev->dev, "unable to register device: %d\n", ret);
  41}
  42
  43static struct resource pxa_resource_pmu = {
  44	.start	= IRQ_PMU,
  45	.end	= IRQ_PMU,
  46	.flags	= IORESOURCE_IRQ,
  47};
  48
  49struct platform_device pxa_device_pmu = {
  50	.name		= "xscale-pmu",
  51	.id		= -1,
  52	.resource	= &pxa_resource_pmu,
  53	.num_resources	= 1,
  54};
  55
  56static struct resource pxamci_resources[] = {
  57	[0] = {
  58		.start	= 0x41100000,
  59		.end	= 0x41100fff,
  60		.flags	= IORESOURCE_MEM,
  61	},
  62	[1] = {
  63		.start	= IRQ_MMC,
  64		.end	= IRQ_MMC,
  65		.flags	= IORESOURCE_IRQ,
  66	},
  67};
  68
  69static u64 pxamci_dmamask = 0xffffffffUL;
  70
  71struct platform_device pxa_device_mci = {
  72	.name		= "pxa2xx-mci",
  73	.id		= 0,
  74	.dev		= {
  75		.dma_mask = &pxamci_dmamask,
  76		.coherent_dma_mask = 0xffffffff,
  77	},
  78	.num_resources	= ARRAY_SIZE(pxamci_resources),
  79	.resource	= pxamci_resources,
  80};
  81
  82void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  83{
  84	pxa_register_device(&pxa_device_mci, info);
  85}
  86
  87
  88static struct pxa2xx_udc_mach_info pxa_udc_info = {
  89	.gpio_pullup = -1,
  90};
  91
  92void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  93{
  94	memcpy(&pxa_udc_info, info, sizeof *info);
  95}
  96
  97static struct resource pxa2xx_udc_resources[] = {
  98	[0] = {
  99		.start	= 0x40600000,
 100		.end	= 0x4060ffff,
 101		.flags	= IORESOURCE_MEM,
 102	},
 103	[1] = {
 104		.start	= IRQ_USB,
 105		.end	= IRQ_USB,
 106		.flags	= IORESOURCE_IRQ,
 107	},
 108};
 109
 110static u64 udc_dma_mask = ~(u32)0;
 111
 112struct platform_device pxa25x_device_udc = {
 113	.name		= "pxa25x-udc",
 114	.id		= -1,
 115	.resource	= pxa2xx_udc_resources,
 116	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
 117	.dev		=  {
 118		.platform_data	= &pxa_udc_info,
 119		.dma_mask	= &udc_dma_mask,
 120	}
 121};
 122
 123struct platform_device pxa27x_device_udc = {
 124	.name		= "pxa27x-udc",
 125	.id		= -1,
 126	.resource	= pxa2xx_udc_resources,
 127	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
 128	.dev		=  {
 129		.platform_data	= &pxa_udc_info,
 130		.dma_mask	= &udc_dma_mask,
 131	}
 132};
 133
 134#ifdef CONFIG_PXA3xx
 135static struct resource pxa3xx_u2d_resources[] = {
 136	[0] = {
 137		.start	= 0x54100000,
 138		.end	= 0x54100fff,
 139		.flags	= IORESOURCE_MEM,
 140	},
 141	[1] = {
 142		.start	= IRQ_USB2,
 143		.end	= IRQ_USB2,
 144		.flags	= IORESOURCE_IRQ,
 145	},
 146};
 147
 148struct platform_device pxa3xx_device_u2d = {
 149	.name		= "pxa3xx-u2d",
 150	.id		= -1,
 151	.resource	= pxa3xx_u2d_resources,
 152	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
 153};
 154
 155void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
 156{
 157	pxa_register_device(&pxa3xx_device_u2d, info);
 158}
 159#endif /* CONFIG_PXA3xx */
 160
 161static struct resource pxafb_resources[] = {
 162	[0] = {
 163		.start	= 0x44000000,
 164		.end	= 0x4400ffff,
 165		.flags	= IORESOURCE_MEM,
 166	},
 167	[1] = {
 168		.start	= IRQ_LCD,
 169		.end	= IRQ_LCD,
 170		.flags	= IORESOURCE_IRQ,
 171	},
 172};
 173
 174static u64 fb_dma_mask = ~(u64)0;
 175
 176struct platform_device pxa_device_fb = {
 177	.name		= "pxa2xx-fb",
 178	.id		= -1,
 179	.dev		= {
 180		.dma_mask	= &fb_dma_mask,
 181		.coherent_dma_mask = 0xffffffff,
 182	},
 183	.num_resources	= ARRAY_SIZE(pxafb_resources),
 184	.resource	= pxafb_resources,
 185};
 186
 187void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
 188{
 189	pxa_device_fb.dev.parent = parent;
 190	pxa_register_device(&pxa_device_fb, info);
 191}
 192
 193static struct resource pxa_resource_ffuart[] = {
 194	{
 195		.start	= 0x40100000,
 196		.end	= 0x40100023,
 197		.flags	= IORESOURCE_MEM,
 198	}, {
 199		.start	= IRQ_FFUART,
 200		.end	= IRQ_FFUART,
 201		.flags	= IORESOURCE_IRQ,
 202	}
 203};
 204
 205struct platform_device pxa_device_ffuart = {
 206	.name		= "pxa2xx-uart",
 207	.id		= 0,
 208	.resource	= pxa_resource_ffuart,
 209	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
 210};
 211
 212void __init pxa_set_ffuart_info(void *info)
 213{
 214	pxa_register_device(&pxa_device_ffuart, info);
 215}
 216
 217static struct resource pxa_resource_btuart[] = {
 218	{
 219		.start	= 0x40200000,
 220		.end	= 0x40200023,
 221		.flags	= IORESOURCE_MEM,
 222	}, {
 223		.start	= IRQ_BTUART,
 224		.end	= IRQ_BTUART,
 225		.flags	= IORESOURCE_IRQ,
 226	}
 227};
 228
 229struct platform_device pxa_device_btuart = {
 230	.name		= "pxa2xx-uart",
 231	.id		= 1,
 232	.resource	= pxa_resource_btuart,
 233	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
 234};
 235
 236void __init pxa_set_btuart_info(void *info)
 237{
 238	pxa_register_device(&pxa_device_btuart, info);
 239}
 240
 241static struct resource pxa_resource_stuart[] = {
 242	{
 243		.start	= 0x40700000,
 244		.end	= 0x40700023,
 245		.flags	= IORESOURCE_MEM,
 246	}, {
 247		.start	= IRQ_STUART,
 248		.end	= IRQ_STUART,
 249		.flags	= IORESOURCE_IRQ,
 250	}
 251};
 252
 253struct platform_device pxa_device_stuart = {
 254	.name		= "pxa2xx-uart",
 255	.id		= 2,
 256	.resource	= pxa_resource_stuart,
 257	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
 258};
 259
 260void __init pxa_set_stuart_info(void *info)
 261{
 262	pxa_register_device(&pxa_device_stuart, info);
 263}
 264
 265static struct resource pxa_resource_hwuart[] = {
 266	{
 267		.start	= 0x41600000,
 268		.end	= 0x4160002F,
 269		.flags	= IORESOURCE_MEM,
 270	}, {
 271		.start	= IRQ_HWUART,
 272		.end	= IRQ_HWUART,
 273		.flags	= IORESOURCE_IRQ,
 274	}
 275};
 276
 277struct platform_device pxa_device_hwuart = {
 278	.name		= "pxa2xx-uart",
 279	.id		= 3,
 280	.resource	= pxa_resource_hwuart,
 281	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
 282};
 283
 284void __init pxa_set_hwuart_info(void *info)
 285{
 286	if (cpu_is_pxa255())
 287		pxa_register_device(&pxa_device_hwuart, info);
 288	else
 289		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
 290}
 291
 292static struct resource pxai2c_resources[] = {
 293	{
 294		.start	= 0x40301680,
 295		.end	= 0x403016a3,
 296		.flags	= IORESOURCE_MEM,
 297	}, {
 298		.start	= IRQ_I2C,
 299		.end	= IRQ_I2C,
 300		.flags	= IORESOURCE_IRQ,
 301	},
 302};
 303
 304struct platform_device pxa_device_i2c = {
 305	.name		= "pxa2xx-i2c",
 306	.id		= 0,
 307	.resource	= pxai2c_resources,
 308	.num_resources	= ARRAY_SIZE(pxai2c_resources),
 309};
 310
 311void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
 312{
 313	pxa_register_device(&pxa_device_i2c, info);
 314}
 315
 316#ifdef CONFIG_PXA27x
 317static struct resource pxa27x_resources_i2c_power[] = {
 318	{
 319		.start	= 0x40f00180,
 320		.end	= 0x40f001a3,
 321		.flags	= IORESOURCE_MEM,
 322	}, {
 323		.start	= IRQ_PWRI2C,
 324		.end	= IRQ_PWRI2C,
 325		.flags	= IORESOURCE_IRQ,
 326	},
 327};
 328
 329struct platform_device pxa27x_device_i2c_power = {
 330	.name		= "pxa2xx-i2c",
 331	.id		= 1,
 332	.resource	= pxa27x_resources_i2c_power,
 333	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
 334};
 335#endif
 336
 337static struct resource pxai2s_resources[] = {
 338	{
 339		.start	= 0x40400000,
 340		.end	= 0x40400083,
 341		.flags	= IORESOURCE_MEM,
 342	}, {
 343		.start	= IRQ_I2S,
 344		.end	= IRQ_I2S,
 345		.flags	= IORESOURCE_IRQ,
 346	},
 347};
 348
 349struct platform_device pxa_device_i2s = {
 350	.name		= "pxa2xx-i2s",
 351	.id		= -1,
 352	.resource	= pxai2s_resources,
 353	.num_resources	= ARRAY_SIZE(pxai2s_resources),
 354};
 355
 356struct platform_device pxa_device_asoc_ssp1 = {
 357	.name		= "pxa-ssp-dai",
 358	.id		= 0,
 359};
 360
 361struct platform_device pxa_device_asoc_ssp2= {
 362	.name		= "pxa-ssp-dai",
 363	.id		= 1,
 364};
 365
 366struct platform_device pxa_device_asoc_ssp3 = {
 367	.name		= "pxa-ssp-dai",
 368	.id		= 2,
 369};
 370
 371struct platform_device pxa_device_asoc_ssp4 = {
 372	.name		= "pxa-ssp-dai",
 373	.id		= 3,
 374};
 375
 376struct platform_device pxa_device_asoc_platform = {
 377	.name		= "pxa-pcm-audio",
 378	.id		= -1,
 379};
 380
 381static u64 pxaficp_dmamask = ~(u32)0;
 382
 383static struct resource pxa_ir_resources[] = {
 384	[0] = {
 385		.start  = IRQ_STUART,
 386		.end    = IRQ_STUART,
 387		.flags  = IORESOURCE_IRQ,
 388	},
 389	[1] = {
 390		.start  = IRQ_ICP,
 391		.end    = IRQ_ICP,
 392		.flags  = IORESOURCE_IRQ,
 393	},
 394	[3] = {
 395		.start  = 0x40800000,
 396		.end	= 0x4080001b,
 397		.flags  = IORESOURCE_MEM,
 398	},
 399	[4] = {
 400		.start  = 0x40700000,
 401		.end	= 0x40700023,
 402		.flags  = IORESOURCE_MEM,
 403	},
 404};
 405
 406struct platform_device pxa_device_ficp = {
 407	.name		= "pxa2xx-ir",
 408	.id		= -1,
 409	.num_resources	= ARRAY_SIZE(pxa_ir_resources),
 410	.resource	= pxa_ir_resources,
 411	.dev		= {
 412		.dma_mask = &pxaficp_dmamask,
 413		.coherent_dma_mask = 0xffffffff,
 414	},
 415};
 416
 417void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
 418{
 419	pxa_register_device(&pxa_device_ficp, info);
 420}
 421
 422static struct resource pxa_rtc_resources[] = {
 423	[0] = {
 424		.start  = 0x40900000,
 425		.end	= 0x40900000 + 0x3b,
 426		.flags  = IORESOURCE_MEM,
 427	},
 428	[1] = {
 429		.start  = IRQ_RTC1Hz,
 430		.end    = IRQ_RTC1Hz,
 431		.name	= "rtc 1Hz",
 432		.flags  = IORESOURCE_IRQ,
 433	},
 434	[2] = {
 435		.start  = IRQ_RTCAlrm,
 436		.end    = IRQ_RTCAlrm,
 437		.name	= "rtc alarm",
 438		.flags  = IORESOURCE_IRQ,
 439	},
 440};
 441
 442struct platform_device pxa_device_rtc = {
 443	.name		= "pxa-rtc",
 444	.id		= -1,
 445	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
 446	.resource       = pxa_rtc_resources,
 447};
 448
 449struct platform_device sa1100_device_rtc = {
 450	.name		= "sa1100-rtc",
 451	.id		= -1,
 452	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
 453	.resource       = pxa_rtc_resources,
 454};
 455
 456static struct resource pxa_ac97_resources[] = {
 457	[0] = {
 458		.start  = 0x40500000,
 459		.end	= 0x40500000 + 0xfff,
 460		.flags  = IORESOURCE_MEM,
 461	},
 462	[1] = {
 463		.start  = IRQ_AC97,
 464		.end    = IRQ_AC97,
 465		.flags  = IORESOURCE_IRQ,
 466	},
 467};
 468
 469static u64 pxa_ac97_dmamask = 0xffffffffUL;
 470
 471struct platform_device pxa_device_ac97 = {
 472	.name           = "pxa2xx-ac97",
 473	.id             = -1,
 474	.dev            = {
 475		.dma_mask = &pxa_ac97_dmamask,
 476		.coherent_dma_mask = 0xffffffff,
 477	},
 478	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
 479	.resource       = pxa_ac97_resources,
 480};
 481
 482void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
 483{
 484	int ret;
 485
 486	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK",
 487			   &pxa_device_ac97.dev);
 488	if (ret)
 489		pr_err("PXA AC97 clock1 alias error: %d\n", ret);
 490
 491	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK",
 492			    &pxa_device_ac97.dev);
 493	if (ret)
 494		pr_err("PXA AC97 clock2 alias error: %d\n", ret);
 495
 496	pxa_register_device(&pxa_device_ac97, ops);
 497}
 498
 499#ifdef CONFIG_PXA25x
 500
 501static struct resource pxa25x_resource_pwm0[] = {
 502	[0] = {
 503		.start	= 0x40b00000,
 504		.end	= 0x40b0000f,
 505		.flags	= IORESOURCE_MEM,
 506	},
 507};
 508
 509struct platform_device pxa25x_device_pwm0 = {
 510	.name		= "pxa25x-pwm",
 511	.id		= 0,
 512	.resource	= pxa25x_resource_pwm0,
 513	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
 514};
 515
 516static struct resource pxa25x_resource_pwm1[] = {
 517	[0] = {
 518		.start	= 0x40c00000,
 519		.end	= 0x40c0000f,
 520		.flags	= IORESOURCE_MEM,
 521	},
 522};
 523
 524struct platform_device pxa25x_device_pwm1 = {
 525	.name		= "pxa25x-pwm",
 526	.id		= 1,
 527	.resource	= pxa25x_resource_pwm1,
 528	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
 529};
 530
 531static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
 532
 533static struct resource pxa25x_resource_ssp[] = {
 534	[0] = {
 535		.start	= 0x41000000,
 536		.end	= 0x4100001f,
 537		.flags	= IORESOURCE_MEM,
 538	},
 539	[1] = {
 540		.start	= IRQ_SSP,
 541		.end	= IRQ_SSP,
 542		.flags	= IORESOURCE_IRQ,
 543	},
 544};
 545
 546struct platform_device pxa25x_device_ssp = {
 547	.name		= "pxa25x-ssp",
 548	.id		= 0,
 549	.dev		= {
 550		.dma_mask = &pxa25x_ssp_dma_mask,
 551		.coherent_dma_mask = DMA_BIT_MASK(32),
 552	},
 553	.resource	= pxa25x_resource_ssp,
 554	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
 555};
 556
 557static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
 558
 559static struct resource pxa25x_resource_nssp[] = {
 560	[0] = {
 561		.start	= 0x41400000,
 562		.end	= 0x4140002f,
 563		.flags	= IORESOURCE_MEM,
 564	},
 565	[1] = {
 566		.start	= IRQ_NSSP,
 567		.end	= IRQ_NSSP,
 568		.flags	= IORESOURCE_IRQ,
 569	},
 570};
 571
 572struct platform_device pxa25x_device_nssp = {
 573	.name		= "pxa25x-nssp",
 574	.id		= 1,
 575	.dev		= {
 576		.dma_mask = &pxa25x_nssp_dma_mask,
 577		.coherent_dma_mask = DMA_BIT_MASK(32),
 578	},
 579	.resource	= pxa25x_resource_nssp,
 580	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
 581};
 582
 583static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
 584
 585static struct resource pxa25x_resource_assp[] = {
 586	[0] = {
 587		.start	= 0x41500000,
 588		.end	= 0x4150002f,
 589		.flags	= IORESOURCE_MEM,
 590	},
 591	[1] = {
 592		.start	= IRQ_ASSP,
 593		.end	= IRQ_ASSP,
 594		.flags	= IORESOURCE_IRQ,
 595	},
 596};
 597
 598struct platform_device pxa25x_device_assp = {
 599	/* ASSP is basically equivalent to NSSP */
 600	.name		= "pxa25x-nssp",
 601	.id		= 2,
 602	.dev		= {
 603		.dma_mask = &pxa25x_assp_dma_mask,
 604		.coherent_dma_mask = DMA_BIT_MASK(32),
 605	},
 606	.resource	= pxa25x_resource_assp,
 607	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
 608};
 609#endif /* CONFIG_PXA25x */
 610
 611#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 612static struct resource pxa27x_resource_camera[] = {
 613	[0] = {
 614		.start	= 0x50000000,
 615		.end	= 0x50000fff,
 616		.flags	= IORESOURCE_MEM,
 617	},
 618	[1] = {
 619		.start	= IRQ_CAMERA,
 620		.end	= IRQ_CAMERA,
 621		.flags	= IORESOURCE_IRQ,
 622	},
 623};
 624
 625static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
 626
 627static struct platform_device pxa27x_device_camera = {
 628	.name		= "pxa27x-camera",
 629	.id		= 0, /* This is used to put cameras on this interface */
 630	.dev		= {
 631		.dma_mask      		= &pxa27x_dma_mask_camera,
 632		.coherent_dma_mask	= 0xffffffff,
 633	},
 634	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
 635	.resource	= pxa27x_resource_camera,
 636};
 637
 638void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
 639{
 640	struct clk *mclk;
 641
 642	/* Register a fixed-rate clock for camera sensors. */
 643	mclk = clk_register_fixed_rate(NULL, "pxa_camera_clk", NULL, 0,
 644					     info->mclk_10khz * 10000);
 645	if (!IS_ERR(mclk))
 646		clkdev_create(mclk, "mclk", NULL);
 647	pxa_register_device(&pxa27x_device_camera, info);
 648}
 649
 650static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
 651
 652static struct resource pxa27x_resource_ohci[] = {
 653	[0] = {
 654		.start  = 0x4C000000,
 655		.end    = 0x4C00ff6f,
 656		.flags  = IORESOURCE_MEM,
 657	},
 658	[1] = {
 659		.start  = IRQ_USBH1,
 660		.end    = IRQ_USBH1,
 661		.flags  = IORESOURCE_IRQ,
 662	},
 663};
 664
 665struct platform_device pxa27x_device_ohci = {
 666	.name		= "pxa27x-ohci",
 667	.id		= -1,
 668	.dev		= {
 669		.dma_mask = &pxa27x_ohci_dma_mask,
 670		.coherent_dma_mask = DMA_BIT_MASK(32),
 671	},
 672	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
 673	.resource       = pxa27x_resource_ohci,
 674};
 675
 676void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
 677{
 678	pxa_register_device(&pxa27x_device_ohci, info);
 679}
 680#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 681
 682#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 683static struct resource pxa27x_resource_keypad[] = {
 684	[0] = {
 685		.start	= 0x41500000,
 686		.end	= 0x4150004c,
 687		.flags	= IORESOURCE_MEM,
 688	},
 689	[1] = {
 690		.start	= IRQ_KEYPAD,
 691		.end	= IRQ_KEYPAD,
 692		.flags	= IORESOURCE_IRQ,
 693	},
 694};
 695
 696struct platform_device pxa27x_device_keypad = {
 697	.name		= "pxa27x-keypad",
 698	.id		= -1,
 699	.resource	= pxa27x_resource_keypad,
 700	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
 701};
 702
 703void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
 704{
 705	pxa_register_device(&pxa27x_device_keypad, info);
 706}
 707
 708static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
 709
 710static struct resource pxa27x_resource_ssp1[] = {
 711	[0] = {
 712		.start	= 0x41000000,
 713		.end	= 0x4100003f,
 714		.flags	= IORESOURCE_MEM,
 715	},
 716	[1] = {
 717		.start	= IRQ_SSP,
 718		.end	= IRQ_SSP,
 719		.flags	= IORESOURCE_IRQ,
 720	},
 721};
 722
 723struct platform_device pxa27x_device_ssp1 = {
 724	.name		= "pxa27x-ssp",
 725	.id		= 0,
 726	.dev		= {
 727		.dma_mask = &pxa27x_ssp1_dma_mask,
 728		.coherent_dma_mask = DMA_BIT_MASK(32),
 729	},
 730	.resource	= pxa27x_resource_ssp1,
 731	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
 732};
 733
 734static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
 735
 736static struct resource pxa27x_resource_ssp2[] = {
 737	[0] = {
 738		.start	= 0x41700000,
 739		.end	= 0x4170003f,
 740		.flags	= IORESOURCE_MEM,
 741	},
 742	[1] = {
 743		.start	= IRQ_SSP2,
 744		.end	= IRQ_SSP2,
 745		.flags	= IORESOURCE_IRQ,
 746	},
 747};
 748
 749struct platform_device pxa27x_device_ssp2 = {
 750	.name		= "pxa27x-ssp",
 751	.id		= 1,
 752	.dev		= {
 753		.dma_mask = &pxa27x_ssp2_dma_mask,
 754		.coherent_dma_mask = DMA_BIT_MASK(32),
 755	},
 756	.resource	= pxa27x_resource_ssp2,
 757	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
 758};
 759
 760static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
 761
 762static struct resource pxa27x_resource_ssp3[] = {
 763	[0] = {
 764		.start	= 0x41900000,
 765		.end	= 0x4190003f,
 766		.flags	= IORESOURCE_MEM,
 767	},
 768	[1] = {
 769		.start	= IRQ_SSP3,
 770		.end	= IRQ_SSP3,
 771		.flags	= IORESOURCE_IRQ,
 772	},
 773};
 774
 775struct platform_device pxa27x_device_ssp3 = {
 776	.name		= "pxa27x-ssp",
 777	.id		= 2,
 778	.dev		= {
 779		.dma_mask = &pxa27x_ssp3_dma_mask,
 780		.coherent_dma_mask = DMA_BIT_MASK(32),
 781	},
 782	.resource	= pxa27x_resource_ssp3,
 783	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
 784};
 785
 786static struct resource pxa27x_resource_pwm0[] = {
 787	[0] = {
 788		.start	= 0x40b00000,
 789		.end	= 0x40b0001f,
 790		.flags	= IORESOURCE_MEM,
 791	},
 792};
 793
 794struct platform_device pxa27x_device_pwm0 = {
 795	.name		= "pxa27x-pwm",
 796	.id		= 0,
 797	.resource	= pxa27x_resource_pwm0,
 798	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
 799};
 800
 801static struct resource pxa27x_resource_pwm1[] = {
 802	[0] = {
 803		.start	= 0x40c00000,
 804		.end	= 0x40c0001f,
 805		.flags	= IORESOURCE_MEM,
 806	},
 807};
 808
 809struct platform_device pxa27x_device_pwm1 = {
 810	.name		= "pxa27x-pwm",
 811	.id		= 1,
 812	.resource	= pxa27x_resource_pwm1,
 813	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
 814};
 815#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 816
 817#ifdef CONFIG_PXA3xx
 818static struct resource pxa3xx_resources_mci2[] = {
 819	[0] = {
 820		.start	= 0x42000000,
 821		.end	= 0x42000fff,
 822		.flags	= IORESOURCE_MEM,
 823	},
 824	[1] = {
 825		.start	= IRQ_MMC2,
 826		.end	= IRQ_MMC2,
 827		.flags	= IORESOURCE_IRQ,
 828	},
 829};
 830
 831struct platform_device pxa3xx_device_mci2 = {
 832	.name		= "pxa2xx-mci",
 833	.id		= 1,
 834	.dev		= {
 835		.dma_mask = &pxamci_dmamask,
 836		.coherent_dma_mask =	0xffffffff,
 837	},
 838	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
 839	.resource	= pxa3xx_resources_mci2,
 840};
 841
 842void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
 843{
 844	pxa_register_device(&pxa3xx_device_mci2, info);
 845}
 846
 847static struct resource pxa3xx_resources_mci3[] = {
 848	[0] = {
 849		.start	= 0x42500000,
 850		.end	= 0x42500fff,
 851		.flags	= IORESOURCE_MEM,
 852	},
 853	[1] = {
 854		.start	= IRQ_MMC3,
 855		.end	= IRQ_MMC3,
 856		.flags	= IORESOURCE_IRQ,
 857	},
 858};
 859
 860struct platform_device pxa3xx_device_mci3 = {
 861	.name		= "pxa2xx-mci",
 862	.id		= 2,
 863	.dev		= {
 864		.dma_mask = &pxamci_dmamask,
 865		.coherent_dma_mask = 0xffffffff,
 866	},
 867	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
 868	.resource	= pxa3xx_resources_mci3,
 869};
 870
 871void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
 872{
 873	pxa_register_device(&pxa3xx_device_mci3, info);
 874}
 875
 876static struct resource pxa3xx_resources_gcu[] = {
 877	{
 878		.start	= 0x54000000,
 879		.end	= 0x54000fff,
 880		.flags	= IORESOURCE_MEM,
 881	},
 882	{
 883		.start	= IRQ_GCU,
 884		.end	= IRQ_GCU,
 885		.flags	= IORESOURCE_IRQ,
 886	},
 887};
 888
 889static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
 890
 891struct platform_device pxa3xx_device_gcu = {
 892	.name		= "pxa3xx-gcu",
 893	.id		= -1,
 894	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
 895	.resource	= pxa3xx_resources_gcu,
 896	.dev		= {
 897		.dma_mask = &pxa3xx_gcu_dmamask,
 898		.coherent_dma_mask = 0xffffffff,
 899	},
 900};
 901
 902#endif /* CONFIG_PXA3xx */
 903
 904#if defined(CONFIG_PXA3xx)
 905static struct resource pxa3xx_resources_i2c_power[] = {
 906	{
 907		.start  = 0x40f500c0,
 908		.end    = 0x40f500d3,
 909		.flags	= IORESOURCE_MEM,
 910	}, {
 911		.start	= IRQ_PWRI2C,
 912		.end	= IRQ_PWRI2C,
 913		.flags	= IORESOURCE_IRQ,
 914	},
 915};
 916
 917struct platform_device pxa3xx_device_i2c_power = {
 918	.name		= "pxa3xx-pwri2c",
 919	.id		= 1,
 920	.resource	= pxa3xx_resources_i2c_power,
 921	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
 922};
 923
 924static struct resource pxa3xx_resources_nand[] = {
 925	[0] = {
 926		.start	= 0x43100000,
 927		.end	= 0x43100053,
 928		.flags	= IORESOURCE_MEM,
 929	},
 930	[1] = {
 931		.start	= IRQ_NAND,
 932		.end	= IRQ_NAND,
 933		.flags	= IORESOURCE_IRQ,
 934	},
 935};
 936
 937static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
 938
 939struct platform_device pxa3xx_device_nand = {
 940	.name		= "pxa3xx-nand",
 941	.id		= -1,
 942	.dev		= {
 943		.dma_mask = &pxa3xx_nand_dma_mask,
 944		.coherent_dma_mask = DMA_BIT_MASK(32),
 945	},
 946	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
 947	.resource	= pxa3xx_resources_nand,
 948};
 949
 950void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
 951{
 952	pxa_register_device(&pxa3xx_device_nand, info);
 953}
 954
 955static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
 956
 957static struct resource pxa3xx_resource_ssp4[] = {
 958	[0] = {
 959		.start	= 0x41a00000,
 960		.end	= 0x41a0003f,
 961		.flags	= IORESOURCE_MEM,
 962	},
 963	[1] = {
 964		.start	= IRQ_SSP4,
 965		.end	= IRQ_SSP4,
 966		.flags	= IORESOURCE_IRQ,
 967	},
 968};
 969
 970/*
 971 * PXA3xx SSP is basically equivalent to PXA27x.
 972 * However, we need to register the device by the correct name in order to
 973 * make the driver set the correct internal type, hence we provide specific
 974 * platform_devices for each of them.
 975 */
 976struct platform_device pxa3xx_device_ssp1 = {
 977	.name		= "pxa3xx-ssp",
 978	.id		= 0,
 979	.dev		= {
 980		.dma_mask = &pxa27x_ssp1_dma_mask,
 981		.coherent_dma_mask = DMA_BIT_MASK(32),
 982	},
 983	.resource	= pxa27x_resource_ssp1,
 984	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
 985};
 986
 987struct platform_device pxa3xx_device_ssp2 = {
 988	.name		= "pxa3xx-ssp",
 989	.id		= 1,
 990	.dev		= {
 991		.dma_mask = &pxa27x_ssp2_dma_mask,
 992		.coherent_dma_mask = DMA_BIT_MASK(32),
 993	},
 994	.resource	= pxa27x_resource_ssp2,
 995	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
 996};
 997
 998struct platform_device pxa3xx_device_ssp3 = {
 999	.name		= "pxa3xx-ssp",
1000	.id		= 2,
1001	.dev		= {
1002		.dma_mask = &pxa27x_ssp3_dma_mask,
1003		.coherent_dma_mask = DMA_BIT_MASK(32),
1004	},
1005	.resource	= pxa27x_resource_ssp3,
1006	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
1007};
1008
1009struct platform_device pxa3xx_device_ssp4 = {
1010	.name		= "pxa3xx-ssp",
1011	.id		= 3,
1012	.dev		= {
1013		.dma_mask = &pxa3xx_ssp4_dma_mask,
1014		.coherent_dma_mask = DMA_BIT_MASK(32),
1015	},
1016	.resource	= pxa3xx_resource_ssp4,
1017	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1018};
1019#endif /* CONFIG_PXA3xx */
1020
1021struct resource pxa_resource_gpio[] = {
1022	{
1023		.start	= 0x40e00000,
1024		.end	= 0x40e0ffff,
1025		.flags	= IORESOURCE_MEM,
1026	}, {
1027		.start	= IRQ_GPIO0,
1028		.end	= IRQ_GPIO0,
1029		.name	= "gpio0",
1030		.flags	= IORESOURCE_IRQ,
1031	}, {
1032		.start	= IRQ_GPIO1,
1033		.end	= IRQ_GPIO1,
1034		.name	= "gpio1",
1035		.flags	= IORESOURCE_IRQ,
1036	}, {
1037		.start	= IRQ_GPIO_2_x,
1038		.end	= IRQ_GPIO_2_x,
1039		.name	= "gpio_mux",
1040		.flags	= IORESOURCE_IRQ,
1041	},
1042};
1043
1044struct platform_device pxa25x_device_gpio = {
1045#ifdef CONFIG_CPU_PXA26x
1046	.name		= "pxa26x-gpio",
1047#else
1048	.name		= "pxa25x-gpio",
1049#endif
1050	.id		= -1,
1051	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1052	.resource	= pxa_resource_gpio,
1053};
1054
1055struct platform_device pxa27x_device_gpio = {
1056	.name		= "pxa27x-gpio",
1057	.id		= -1,
1058	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1059	.resource	= pxa_resource_gpio,
1060};
1061
1062struct platform_device pxa3xx_device_gpio = {
1063	.name		= "pxa3xx-gpio",
1064	.id		= -1,
1065	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1066	.resource	= pxa_resource_gpio,
1067};
1068
1069struct platform_device pxa93x_device_gpio = {
1070	.name		= "pxa93x-gpio",
1071	.id		= -1,
1072	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1073	.resource	= pxa_resource_gpio,
1074};
1075
1076/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1077 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1078void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)
1079{
1080	struct platform_device *pd;
1081
1082	pd = platform_device_alloc("pxa2xx-spi", id);
1083	if (pd == NULL) {
1084		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1085		       id);
1086		return;
1087	}
1088
1089	pd->dev.platform_data = info;
1090	platform_device_add(pd);
1091}
1092
1093static struct resource pxa_dma_resource[] = {
1094	[0] = {
1095		.start	= 0x40000000,
1096		.end	= 0x4000ffff,
1097		.flags	= IORESOURCE_MEM,
1098	},
1099	[1] = {
1100		.start	= IRQ_DMA,
1101		.end	= IRQ_DMA,
1102		.flags	= IORESOURCE_IRQ,
1103	},
1104};
1105
1106static u64 pxadma_dmamask = 0xffffffffUL;
1107
1108static struct platform_device pxa2xx_pxa_dma = {
1109	.name		= "pxa-dma",
1110	.id		= 0,
1111	.dev		= {
1112		.dma_mask = &pxadma_dmamask,
1113		.coherent_dma_mask = 0xffffffff,
1114	},
1115	.num_resources	= ARRAY_SIZE(pxa_dma_resource),
1116	.resource	= pxa_dma_resource,
1117};
1118
1119void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
1120{
1121	pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
1122}
1123
1124void __init pxa_register_wdt(unsigned int reset_status)
1125{
1126	struct resource res = DEFINE_RES_MEM(OST_PHYS, OST_LEN);
1127
1128	reset_status &= RESET_STATUS_WATCHDOG;
1129	platform_device_register_resndata(NULL, "sa1100_wdt", -1, &res, 1,
1130					  &reset_status, sizeof(reset_status));
1131}