Loading...
Note: File does not exist in v6.2.
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the r8a77470 SoC
4 *
5 * Copyright (C) 2018 Renesas Electronics Corp.
6 */
7
8#include <dt-bindings/interrupt-controller/irq.h>
9#include <dt-bindings/interrupt-controller/arm-gic.h>
10#include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11#include <dt-bindings/power/r8a77470-sysc.h>
12/ {
13 compatible = "renesas,r8a77470";
14 #address-cells = <2>;
15 #size-cells = <2>;
16
17 aliases {
18 i2c0 = &i2c0;
19 i2c1 = &i2c1;
20 i2c2 = &i2c2;
21 i2c3 = &i2c3;
22 i2c4 = &i2c4;
23 };
24
25 cpus {
26 #address-cells = <1>;
27 #size-cells = <0>;
28
29 cpu0: cpu@0 {
30 device_type = "cpu";
31 compatible = "arm,cortex-a7";
32 reg = <0>;
33 clock-frequency = <1000000000>;
34 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
35 power-domains = <&sysc R8A77470_PD_CA7_CPU0>;
36 enable-method = "renesas,apmu";
37 next-level-cache = <&L2_CA7>;
38 };
39
40 cpu1: cpu@1 {
41 device_type = "cpu";
42 compatible = "arm,cortex-a7";
43 reg = <1>;
44 clock-frequency = <1000000000>;
45 clocks = <&cpg CPG_CORE R8A77470_CLK_Z2>;
46 power-domains = <&sysc R8A77470_PD_CA7_CPU1>;
47 enable-method = "renesas,apmu";
48 next-level-cache = <&L2_CA7>;
49 };
50
51 L2_CA7: cache-controller-0 {
52 compatible = "cache";
53 cache-unified;
54 cache-level = <2>;
55 power-domains = <&sysc R8A77470_PD_CA7_SCU>;
56 };
57 };
58
59 /* External root clock */
60 extal_clk: extal {
61 compatible = "fixed-clock";
62 #clock-cells = <0>;
63 /* This value must be overridden by the board. */
64 clock-frequency = <0>;
65 };
66
67 pmu {
68 compatible = "arm,cortex-a7-pmu";
69 interrupts-extended = <&gic GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
70 <&gic GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
71 interrupt-affinity = <&cpu0>, <&cpu1>;
72 };
73
74 /* External SCIF clock */
75 scif_clk: scif {
76 compatible = "fixed-clock";
77 #clock-cells = <0>;
78 /* This value must be overridden by the board. */
79 clock-frequency = <0>;
80 };
81
82 soc {
83 compatible = "simple-bus";
84 interrupt-parent = <&gic>;
85
86 #address-cells = <2>;
87 #size-cells = <2>;
88 ranges;
89
90 rwdt: watchdog@e6020000 {
91 compatible = "renesas,r8a77470-wdt",
92 "renesas,rcar-gen2-wdt";
93 reg = <0 0xe6020000 0 0x0c>;
94 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
95 clocks = <&cpg CPG_MOD 402>;
96 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
97 resets = <&cpg 402>;
98 status = "disabled";
99 };
100
101 gpio0: gpio@e6050000 {
102 compatible = "renesas,gpio-r8a77470",
103 "renesas,rcar-gen2-gpio";
104 reg = <0 0xe6050000 0 0x50>;
105 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
106 #gpio-cells = <2>;
107 gpio-controller;
108 gpio-ranges = <&pfc 0 0 23>;
109 #interrupt-cells = <2>;
110 interrupt-controller;
111 clocks = <&cpg CPG_MOD 912>;
112 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
113 resets = <&cpg 912>;
114 };
115
116 gpio1: gpio@e6051000 {
117 compatible = "renesas,gpio-r8a77470",
118 "renesas,rcar-gen2-gpio";
119 reg = <0 0xe6051000 0 0x50>;
120 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
121 #gpio-cells = <2>;
122 gpio-controller;
123 gpio-ranges = <&pfc 0 32 23>;
124 #interrupt-cells = <2>;
125 interrupt-controller;
126 clocks = <&cpg CPG_MOD 911>;
127 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
128 resets = <&cpg 911>;
129 };
130
131 gpio2: gpio@e6052000 {
132 compatible = "renesas,gpio-r8a77470",
133 "renesas,rcar-gen2-gpio";
134 reg = <0 0xe6052000 0 0x50>;
135 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
136 #gpio-cells = <2>;
137 gpio-controller;
138 gpio-ranges = <&pfc 0 64 32>;
139 #interrupt-cells = <2>;
140 interrupt-controller;
141 clocks = <&cpg CPG_MOD 910>;
142 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
143 resets = <&cpg 910>;
144 };
145
146 gpio3: gpio@e6053000 {
147 compatible = "renesas,gpio-r8a77470",
148 "renesas,rcar-gen2-gpio";
149 reg = <0 0xe6053000 0 0x50>;
150 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
151 #gpio-cells = <2>;
152 gpio-controller;
153 gpio-ranges = <&pfc 0 96 30>;
154 gpio-reserved-ranges = <17 10>;
155 #interrupt-cells = <2>;
156 interrupt-controller;
157 clocks = <&cpg CPG_MOD 909>;
158 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
159 resets = <&cpg 909>;
160 };
161
162 gpio4: gpio@e6054000 {
163 compatible = "renesas,gpio-r8a77470",
164 "renesas,rcar-gen2-gpio";
165 reg = <0 0xe6054000 0 0x50>;
166 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
167 #gpio-cells = <2>;
168 gpio-controller;
169 gpio-ranges = <&pfc 0 128 26>;
170 #interrupt-cells = <2>;
171 interrupt-controller;
172 clocks = <&cpg CPG_MOD 908>;
173 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
174 resets = <&cpg 908>;
175 };
176
177 gpio5: gpio@e6055000 {
178 compatible = "renesas,gpio-r8a77470",
179 "renesas,rcar-gen2-gpio";
180 reg = <0 0xe6055000 0 0x50>;
181 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
182 #gpio-cells = <2>;
183 gpio-controller;
184 gpio-ranges = <&pfc 0 160 32>;
185 #interrupt-cells = <2>;
186 interrupt-controller;
187 clocks = <&cpg CPG_MOD 907>;
188 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
189 resets = <&cpg 907>;
190 };
191
192 pfc: pinctrl@e6060000 {
193 compatible = "renesas,pfc-r8a77470";
194 reg = <0 0xe6060000 0 0x118>;
195 };
196
197 cpg: clock-controller@e6150000 {
198 compatible = "renesas,r8a77470-cpg-mssr";
199 reg = <0 0xe6150000 0 0x1000>;
200 clocks = <&extal_clk>, <&usb_extal_clk>;
201 clock-names = "extal", "usb_extal";
202 #clock-cells = <2>;
203 #power-domain-cells = <0>;
204 #reset-cells = <1>;
205 };
206
207 apmu@e6151000 {
208 compatible = "renesas,r8a77470-apmu", "renesas,apmu";
209 reg = <0 0xe6151000 0 0x188>;
210 cpus = <&cpu0>, <&cpu1>;
211 };
212
213 rst: reset-controller@e6160000 {
214 compatible = "renesas,r8a77470-rst";
215 reg = <0 0xe6160000 0 0x100>;
216 };
217
218 sysc: system-controller@e6180000 {
219 compatible = "renesas,r8a77470-sysc";
220 reg = <0 0xe6180000 0 0x200>;
221 #power-domain-cells = <1>;
222 };
223
224 irqc: interrupt-controller@e61c0000 {
225 compatible = "renesas,irqc-r8a77470", "renesas,irqc";
226 #interrupt-cells = <2>;
227 interrupt-controller;
228 reg = <0 0xe61c0000 0 0x200>;
229 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
230 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
231 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
232 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
233 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
234 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
235 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
236 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
237 <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
238 <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
239 clocks = <&cpg CPG_MOD 407>;
240 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
241 resets = <&cpg 407>;
242 };
243
244 icram0: sram@e63a0000 {
245 compatible = "mmio-sram";
246 reg = <0 0xe63a0000 0 0x12000>;
247 #address-cells = <1>;
248 #size-cells = <1>;
249 ranges = <0 0 0xe63a0000 0x12000>;
250 };
251
252 icram1: sram@e63c0000 {
253 compatible = "mmio-sram";
254 reg = <0 0xe63c0000 0 0x1000>;
255 #address-cells = <1>;
256 #size-cells = <1>;
257 ranges = <0 0 0xe63c0000 0x1000>;
258
259 smp-sram@0 {
260 compatible = "renesas,smp-sram";
261 reg = <0 0x100>;
262 };
263 };
264
265 icram2: sram@e6300000 {
266 compatible = "mmio-sram";
267 reg = <0 0xe6300000 0 0x20000>;
268 #address-cells = <1>;
269 #size-cells = <1>;
270 ranges = <0 0 0xe6300000 0x20000>;
271 };
272
273 i2c0: i2c@e6508000 {
274 #address-cells = <1>;
275 #size-cells = <0>;
276 compatible = "renesas,i2c-r8a77470",
277 "renesas,rcar-gen2-i2c";
278 reg = <0 0xe6508000 0 0x40>;
279 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
280 clocks = <&cpg CPG_MOD 931>;
281 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
282 resets = <&cpg 931>;
283 i2c-scl-internal-delay-ns = <6>;
284 status = "disabled";
285 };
286
287 i2c1: i2c@e6518000 {
288 #address-cells = <1>;
289 #size-cells = <0>;
290 compatible = "renesas,i2c-r8a77470",
291 "renesas,rcar-gen2-i2c";
292 reg = <0 0xe6518000 0 0x40>;
293 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
294 clocks = <&cpg CPG_MOD 930>;
295 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
296 resets = <&cpg 930>;
297 i2c-scl-internal-delay-ns = <6>;
298 status = "disabled";
299 };
300
301 i2c2: i2c@e6530000 {
302 #address-cells = <1>;
303 #size-cells = <0>;
304 compatible = "renesas,i2c-r8a77470",
305 "renesas,rcar-gen2-i2c";
306 reg = <0 0xe6530000 0 0x40>;
307 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
308 clocks = <&cpg CPG_MOD 929>;
309 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
310 resets = <&cpg 929>;
311 i2c-scl-internal-delay-ns = <6>;
312 status = "disabled";
313 };
314
315 i2c3: i2c@e6540000 {
316 #address-cells = <1>;
317 #size-cells = <0>;
318 compatible = "renesas,i2c-r8a77470",
319 "renesas,rcar-gen2-i2c";
320 reg = <0 0xe6540000 0 0x40>;
321 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
322 clocks = <&cpg CPG_MOD 928>;
323 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
324 resets = <&cpg 928>;
325 i2c-scl-internal-delay-ns = <6>;
326 status = "disabled";
327 };
328
329 i2c4: i2c@e6520000 {
330 #address-cells = <1>;
331 #size-cells = <0>;
332 compatible = "renesas,i2c-r8a77470",
333 "renesas,rcar-gen2-i2c";
334 reg = <0 0xe6520000 0 0x40>;
335 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
336 clocks = <&cpg CPG_MOD 927>;
337 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
338 resets = <&cpg 927>;
339 i2c-scl-internal-delay-ns = <6>;
340 status = "disabled";
341 };
342
343 hsusb0: hsusb@e6590000 {
344 compatible = "renesas,usbhs-r8a77470",
345 "renesas,rcar-gen2-usbhs";
346 reg = <0 0xe6590000 0 0x100>;
347 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
348 clocks = <&cpg CPG_MOD 704>;
349 dmas = <&usb_dmac00 0>, <&usb_dmac00 1>,
350 <&usb_dmac10 0>, <&usb_dmac10 1>;
351 dma-names = "ch0", "ch1", "ch2", "ch3";
352 renesas,buswait = <4>;
353 phys = <&usb0 1>;
354 phy-names = "usb";
355 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
356 resets = <&cpg 704>;
357 status = "disabled";
358 };
359
360 usbphy0: usb-phy-controller@e6590100 {
361 compatible = "renesas,usb-phy-r8a77470",
362 "renesas,rcar-gen2-usb-phy";
363 reg = <0 0xe6590100 0 0x100>;
364 #address-cells = <1>;
365 #size-cells = <0>;
366 clocks = <&cpg CPG_MOD 704>;
367 clock-names = "usbhs";
368 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
369 resets = <&cpg 704>;
370 status = "disabled";
371
372 usb0: usb-phy@0 {
373 reg = <0>;
374 #phy-cells = <1>;
375 };
376 };
377
378 hsusb1: hsusb@e6598000 {
379 compatible = "renesas,usbhs-r8a77470",
380 "renesas,rcar-gen2-usbhs";
381 reg = <0 0xe6598000 0 0x100>;
382 interrupts = <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>;
383 clocks = <&cpg CPG_MOD 706>;
384 dmas = <&usb_dmac01 0>, <&usb_dmac01 1>,
385 <&usb_dmac11 0>, <&usb_dmac11 1>;
386 dma-names = "ch0", "ch1", "ch2", "ch3";
387 renesas,buswait = <4>;
388 /* We need to turn on usbphy0 to make usbphy1 to work */
389 phys = <&usb1 1>;
390 phy-names = "usb";
391 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
392 resets = <&cpg 706>;
393 status = "disabled";
394 };
395
396 usbphy1: usb-phy-controller@e6598100 {
397 compatible = "renesas,usb-phy-r8a77470",
398 "renesas,rcar-gen2-usb-phy";
399 reg = <0 0xe6598100 0 0x100>;
400 #address-cells = <1>;
401 #size-cells = <0>;
402 clocks = <&cpg CPG_MOD 706>;
403 clock-names = "usbhs";
404 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
405 resets = <&cpg 706>;
406 status = "disabled";
407
408 usb1: usb-phy@0 {
409 reg = <0>;
410 #phy-cells = <1>;
411 };
412 };
413
414 usb_dmac00: dma-controller@e65a0000 {
415 compatible = "renesas,r8a77470-usb-dmac",
416 "renesas,usb-dmac";
417 reg = <0 0xe65a0000 0 0x100>;
418 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
419 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
420 interrupt-names = "ch0", "ch1";
421 clocks = <&cpg CPG_MOD 330>;
422 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
423 resets = <&cpg 330>;
424 #dma-cells = <1>;
425 dma-channels = <2>;
426 };
427
428 usb_dmac10: dma-controller@e65b0000 {
429 compatible = "renesas,r8a77470-usb-dmac",
430 "renesas,usb-dmac";
431 reg = <0 0xe65b0000 0 0x100>;
432 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
433 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
434 interrupt-names = "ch0", "ch1";
435 clocks = <&cpg CPG_MOD 331>;
436 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
437 resets = <&cpg 331>;
438 #dma-cells = <1>;
439 dma-channels = <2>;
440 };
441
442 usb_dmac01: dma-controller@e65a8000 {
443 compatible = "renesas,r8a77470-usb-dmac",
444 "renesas,usb-dmac";
445 reg = <0 0xe65a8000 0 0x100>;
446 interrupts = <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
447 <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>;
448 interrupt-names = "ch0", "ch1";
449 clocks = <&cpg CPG_MOD 326>;
450 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
451 resets = <&cpg 326>;
452 #dma-cells = <1>;
453 dma-channels = <2>;
454 };
455
456 usb_dmac11: dma-controller@e65b8000 {
457 compatible = "renesas,r8a77470-usb-dmac",
458 "renesas,usb-dmac";
459 reg = <0 0xe65b8000 0 0x100>;
460 interrupts = <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
461 <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>;
462 interrupt-names = "ch0", "ch1";
463 clocks = <&cpg CPG_MOD 327>;
464 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
465 resets = <&cpg 327>;
466 #dma-cells = <1>;
467 dma-channels = <2>;
468 };
469
470 dmac0: dma-controller@e6700000 {
471 compatible = "renesas,dmac-r8a77470",
472 "renesas,rcar-dmac";
473 reg = <0 0xe6700000 0 0x20000>;
474 interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
475 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>,
476 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
477 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>,
478 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
479 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>,
480 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
481 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>,
482 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
483 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
484 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>,
485 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>,
486 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>,
487 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
488 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>;
490 interrupt-names = "error",
491 "ch0", "ch1", "ch2", "ch3",
492 "ch4", "ch5", "ch6", "ch7",
493 "ch8", "ch9", "ch10", "ch11",
494 "ch12", "ch13", "ch14";
495 clocks = <&cpg CPG_MOD 219>;
496 clock-names = "fck";
497 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
498 resets = <&cpg 219>;
499 #dma-cells = <1>;
500 dma-channels = <15>;
501 };
502
503 dmac1: dma-controller@e6720000 {
504 compatible = "renesas,dmac-r8a77470",
505 "renesas,rcar-dmac";
506 reg = <0 0xe6720000 0 0x20000>;
507 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
508 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
509 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
510 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
511 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
512 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
513 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
514 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
515 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
516 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
517 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
518 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
519 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>,
520 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>,
521 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>,
522 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>;
523 interrupt-names = "error",
524 "ch0", "ch1", "ch2", "ch3",
525 "ch4", "ch5", "ch6", "ch7",
526 "ch8", "ch9", "ch10", "ch11",
527 "ch12", "ch13", "ch14";
528 clocks = <&cpg CPG_MOD 218>;
529 clock-names = "fck";
530 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
531 resets = <&cpg 218>;
532 #dma-cells = <1>;
533 dma-channels = <15>;
534 };
535
536 avb: ethernet@e6800000 {
537 compatible = "renesas,etheravb-r8a77470",
538 "renesas,etheravb-rcar-gen2";
539 reg = <0 0xe6800000 0 0x800>, <0 0xee0e8000 0 0x4000>;
540 interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
541 clocks = <&cpg CPG_MOD 812>;
542 clock-names = "fck";
543 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
544 resets = <&cpg 812>;
545 #address-cells = <1>;
546 #size-cells = <0>;
547 status = "disabled";
548 };
549
550 qspi0: spi@e6b10000 {
551 compatible = "renesas,qspi-r8a77470", "renesas,qspi";
552 reg = <0 0xe6b10000 0 0x2c>;
553 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
554 clocks = <&cpg CPG_MOD 918>;
555 dmas = <&dmac0 0x17>, <&dmac0 0x18>,
556 <&dmac1 0x17>, <&dmac1 0x18>;
557 dma-names = "tx", "rx", "tx", "rx";
558 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
559 num-cs = <1>;
560 #address-cells = <1>;
561 #size-cells = <0>;
562 resets = <&cpg 918>;
563 status = "disabled";
564 };
565
566 qspi1: spi@ee200000 {
567 compatible = "renesas,qspi-r8a77470", "renesas,qspi";
568 reg = <0 0xee200000 0 0x2c>;
569 interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
570 clocks = <&cpg CPG_MOD 917>;
571 dmas = <&dmac0 0xd1>, <&dmac0 0xd2>,
572 <&dmac1 0xd1>, <&dmac1 0xd2>;
573 dma-names = "tx", "rx", "tx", "rx";
574 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
575 num-cs = <1>;
576 #address-cells = <1>;
577 #size-cells = <0>;
578 resets = <&cpg 917>;
579 status = "disabled";
580 };
581
582 scif0: serial@e6e60000 {
583 compatible = "renesas,scif-r8a77470",
584 "renesas,rcar-gen2-scif", "renesas,scif";
585 reg = <0 0xe6e60000 0 0x40>;
586 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
587 clocks = <&cpg CPG_MOD 721>,
588 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
589 clock-names = "fck", "brg_int", "scif_clk";
590 dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
591 <&dmac1 0x29>, <&dmac1 0x2a>;
592 dma-names = "tx", "rx", "tx", "rx";
593 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
594 resets = <&cpg 721>;
595 status = "disabled";
596 };
597
598 scif1: serial@e6e68000 {
599 compatible = "renesas,scif-r8a77470",
600 "renesas,rcar-gen2-scif", "renesas,scif";
601 reg = <0 0xe6e68000 0 0x40>;
602 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
603 clocks = <&cpg CPG_MOD 720>,
604 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
605 clock-names = "fck", "brg_int", "scif_clk";
606 dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
607 <&dmac1 0x2d>, <&dmac1 0x2e>;
608 dma-names = "tx", "rx", "tx", "rx";
609 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
610 resets = <&cpg 720>;
611 status = "disabled";
612 };
613
614 scif2: serial@e6e58000 {
615 compatible = "renesas,scif-r8a77470",
616 "renesas,rcar-gen2-scif", "renesas,scif";
617 reg = <0 0xe6e58000 0 0x40>;
618 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&cpg CPG_MOD 719>,
620 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
621 clock-names = "fck", "brg_int", "scif_clk";
622 dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
623 <&dmac1 0x2b>, <&dmac1 0x2c>;
624 dma-names = "tx", "rx", "tx", "rx";
625 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
626 resets = <&cpg 719>;
627 status = "disabled";
628 };
629
630 scif3: serial@e6ea8000 {
631 compatible = "renesas,scif-r8a77470",
632 "renesas,rcar-gen2-scif", "renesas,scif";
633 reg = <0 0xe6ea8000 0 0x40>;
634 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
635 clocks = <&cpg CPG_MOD 718>,
636 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
637 clock-names = "fck", "brg_int", "scif_clk";
638 dmas = <&dmac0 0x2f>, <&dmac0 0x30>,
639 <&dmac1 0x2f>, <&dmac1 0x30>;
640 dma-names = "tx", "rx", "tx", "rx";
641 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
642 resets = <&cpg 718>;
643 status = "disabled";
644 };
645
646 scif4: serial@e6ee0000 {
647 compatible = "renesas,scif-r8a77470",
648 "renesas,rcar-gen2-scif", "renesas,scif";
649 reg = <0 0xe6ee0000 0 0x40>;
650 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
651 clocks = <&cpg CPG_MOD 715>,
652 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
653 clock-names = "fck", "brg_int", "scif_clk";
654 dmas = <&dmac0 0xfb>, <&dmac0 0xfc>,
655 <&dmac1 0xfb>, <&dmac1 0xfc>;
656 dma-names = "tx", "rx", "tx", "rx";
657 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
658 resets = <&cpg 715>;
659 status = "disabled";
660 };
661
662 scif5: serial@e6ee8000 {
663 compatible = "renesas,scif-r8a77470",
664 "renesas,rcar-gen2-scif", "renesas,scif";
665 reg = <0 0xe6ee8000 0 0x40>;
666 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
667 clocks = <&cpg CPG_MOD 714>,
668 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
669 clock-names = "fck", "brg_int", "scif_clk";
670 dmas = <&dmac0 0xfd>, <&dmac0 0xfe>,
671 <&dmac1 0xfd>, <&dmac1 0xfe>;
672 dma-names = "tx", "rx", "tx", "rx";
673 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
674 resets = <&cpg 714>;
675 status = "disabled";
676 };
677
678 hscif0: serial@e62c0000 {
679 compatible = "renesas,hscif-r8a77470",
680 "renesas,rcar-gen2-hscif", "renesas,hscif";
681 reg = <0 0xe62c0000 0 0x60>;
682 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
683 clocks = <&cpg CPG_MOD 717>,
684 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
685 clock-names = "fck", "brg_int", "scif_clk";
686 dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
687 <&dmac1 0x39>, <&dmac1 0x3a>;
688 dma-names = "tx", "rx", "tx", "rx";
689 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
690 resets = <&cpg 717>;
691 status = "disabled";
692 };
693
694 hscif1: serial@e62c8000 {
695 compatible = "renesas,hscif-r8a77470",
696 "renesas,rcar-gen2-hscif", "renesas,hscif";
697 reg = <0 0xe62c8000 0 0x60>;
698 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
699 clocks = <&cpg CPG_MOD 716>,
700 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
701 clock-names = "fck", "brg_int", "scif_clk";
702 dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
703 <&dmac1 0x4d>, <&dmac1 0x4e>;
704 dma-names = "tx", "rx", "tx", "rx";
705 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
706 resets = <&cpg 716>;
707 status = "disabled";
708 };
709
710 hscif2: serial@e62d0000 {
711 compatible = "renesas,hscif-r8a77470",
712 "renesas,rcar-gen2-hscif", "renesas,hscif";
713 reg = <0 0xe62d0000 0 0x60>;
714 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
715 clocks = <&cpg CPG_MOD 713>,
716 <&cpg CPG_CORE R8A77470_CLK_ZS>, <&scif_clk>;
717 clock-names = "fck", "brg_int", "scif_clk";
718 dmas = <&dmac0 0x3b>, <&dmac0 0x3c>,
719 <&dmac1 0x3b>, <&dmac1 0x3c>;
720 dma-names = "tx", "rx", "tx", "rx";
721 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
722 resets = <&cpg 713>;
723 status = "disabled";
724 };
725
726 pwm0: pwm@e6e30000 {
727 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
728 reg = <0 0xe6e30000 0 0x8>;
729 clocks = <&cpg CPG_MOD 523>;
730 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
731 resets = <&cpg 523>;
732 #pwm-cells = <2>;
733 status = "disabled";
734 };
735
736 pwm1: pwm@e6e31000 {
737 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
738 reg = <0 0xe6e31000 0 0x8>;
739 clocks = <&cpg CPG_MOD 523>;
740 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
741 resets = <&cpg 523>;
742 #pwm-cells = <2>;
743 status = "disabled";
744 };
745
746 pwm2: pwm@e6e32000 {
747 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
748 reg = <0 0xe6e32000 0 0x8>;
749 clocks = <&cpg CPG_MOD 523>;
750 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
751 resets = <&cpg 523>;
752 #pwm-cells = <2>;
753 status = "disabled";
754 };
755
756 pwm3: pwm@e6e33000 {
757 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
758 reg = <0 0xe6e33000 0 0x8>;
759 clocks = <&cpg CPG_MOD 523>;
760 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
761 resets = <&cpg 523>;
762 #pwm-cells = <2>;
763 status = "disabled";
764 };
765
766 pwm4: pwm@e6e34000 {
767 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
768 reg = <0 0xe6e34000 0 0x8>;
769 clocks = <&cpg CPG_MOD 523>;
770 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
771 resets = <&cpg 523>;
772 #pwm-cells = <2>;
773 status = "disabled";
774 };
775
776 pwm5: pwm@e6e35000 {
777 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
778 reg = <0 0xe6e35000 0 0x8>;
779 clocks = <&cpg CPG_MOD 523>;
780 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
781 resets = <&cpg 523>;
782 #pwm-cells = <2>;
783 status = "disabled";
784 };
785
786 pwm6: pwm@e6e36000 {
787 compatible = "renesas,pwm-r8a77470", "renesas,pwm-rcar";
788 reg = <0 0xe6e36000 0 0x8>;
789 clocks = <&cpg CPG_MOD 523>;
790 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
791 resets = <&cpg 523>;
792 #pwm-cells = <2>;
793 status = "disabled";
794 };
795
796 vin0: video@e6ef0000 {
797 compatible = "renesas,vin-r8a77470",
798 "renesas,rcar-gen2-vin";
799 reg = <0 0xe6ef0000 0 0x1000>;
800 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
801 clocks = <&cpg CPG_MOD 811>;
802 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
803 resets = <&cpg 811>;
804 status = "disabled";
805 };
806
807 vin1: video@e6ef1000 {
808 compatible = "renesas,vin-r8a77470",
809 "renesas,rcar-gen2-vin";
810 reg = <0 0xe6ef1000 0 0x1000>;
811 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
812 clocks = <&cpg CPG_MOD 810>;
813 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
814 resets = <&cpg 810>;
815 status = "disabled";
816 };
817
818 ohci0: usb@ee080000 {
819 compatible = "generic-ohci";
820 reg = <0 0xee080000 0 0x100>;
821 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
822 clocks = <&cpg CPG_MOD 703>;
823 phys = <&usb0 0>, <&usb2_phy0>;
824 phy-names = "usb";
825 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
826 resets = <&cpg 703>;
827 status = "disabled";
828 };
829
830 ehci0: usb@ee080100 {
831 compatible = "generic-ehci";
832 reg = <0 0xee080100 0 0x100>;
833 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
834 clocks = <&cpg CPG_MOD 703>;
835 phys = <&usb0 0>, <&usb2_phy0>;
836 phy-names = "usb";
837 companion = <&ohci0>;
838 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
839 resets = <&cpg 703>;
840 status = "disabled";
841 };
842
843 usb2_phy0: usb-phy@ee080200 {
844 compatible = "renesas,usb2-phy-r8a77470";
845 reg = <0 0xee080200 0 0x700>;
846 clocks = <&cpg CPG_MOD 703>;
847 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
848 resets = <&cpg 703>;
849 #phy-cells = <0>;
850 status = "disabled";
851 };
852
853 ohci1: usb@ee0c0000 {
854 compatible = "generic-ohci";
855 reg = <0 0xee0c0000 0 0x100>;
856 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
857 clocks = <&cpg CPG_MOD 705>;
858 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>;
859 phy-names = "usb";
860 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
861 resets = <&cpg 705>;
862 status = "disabled";
863 };
864
865 ehci1: usb@ee0c0100 {
866 compatible = "generic-ehci";
867 reg = <0 0xee0c0100 0 0x100>;
868 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
869 clocks = <&cpg CPG_MOD 705>;
870 phys = <&usb0 1>, <&usb2_phy1>, <&usb1 0>;
871 phy-names = "usb";
872 companion = <&ohci1>;
873 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
874 resets = <&cpg 705>;
875 status = "disabled";
876 };
877
878 usb2_phy1: usb-phy@ee0c0200 {
879 compatible = "renesas,usb2-phy-r8a77470";
880 reg = <0 0xee0c0200 0 0x700>;
881 clocks = <&cpg CPG_MOD 705>;
882 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
883 resets = <&cpg 705>;
884 #phy-cells = <0>;
885 status = "disabled";
886 };
887
888 sdhi0: mmc@ee100000 {
889 compatible = "renesas,sdhi-r8a77470",
890 "renesas,rcar-gen2-sdhi";
891 reg = <0 0xee100000 0 0x328>;
892 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
893 clocks = <&cpg CPG_MOD 314>;
894 dmas = <&dmac0 0xcd>, <&dmac0 0xce>,
895 <&dmac1 0xcd>, <&dmac1 0xce>;
896 dma-names = "tx", "rx", "tx", "rx";
897 max-frequency = <156000000>;
898 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
899 resets = <&cpg 314>;
900 status = "disabled";
901 };
902
903 sdhi1: mmc@ee300000 {
904 compatible = "renesas,sdhi-mmc-r8a77470";
905 reg = <0 0xee300000 0 0x2000>;
906 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
907 clocks = <&cpg CPG_MOD 313>;
908 max-frequency = <156000000>;
909 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
910 resets = <&cpg 313>;
911 status = "disabled";
912 };
913
914 sdhi2: mmc@ee160000 {
915 compatible = "renesas,sdhi-r8a77470",
916 "renesas,rcar-gen2-sdhi";
917 reg = <0 0xee160000 0 0x328>;
918 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
919 clocks = <&cpg CPG_MOD 312>;
920 dmas = <&dmac0 0xd3>, <&dmac0 0xd4>,
921 <&dmac1 0xd3>, <&dmac1 0xd4>;
922 dma-names = "tx", "rx", "tx", "rx";
923 max-frequency = <78000000>;
924 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
925 resets = <&cpg 312>;
926 status = "disabled";
927 };
928
929 gic: interrupt-controller@f1001000 {
930 compatible = "arm,gic-400";
931 #interrupt-cells = <3>;
932 #address-cells = <0>;
933 interrupt-controller;
934 reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
935 <0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
936 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
937 clocks = <&cpg CPG_MOD 408>;
938 clock-names = "clk";
939 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
940 resets = <&cpg 408>;
941 };
942
943 du: display@feb00000 {
944 compatible = "renesas,du-r8a77470";
945 reg = <0 0xfeb00000 0 0x40000>;
946 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
947 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
948 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
949 clock-names = "du.0", "du.1";
950 resets = <&cpg 724>;
951 reset-names = "du.0";
952 status = "disabled";
953
954 ports {
955 #address-cells = <1>;
956 #size-cells = <0>;
957
958 port@0 {
959 reg = <0>;
960 du_out_rgb0: endpoint {
961 };
962 };
963 port@1 {
964 reg = <1>;
965 du_out_rgb1: endpoint {
966 };
967 };
968 port@2 {
969 reg = <2>;
970 du_out_lvds0: endpoint {
971 };
972 };
973 };
974 };
975
976 prr: chipid@ff000044 {
977 compatible = "renesas,prr";
978 reg = <0 0xff000044 0 4>;
979 };
980
981 cmt0: timer@ffca0000 {
982 compatible = "renesas,r8a77470-cmt0",
983 "renesas,rcar-gen2-cmt0";
984 reg = <0 0xffca0000 0 0x1004>;
985 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
986 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
987 clocks = <&cpg CPG_MOD 124>;
988 clock-names = "fck";
989 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
990 resets = <&cpg 124>;
991 status = "disabled";
992 };
993
994 cmt1: timer@e6130000 {
995 compatible = "renesas,r8a77470-cmt1",
996 "renesas,rcar-gen2-cmt1";
997 reg = <0 0xe6130000 0 0x1004>;
998 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
999 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
1000 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
1001 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
1002 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
1003 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
1004 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
1005 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
1006 clocks = <&cpg CPG_MOD 329>;
1007 clock-names = "fck";
1008 power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
1009 resets = <&cpg 329>;
1010 status = "disabled";
1011 };
1012 };
1013
1014 timer {
1015 compatible = "arm,armv7-timer";
1016 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1017 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1018 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
1019 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
1020 };
1021
1022 /* External USB clock - can be overridden by the board */
1023 usb_extal_clk: usb_extal {
1024 compatible = "fixed-clock";
1025 #clock-cells = <0>;
1026 clock-frequency = <48000000>;
1027 };
1028};