1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
  4 */
  5
  6#include "imx51-digi-connectcore-som.dtsi"
  7
  8/ {
  9	model = "Digi ConnectCore CC(W)-MX51 JSK";
 10	compatible = "digi,connectcore-ccxmx51-jsk",
 11		     "digi,connectcore-ccxmx51-som", "fsl,imx51";
 12
 13	chosen {
 14		stdout-path = &uart1;
 15	};
 16
 17	usbphy1: usbphy1 {
 18		compatible = "usb-nop-xceiv";
 19		clocks = <&clks IMX5_CLK_USB_PHY_GATE>;
 20		clock-names = "main_clk";
 21		#phy-cells = <0>;
 22	};
 23};
 24
 25&esdhc1 {
 26	status = "okay";
 27};
 28
 29&owire {
 30	pinctrl-names = "default";
 31	pinctrl-0 = <&pinctrl_owire>;
 32	status = "okay";
 33};
 34
 35&pmic {
 36	fsl,mc13xxx-uses-rtc;
 37
 38	regulators {
 39		vcoincell_reg: vcoincell {
 40			regulator-min-microvolt = <3000000>;
 41			regulator-max-microvolt = <3000000>;
 42			regulator-always-on;
 43		};
 44	};
 45};
 46
 47&uart1 {
 48	pinctrl-names = "default";
 49	pinctrl-0 = <&pinctrl_uart1>;
 50	status = "okay";
 51};
 52
 53&uart2 {
 54	pinctrl-names = "default";
 55	pinctrl-0 = <&pinctrl_uart2>;
 56	status = "okay";
 57};
 58
 59&uart3 {
 60	pinctrl-names = "default";
 61	pinctrl-0 = <&pinctrl_uart3>;
 62	status = "okay";
 63};
 64
 65&usbotg {
 66	dr_mode = "otg";
 67	status = "okay";
 68};
 69
 70&usbh1 {
 71	pinctrl-names = "default";
 72	pinctrl-0 = <&pinctrl_usbh1>;
 73	fsl,usbphy = <&usbphy1>;
 74	dr_mode = "host";
 75	phy_type = "ulpi";
 76	disable-over-current;
 77	status = "okay";
 78};
 79
 80&iomuxc {
 81	imx51-digi-connectcore-jsk {
 82		pinctrl_owire: owiregrp {
 83			fsl,pins = <
 84				MX51_PAD_OWIRE_LINE__OWIRE_LINE		0x40000000
 85			>;
 86		};
 87
 88		pinctrl_uart1: uart1grp {
 89			fsl,pins = <
 90				MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
 91				MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
 92			>;
 93		};
 94
 95		pinctrl_uart2: uart2grp {
 96			fsl,pins = <
 97				MX51_PAD_UART2_RXD__UART2_RXD		0x1c5
 98				MX51_PAD_UART2_TXD__UART2_TXD		0x1c5
 99			>;
100		};
101
102		pinctrl_uart3: uart3grp {
103			fsl,pins = <
104				MX51_PAD_UART3_RXD__UART3_RXD		0x1c5
105				MX51_PAD_UART3_TXD__UART3_TXD		0x1c5
106			>;
107		};
108
109		pinctrl_usbh1: usbh1grp {
110			fsl,pins = <
111				MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x1e5
112				MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x1e5
113				MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x1e5
114				MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x1e5
115				MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x1e5
116				MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x1e5
117				MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x1e5
118				MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x1e5
119				MX51_PAD_USBH1_CLK__USBH1_CLK		0x1e5
120				MX51_PAD_USBH1_DIR__USBH1_DIR		0x1e5
121				MX51_PAD_USBH1_NXT__USBH1_NXT		0x1e5
122				MX51_PAD_USBH1_STP__USBH1_STP		0x1e5
123			>;
124		};
125	};
126};