1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device Tree file for OpenBlocks AX3-4 board
  4 *
  5 * Copyright (C) 2012 Marvell
  6 *
  7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  8 */
  9
 10/dts-v1/;
 11#include <dt-bindings/gpio/gpio.h>
 12#include <dt-bindings/input/input.h>
 13#include "armada-xp-mv78260.dtsi"
 14
 15/ {
 16	model = "PlatHome OpenBlocks AX3-4 board";
 17	compatible = "plathome,openblocks-ax3-4", "marvell,armadaxp-mv78260", "marvell,armadaxp", "marvell,armada-370-xp";
 18
 19	chosen {
 20		stdout-path = "serial0:115200n8";
 21	};
 22
 23	memory@0 {
 24		device_type = "memory";
 25		reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
 26	};
 27
 28	soc {
 29		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xd0000000 0x100000
 30			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
 31			  MBUS_ID(0x01, 0x2f) 0 0 0xe8000000 0x8000000
 32			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
 33			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
 34			  MBUS_ID(0x0c, 0x04) 0 0 0xd1200000 0x100000>;
 35
 36		devbus-bootcs {
 37			status = "okay";
 38
 39			/* Device Bus parameters are required */
 40
 41			/* Read parameters */
 42			devbus,bus-width    = <16>;
 43			devbus,turn-off-ps  = <60000>;
 44			devbus,badr-skew-ps = <0>;
 45			devbus,acc-first-ps = <124000>;
 46			devbus,acc-next-ps  = <248000>;
 47			devbus,rd-setup-ps  = <0>;
 48			devbus,rd-hold-ps   = <0>;
 49
 50			/* Write parameters */
 51			devbus,sync-enable = <0>;
 52			devbus,wr-high-ps  = <60000>;
 53			devbus,wr-low-ps   = <60000>;
 54			devbus,ale-wr-ps   = <60000>;
 55
 56			/* NOR 128 MiB */
 57			nor@0 {
 58				compatible = "cfi-flash";
 59				reg = <0 0x8000000>;
 60				bank-width = <2>;
 61			};
 62		};
 63
 64		internal-regs {
 65			rtc@10300 {
 66				/* No crystal connected to the internal RTC */
 67				status = "disabled";
 68			};
 69			serial@12000 {
 70				status = "okay";
 71			};
 72			serial@12100 {
 73				status = "okay";
 74			};
 75
 76			leds {
 77				compatible = "gpio-leds";
 78				pinctrl-names = "default";
 79				pinctrl-0 = <&led_pins>;
 80
 81				red_led {
 82					label = "red_led";
 83					gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
 84					default-state = "off";
 85				};
 86
 87				yellow_led {
 88					label = "yellow_led";
 89					gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
 90					default-state = "off";
 91				};
 92
 93				green_led {
 94					label = "green_led";
 95					gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
 96					default-state = "keep";
 97				};
 98			};
 99
100			gpio-keys {
101				compatible = "gpio-keys";
102
103				button-init {
104					label = "Init Button";
105					linux,code = <KEY_POWER>;
106					gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
107				};
108			};
109
110			ethernet@70000 {
111				status = "okay";
112				phy = <&phy0>;
113				phy-mode = "sgmii";
114				buffer-manager = <&bm>;
115				bm,pool-long = <0>;
116			};
117			ethernet@74000 {
118				status = "okay";
119				phy = <&phy1>;
120				phy-mode = "sgmii";
121				buffer-manager = <&bm>;
122				bm,pool-long = <1>;
123			};
124			ethernet@30000 {
125				status = "okay";
126				phy = <&phy2>;
127				phy-mode = "sgmii";
128				buffer-manager = <&bm>;
129				bm,pool-long = <2>;
130			};
131			ethernet@34000 {
132				status = "okay";
133				phy = <&phy3>;
134				phy-mode = "sgmii";
135				buffer-manager = <&bm>;
136				bm,pool-long = <3>;
137			};
138			i2c@11000 {
139				status = "okay";
140				clock-frequency = <400000>;
141			};
142			i2c@11100 {
143				status = "okay";
144				clock-frequency = <400000>;
145
146				s35390a: s35390a@30 {
147					compatible = "s35390a";
148					reg = <0x30>;
149				};
150			};
151			sata@a0000 {
152				nr-ports = <2>;
153				status = "okay";
154			};
155
156			/* Front side USB 0 */
157			usb@50000 {
158				status = "okay";
159			};
160
161			/* Front side USB 1 */
162			usb@51000 {
163				status = "okay";
164			};
165
166			bm@c0000 {
167				status = "okay";
168			};
169		};
170
171		bm-bppi {
172			status = "okay";
173		};
174	};
175};
176
177&pciec {
178	status = "okay";
179	/* Internal mini-PCIe connector */
180	pcie@1,0 {
181		/* Port 0, Lane 0 */
182		status = "okay";
183	};
184};
185
186&mdio {
187	phy0: ethernet-phy@0 {
188		reg = <0>;
189	};
190
191	phy1: ethernet-phy@1 {
192		reg = <1>;
193	};
194
195	phy2: ethernet-phy@2 {
196		reg = <2>;
197	};
198
199	phy3: ethernet-phy@3 {
200		reg = <3>;
201	};
202};
203
204&pinctrl {
205	led_pins: led-pins-0 {
206		marvell,pins = "mpp49", "mpp51", "mpp53";
207		marvell,function = "gpio";
208	};
209};