1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device Tree file for D-Link DNS-327L
  4 *
  5 * Copyright (C) 2015, Andrew Andrianov <andrew@ncrmnt.org>
  6 */
  7
  8/* Remaining unsolved:
  9 * There's still some unknown device on i2c address 0x13
 10 */
 11
 12/dts-v1/;
 13
 14#include <dt-bindings/input/input.h>
 15#include <dt-bindings/gpio/gpio.h>
 16#include "armada-370.dtsi"
 17
 18/ {
 19	model = "D-Link DNS-327L";
 20	compatible = "dlink,dns327l",
 21		"marvell,armada370",
 22		"marvell,armada-370-xp";
 23
 24	chosen {
 25		stdout-path = &uart0;
 26	};
 27
 28	memory@0 {
 29		device_type = "memory";
 30		reg = <0x00000000 0x20000000>; /* 512 MiB */
 31	};
 32
 33	soc {
 34		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
 35			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
 36			MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;
 37
 38		internal-regs {
 39			sata@a0000 {
 40				nr-ports = <2>;
 41				status = "okay";
 42			};
 43
 44			usb@50000 {
 45				status = "okay";
 46			};
 47		};
 48	};
 49
 50	gpio-keys {
 51		compatible = "gpio-keys";
 52		pinctrl-0 = <
 53			&backup_button_pin
 54			&power_button_pin
 55			&reset_button_pin>;
 56		pinctrl-names = "default";
 57
 58		power-button {
 59			label = "Power Button";
 60			linux,code = <KEY_POWER>;
 61			gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
 62		};
 63
 64		backup-button {
 65			label = "Backup Button";
 66			linux,code = <KEY_COPY>;
 67			gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
 68		};
 69
 70		reset-button {
 71			label = "Reset Button";
 72			linux,code = <KEY_RESTART>;
 73			gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
 74		};
 75	};
 76
 77	gpio-leds {
 78		compatible = "gpio-leds";
 79		pinctrl-0 = <
 80			&sata_l_amber_pin
 81			&sata_r_amber_pin
 82			&backup_led_pin
 83			/* Ensure these are managed by hardware */
 84			&sata_l_white_pin
 85			&sata_r_white_pin>;
 86
 87		pinctrl-names = "default";
 88
 89		led-sata-r-amber {
 90			label = "dns327l:amber:sata-r";
 91			gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>;
 92			default-state = "keep";
 93		};
 94
 95		led-sata-l-amber {
 96			label = "dns327l:amber:sata-l";
 97			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
 98			default-state = "keep";
 99		};
100
101		led-backup {
102			label = "dns327l:white:usb";
103			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
104			default-state = "keep";
105		};
106	};
107
108	regulators {
109		compatible = "simple-bus";
110		#address-cells = <1>;
111		#size-cells = <0>;
112
113		usb_power: regulator@1 {
114			compatible = "regulator-fixed";
115			reg = <1>;
116			pinctrl-0 = <&xhci_pwr_pin>;
117			pinctrl-names = "default";
118			regulator-name = "USB3.0 Port Power";
119			regulator-min-microvolt = <5000000>;
120			regulator-max-microvolt = <5000000>;
121			enable-active-high;
122			regulator-boot-on;
123			regulator-always-on;
124			gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
125		};
126
127		sata_r_power: regulator@2 {
128			compatible = "regulator-fixed";
129			reg = <2>;
130			pinctrl-0 = <&sata_r_pwr_pin>;
131			pinctrl-names = "default";
132			regulator-name = "SATA-R Power";
133			regulator-min-microvolt = <5000000>;
134			regulator-max-microvolt = <5000000>;
135			startup-delay-us = <2000000>;
136			enable-active-high;
137			regulator-always-on;
138			regulator-boot-on;
139			gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
140		};
141
142		sata_l_power: regulator@3 {
143			compatible = "regulator-fixed";
144			reg = <3>;
145			pinctrl-0 = <&sata_l_pwr_pin>;
146			pinctrl-names = "default";
147			regulator-name = "SATA-L Power";
148			regulator-min-microvolt = <5000000>;
149			regulator-max-microvolt = <5000000>;
150			startup-delay-us = <4000000>;
151			enable-active-high;
152			regulator-always-on;
153			regulator-boot-on;
154			gpio = <&gpio1 24 GPIO_ACTIVE_HIGH>;
155		};
156	};
157};
158
159&pciec {
160	status = "okay";
161
162	pcie@1,0 {
163		/* Port 0, Lane 0 */
164		status = "okay";
165	};
166
167	pcie@2,0 {
168		/* Port 1, Lane 0 */
169		status = "okay";
170	};
171};
172
173&pinctrl {
174	sata_l_white_pin: sata-l-white-pin {
175		marvell,pins = "mpp57";
176		marvell,function = "sata0";
177	};
178
179	sata_r_white_pin: sata-r-white-pin {
180		marvell,pins = "mpp55";
181		marvell,function = "sata1";
182	};
183
184	sata_r_amber_pin: sata-r-amber-pin {
185		marvell,pins = "mpp52";
186		marvell,function = "gpio";
187	};
188
189	sata_l_amber_pin: sata-l-amber-pin {
190		marvell,pins = "mpp53";
191		marvell,function = "gpio";
192	};
193
194	backup_led_pin: backup-led-pin {
195		marvell,pins = "mpp61";
196		marvell,function = "gpo";
197	};
198
199	xhci_pwr_pin: xhci-pwr-pin {
200		marvell,pins = "mpp13";
201		marvell,function = "gpio";
202	};
203
204	sata_r_pwr_pin: sata-r-pwr-pin {
205		marvell,pins = "mpp54";
206		marvell,function = "gpio";
207	};
208
209	sata_l_pwr_pin: sata-l-pwr-pin {
210		marvell,pins = "mpp56";
211		marvell,function = "gpio";
212	};
213
214	uart1_pins: uart1-pins {
215		marvell,pins = "mpp60", "mpp61";
216		marvell,function = "uart1";
217	};
218
219	power_button_pin: power-button-pin {
220		marvell,pins = "mpp65";
221		marvell,function = "gpio";
222	};
223
224	backup_button_pin: backup-button-pin {
225		marvell,pins = "mpp63";
226		marvell,function = "gpio";
227	};
228
229	reset_button_pin: reset-button-pin {
230		marvell,pins = "mpp64";
231		marvell,function = "gpio";
232	};
233};
234
235/* Serial console */
236&uart0 {
237	status = "okay";
238};
239
240/* Connected to Weltrend MCU */
241&uart1 {
242	pinctrl-0 = <&uart1_pins>;
243	pinctrl-names = "default";
244	status = "okay";
245};
246
247&mdio {
248	phy0: ethernet-phy@0 { /* Marvell 88E1318 */
249		reg = <0>;
250		marvell,reg-init = <0x2 0x19 0x0 0x0077>,
251				   <0x2 0x18 0x0 0x5747>;
252	};
253};
254
255&eth1 {
256	phy = <&phy0>;
257	phy-mode = "rgmii-id";
258	status = "okay";
259};
260
261&i2c0 {
262	compatible = "marvell,mv64xxx-i2c";
263	clock-frequency = <100000>;
264	status = "okay";
265};
266
267&nand_controller {
268	status = "okay";
269
270	nand@0 {
271		reg = <0>;
272		label = "pxa3xx_nand-0";
273		nand-rb = <0>;
274		marvell,nand-keep-config;
275		nand-on-flash-bbt;
276		nand-ecc-strength = <4>;
277		nand-ecc-step-size = <512>;
278
279		partitions {
280			compatible = "fixed-partitions";
281			#address-cells = <1>;
282			#size-cells = <1>;
283
284			partition@0 {
285				label = "u-boot";
286				/* 1.0 MiB */
287				reg = <0x0000000 0x100000>;
288				read-only;
289			};
290
291			partition@100000 {
292				label = "u-boot-env";
293				/* 128 KiB */
294				reg = <0x100000 0x20000>;
295				read-only;
296			};
297
298			partition@120000 {
299				label = "uImage";
300				/* 7 MiB */
301				reg = <0x120000 0x700000>;
302			};
303
304			partition@820000 {
305				label = "ubifs";
306				/* ~ 84 MiB */
307				reg = <0x820000 0x54e0000>;
308			};
309
310			/* Hardcoded into stock bootloader */
311			partition@5d00000 {
312				label = "failsafe-uImage";
313				/* 5 MiB */
314				reg = <0x5d00000 0x500000>;
315			};
316
317			partition@6200000 {
318				label = "failsafe-fs";
319				/* 29 MiB */
320				reg = <0x6200000 0x1d00000>;
321			};
322
323			partition@7f00000 {
324				label = "bbt";
325				/* 1 MiB for BBT */
326				reg = <0x7f00000 0x100000>;
327			};
328		};
329	};
330};