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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Embedded Alley Solutions, Inc
7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
8 * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)
9 * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)
10 */
11#ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
12#define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
13
14#include <asm/cpu.h>
15
16/*
17 * Override macros used in arch/mips/kernel/head.S.
18 */
19 .macro kernel_entry_setup
20 .set push
21 .set mips64
22 /* Set ELPA on LOONGSON3 pagegrain */
23 mfc0 t0, CP0_PAGEGRAIN
24 or t0, (0x1 << 29)
25 mtc0 t0, CP0_PAGEGRAIN
26 /* Enable STFill Buffer */
27 mfc0 t0, CP0_PRID
28 /* Loongson-3A R4+ */
29 andi t1, t0, PRID_IMP_MASK
30 li t2, PRID_IMP_LOONGSON_64G
31 beq t1, t2, 1f
32 nop
33 /* Loongson-3A R2/R3 */
34 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
35 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
36 bnez t0, 2f
37 nop
381:
39 mfc0 t0, CP0_CONFIG6
40 or t0, 0x100
41 mtc0 t0, CP0_CONFIG6
422:
43 _ehb
44 .set pop
45 .endm
46
47/*
48 * Do SMP slave processor setup.
49 */
50 .macro smp_slave_setup
51 .set push
52 .set mips64
53 /* Set ELPA on LOONGSON3 pagegrain */
54 mfc0 t0, CP0_PAGEGRAIN
55 or t0, (0x1 << 29)
56 mtc0 t0, CP0_PAGEGRAIN
57 /* Enable STFill Buffer */
58 mfc0 t0, CP0_PRID
59 /* Loongson-3A R4+ */
60 andi t1, t0, PRID_IMP_MASK
61 li t2, PRID_IMP_LOONGSON_64G
62 beq t1, t2, 1f
63 nop
64 /* Loongson-3A R2/R3 */
65 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
66 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
67 bnez t0, 2f
68 nop
691:
70 mfc0 t0, CP0_CONFIG6
71 or t0, 0x100
72 mtc0 t0, CP0_CONFIG6
732:
74 _ehb
75 .set pop
76 .endm
77
78#define USE_KEXEC_SMP_WAIT_FINAL
79 .macro kexec_smp_wait_final
80 /* s0:prid s1:initfn */
81 /* a0:base t1:cpuid t2:node t9:count */
82 mfc0 t1, CP0_EBASE
83 andi t1, MIPS_EBASE_CPUNUM
84 dins a0, t1, 8, 2 /* insert core id*/
85 dext t2, t1, 2, 2
86 dins a0, t2, 44, 2 /* insert node id */
87 mfc0 s0, CP0_PRID
88 andi s0, s0, (PRID_IMP_MASK | PRID_REV_MASK)
89 beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R1), 1f
90 beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R2), 1f
91 b 2f /* Loongson-3A1000/3A2000/3A3000/3A4000 */
921: dins a0, t2, 14, 2 /* Loongson-3B1000/3B1500 need bit 15~14 */
932: li t9, 0x100 /* wait for init loop */
943: addiu t9, -1 /* limit mailbox access */
95 bnez t9, 3b
96 lw s1, 0x20(a0) /* check PC as an indicator */
97 beqz s1, 2b
98 ld s1, 0x20(a0) /* get PC via mailbox reg0 */
99 ld sp, 0x28(a0) /* get SP via mailbox reg1 */
100 ld gp, 0x30(a0) /* get GP via mailbox reg2 */
101 ld a1, 0x38(a0)
102 jr s1 /* jump to initial PC */
103 .endm
104
105#endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2005 Embedded Alley Solutions, Inc
7 * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
8 * Copyright (C) 2009 Jiajie Chen (chenjiajie@cse.buaa.edu.cn)
9 * Copyright (C) 2012 Huacai Chen (chenhc@lemote.com)
10 */
11#ifndef __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
12#define __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H
13
14#include <asm/cpu.h>
15
16/*
17 * Override macros used in arch/mips/kernel/head.S.
18 */
19 .macro kernel_entry_setup
20 .set push
21 .set mips64
22 /* Set ELPA on LOONGSON3 pagegrain */
23 mfc0 t0, CP0_PAGEGRAIN
24 or t0, (0x1 << 29)
25 mtc0 t0, CP0_PAGEGRAIN
26 /* Enable STFill Buffer */
27 mfc0 t0, CP0_PRID
28 /* Loongson-3A R4+ */
29 andi t1, t0, PRID_IMP_MASK
30 li t2, PRID_IMP_LOONGSON_64G
31 beq t1, t2, 1f
32 nop
33 /* Loongson-3A R2/R3 */
34 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
35 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
36 bnez t0, 2f
37 nop
381:
39 mfc0 t0, CP0_CONFIG6
40 or t0, 0x100
41 mtc0 t0, CP0_CONFIG6
422:
43 _ehb
44 .set pop
45 .endm
46
47/*
48 * Do SMP slave processor setup.
49 */
50 .macro smp_slave_setup
51 .set push
52 .set mips64
53 /* Set ELPA on LOONGSON3 pagegrain */
54 mfc0 t0, CP0_PAGEGRAIN
55 or t0, (0x1 << 29)
56 mtc0 t0, CP0_PAGEGRAIN
57 /* Enable STFill Buffer */
58 mfc0 t0, CP0_PRID
59 /* Loongson-3A R4+ */
60 andi t1, t0, PRID_IMP_MASK
61 li t2, PRID_IMP_LOONGSON_64G
62 beq t1, t2, 1f
63 nop
64 /* Loongson-3A R2/R3 */
65 andi t0, (PRID_IMP_MASK | PRID_REV_MASK)
66 slti t0, t0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3A_R2_0)
67 bnez t0, 2f
68 nop
691:
70 mfc0 t0, CP0_CONFIG6
71 or t0, 0x100
72 mtc0 t0, CP0_CONFIG6
732:
74 _ehb
75 .set pop
76 .endm
77
78#define USE_KEXEC_SMP_WAIT_FINAL
79 .macro kexec_smp_wait_final
80 /* s0:prid s1:initfn */
81 /* a0:base t1:cpuid t2:node t9:count */
82 mfc0 t1, CP0_EBASE
83 andi t1, MIPS_EBASE_CPUNUM
84 dins a0, t1, 8, 2 /* insert core id*/
85 dext t2, t1, 2, 2
86 dins a0, t2, 44, 2 /* insert node id */
87 mfc0 s0, CP0_PRID
88 andi s0, s0, (PRID_IMP_MASK | PRID_REV_MASK)
89 beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R1), 1f
90 beq s0, (PRID_IMP_LOONGSON_64C | PRID_REV_LOONGSON3B_R2), 1f
91 b 2f /* Loongson-3A1000/3A2000/3A3000/3A4000 */
921: dins a0, t2, 14, 2 /* Loongson-3B1000/3B1500 need bit 15~14 */
932: li t9, 0x100 /* wait for init loop */
943: addiu t9, -1 /* limit mailbox access */
95 bnez t9, 3b
96 lw s1, 0x20(a0) /* check PC as an indicator */
97 beqz s1, 2b
98 ld s1, 0x20(a0) /* get PC via mailbox reg0 */
99 ld sp, 0x28(a0) /* get SP via mailbox reg1 */
100 ld gp, 0x30(a0) /* get GP via mailbox reg2 */
101 ld a1, 0x38(a0)
102 jr s1 /* jump to initial PC */
103 .endm
104
105#endif /* __ASM_MACH_LOONGSON64_KERNEL_ENTRY_H */