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v6.2
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * AmigaOne Device Tree Source
  4 *
  5 * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
  6 */
  7
  8/dts-v1/;
  9
 10/ {
 11	model = "AmigaOne";
 12	compatible = "eyetech,amigaone";
 13	coherency-off;
 14	#address-cells = <1>;
 15	#size-cells = <1>;
 16
 17	cpus {
 18		#cpus = <1>;
 19		#address-cells = <1>;
 20		#size-cells = <0>;
 21
 22		cpu@0 {
 23			device_type = "cpu";
 24			reg = <0>;
 25			d-cache-line-size = <32>;	// 32 bytes
 26			i-cache-line-size = <32>;	// 32 bytes
 27			d-cache-size = <32768>;		// L1, 32K
 28			i-cache-size = <32768>;		// L1, 32K
 29			timebase-frequency = <0>;	// 33.3 MHz, from U-boot
 30			clock-frequency = <0>;		// From U-boot
 31			bus-frequency = <0>;		// From U-boot
 32		};
 33	};
 34
 35	memory {
 36		device_type = "memory";
 37		reg = <0 0>;				// From U-boot
 38	};
 39
 40	pci@80000000 {
 41		device_type = "pci";
 42		compatible = "mai-logic,articia-s";
 43		bus-frequency = <33333333>;
 44		bus-range = <0 0xff>;
 45		ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000	// PCI I/O
 46		          0x02000000 0 0x80000000 0x80000000 0 0x7d000000	// PCI memory
 47		          0x02000000 0 0x00000000 0xfd000000 0 0x01000000>;	// PCI alias memory (ISA)
 48		// Configuration address and data register.
 49		reg = <0xfec00cf8 4
 50		       0xfee00cfc 4>;
 51		8259-interrupt-acknowledge = <0xfef00000>;
 52		// Do not define a interrupt-parent here, if there is no
 53		// interrupt-map property.
 54		#address-cells = <3>;
 55		#size-cells = <2>;
 56
 57		isa@7 {
 58			device_type = "isa";
 59			compatible = "pciclass,0601";
 60			vendor-id = <0x00001106>;
 61			device-id = <0x00000686>;
 62			revision-id = <0x00000010>;
 63			class-code = <0x00060100>;
 64			subsystem-id = <0>;
 65			subsystem-vendor-id = <0>;
 66			devsel-speed = <0x00000001>;
 67			min-grant = <0>;
 68			max-latency = <0>;
 69			/* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
 70			ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
 71			interrupt-parent = <&i8259>;
 72			#interrupt-cells = <2>;
 73			#address-cells = <2>;
 74			#size-cells = <1>;
 75
 76			dma-controller@0 {
 77				compatible = "pnpPNP,200";
 78				reg = <1 0x00000000 0x00000020
 79				       1 0x00000080 0x00000010
 80				       1 0x000000c0 0x00000020>;
 81			};
 82
 83			i8259: interrupt-controller@20 {
 84				device_type = "interrupt-controller";
 85				compatible = "pnpPNP,000";
 86				interrupt-controller;
 87				reg = <1 0x00000020 0x00000002
 88				       1 0x000000a0 0x00000002
 89				       1 0x000004d0 0x00000002>;
 90				reserved-interrupts = <2>;
 91				#interrupt-cells = <2>;
 92			};
 93
 94			timer@40 {
 95				// Also adds pcspkr to platform devices.
 96				compatible = "pnpPNP,100";
 97				reg = <1 0x00000040 0x00000020>;
 98			};
 99
100			8042@60 {
101				device_type = "8042";
102				reg = <1 0x00000060 0x00000001
103				       1 0x00000064 0x00000001>;
104				interrupts = <1 3 12 3>;
105				#address-cells = <1>;
106				#size-cells = <0>;
107
108				keyboard@0 {
109					compatible = "pnpPNP,303";
110					reg = <0>;
111				};
112
113				mouse@1 {
114					compatible = "pnpPNP,f03";
115					reg = <1>;
116				};
117			};
118
119			rtc@70 {
120				compatible = "pnpPNP,b00";
121				reg = <1 0x00000070 0x00000002>;
122				interrupts = <8 3>;
123			};
124
125			serial@3f8 {
126				device_type = "serial";
127				compatible = "pnpPNP,501","pnpPNP,500";
128				reg = <1 0x000003f8 0x00000008>;
129				interrupts = <4 3>;
130				clock-frequency = <1843200>;
131				current-speed = <115200>;
132			};
133
134			serial@2f8 {
135				device_type = "serial";
136				compatible = "pnpPNP,501","pnpPNP,500";
137				reg = <1 0x000002f8 0x00000008>;
138				interrupts = <3 3>;
139				clock-frequency = <1843200>;
140				current-speed = <115200>;
141			};
142
143			parallel@378 {
144				device_type = "parallel";
145				// No ECP support for now, otherwise add "pnpPNP,401".
146				compatible = "pnpPNP,400";
147				reg = <1 0x00000378 0x00000003
148				       1 0x00000778 0x00000003>;
149			};
150
151			fdc@3f0 {
152				device_type = "fdc";
153				compatible = "pnpPNP,700";
154				reg = <1 0x000003f0 0x00000008>;
155				interrupts = <6 3>;
156				#address-cells = <1>;
157				#size-cells = <0>;
158
159				disk@0 {
160					reg = <0>;
161				};
162			};
163		};
164	};
165
166	chosen {
167		stdout-path = "/pci@80000000/isa@7/serial@3f8";
168	};
169};
v6.8
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * AmigaOne Device Tree Source
  4 *
  5 * Copyright 2008 Gerhard Pircher (gerhard_pircher@gmx.net)
  6 */
  7
  8/dts-v1/;
  9
 10/ {
 11	model = "AmigaOne";
 12	compatible = "eyetech,amigaone";
 13	coherency-off;
 14	#address-cells = <1>;
 15	#size-cells = <1>;
 16
 17	cpus {
 18		#cpus = <1>;
 19		#address-cells = <1>;
 20		#size-cells = <0>;
 21
 22		cpu@0 {
 23			device_type = "cpu";
 24			reg = <0>;
 25			d-cache-line-size = <32>;	// 32 bytes
 26			i-cache-line-size = <32>;	// 32 bytes
 27			d-cache-size = <32768>;		// L1, 32K
 28			i-cache-size = <32768>;		// L1, 32K
 29			timebase-frequency = <0>;	// 33.3 MHz, from U-boot
 30			clock-frequency = <0>;		// From U-boot
 31			bus-frequency = <0>;		// From U-boot
 32		};
 33	};
 34
 35	memory {
 36		device_type = "memory";
 37		reg = <0 0>;				// From U-boot
 38	};
 39
 40	pci@80000000 {
 41		device_type = "pci";
 42		compatible = "mai-logic,articia-s";
 43		bus-frequency = <33333333>;
 44		bus-range = <0 0xff>;
 45		ranges = <0x01000000 0 0x00000000 0xfe000000 0 0x00c00000	// PCI I/O
 46		          0x02000000 0 0x80000000 0x80000000 0 0x7d000000	// PCI memory
 47		          0x02000000 0 0x00000000 0xfd000000 0 0x01000000>;	// PCI alias memory (ISA)
 48		// Configuration address and data register.
 49		reg = <0xfec00cf8 4
 50		       0xfee00cfc 4>;
 51		8259-interrupt-acknowledge = <0xfef00000>;
 52		// Do not define a interrupt-parent here, if there is no
 53		// interrupt-map property.
 54		#address-cells = <3>;
 55		#size-cells = <2>;
 56
 57		isa@7 {
 58			device_type = "isa";
 59			compatible = "pciclass,0601";
 60			vendor-id = <0x00001106>;
 61			device-id = <0x00000686>;
 62			revision-id = <0x00000010>;
 63			class-code = <0x00060100>;
 64			subsystem-id = <0>;
 65			subsystem-vendor-id = <0>;
 66			devsel-speed = <0x00000001>;
 67			min-grant = <0>;
 68			max-latency = <0>;
 69			/* First 4k for I/O at 0x0 on PCI mapped to 0x0 on ISA. */
 70			ranges = <0x00000001 0 0x01000000 0 0x00000000 0x00001000>;
 71			interrupt-parent = <&i8259>;
 72			#interrupt-cells = <2>;
 73			#address-cells = <2>;
 74			#size-cells = <1>;
 75
 76			dma-controller@0 {
 77				compatible = "pnpPNP,200";
 78				reg = <1 0x00000000 0x00000020
 79				       1 0x00000080 0x00000010
 80				       1 0x000000c0 0x00000020>;
 81			};
 82
 83			i8259: interrupt-controller@20 {
 84				device_type = "interrupt-controller";
 85				compatible = "pnpPNP,000";
 86				interrupt-controller;
 87				reg = <1 0x00000020 0x00000002
 88				       1 0x000000a0 0x00000002
 89				       1 0x000004d0 0x00000002>;
 90				reserved-interrupts = <2>;
 91				#interrupt-cells = <2>;
 92			};
 93
 94			timer@40 {
 95				// Also adds pcspkr to platform devices.
 96				compatible = "pnpPNP,100";
 97				reg = <1 0x00000040 0x00000020>;
 98			};
 99
100			8042@60 {
101				device_type = "8042";
102				reg = <1 0x00000060 0x00000001
103				       1 0x00000064 0x00000001>;
104				interrupts = <1 3 12 3>;
105				#address-cells = <1>;
106				#size-cells = <0>;
107
108				keyboard@0 {
109					compatible = "pnpPNP,303";
110					reg = <0>;
111				};
112
113				mouse@1 {
114					compatible = "pnpPNP,f03";
115					reg = <1>;
116				};
117			};
118
119			rtc@70 {
120				compatible = "pnpPNP,b00";
121				reg = <1 0x00000070 0x00000002>;
122				interrupts = <8 3>;
123			};
124
125			serial@3f8 {
126				device_type = "serial";
127				compatible = "pnpPNP,501","pnpPNP,500";
128				reg = <1 0x000003f8 0x00000008>;
129				interrupts = <4 3>;
130				clock-frequency = <1843200>;
131				current-speed = <115200>;
132			};
133
134			serial@2f8 {
135				device_type = "serial";
136				compatible = "pnpPNP,501","pnpPNP,500";
137				reg = <1 0x000002f8 0x00000008>;
138				interrupts = <3 3>;
139				clock-frequency = <1843200>;
140				current-speed = <115200>;
141			};
142
143			parallel@378 {
144				device_type = "parallel";
145				// No ECP support for now, otherwise add "pnpPNP,401".
146				compatible = "pnpPNP,400";
147				reg = <1 0x00000378 0x00000003
148				       1 0x00000778 0x00000003>;
149			};
150
151			fdc@3f0 {
152				device_type = "fdc";
153				compatible = "pnpPNP,700";
154				reg = <1 0x000003f0 0x00000008>;
155				interrupts = <6 3>;
156				#address-cells = <1>;
157				#size-cells = <0>;
158
159				disk@0 {
160					reg = <0>;
161				};
162			};
163		};
164	};
165
166	chosen {
167		stdout-path = "/pci@80000000/isa@7/serial@3f8";
168	};
169};