1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 */
  4
  5#include "imx27-phytec-phycore-som.dtsi"
  6
  7/ {
  8	model = "Phytec pcm970";
  9	compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
 10
 11	chosen {
 12		stdout-path = &uart1;
 13	};
 14
 15	display0: LQ035Q7 {
 16		model = "Sharp-LQ035Q7";
 17		bits-per-pixel = <16>;
 18		fsl,pcr = <0xf00080c0>;
 19
 20		display-timings {
 21			native-mode = <&timing0>;
 22			timing0: timing0 {
 23				clock-frequency = <5500000>;
 24				hactive = <240>;
 25				vactive = <320>;
 26				hback-porch = <5>;
 27				hsync-len = <7>;
 28				hfront-porch = <16>;
 29				vback-porch = <7>;
 30				vsync-len = <1>;
 31				vfront-porch = <9>;
 32				pixelclk-active = <1>;
 33				hsync-active = <1>;
 34				vsync-active = <1>;
 35				de-active = <0>;
 36			};
 37		};
 38	};
 39
 40	regulator-2 {
 41		compatible = "regulator-fixed";
 42		pinctrl-names = "default";
 43		pinctrl-0 = <&pinctrl_csien>;
 44		regulator-name = "CSI_EN";
 45		regulator-min-microvolt = <3300000>;
 46		regulator-max-microvolt = <3300000>;
 47		gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
 48		regulator-always-on;
 49	};
 50
 51	usbphy2: usbphy {
 52		compatible = "usb-nop-xceiv";
 53		vcc-supply = <&reg_5v0>;
 54		clocks = <&clks IMX27_CLK_DUMMY>;
 55		clock-names = "main_clk";
 56		#phy-cells = <0>;
 57	};
 58};
 59
 60&cspi1 {
 61	pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
 62	cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>,
 63		   <&gpio4 27 GPIO_ACTIVE_LOW>;
 64};
 65
 66&fb {
 67	pinctrl-names = "default";
 68	pinctrl-0 = <&pinctrl_imxfb1>;
 69	display = <&display0>;
 70	lcd-supply = <&reg_5v0>;
 71	fsl,dmacr = <0x00020010>;
 72	fsl,lscr1 = <0x00120300>;
 73	fsl,lpccr = <0x00a903ff>;
 74	status = "okay";
 75};
 76
 77&i2c1 {
 78	clock-frequency = <400000>;
 79	pinctrl-names = "default";
 80	pinctrl-0 = <&pinctrl_i2c1>;
 81	status = "okay";
 82
 83	camgpio: pca9536@41 {
 84		compatible = "nxp,pca9536";
 85		reg = <0x41>;
 86		gpio-controller;
 87		#gpio-cells = <2>;
 88	};
 89};
 90
 91&iomuxc {
 92	imx27_phycore_rdk {
 93		pinctrl_csien: csiengrp {
 94			fsl,pins = <
 95				MX27_PAD_USB_OC_B__GPIO2_24 0x0
 96			>;
 97		};
 98
 99		pinctrl_cspi1cs1: cspi1cs1grp {
100			fsl,pins = <
101				MX27_PAD_CSPI1_SS1__GPIO4_27 0x0
102			>;
103		};
104
105		pinctrl_imxfb1: imxfbgrp {
106			fsl,pins = <
107				MX27_PAD_LD0__LD0 0x0
108				MX27_PAD_LD1__LD1 0x0
109				MX27_PAD_LD2__LD2 0x0
110				MX27_PAD_LD3__LD3 0x0
111				MX27_PAD_LD4__LD4 0x0
112				MX27_PAD_LD5__LD5 0x0
113				MX27_PAD_LD6__LD6 0x0
114				MX27_PAD_LD7__LD7 0x0
115				MX27_PAD_LD8__LD8 0x0
116				MX27_PAD_LD9__LD9 0x0
117				MX27_PAD_LD10__LD10 0x0
118				MX27_PAD_LD11__LD11 0x0
119				MX27_PAD_LD12__LD12 0x0
120				MX27_PAD_LD13__LD13 0x0
121				MX27_PAD_LD14__LD14 0x0
122				MX27_PAD_LD15__LD15 0x0
123				MX27_PAD_LD16__LD16 0x0
124				MX27_PAD_LD17__LD17 0x0
125				MX27_PAD_CLS__CLS 0x0
126				MX27_PAD_CONTRAST__CONTRAST 0x0
127				MX27_PAD_LSCLK__LSCLK 0x0
128				MX27_PAD_OE_ACD__OE_ACD 0x0
129				MX27_PAD_PS__PS 0x0
130				MX27_PAD_REV__REV 0x0
131				MX27_PAD_SPL_SPR__SPL_SPR 0x0
132				MX27_PAD_HSYNC__HSYNC 0x0
133				MX27_PAD_VSYNC__VSYNC 0x0
134			>;
135		};
136
137		pinctrl_i2c1: i2c1grp {
138			/* Add pullup to DATA line */
139			fsl,pins = <
140				MX27_PAD_I2C_DATA__I2C_DATA	0x1
141				MX27_PAD_I2C_CLK__I2C_CLK	0x0
142			>;
143		};
144
145		pinctrl_owire1: owire1grp {
146			fsl,pins = <
147				MX27_PAD_RTCK__OWIRE 0x0
148			>;
149		};
150
151		pinctrl_sdhc2: sdhc2grp {
152			fsl,pins = <
153				MX27_PAD_SD2_CLK__SD2_CLK 0x0
154				MX27_PAD_SD2_CMD__SD2_CMD 0x0
155				MX27_PAD_SD2_D0__SD2_D0 0x0
156				MX27_PAD_SD2_D1__SD2_D1 0x0
157				MX27_PAD_SD2_D2__SD2_D2 0x0
158				MX27_PAD_SD2_D3__SD2_D3 0x0
159				MX27_PAD_SSI3_FS__GPIO3_28	0x0 /* WP */
160				MX27_PAD_SSI3_RXDAT__GPIO3_29	0x0 /* CD */
161			>;
162		};
163
164		pinctrl_uart1: uart1grp {
165			fsl,pins = <
166				MX27_PAD_UART1_TXD__UART1_TXD 0x0
167				MX27_PAD_UART1_RXD__UART1_RXD 0x0
168				MX27_PAD_UART1_CTS__UART1_CTS 0x0
169				MX27_PAD_UART1_RTS__UART1_RTS 0x0
170			>;
171		};
172
173		pinctrl_uart2: uart2grp {
174			fsl,pins = <
175				MX27_PAD_UART2_TXD__UART2_TXD 0x0
176				MX27_PAD_UART2_RXD__UART2_RXD 0x0
177				MX27_PAD_UART2_CTS__UART2_CTS 0x0
178				MX27_PAD_UART2_RTS__UART2_RTS 0x0
179			>;
180		};
181
182		pinctrl_usbh2: usbh2grp {
183			fsl,pins = <
184				MX27_PAD_USBH2_CLK__USBH2_CLK 0x0
185				MX27_PAD_USBH2_DIR__USBH2_DIR 0x0
186				MX27_PAD_USBH2_NXT__USBH2_NXT 0x0
187				MX27_PAD_USBH2_STP__USBH2_STP 0x0
188				MX27_PAD_CSPI2_SCLK__USBH2_DATA0 0x0
189				MX27_PAD_CSPI2_MOSI__USBH2_DATA1 0x0
190				MX27_PAD_CSPI2_MISO__USBH2_DATA2 0x0
191				MX27_PAD_CSPI2_SS1__USBH2_DATA3 0x0
192				MX27_PAD_CSPI2_SS2__USBH2_DATA4 0x0
193				MX27_PAD_CSPI1_SS2__USBH2_DATA5 0x0
194				MX27_PAD_CSPI2_SS0__USBH2_DATA6 0x0
195				MX27_PAD_USBH2_DATA7__USBH2_DATA7 0x0
196			>;
197		};
198
199		pinctrl_weim: weimgrp {
200			fsl,pins = <
201				MX27_PAD_CS4_B__CS4_B		0x0 /* CS4 */
202				MX27_PAD_SD1_D1__GPIO5_19	0x0 /* CAN IRQ */
203			>;
204		};
205	};
206};
207
208&owire {
209	pinctrl-names = "default";
210	pinctrl-0 = <&pinctrl_owire1>;
211	status = "okay";
212};
213
214&pmicleds {
215	ledr1: led@3 {
216		reg = <3>;
217		label = "system:red1:user";
218	};
219
220	ledg1: led@4 {
221		reg = <4>;
222		label = "system:green1:user";
223	};
224
225	ledb1: led@5 {
226		reg = <5>;
227		label = "system:blue1:user";
228	};
229
230	ledr2: led@6 {
231		reg = <6>;
232		label = "system:red2:user";
233	};
234
235	ledg2: led@7 {
236		reg = <7>;
237		label = "system:green2:user";
238	};
239
240	ledb2: led@8 {
241		reg = <8>;
242		label = "system:blue2:user";
243	};
244
245	ledr3: led@9 {
246		reg = <9>;
247		label = "system:red3:nand";
248		linux,default-trigger = "nand-disk";
249	};
250
251	ledg3: led@10 {
252		reg = <10>;
253		label = "system:green3:live";
254		linux,default-trigger = "heartbeat";
255	};
256
257	ledb3: led@11 {
258		reg = <11>;
259		label = "system:blue3:cpu";
260		linux,default-trigger = "cpu0";
261	};
262};
263
264&sdhci2 {
265	pinctrl-names = "default";
266	pinctrl-0 = <&pinctrl_sdhc2>;
267	bus-width = <4>;
268	cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
269	wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
270	vmmc-supply = <&vmmc1_reg>;
271	status = "okay";
272};
273
274&uart1 {
275	uart-has-rtscts;
276	pinctrl-names = "default";
277	pinctrl-0 = <&pinctrl_uart1>;
278	status = "okay";
279};
280
281&uart2 {
282	uart-has-rtscts;
283	pinctrl-names = "default";
284	pinctrl-0 = <&pinctrl_uart2>;
285	status = "okay";
286};
287
288&usbh2 {
289	pinctrl-names = "default";
290	pinctrl-0 = <&pinctrl_usbh2>;
291	dr_mode = "host";
292	phy_type = "ulpi";
293	vbus-supply = <&reg_5v0>;
294	fsl,usbphy = <&usbphy2>;
295	disable-over-current;
296	status = "okay";
297};
298
299&weim {
300	pinctrl-names = "default";
301	pinctrl-0 = <&pinctrl_weim>;
302
303	can@4,0 {
304		compatible = "nxp,sja1000";
305		reg = <4 0x00000000 0x00000100>;
306		interrupt-parent = <&gpio5>;
307		interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
308		nxp,external-clock-frequency = <16000000>;
309		nxp,tx-output-config = <0x16>;
310		nxp,no-comparator-bypass;
311		fsl,weim-cs-timing = <0x0000dcf6 0x444a0301 0x44443302>;
312	};
313};