1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 *  The driver for the ForteMedia FM801 based soundcards
   4 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
   5 */
   6
   7#include <linux/delay.h>
   8#include <linux/init.h>
   9#include <linux/interrupt.h>
  10#include <linux/io.h>
  11#include <linux/pci.h>
  12#include <linux/slab.h>
  13#include <linux/module.h>
  14#include <sound/core.h>
  15#include <sound/pcm.h>
  16#include <sound/tlv.h>
  17#include <sound/ac97_codec.h>
  18#include <sound/mpu401.h>
  19#include <sound/opl3.h>
  20#include <sound/initval.h>
  21
  22#ifdef CONFIG_SND_FM801_TEA575X_BOOL
  23#include <media/drv-intf/tea575x.h>
  24#endif
  25
  26MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  27MODULE_DESCRIPTION("ForteMedia FM801");
  28MODULE_LICENSE("GPL");
  29
  30static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
  31static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
  32static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;	/* Enable this card */
  33/*
  34 *  Enable TEA575x tuner
  35 *    1 = MediaForte 256-PCS
  36 *    2 = MediaForte 256-PCP
  37 *    3 = MediaForte 64-PCR
  38 *   16 = setup tuner only (this is additional bit), i.e. SF64-PCR FM card
  39 *  High 16-bits are video (radio) device number + 1
  40 */
  41static int tea575x_tuner[SNDRV_CARDS];
  42static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
  43
  44module_param_array(index, int, NULL, 0444);
  45MODULE_PARM_DESC(index, "Index value for the FM801 soundcard.");
  46module_param_array(id, charp, NULL, 0444);
  47MODULE_PARM_DESC(id, "ID string for the FM801 soundcard.");
  48module_param_array(enable, bool, NULL, 0444);
  49MODULE_PARM_DESC(enable, "Enable FM801 soundcard.");
  50module_param_array(tea575x_tuner, int, NULL, 0444);
  51MODULE_PARM_DESC(tea575x_tuner, "TEA575x tuner access method (0 = auto, 1 = SF256-PCS, 2=SF256-PCP, 3=SF64-PCR, 8=disable, +16=tuner-only).");
  52module_param_array(radio_nr, int, NULL, 0444);
  53MODULE_PARM_DESC(radio_nr, "Radio device numbers");
  54
  55
  56#define TUNER_DISABLED		(1<<3)
  57#define TUNER_ONLY		(1<<4)
  58#define TUNER_TYPE_MASK		(~TUNER_ONLY & 0xFFFF)
  59
  60/*
  61 *  Direct registers
  62 */
  63
  64#define fm801_writew(chip,reg,value)	outw((value), chip->port + FM801_##reg)
  65#define fm801_readw(chip,reg)		inw(chip->port + FM801_##reg)
  66
  67#define fm801_writel(chip,reg,value)	outl((value), chip->port + FM801_##reg)
  68
  69#define FM801_PCM_VOL		0x00	/* PCM Output Volume */
  70#define FM801_FM_VOL		0x02	/* FM Output Volume */
  71#define FM801_I2S_VOL		0x04	/* I2S Volume */
  72#define FM801_REC_SRC		0x06	/* Record Source */
  73#define FM801_PLY_CTRL		0x08	/* Playback Control */
  74#define FM801_PLY_COUNT		0x0a	/* Playback Count */
  75#define FM801_PLY_BUF1		0x0c	/* Playback Bufer I */
  76#define FM801_PLY_BUF2		0x10	/* Playback Buffer II */
  77#define FM801_CAP_CTRL		0x14	/* Capture Control */
  78#define FM801_CAP_COUNT		0x16	/* Capture Count */
  79#define FM801_CAP_BUF1		0x18	/* Capture Buffer I */
  80#define FM801_CAP_BUF2		0x1c	/* Capture Buffer II */
  81#define FM801_CODEC_CTRL	0x22	/* Codec Control */
  82#define FM801_I2S_MODE		0x24	/* I2S Mode Control */
  83#define FM801_VOLUME		0x26	/* Volume Up/Down/Mute Status */
  84#define FM801_I2C_CTRL		0x29	/* I2C Control */
  85#define FM801_AC97_CMD		0x2a	/* AC'97 Command */
  86#define FM801_AC97_DATA		0x2c	/* AC'97 Data */
  87#define FM801_MPU401_DATA	0x30	/* MPU401 Data */
  88#define FM801_MPU401_CMD	0x31	/* MPU401 Command */
  89#define FM801_GPIO_CTRL		0x52	/* General Purpose I/O Control */
  90#define FM801_GEN_CTRL		0x54	/* General Control */
  91#define FM801_IRQ_MASK		0x56	/* Interrupt Mask */
  92#define FM801_IRQ_STATUS	0x5a	/* Interrupt Status */
  93#define FM801_OPL3_BANK0	0x68	/* OPL3 Status Read / Bank 0 Write */
  94#define FM801_OPL3_DATA0	0x69	/* OPL3 Data 0 Write */
  95#define FM801_OPL3_BANK1	0x6a	/* OPL3 Bank 1 Write */
  96#define FM801_OPL3_DATA1	0x6b	/* OPL3 Bank 1 Write */
  97#define FM801_POWERDOWN		0x70	/* Blocks Power Down Control */
  98
  99/* codec access */
 100#define FM801_AC97_READ		(1<<7)	/* read=1, write=0 */
 101#define FM801_AC97_VALID	(1<<8)	/* port valid=1 */
 102#define FM801_AC97_BUSY		(1<<9)	/* busy=1 */
 103#define FM801_AC97_ADDR_SHIFT	10	/* codec id (2bit) */
 104
 105/* playback and record control register bits */
 106#define FM801_BUF1_LAST		(1<<1)
 107#define FM801_BUF2_LAST		(1<<2)
 108#define FM801_START		(1<<5)
 109#define FM801_PAUSE		(1<<6)
 110#define FM801_IMMED_STOP	(1<<7)
 111#define FM801_RATE_SHIFT	8
 112#define FM801_RATE_MASK		(15 << FM801_RATE_SHIFT)
 113#define FM801_CHANNELS_4	(1<<12)	/* playback only */
 114#define FM801_CHANNELS_6	(2<<12)	/* playback only */
 115#define FM801_CHANNELS_6MS	(3<<12)	/* playback only */
 116#define FM801_CHANNELS_MASK	(3<<12)
 117#define FM801_16BIT		(1<<14)
 118#define FM801_STEREO		(1<<15)
 119
 120/* IRQ status bits */
 121#define FM801_IRQ_PLAYBACK	(1<<8)
 122#define FM801_IRQ_CAPTURE	(1<<9)
 123#define FM801_IRQ_VOLUME	(1<<14)
 124#define FM801_IRQ_MPU		(1<<15)
 125
 126/* GPIO control register */
 127#define FM801_GPIO_GP0		(1<<0)	/* read/write */
 128#define FM801_GPIO_GP1		(1<<1)
 129#define FM801_GPIO_GP2		(1<<2)
 130#define FM801_GPIO_GP3		(1<<3)
 131#define FM801_GPIO_GP(x)	(1<<(0+(x)))
 132#define FM801_GPIO_GD0		(1<<8)	/* directions: 1 = input, 0 = output*/
 133#define FM801_GPIO_GD1		(1<<9)
 134#define FM801_GPIO_GD2		(1<<10)
 135#define FM801_GPIO_GD3		(1<<11)
 136#define FM801_GPIO_GD(x)	(1<<(8+(x)))
 137#define FM801_GPIO_GS0		(1<<12)	/* function select: */
 138#define FM801_GPIO_GS1		(1<<13)	/*    1 = GPIO */
 139#define FM801_GPIO_GS2		(1<<14)	/*    0 = other (S/PDIF, VOL) */
 140#define FM801_GPIO_GS3		(1<<15)
 141#define FM801_GPIO_GS(x)	(1<<(12+(x)))
 142	
 143/**
 144 * struct fm801 - describes FM801 chip
 145 * @dev:		device for this chio
 146 * @irq:		irq number
 147 * @port:		I/O port number
 148 * @multichannel:	multichannel support
 149 * @secondary:		secondary codec
 150 * @secondary_addr:	address of the secondary codec
 151 * @tea575x_tuner:	tuner access method & flags
 152 * @ply_ctrl:		playback control
 153 * @cap_ctrl:		capture control
 154 * @ply_buffer:		playback buffer
 155 * @ply_buf:		playback buffer index
 156 * @ply_count:		playback buffer count
 157 * @ply_size:		playback buffer size
 158 * @ply_pos:		playback position
 159 * @cap_buffer:		capture buffer
 160 * @cap_buf:		capture buffer index
 161 * @cap_count:		capture buffer count
 162 * @cap_size:		capture buffer size
 163 * @cap_pos:		capture position
 164 * @ac97_bus:		ac97 bus handle
 165 * @ac97:		ac97 handle
 166 * @ac97_sec:		ac97 secondary handle
 167 * @card:		ALSA card
 168 * @pcm:		PCM devices
 169 * @rmidi:		rmidi device
 170 * @playback_substream:	substream for playback
 171 * @capture_substream:	substream for capture
 172 * @p_dma_size:		playback DMA size
 173 * @c_dma_size:		capture DMA size
 174 * @reg_lock:		lock
 175 * @proc_entry:		/proc entry
 176 * @v4l2_dev:		v4l2 device
 177 * @tea:		tea575a structure
 178 * @saved_regs:		context saved during suspend
 179 */
 180struct fm801 {
 181	struct device *dev;
 182	int irq;
 183
 184	unsigned long port;
 185	unsigned int multichannel: 1,
 186		     secondary: 1;
 187	unsigned char secondary_addr;
 188	unsigned int tea575x_tuner;
 189
 190	unsigned short ply_ctrl;
 191	unsigned short cap_ctrl;
 192
 193	unsigned long ply_buffer;
 194	unsigned int ply_buf;
 195	unsigned int ply_count;
 196	unsigned int ply_size;
 197	unsigned int ply_pos;
 198
 199	unsigned long cap_buffer;
 200	unsigned int cap_buf;
 201	unsigned int cap_count;
 202	unsigned int cap_size;
 203	unsigned int cap_pos;
 204
 205	struct snd_ac97_bus *ac97_bus;
 206	struct snd_ac97 *ac97;
 207	struct snd_ac97 *ac97_sec;
 208
 209	struct snd_card *card;
 210	struct snd_pcm *pcm;
 211	struct snd_rawmidi *rmidi;
 212	struct snd_pcm_substream *playback_substream;
 213	struct snd_pcm_substream *capture_substream;
 214	unsigned int p_dma_size;
 215	unsigned int c_dma_size;
 216
 217	spinlock_t reg_lock;
 218	struct snd_info_entry *proc_entry;
 219
 220#ifdef CONFIG_SND_FM801_TEA575X_BOOL
 221	struct v4l2_device v4l2_dev;
 222	struct snd_tea575x tea;
 223#endif
 224
 225#ifdef CONFIG_PM_SLEEP
 226	u16 saved_regs[0x20];
 227#endif
 228};
 229
 230/*
 231 * IO accessors
 232 */
 233
 234static inline void fm801_iowrite16(struct fm801 *chip, unsigned short offset, u16 value)
 235{
 236	outw(value, chip->port + offset);
 237}
 238
 239static inline u16 fm801_ioread16(struct fm801 *chip, unsigned short offset)
 240{
 241	return inw(chip->port + offset);
 242}
 243
 244static const struct pci_device_id snd_fm801_ids[] = {
 245	{ 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* FM801 */
 246	{ 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, },   /* Gallant Odyssey Sound 4 */
 247	{ 0, }
 248};
 249
 250MODULE_DEVICE_TABLE(pci, snd_fm801_ids);
 251
 252/*
 253 *  common I/O routines
 254 */
 255
 256static bool fm801_ac97_is_ready(struct fm801 *chip, unsigned int iterations)
 257{
 258	unsigned int idx;
 259
 260	for (idx = 0; idx < iterations; idx++) {
 261		if (!(fm801_readw(chip, AC97_CMD) & FM801_AC97_BUSY))
 262			return true;
 263		udelay(10);
 264	}
 265	return false;
 266}
 267
 268static bool fm801_ac97_is_valid(struct fm801 *chip, unsigned int iterations)
 269{
 270	unsigned int idx;
 271
 272	for (idx = 0; idx < iterations; idx++) {
 273		if (fm801_readw(chip, AC97_CMD) & FM801_AC97_VALID)
 274			return true;
 275		udelay(10);
 276	}
 277	return false;
 278}
 279
 280static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg,
 281				 unsigned short mask, unsigned short value)
 282{
 283	int change;
 284	unsigned long flags;
 285	unsigned short old, new;
 286
 287	spin_lock_irqsave(&chip->reg_lock, flags);
 288	old = fm801_ioread16(chip, reg);
 289	new = (old & ~mask) | value;
 290	change = old != new;
 291	if (change)
 292		fm801_iowrite16(chip, reg, new);
 293	spin_unlock_irqrestore(&chip->reg_lock, flags);
 294	return change;
 295}
 296
 297static void snd_fm801_codec_write(struct snd_ac97 *ac97,
 298				  unsigned short reg,
 299				  unsigned short val)
 300{
 301	struct fm801 *chip = ac97->private_data;
 302
 303	/*
 304	 *  Wait until the codec interface is not ready..
 305	 */
 306	if (!fm801_ac97_is_ready(chip, 100)) {
 307		dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
 308		return;
 309	}
 310
 311	/* write data and address */
 312	fm801_writew(chip, AC97_DATA, val);
 313	fm801_writew(chip, AC97_CMD, reg | (ac97->addr << FM801_AC97_ADDR_SHIFT));
 314	/*
 315	 *  Wait until the write command is not completed..
 316	 */
 317	if (!fm801_ac97_is_ready(chip, 1000))
 318		dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
 319		ac97->num);
 320}
 321
 322static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg)
 323{
 324	struct fm801 *chip = ac97->private_data;
 325
 326	/*
 327	 *  Wait until the codec interface is not ready..
 328	 */
 329	if (!fm801_ac97_is_ready(chip, 100)) {
 330		dev_err(chip->card->dev, "AC'97 interface is busy (1)\n");
 331		return 0;
 332	}
 333
 334	/* read command */
 335	fm801_writew(chip, AC97_CMD,
 336		     reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
 337	if (!fm801_ac97_is_ready(chip, 100)) {
 338		dev_err(chip->card->dev, "AC'97 interface #%d is busy (2)\n",
 339			ac97->num);
 340		return 0;
 341	}
 342
 343	if (!fm801_ac97_is_valid(chip, 1000)) {
 344		dev_err(chip->card->dev,
 345			"AC'97 interface #%d is not valid (2)\n", ac97->num);
 346		return 0;
 347	}
 348
 349	return fm801_readw(chip, AC97_DATA);
 350}
 351
 352static const unsigned int rates[] = {
 353  5500,  8000,  9600, 11025,
 354  16000, 19200, 22050, 32000,
 355  38400, 44100, 48000
 356};
 357
 358static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
 359	.count = ARRAY_SIZE(rates),
 360	.list = rates,
 361	.mask = 0,
 362};
 363
 364static const unsigned int channels[] = {
 365  2, 4, 6
 366};
 367
 368static const struct snd_pcm_hw_constraint_list hw_constraints_channels = {
 369	.count = ARRAY_SIZE(channels),
 370	.list = channels,
 371	.mask = 0,
 372};
 373
 374/*
 375 *  Sample rate routines
 376 */
 377
 378static unsigned short snd_fm801_rate_bits(unsigned int rate)
 379{
 380	unsigned int idx;
 381
 382	for (idx = 0; idx < ARRAY_SIZE(rates); idx++)
 383		if (rates[idx] == rate)
 384			return idx;
 385	snd_BUG();
 386	return ARRAY_SIZE(rates) - 1;
 387}
 388
 389/*
 390 *  PCM part
 391 */
 392
 393static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream,
 394				      int cmd)
 395{
 396	struct fm801 *chip = snd_pcm_substream_chip(substream);
 397
 398	spin_lock(&chip->reg_lock);
 399	switch (cmd) {
 400	case SNDRV_PCM_TRIGGER_START:
 401		chip->ply_ctrl &= ~(FM801_BUF1_LAST |
 402				     FM801_BUF2_LAST |
 403				     FM801_PAUSE);
 404		chip->ply_ctrl |= FM801_START |
 405				   FM801_IMMED_STOP;
 406		break;
 407	case SNDRV_PCM_TRIGGER_STOP:
 408		chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE);
 409		break;
 410	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 411	case SNDRV_PCM_TRIGGER_SUSPEND:
 412		chip->ply_ctrl |= FM801_PAUSE;
 413		break;
 414	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 415	case SNDRV_PCM_TRIGGER_RESUME:
 416		chip->ply_ctrl &= ~FM801_PAUSE;
 417		break;
 418	default:
 419		spin_unlock(&chip->reg_lock);
 420		snd_BUG();
 421		return -EINVAL;
 422	}
 423	fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
 424	spin_unlock(&chip->reg_lock);
 425	return 0;
 426}
 427
 428static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream,
 429				     int cmd)
 430{
 431	struct fm801 *chip = snd_pcm_substream_chip(substream);
 432
 433	spin_lock(&chip->reg_lock);
 434	switch (cmd) {
 435	case SNDRV_PCM_TRIGGER_START:
 436		chip->cap_ctrl &= ~(FM801_BUF1_LAST |
 437				     FM801_BUF2_LAST |
 438				     FM801_PAUSE);
 439		chip->cap_ctrl |= FM801_START |
 440				   FM801_IMMED_STOP;
 441		break;
 442	case SNDRV_PCM_TRIGGER_STOP:
 443		chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE);
 444		break;
 445	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
 446	case SNDRV_PCM_TRIGGER_SUSPEND:
 447		chip->cap_ctrl |= FM801_PAUSE;
 448		break;
 449	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
 450	case SNDRV_PCM_TRIGGER_RESUME:
 451		chip->cap_ctrl &= ~FM801_PAUSE;
 452		break;
 453	default:
 454		spin_unlock(&chip->reg_lock);
 455		snd_BUG();
 456		return -EINVAL;
 457	}
 458	fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
 459	spin_unlock(&chip->reg_lock);
 460	return 0;
 461}
 462
 463static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream)
 464{
 465	struct fm801 *chip = snd_pcm_substream_chip(substream);
 466	struct snd_pcm_runtime *runtime = substream->runtime;
 467
 468	chip->ply_size = snd_pcm_lib_buffer_bytes(substream);
 469	chip->ply_count = snd_pcm_lib_period_bytes(substream);
 470	spin_lock_irq(&chip->reg_lock);
 471	chip->ply_ctrl &= ~(FM801_START | FM801_16BIT |
 472			     FM801_STEREO | FM801_RATE_MASK |
 473			     FM801_CHANNELS_MASK);
 474	if (snd_pcm_format_width(runtime->format) == 16)
 475		chip->ply_ctrl |= FM801_16BIT;
 476	if (runtime->channels > 1) {
 477		chip->ply_ctrl |= FM801_STEREO;
 478		if (runtime->channels == 4)
 479			chip->ply_ctrl |= FM801_CHANNELS_4;
 480		else if (runtime->channels == 6)
 481			chip->ply_ctrl |= FM801_CHANNELS_6;
 482	}
 483	chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
 484	chip->ply_buf = 0;
 485	fm801_writew(chip, PLY_CTRL, chip->ply_ctrl);
 486	fm801_writew(chip, PLY_COUNT, chip->ply_count - 1);
 487	chip->ply_buffer = runtime->dma_addr;
 488	chip->ply_pos = 0;
 489	fm801_writel(chip, PLY_BUF1, chip->ply_buffer);
 490	fm801_writel(chip, PLY_BUF2,
 491		     chip->ply_buffer + (chip->ply_count % chip->ply_size));
 492	spin_unlock_irq(&chip->reg_lock);
 493	return 0;
 494}
 495
 496static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream)
 497{
 498	struct fm801 *chip = snd_pcm_substream_chip(substream);
 499	struct snd_pcm_runtime *runtime = substream->runtime;
 500
 501	chip->cap_size = snd_pcm_lib_buffer_bytes(substream);
 502	chip->cap_count = snd_pcm_lib_period_bytes(substream);
 503	spin_lock_irq(&chip->reg_lock);
 504	chip->cap_ctrl &= ~(FM801_START | FM801_16BIT |
 505			     FM801_STEREO | FM801_RATE_MASK);
 506	if (snd_pcm_format_width(runtime->format) == 16)
 507		chip->cap_ctrl |= FM801_16BIT;
 508	if (runtime->channels > 1)
 509		chip->cap_ctrl |= FM801_STEREO;
 510	chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT;
 511	chip->cap_buf = 0;
 512	fm801_writew(chip, CAP_CTRL, chip->cap_ctrl);
 513	fm801_writew(chip, CAP_COUNT, chip->cap_count - 1);
 514	chip->cap_buffer = runtime->dma_addr;
 515	chip->cap_pos = 0;
 516	fm801_writel(chip, CAP_BUF1, chip->cap_buffer);
 517	fm801_writel(chip, CAP_BUF2,
 518		     chip->cap_buffer + (chip->cap_count % chip->cap_size));
 519	spin_unlock_irq(&chip->reg_lock);
 520	return 0;
 521}
 522
 523static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream)
 524{
 525	struct fm801 *chip = snd_pcm_substream_chip(substream);
 526	size_t ptr;
 527
 528	if (!(chip->ply_ctrl & FM801_START))
 529		return 0;
 530	spin_lock(&chip->reg_lock);
 531	ptr = chip->ply_pos + (chip->ply_count - 1) - fm801_readw(chip, PLY_COUNT);
 532	if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_PLAYBACK) {
 533		ptr += chip->ply_count;
 534		ptr %= chip->ply_size;
 535	}
 536	spin_unlock(&chip->reg_lock);
 537	return bytes_to_frames(substream->runtime, ptr);
 538}
 539
 540static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream)
 541{
 542	struct fm801 *chip = snd_pcm_substream_chip(substream);
 543	size_t ptr;
 544
 545	if (!(chip->cap_ctrl & FM801_START))
 546		return 0;
 547	spin_lock(&chip->reg_lock);
 548	ptr = chip->cap_pos + (chip->cap_count - 1) - fm801_readw(chip, CAP_COUNT);
 549	if (fm801_readw(chip, IRQ_STATUS) & FM801_IRQ_CAPTURE) {
 550		ptr += chip->cap_count;
 551		ptr %= chip->cap_size;
 552	}
 553	spin_unlock(&chip->reg_lock);
 554	return bytes_to_frames(substream->runtime, ptr);
 555}
 556
 557static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id)
 558{
 559	struct fm801 *chip = dev_id;
 560	unsigned short status;
 561	unsigned int tmp;
 562
 563	status = fm801_readw(chip, IRQ_STATUS);
 564	status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME;
 565	if (! status)
 566		return IRQ_NONE;
 567	/* ack first */
 568	fm801_writew(chip, IRQ_STATUS, status);
 569	if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) {
 570		spin_lock(&chip->reg_lock);
 571		chip->ply_buf++;
 572		chip->ply_pos += chip->ply_count;
 573		chip->ply_pos %= chip->ply_size;
 574		tmp = chip->ply_pos + chip->ply_count;
 575		tmp %= chip->ply_size;
 576		if (chip->ply_buf & 1)
 577			fm801_writel(chip, PLY_BUF1, chip->ply_buffer + tmp);
 578		else
 579			fm801_writel(chip, PLY_BUF2, chip->ply_buffer + tmp);
 580		spin_unlock(&chip->reg_lock);
 581		snd_pcm_period_elapsed(chip->playback_substream);
 582	}
 583	if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) {
 584		spin_lock(&chip->reg_lock);
 585		chip->cap_buf++;
 586		chip->cap_pos += chip->cap_count;
 587		chip->cap_pos %= chip->cap_size;
 588		tmp = chip->cap_pos + chip->cap_count;
 589		tmp %= chip->cap_size;
 590		if (chip->cap_buf & 1)
 591			fm801_writel(chip, CAP_BUF1, chip->cap_buffer + tmp);
 592		else
 593			fm801_writel(chip, CAP_BUF2, chip->cap_buffer + tmp);
 594		spin_unlock(&chip->reg_lock);
 595		snd_pcm_period_elapsed(chip->capture_substream);
 596	}
 597	if (chip->rmidi && (status & FM801_IRQ_MPU))
 598		snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
 599	if (status & FM801_IRQ_VOLUME) {
 600		/* TODO */
 601	}
 602
 603	return IRQ_HANDLED;
 604}
 605
 606static const struct snd_pcm_hardware snd_fm801_playback =
 607{
 608	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 609				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
 610				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
 611				 SNDRV_PCM_INFO_MMAP_VALID),
 612	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 613	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
 614	.rate_min =		5500,
 615	.rate_max =		48000,
 616	.channels_min =		1,
 617	.channels_max =		2,
 618	.buffer_bytes_max =	(128*1024),
 619	.period_bytes_min =	64,
 620	.period_bytes_max =	(128*1024),
 621	.periods_min =		1,
 622	.periods_max =		1024,
 623	.fifo_size =		0,
 624};
 625
 626static const struct snd_pcm_hardware snd_fm801_capture =
 627{
 628	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
 629				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
 630				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME |
 631				 SNDRV_PCM_INFO_MMAP_VALID),
 632	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
 633	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
 634	.rate_min =		5500,
 635	.rate_max =		48000,
 636	.channels_min =		1,
 637	.channels_max =		2,
 638	.buffer_bytes_max =	(128*1024),
 639	.period_bytes_min =	64,
 640	.period_bytes_max =	(128*1024),
 641	.periods_min =		1,
 642	.periods_max =		1024,
 643	.fifo_size =		0,
 644};
 645
 646static int snd_fm801_playback_open(struct snd_pcm_substream *substream)
 647{
 648	struct fm801 *chip = snd_pcm_substream_chip(substream);
 649	struct snd_pcm_runtime *runtime = substream->runtime;
 650	int err;
 651
 652	chip->playback_substream = substream;
 653	runtime->hw = snd_fm801_playback;
 654	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
 655				   &hw_constraints_rates);
 656	if (chip->multichannel) {
 657		runtime->hw.channels_max = 6;
 658		snd_pcm_hw_constraint_list(runtime, 0,
 659					   SNDRV_PCM_HW_PARAM_CHANNELS,
 660					   &hw_constraints_channels);
 661	}
 662	err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
 663	if (err < 0)
 664		return err;
 665	return 0;
 666}
 667
 668static int snd_fm801_capture_open(struct snd_pcm_substream *substream)
 669{
 670	struct fm801 *chip = snd_pcm_substream_chip(substream);
 671	struct snd_pcm_runtime *runtime = substream->runtime;
 672	int err;
 673
 674	chip->capture_substream = substream;
 675	runtime->hw = snd_fm801_capture;
 676	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
 677				   &hw_constraints_rates);
 678	err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
 679	if (err < 0)
 680		return err;
 681	return 0;
 682}
 683
 684static int snd_fm801_playback_close(struct snd_pcm_substream *substream)
 685{
 686	struct fm801 *chip = snd_pcm_substream_chip(substream);
 687
 688	chip->playback_substream = NULL;
 689	return 0;
 690}
 691
 692static int snd_fm801_capture_close(struct snd_pcm_substream *substream)
 693{
 694	struct fm801 *chip = snd_pcm_substream_chip(substream);
 695
 696	chip->capture_substream = NULL;
 697	return 0;
 698}
 699
 700static const struct snd_pcm_ops snd_fm801_playback_ops = {
 701	.open =		snd_fm801_playback_open,
 702	.close =	snd_fm801_playback_close,
 703	.prepare =	snd_fm801_playback_prepare,
 704	.trigger =	snd_fm801_playback_trigger,
 705	.pointer =	snd_fm801_playback_pointer,
 706};
 707
 708static const struct snd_pcm_ops snd_fm801_capture_ops = {
 709	.open =		snd_fm801_capture_open,
 710	.close =	snd_fm801_capture_close,
 711	.prepare =	snd_fm801_capture_prepare,
 712	.trigger =	snd_fm801_capture_trigger,
 713	.pointer =	snd_fm801_capture_pointer,
 714};
 715
 716static int snd_fm801_pcm(struct fm801 *chip, int device)
 717{
 718	struct pci_dev *pdev = to_pci_dev(chip->dev);
 719	struct snd_pcm *pcm;
 720	int err;
 721
 722	err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm);
 723	if (err < 0)
 724		return err;
 725
 726	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops);
 727	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops);
 728
 729	pcm->private_data = chip;
 730	pcm->info_flags = 0;
 731	strcpy(pcm->name, "FM801");
 732	chip->pcm = pcm;
 733
 734	snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, &pdev->dev,
 735				       chip->multichannel ? 128*1024 : 64*1024, 128*1024);
 736
 737	return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 738				     snd_pcm_alt_chmaps,
 739				     chip->multichannel ? 6 : 2, 0,
 740				     NULL);
 741}
 742
 743/*
 744 *  TEA5757 radio
 745 */
 746
 747#ifdef CONFIG_SND_FM801_TEA575X_BOOL
 748
 749/* GPIO to TEA575x maps */
 750struct snd_fm801_tea575x_gpio {
 751	u8 data, clk, wren, most;
 752	char *name;
 753};
 754
 755static const struct snd_fm801_tea575x_gpio snd_fm801_tea575x_gpios[] = {
 756	{ .data = 1, .clk = 3, .wren = 2, .most = 0, .name = "SF256-PCS" },
 757	{ .data = 1, .clk = 0, .wren = 2, .most = 3, .name = "SF256-PCP" },
 758	{ .data = 2, .clk = 0, .wren = 1, .most = 3, .name = "SF64-PCR" },
 759};
 760
 761#define get_tea575x_gpio(chip) \
 762	(&snd_fm801_tea575x_gpios[((chip)->tea575x_tuner & TUNER_TYPE_MASK) - 1])
 763
 764static void snd_fm801_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
 765{
 766	struct fm801 *chip = tea->private_data;
 767	unsigned short reg = fm801_readw(chip, GPIO_CTRL);
 768	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
 769
 770	reg &= ~(FM801_GPIO_GP(gpio.data) |
 771		 FM801_GPIO_GP(gpio.clk) |
 772		 FM801_GPIO_GP(gpio.wren));
 773
 774	reg |= (pins & TEA575X_DATA) ? FM801_GPIO_GP(gpio.data) : 0;
 775	reg |= (pins & TEA575X_CLK)  ? FM801_GPIO_GP(gpio.clk) : 0;
 776	/* WRITE_ENABLE is inverted */
 777	reg |= (pins & TEA575X_WREN) ? 0 : FM801_GPIO_GP(gpio.wren);
 778
 779	fm801_writew(chip, GPIO_CTRL, reg);
 780}
 781
 782static u8 snd_fm801_tea575x_get_pins(struct snd_tea575x *tea)
 783{
 784	struct fm801 *chip = tea->private_data;
 785	unsigned short reg = fm801_readw(chip, GPIO_CTRL);
 786	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
 787	u8 ret;
 788
 789	ret = 0;
 790	if (reg & FM801_GPIO_GP(gpio.data))
 791		ret |= TEA575X_DATA;
 792	if (reg & FM801_GPIO_GP(gpio.most))
 793		ret |= TEA575X_MOST;
 794	return ret;
 795}
 796
 797static void snd_fm801_tea575x_set_direction(struct snd_tea575x *tea, bool output)
 798{
 799	struct fm801 *chip = tea->private_data;
 800	unsigned short reg = fm801_readw(chip, GPIO_CTRL);
 801	struct snd_fm801_tea575x_gpio gpio = *get_tea575x_gpio(chip);
 802
 803	/* use GPIO lines and set write enable bit */
 804	reg |= FM801_GPIO_GS(gpio.data) |
 805	       FM801_GPIO_GS(gpio.wren) |
 806	       FM801_GPIO_GS(gpio.clk) |
 807	       FM801_GPIO_GS(gpio.most);
 808	if (output) {
 809		/* all of lines are in the write direction */
 810		/* clear data and clock lines */
 811		reg &= ~(FM801_GPIO_GD(gpio.data) |
 812			 FM801_GPIO_GD(gpio.wren) |
 813			 FM801_GPIO_GD(gpio.clk) |
 814			 FM801_GPIO_GP(gpio.data) |
 815			 FM801_GPIO_GP(gpio.clk) |
 816			 FM801_GPIO_GP(gpio.wren));
 817	} else {
 818		/* use GPIO lines, set data direction to input */
 819		reg |= FM801_GPIO_GD(gpio.data) |
 820		       FM801_GPIO_GD(gpio.most) |
 821		       FM801_GPIO_GP(gpio.data) |
 822		       FM801_GPIO_GP(gpio.most) |
 823		       FM801_GPIO_GP(gpio.wren);
 824		/* all of lines are in the write direction, except data */
 825		/* clear data, write enable and clock lines */
 826		reg &= ~(FM801_GPIO_GD(gpio.wren) |
 827			 FM801_GPIO_GD(gpio.clk) |
 828			 FM801_GPIO_GP(gpio.clk));
 829	}
 830
 831	fm801_writew(chip, GPIO_CTRL, reg);
 832}
 833
 834static const struct snd_tea575x_ops snd_fm801_tea_ops = {
 835	.set_pins = snd_fm801_tea575x_set_pins,
 836	.get_pins = snd_fm801_tea575x_get_pins,
 837	.set_direction = snd_fm801_tea575x_set_direction,
 838};
 839#endif
 840
 841/*
 842 *  Mixer routines
 843 */
 844
 845#define FM801_SINGLE(xname, reg, shift, mask, invert) \
 846{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \
 847  .get = snd_fm801_get_single, .put = snd_fm801_put_single, \
 848  .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
 849
 850static int snd_fm801_info_single(struct snd_kcontrol *kcontrol,
 851				 struct snd_ctl_elem_info *uinfo)
 852{
 853	int mask = (kcontrol->private_value >> 16) & 0xff;
 854
 855	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 856	uinfo->count = 1;
 857	uinfo->value.integer.min = 0;
 858	uinfo->value.integer.max = mask;
 859	return 0;
 860}
 861
 862static int snd_fm801_get_single(struct snd_kcontrol *kcontrol,
 863				struct snd_ctl_elem_value *ucontrol)
 864{
 865	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
 866	int reg = kcontrol->private_value & 0xff;
 867	int shift = (kcontrol->private_value >> 8) & 0xff;
 868	int mask = (kcontrol->private_value >> 16) & 0xff;
 869	int invert = (kcontrol->private_value >> 24) & 0xff;
 870	long *value = ucontrol->value.integer.value;
 871
 872	value[0] = (fm801_ioread16(chip, reg) >> shift) & mask;
 873	if (invert)
 874		value[0] = mask - value[0];
 875	return 0;
 876}
 877
 878static int snd_fm801_put_single(struct snd_kcontrol *kcontrol,
 879				struct snd_ctl_elem_value *ucontrol)
 880{
 881	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
 882	int reg = kcontrol->private_value & 0xff;
 883	int shift = (kcontrol->private_value >> 8) & 0xff;
 884	int mask = (kcontrol->private_value >> 16) & 0xff;
 885	int invert = (kcontrol->private_value >> 24) & 0xff;
 886	unsigned short val;
 887
 888	val = (ucontrol->value.integer.value[0] & mask);
 889	if (invert)
 890		val = mask - val;
 891	return snd_fm801_update_bits(chip, reg, mask << shift, val << shift);
 892}
 893
 894#define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \
 895{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \
 896  .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
 897  .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) }
 898#define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \
 899{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
 900  .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
 901  .name = xname, .info = snd_fm801_info_double, \
 902  .get = snd_fm801_get_double, .put = snd_fm801_put_double, \
 903  .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \
 904  .tlv = { .p = (xtlv) } }
 905
 906static int snd_fm801_info_double(struct snd_kcontrol *kcontrol,
 907				 struct snd_ctl_elem_info *uinfo)
 908{
 909	int mask = (kcontrol->private_value >> 16) & 0xff;
 910
 911	uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
 912	uinfo->count = 2;
 913	uinfo->value.integer.min = 0;
 914	uinfo->value.integer.max = mask;
 915	return 0;
 916}
 917
 918static int snd_fm801_get_double(struct snd_kcontrol *kcontrol,
 919				struct snd_ctl_elem_value *ucontrol)
 920{
 921	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
 922        int reg = kcontrol->private_value & 0xff;
 923	int shift_left = (kcontrol->private_value >> 8) & 0x0f;
 924	int shift_right = (kcontrol->private_value >> 12) & 0x0f;
 925	int mask = (kcontrol->private_value >> 16) & 0xff;
 926	int invert = (kcontrol->private_value >> 24) & 0xff;
 927	long *value = ucontrol->value.integer.value;
 928
 929	spin_lock_irq(&chip->reg_lock);
 930	value[0] = (fm801_ioread16(chip, reg) >> shift_left) & mask;
 931	value[1] = (fm801_ioread16(chip, reg) >> shift_right) & mask;
 932	spin_unlock_irq(&chip->reg_lock);
 933	if (invert) {
 934		value[0] = mask - value[0];
 935		value[1] = mask - value[1];
 936	}
 937	return 0;
 938}
 939
 940static int snd_fm801_put_double(struct snd_kcontrol *kcontrol,
 941				struct snd_ctl_elem_value *ucontrol)
 942{
 943	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
 944	int reg = kcontrol->private_value & 0xff;
 945	int shift_left = (kcontrol->private_value >> 8) & 0x0f;
 946	int shift_right = (kcontrol->private_value >> 12) & 0x0f;
 947	int mask = (kcontrol->private_value >> 16) & 0xff;
 948	int invert = (kcontrol->private_value >> 24) & 0xff;
 949	unsigned short val1, val2;
 950 
 951	val1 = ucontrol->value.integer.value[0] & mask;
 952	val2 = ucontrol->value.integer.value[1] & mask;
 953	if (invert) {
 954		val1 = mask - val1;
 955		val2 = mask - val2;
 956	}
 957	return snd_fm801_update_bits(chip, reg,
 958				     (mask << shift_left) | (mask << shift_right),
 959				     (val1 << shift_left ) | (val2 << shift_right));
 960}
 961
 962static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol,
 963			      struct snd_ctl_elem_info *uinfo)
 964{
 965	static const char * const texts[5] = {
 966		"AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary"
 967	};
 968 
 969	return snd_ctl_enum_info(uinfo, 1, 5, texts);
 970}
 971
 972static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol,
 973			     struct snd_ctl_elem_value *ucontrol)
 974{
 975	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
 976        unsigned short val;
 977 
 978	val = fm801_readw(chip, REC_SRC) & 7;
 979	if (val > 4)
 980		val = 4;
 981        ucontrol->value.enumerated.item[0] = val;
 982        return 0;
 983}
 984
 985static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol,
 986			     struct snd_ctl_elem_value *ucontrol)
 987{
 988	struct fm801 *chip = snd_kcontrol_chip(kcontrol);
 989        unsigned short val;
 990 
 991	val = ucontrol->value.enumerated.item[0];
 992	if (val > 4)
 993                return -EINVAL;
 994	return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val);
 995}
 996
 997static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0);
 998
 999#define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls)
1000
1001static const struct snd_kcontrol_new snd_fm801_controls[] = {
1002FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1,
1003		 db_scale_dsp),
1004FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1),
1005FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1,
1006		 db_scale_dsp),
1007FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1),
1008FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1,
1009		 db_scale_dsp),
1010FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1),
1011{
1012	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1013	.name = "Digital Capture Source",
1014	.info = snd_fm801_info_mux,
1015	.get = snd_fm801_get_mux,
1016	.put = snd_fm801_put_mux,
1017}
1018};
1019
1020#define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi)
1021
1022static const struct snd_kcontrol_new snd_fm801_controls_multi[] = {
1023FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0),
1024FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0),
1025FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0),
1026FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0),
1027FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0),
1028FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0),
1029};
1030
1031static int snd_fm801_mixer(struct fm801 *chip)
1032{
1033	struct snd_ac97_template ac97;
1034	unsigned int i;
1035	int err;
1036	static const struct snd_ac97_bus_ops ops = {
1037		.write = snd_fm801_codec_write,
1038		.read = snd_fm801_codec_read,
1039	};
1040
1041	err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
1042	if (err < 0)
1043		return err;
1044
1045	memset(&ac97, 0, sizeof(ac97));
1046	ac97.private_data = chip;
1047	err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
1048	if (err < 0)
1049		return err;
1050	if (chip->secondary) {
1051		ac97.num = 1;
1052		ac97.addr = chip->secondary_addr;
1053		err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec);
1054		if (err < 0)
1055			return err;
1056	}
1057	for (i = 0; i < FM801_CONTROLS; i++) {
1058		err = snd_ctl_add(chip->card,
1059			snd_ctl_new1(&snd_fm801_controls[i], chip));
1060		if (err < 0)
1061			return err;
1062	}
1063	if (chip->multichannel) {
1064		for (i = 0; i < FM801_CONTROLS_MULTI; i++) {
1065			err = snd_ctl_add(chip->card,
1066				snd_ctl_new1(&snd_fm801_controls_multi[i], chip));
1067			if (err < 0)
1068				return err;
1069		}
1070	}
1071	return 0;
1072}
1073
1074/*
1075 *  initialization routines
1076 */
1077
1078static int wait_for_codec(struct fm801 *chip, unsigned int codec_id,
1079			  unsigned short reg, unsigned long waits)
1080{
1081	unsigned long timeout = jiffies + waits;
1082
1083	fm801_writew(chip, AC97_CMD,
1084		     reg | (codec_id << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ);
1085	udelay(5);
1086	do {
1087		if ((fm801_readw(chip, AC97_CMD) &
1088		     (FM801_AC97_VALID | FM801_AC97_BUSY)) == FM801_AC97_VALID)
1089			return 0;
1090		schedule_timeout_uninterruptible(1);
1091	} while (time_after(timeout, jiffies));
1092	return -EIO;
1093}
1094
1095static int reset_codec(struct fm801 *chip)
1096{
1097	/* codec cold reset + AC'97 warm reset */
1098	fm801_writew(chip, CODEC_CTRL, (1 << 5) | (1 << 6));
1099	fm801_readw(chip, CODEC_CTRL); /* flush posting data */
1100	udelay(100);
1101	fm801_writew(chip, CODEC_CTRL, 0);
1102
1103	return wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750));
1104}
1105
1106static void snd_fm801_chip_multichannel_init(struct fm801 *chip)
1107{
1108	unsigned short cmdw;
1109
1110	if (chip->multichannel) {
1111		if (chip->secondary_addr) {
1112			wait_for_codec(chip, chip->secondary_addr,
1113				       AC97_VENDOR_ID1, msecs_to_jiffies(50));
1114		} else {
1115			/* my card has the secondary codec */
1116			/* at address #3, so the loop is inverted */
1117			int i;
1118			for (i = 3; i > 0; i--) {
1119				if (!wait_for_codec(chip, i, AC97_VENDOR_ID1,
1120						     msecs_to_jiffies(50))) {
1121					cmdw = fm801_readw(chip, AC97_DATA);
1122					if (cmdw != 0xffff && cmdw != 0) {
1123						chip->secondary = 1;
1124						chip->secondary_addr = i;
1125						break;
1126					}
1127				}
1128			}
1129		}
1130
1131		/* the recovery phase, it seems that probing for non-existing codec might */
1132		/* cause timeout problems */
1133		wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750));
1134	}
1135}
1136
1137static void snd_fm801_chip_init(struct fm801 *chip)
1138{
1139	unsigned short cmdw;
1140
1141	/* init volume */
1142	fm801_writew(chip, PCM_VOL, 0x0808);
1143	fm801_writew(chip, FM_VOL, 0x9f1f);
1144	fm801_writew(chip, I2S_VOL, 0x8808);
1145
1146	/* I2S control - I2S mode */
1147	fm801_writew(chip, I2S_MODE, 0x0003);
1148
1149	/* interrupt setup */
1150	cmdw = fm801_readw(chip, IRQ_MASK);
1151	if (chip->irq < 0)
1152		cmdw |= 0x00c3;		/* mask everything, no PCM nor MPU */
1153	else
1154		cmdw &= ~0x0083;	/* unmask MPU, PLAYBACK & CAPTURE */
1155	fm801_writew(chip, IRQ_MASK, cmdw);
1156
1157	/* interrupt clear */
1158	fm801_writew(chip, IRQ_STATUS,
1159		     FM801_IRQ_PLAYBACK | FM801_IRQ_CAPTURE | FM801_IRQ_MPU);
1160}
1161
1162static void snd_fm801_free(struct snd_card *card)
1163{
1164	struct fm801 *chip = card->private_data;
1165	unsigned short cmdw;
1166
1167	/* interrupt setup - mask everything */
1168	cmdw = fm801_readw(chip, IRQ_MASK);
1169	cmdw |= 0x00c3;
1170	fm801_writew(chip, IRQ_MASK, cmdw);
1171
1172#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1173	if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
1174		snd_tea575x_exit(&chip->tea);
1175		v4l2_device_unregister(&chip->v4l2_dev);
1176	}
1177#endif
1178}
1179
1180static int snd_fm801_create(struct snd_card *card,
1181			    struct pci_dev *pci,
1182			    int tea575x_tuner,
1183			    int radio_nr)
1184{
1185	struct fm801 *chip = card->private_data;
1186	int err;
1187
1188	err = pcim_enable_device(pci);
1189	if (err < 0)
1190		return err;
1191	spin_lock_init(&chip->reg_lock);
1192	chip->card = card;
1193	chip->dev = &pci->dev;
1194	chip->irq = -1;
1195	chip->tea575x_tuner = tea575x_tuner;
1196	err = pci_request_regions(pci, "FM801");
1197	if (err < 0)
1198		return err;
1199	chip->port = pci_resource_start(pci, 0);
1200
1201	if (pci->revision >= 0xb1)	/* FM801-AU */
1202		chip->multichannel = 1;
1203
1204	if (!(chip->tea575x_tuner & TUNER_ONLY)) {
1205		if (reset_codec(chip) < 0) {
1206			dev_info(chip->card->dev,
1207				 "Primary AC'97 codec not found, assume SF64-PCR (tuner-only)\n");
1208			chip->tea575x_tuner = 3 | TUNER_ONLY;
1209		} else {
1210			snd_fm801_chip_multichannel_init(chip);
1211		}
1212	}
1213
1214	if ((chip->tea575x_tuner & TUNER_ONLY) == 0) {
1215		if (devm_request_irq(&pci->dev, pci->irq, snd_fm801_interrupt,
1216				IRQF_SHARED, KBUILD_MODNAME, chip)) {
1217			dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1218			return -EBUSY;
1219		}
1220		chip->irq = pci->irq;
1221		card->sync_irq = chip->irq;
1222		pci_set_master(pci);
1223	}
1224
1225	card->private_free = snd_fm801_free;
1226	snd_fm801_chip_init(chip);
1227
1228#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1229	err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
1230	if (err < 0)
1231		return err;
1232	chip->tea.v4l2_dev = &chip->v4l2_dev;
1233	chip->tea.radio_nr = radio_nr;
1234	chip->tea.private_data = chip;
1235	chip->tea.ops = &snd_fm801_tea_ops;
1236	sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
1237	if ((chip->tea575x_tuner & TUNER_TYPE_MASK) > 0 &&
1238	    (chip->tea575x_tuner & TUNER_TYPE_MASK) < 4) {
1239		if (snd_tea575x_init(&chip->tea, THIS_MODULE)) {
1240			dev_err(card->dev, "TEA575x radio not found\n");
1241			return -ENODEV;
1242		}
1243	} else if ((chip->tea575x_tuner & TUNER_TYPE_MASK) == 0) {
1244		unsigned int tuner_only = chip->tea575x_tuner & TUNER_ONLY;
1245
1246		/* autodetect tuner connection */
1247		for (tea575x_tuner = 1; tea575x_tuner <= 3; tea575x_tuner++) {
1248			chip->tea575x_tuner = tea575x_tuner;
1249			if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
1250				dev_info(card->dev,
1251					 "detected TEA575x radio type %s\n",
1252					   get_tea575x_gpio(chip)->name);
1253				break;
1254			}
1255		}
1256		if (tea575x_tuner == 4) {
1257			dev_err(card->dev, "TEA575x radio not found\n");
1258			chip->tea575x_tuner = TUNER_DISABLED;
1259		}
1260
1261		chip->tea575x_tuner |= tuner_only;
1262	}
1263	if (!(chip->tea575x_tuner & TUNER_DISABLED)) {
1264		strscpy(chip->tea.card, get_tea575x_gpio(chip)->name,
1265			sizeof(chip->tea.card));
1266	}
1267#endif
1268	return 0;
1269}
1270
1271static int __snd_card_fm801_probe(struct pci_dev *pci,
1272				  const struct pci_device_id *pci_id)
1273{
1274	static int dev;
1275	struct snd_card *card;
1276	struct fm801 *chip;
1277	struct snd_opl3 *opl3;
1278	int err;
1279
1280        if (dev >= SNDRV_CARDS)
1281                return -ENODEV;
1282	if (!enable[dev]) {
1283		dev++;
1284		return -ENOENT;
1285	}
1286
1287	err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1288				sizeof(*chip), &card);
1289	if (err < 0)
1290		return err;
1291	chip = card->private_data;
1292	err = snd_fm801_create(card, pci, tea575x_tuner[dev], radio_nr[dev]);
1293	if (err < 0)
1294		return err;
1295
1296	strcpy(card->driver, "FM801");
1297	strcpy(card->shortname, "ForteMedia FM801-");
1298	strcat(card->shortname, chip->multichannel ? "AU" : "AS");
1299	sprintf(card->longname, "%s at 0x%lx, irq %i",
1300		card->shortname, chip->port, chip->irq);
1301
1302	if (chip->tea575x_tuner & TUNER_ONLY)
1303		goto __fm801_tuner_only;
1304
1305	err = snd_fm801_pcm(chip, 0);
1306	if (err < 0)
1307		return err;
1308	err = snd_fm801_mixer(chip);
1309	if (err < 0)
1310		return err;
1311	err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801,
1312				  chip->port + FM801_MPU401_DATA,
1313				  MPU401_INFO_INTEGRATED |
1314				  MPU401_INFO_IRQ_HOOK,
1315				  -1, &chip->rmidi);
1316	if (err < 0)
1317		return err;
1318	err = snd_opl3_create(card, chip->port + FM801_OPL3_BANK0,
1319			      chip->port + FM801_OPL3_BANK1,
1320			      OPL3_HW_OPL3_FM801, 1, &opl3);
1321	if (err < 0)
1322		return err;
1323	err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1324	if (err < 0)
1325		return err;
1326
1327      __fm801_tuner_only:
1328	err = snd_card_register(card);
1329	if (err < 0)
1330		return err;
1331	pci_set_drvdata(pci, card);
1332	dev++;
1333	return 0;
1334}
1335
1336static int snd_card_fm801_probe(struct pci_dev *pci,
1337				const struct pci_device_id *pci_id)
1338{
1339	return snd_card_free_on_error(&pci->dev, __snd_card_fm801_probe(pci, pci_id));
1340}
1341
1342#ifdef CONFIG_PM_SLEEP
1343static const unsigned char saved_regs[] = {
1344	FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC,
1345	FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2,
1346	FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2,
1347	FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL,
1348};
1349
1350static int snd_fm801_suspend(struct device *dev)
1351{
1352	struct snd_card *card = dev_get_drvdata(dev);
1353	struct fm801 *chip = card->private_data;
1354	int i;
1355
1356	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1357
1358	for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1359		chip->saved_regs[i] = fm801_ioread16(chip, saved_regs[i]);
1360
1361	if (chip->tea575x_tuner & TUNER_ONLY) {
1362		/* FIXME: tea575x suspend */
1363	} else {
1364		snd_ac97_suspend(chip->ac97);
1365		snd_ac97_suspend(chip->ac97_sec);
1366	}
1367
1368	return 0;
1369}
1370
1371static int snd_fm801_resume(struct device *dev)
1372{
1373	struct snd_card *card = dev_get_drvdata(dev);
1374	struct fm801 *chip = card->private_data;
1375	int i;
1376
1377	if (chip->tea575x_tuner & TUNER_ONLY) {
1378		snd_fm801_chip_init(chip);
1379	} else {
1380		reset_codec(chip);
1381		snd_fm801_chip_multichannel_init(chip);
1382		snd_fm801_chip_init(chip);
1383		snd_ac97_resume(chip->ac97);
1384		snd_ac97_resume(chip->ac97_sec);
1385	}
1386
1387	for (i = 0; i < ARRAY_SIZE(saved_regs); i++)
1388		fm801_iowrite16(chip, saved_regs[i], chip->saved_regs[i]);
1389
1390#ifdef CONFIG_SND_FM801_TEA575X_BOOL
1391	if (!(chip->tea575x_tuner & TUNER_DISABLED))
1392		snd_tea575x_set_freq(&chip->tea);
1393#endif
1394
1395	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1396	return 0;
1397}
1398
1399static SIMPLE_DEV_PM_OPS(snd_fm801_pm, snd_fm801_suspend, snd_fm801_resume);
1400#define SND_FM801_PM_OPS	&snd_fm801_pm
1401#else
1402#define SND_FM801_PM_OPS	NULL
1403#endif /* CONFIG_PM_SLEEP */
1404
1405static struct pci_driver fm801_driver = {
1406	.name = KBUILD_MODNAME,
1407	.id_table = snd_fm801_ids,
1408	.probe = snd_card_fm801_probe,
1409	.driver = {
1410		.pm = SND_FM801_PM_OPS,
1411	},
1412};
1413
1414module_pci_driver(fm801_driver);