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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SBI initialilization and all extension implementation.
4 *
5 * Copyright (c) 2020 Western Digital Corporation or its affiliates.
6 */
7
8#include <linux/bits.h>
9#include <linux/init.h>
10#include <linux/pm.h>
11#include <linux/reboot.h>
12#include <asm/sbi.h>
13#include <asm/smp.h>
14
15/* default SBI version is 0.1 */
16unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT;
17EXPORT_SYMBOL(sbi_spec_version);
18
19static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init;
20static int (*__sbi_send_ipi)(const struct cpumask *cpu_mask) __ro_after_init;
21static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask,
22 unsigned long start, unsigned long size,
23 unsigned long arg4, unsigned long arg5) __ro_after_init;
24
25struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
26 unsigned long arg1, unsigned long arg2,
27 unsigned long arg3, unsigned long arg4,
28 unsigned long arg5)
29{
30 struct sbiret ret;
31
32 register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
33 register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
34 register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
35 register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
36 register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
37 register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
38 register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
39 register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
40 asm volatile ("ecall"
41 : "+r" (a0), "+r" (a1)
42 : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
43 : "memory");
44 ret.error = a0;
45 ret.value = a1;
46
47 return ret;
48}
49EXPORT_SYMBOL(sbi_ecall);
50
51int sbi_err_map_linux_errno(int err)
52{
53 switch (err) {
54 case SBI_SUCCESS:
55 return 0;
56 case SBI_ERR_DENIED:
57 return -EPERM;
58 case SBI_ERR_INVALID_PARAM:
59 return -EINVAL;
60 case SBI_ERR_INVALID_ADDRESS:
61 return -EFAULT;
62 case SBI_ERR_NOT_SUPPORTED:
63 case SBI_ERR_FAILURE:
64 default:
65 return -ENOTSUPP;
66 };
67}
68EXPORT_SYMBOL(sbi_err_map_linux_errno);
69
70#ifdef CONFIG_RISCV_SBI_V01
71static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mask)
72{
73 unsigned long cpuid, hartid;
74 unsigned long hmask = 0;
75
76 /*
77 * There is no maximum hartid concept in RISC-V and NR_CPUS must not be
78 * associated with hartid. As SBI v0.1 is only kept for backward compatibility
79 * and will be removed in the future, there is no point in supporting hartid
80 * greater than BITS_PER_LONG (32 for RV32 and 64 for RV64). Ideally, SBI v0.2
81 * should be used for platforms with hartid greater than BITS_PER_LONG.
82 */
83 for_each_cpu(cpuid, cpu_mask) {
84 hartid = cpuid_to_hartid_map(cpuid);
85 if (hartid >= BITS_PER_LONG) {
86 pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n");
87 break;
88 }
89 hmask |= BIT(hartid);
90 }
91
92 return hmask;
93}
94
95/**
96 * sbi_console_putchar() - Writes given character to the console device.
97 * @ch: The data to be written to the console.
98 *
99 * Return: None
100 */
101void sbi_console_putchar(int ch)
102{
103 sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);
104}
105EXPORT_SYMBOL(sbi_console_putchar);
106
107/**
108 * sbi_console_getchar() - Reads a byte from console device.
109 *
110 * Returns the value read from console.
111 */
112int sbi_console_getchar(void)
113{
114 struct sbiret ret;
115
116 ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0);
117
118 return ret.error;
119}
120EXPORT_SYMBOL(sbi_console_getchar);
121
122/**
123 * sbi_shutdown() - Remove all the harts from executing supervisor code.
124 *
125 * Return: None
126 */
127void sbi_shutdown(void)
128{
129 sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
130}
131EXPORT_SYMBOL(sbi_shutdown);
132
133/**
134 * sbi_clear_ipi() - Clear any pending IPIs for the calling hart.
135 *
136 * Return: None
137 */
138void sbi_clear_ipi(void)
139{
140 sbi_ecall(SBI_EXT_0_1_CLEAR_IPI, 0, 0, 0, 0, 0, 0, 0);
141}
142EXPORT_SYMBOL(sbi_clear_ipi);
143
144/**
145 * __sbi_set_timer_v01() - Program the timer for next timer event.
146 * @stime_value: The value after which next timer event should fire.
147 *
148 * Return: None
149 */
150static void __sbi_set_timer_v01(uint64_t stime_value)
151{
152#if __riscv_xlen == 32
153 sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
154 stime_value >> 32, 0, 0, 0, 0);
155#else
156 sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
157#endif
158}
159
160static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask)
161{
162 unsigned long hart_mask;
163
164 if (!cpu_mask || cpumask_empty(cpu_mask))
165 cpu_mask = cpu_online_mask;
166 hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);
167
168 sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)(&hart_mask),
169 0, 0, 0, 0, 0);
170 return 0;
171}
172
173static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask,
174 unsigned long start, unsigned long size,
175 unsigned long arg4, unsigned long arg5)
176{
177 int result = 0;
178 unsigned long hart_mask;
179
180 if (!cpu_mask || cpumask_empty(cpu_mask))
181 cpu_mask = cpu_online_mask;
182 hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);
183
184 /* v0.2 function IDs are equivalent to v0.1 extension IDs */
185 switch (fid) {
186 case SBI_EXT_RFENCE_REMOTE_FENCE_I:
187 sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
188 (unsigned long)&hart_mask, 0, 0, 0, 0, 0);
189 break;
190 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
191 sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
192 (unsigned long)&hart_mask, start, size,
193 0, 0, 0);
194 break;
195 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
196 sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
197 (unsigned long)&hart_mask, start, size,
198 arg4, 0, 0);
199 break;
200 default:
201 pr_err("SBI call [%d]not supported in SBI v0.1\n", fid);
202 result = -EINVAL;
203 }
204
205 return result;
206}
207
208static void sbi_set_power_off(void)
209{
210 pm_power_off = sbi_shutdown;
211}
212#else
213static void __sbi_set_timer_v01(uint64_t stime_value)
214{
215 pr_warn("Timer extension is not available in SBI v%lu.%lu\n",
216 sbi_major_version(), sbi_minor_version());
217}
218
219static int __sbi_send_ipi_v01(const struct cpumask *cpu_mask)
220{
221 pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
222 sbi_major_version(), sbi_minor_version());
223
224 return 0;
225}
226
227static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask,
228 unsigned long start, unsigned long size,
229 unsigned long arg4, unsigned long arg5)
230{
231 pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
232 sbi_major_version(), sbi_minor_version());
233
234 return 0;
235}
236
237static void sbi_set_power_off(void) {}
238#endif /* CONFIG_RISCV_SBI_V01 */
239
240static void __sbi_set_timer_v02(uint64_t stime_value)
241{
242#if __riscv_xlen == 32
243 sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value,
244 stime_value >> 32, 0, 0, 0, 0);
245#else
246 sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,
247 0, 0, 0, 0);
248#endif
249}
250
251static int __sbi_send_ipi_v02(const struct cpumask *cpu_mask)
252{
253 unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0;
254 struct sbiret ret = {0};
255 int result;
256
257 if (!cpu_mask || cpumask_empty(cpu_mask))
258 cpu_mask = cpu_online_mask;
259
260 for_each_cpu(cpuid, cpu_mask) {
261 hartid = cpuid_to_hartid_map(cpuid);
262 if (hmask) {
263 if (hartid + BITS_PER_LONG <= htop ||
264 hbase + BITS_PER_LONG <= hartid) {
265 ret = sbi_ecall(SBI_EXT_IPI,
266 SBI_EXT_IPI_SEND_IPI, hmask,
267 hbase, 0, 0, 0, 0);
268 if (ret.error)
269 goto ecall_failed;
270 hmask = 0;
271 } else if (hartid < hbase) {
272 /* shift the mask to fit lower hartid */
273 hmask <<= hbase - hartid;
274 hbase = hartid;
275 }
276 }
277 if (!hmask) {
278 hbase = hartid;
279 htop = hartid;
280 } else if (hartid > htop) {
281 htop = hartid;
282 }
283 hmask |= BIT(hartid - hbase);
284 }
285
286 if (hmask) {
287 ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
288 hmask, hbase, 0, 0, 0, 0);
289 if (ret.error)
290 goto ecall_failed;
291 }
292
293 return 0;
294
295ecall_failed:
296 result = sbi_err_map_linux_errno(ret.error);
297 pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n",
298 __func__, hbase, hmask, result);
299 return result;
300}
301
302static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask,
303 unsigned long hbase, unsigned long start,
304 unsigned long size, unsigned long arg4,
305 unsigned long arg5)
306{
307 struct sbiret ret = {0};
308 int ext = SBI_EXT_RFENCE;
309 int result = 0;
310
311 switch (fid) {
312 case SBI_EXT_RFENCE_REMOTE_FENCE_I:
313 ret = sbi_ecall(ext, fid, hmask, hbase, 0, 0, 0, 0);
314 break;
315 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
316 ret = sbi_ecall(ext, fid, hmask, hbase, start,
317 size, 0, 0);
318 break;
319 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
320 ret = sbi_ecall(ext, fid, hmask, hbase, start,
321 size, arg4, 0);
322 break;
323
324 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
325 ret = sbi_ecall(ext, fid, hmask, hbase, start,
326 size, 0, 0);
327 break;
328 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
329 ret = sbi_ecall(ext, fid, hmask, hbase, start,
330 size, arg4, 0);
331 break;
332 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
333 ret = sbi_ecall(ext, fid, hmask, hbase, start,
334 size, 0, 0);
335 break;
336 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
337 ret = sbi_ecall(ext, fid, hmask, hbase, start,
338 size, arg4, 0);
339 break;
340 default:
341 pr_err("unknown function ID [%lu] for SBI extension [%d]\n",
342 fid, ext);
343 result = -EINVAL;
344 }
345
346 if (ret.error) {
347 result = sbi_err_map_linux_errno(ret.error);
348 pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n",
349 __func__, hbase, hmask, result);
350 }
351
352 return result;
353}
354
355static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask,
356 unsigned long start, unsigned long size,
357 unsigned long arg4, unsigned long arg5)
358{
359 unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0;
360 int result;
361
362 if (!cpu_mask || cpumask_empty(cpu_mask))
363 cpu_mask = cpu_online_mask;
364
365 for_each_cpu(cpuid, cpu_mask) {
366 hartid = cpuid_to_hartid_map(cpuid);
367 if (hmask) {
368 if (hartid + BITS_PER_LONG <= htop ||
369 hbase + BITS_PER_LONG <= hartid) {
370 result = __sbi_rfence_v02_call(fid, hmask,
371 hbase, start, size, arg4, arg5);
372 if (result)
373 return result;
374 hmask = 0;
375 } else if (hartid < hbase) {
376 /* shift the mask to fit lower hartid */
377 hmask <<= hbase - hartid;
378 hbase = hartid;
379 }
380 }
381 if (!hmask) {
382 hbase = hartid;
383 htop = hartid;
384 } else if (hartid > htop) {
385 htop = hartid;
386 }
387 hmask |= BIT(hartid - hbase);
388 }
389
390 if (hmask) {
391 result = __sbi_rfence_v02_call(fid, hmask, hbase,
392 start, size, arg4, arg5);
393 if (result)
394 return result;
395 }
396
397 return 0;
398}
399
400/**
401 * sbi_set_timer() - Program the timer for next timer event.
402 * @stime_value: The value after which next timer event should fire.
403 *
404 * Return: None.
405 */
406void sbi_set_timer(uint64_t stime_value)
407{
408 __sbi_set_timer(stime_value);
409}
410
411/**
412 * sbi_send_ipi() - Send an IPI to any hart.
413 * @cpu_mask: A cpu mask containing all the target harts.
414 *
415 * Return: 0 on success, appropriate linux error code otherwise.
416 */
417int sbi_send_ipi(const struct cpumask *cpu_mask)
418{
419 return __sbi_send_ipi(cpu_mask);
420}
421EXPORT_SYMBOL(sbi_send_ipi);
422
423/**
424 * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
425 * @cpu_mask: A cpu mask containing all the target harts.
426 *
427 * Return: 0 on success, appropriate linux error code otherwise.
428 */
429int sbi_remote_fence_i(const struct cpumask *cpu_mask)
430{
431 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I,
432 cpu_mask, 0, 0, 0, 0);
433}
434EXPORT_SYMBOL(sbi_remote_fence_i);
435
436/**
437 * sbi_remote_sfence_vma() - Execute SFENCE.VMA instructions on given remote
438 * harts for the specified virtual address range.
439 * @cpu_mask: A cpu mask containing all the target harts.
440 * @start: Start of the virtual address
441 * @size: Total size of the virtual address range.
442 *
443 * Return: 0 on success, appropriate linux error code otherwise.
444 */
445int sbi_remote_sfence_vma(const struct cpumask *cpu_mask,
446 unsigned long start,
447 unsigned long size)
448{
449 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
450 cpu_mask, start, size, 0, 0);
451}
452EXPORT_SYMBOL(sbi_remote_sfence_vma);
453
454/**
455 * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
456 * remote harts for a virtual address range belonging to a specific ASID.
457 *
458 * @cpu_mask: A cpu mask containing all the target harts.
459 * @start: Start of the virtual address
460 * @size: Total size of the virtual address range.
461 * @asid: The value of address space identifier (ASID).
462 *
463 * Return: 0 on success, appropriate linux error code otherwise.
464 */
465int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask,
466 unsigned long start,
467 unsigned long size,
468 unsigned long asid)
469{
470 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
471 cpu_mask, start, size, asid, 0);
472}
473EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
474
475/**
476 * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote
477 * harts for the specified guest physical address range.
478 * @cpu_mask: A cpu mask containing all the target harts.
479 * @start: Start of the guest physical address
480 * @size: Total size of the guest physical address range.
481 *
482 * Return: None
483 */
484int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask,
485 unsigned long start,
486 unsigned long size)
487{
488 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
489 cpu_mask, start, size, 0, 0);
490}
491EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma);
492
493/**
494 * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given
495 * remote harts for a guest physical address range belonging to a specific VMID.
496 *
497 * @cpu_mask: A cpu mask containing all the target harts.
498 * @start: Start of the guest physical address
499 * @size: Total size of the guest physical address range.
500 * @vmid: The value of guest ID (VMID).
501 *
502 * Return: 0 if success, Error otherwise.
503 */
504int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask,
505 unsigned long start,
506 unsigned long size,
507 unsigned long vmid)
508{
509 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
510 cpu_mask, start, size, vmid, 0);
511}
512EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid);
513
514/**
515 * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote
516 * harts for the current guest virtual address range.
517 * @cpu_mask: A cpu mask containing all the target harts.
518 * @start: Start of the current guest virtual address
519 * @size: Total size of the current guest virtual address range.
520 *
521 * Return: None
522 */
523int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask,
524 unsigned long start,
525 unsigned long size)
526{
527 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
528 cpu_mask, start, size, 0, 0);
529}
530EXPORT_SYMBOL(sbi_remote_hfence_vvma);
531
532/**
533 * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given
534 * remote harts for current guest virtual address range belonging to a specific
535 * ASID.
536 *
537 * @cpu_mask: A cpu mask containing all the target harts.
538 * @start: Start of the current guest virtual address
539 * @size: Total size of the current guest virtual address range.
540 * @asid: The value of address space identifier (ASID).
541 *
542 * Return: None
543 */
544int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask,
545 unsigned long start,
546 unsigned long size,
547 unsigned long asid)
548{
549 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
550 cpu_mask, start, size, asid, 0);
551}
552EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
553
554static void sbi_srst_reset(unsigned long type, unsigned long reason)
555{
556 sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
557 0, 0, 0, 0);
558 pr_warn("%s: type=0x%lx reason=0x%lx failed\n",
559 __func__, type, reason);
560}
561
562static int sbi_srst_reboot(struct notifier_block *this,
563 unsigned long mode, void *cmd)
564{
565 sbi_srst_reset((mode == REBOOT_WARM || mode == REBOOT_SOFT) ?
566 SBI_SRST_RESET_TYPE_WARM_REBOOT :
567 SBI_SRST_RESET_TYPE_COLD_REBOOT,
568 SBI_SRST_RESET_REASON_NONE);
569 return NOTIFY_DONE;
570}
571
572static struct notifier_block sbi_srst_reboot_nb;
573
574static void sbi_srst_power_off(void)
575{
576 sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
577 SBI_SRST_RESET_REASON_NONE);
578}
579
580/**
581 * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
582 * @extid: The extension ID to be probed.
583 *
584 * Return: Extension specific nonzero value f yes, -ENOTSUPP otherwise.
585 */
586int sbi_probe_extension(int extid)
587{
588 struct sbiret ret;
589
590 ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,
591 0, 0, 0, 0, 0);
592 if (!ret.error)
593 if (ret.value)
594 return ret.value;
595
596 return -ENOTSUPP;
597}
598EXPORT_SYMBOL(sbi_probe_extension);
599
600static long __sbi_base_ecall(int fid)
601{
602 struct sbiret ret;
603
604 ret = sbi_ecall(SBI_EXT_BASE, fid, 0, 0, 0, 0, 0, 0);
605 if (!ret.error)
606 return ret.value;
607 else
608 return sbi_err_map_linux_errno(ret.error);
609}
610
611static inline long sbi_get_spec_version(void)
612{
613 return __sbi_base_ecall(SBI_EXT_BASE_GET_SPEC_VERSION);
614}
615
616static inline long sbi_get_firmware_id(void)
617{
618 return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_ID);
619}
620
621static inline long sbi_get_firmware_version(void)
622{
623 return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION);
624}
625
626long sbi_get_mvendorid(void)
627{
628 return __sbi_base_ecall(SBI_EXT_BASE_GET_MVENDORID);
629}
630EXPORT_SYMBOL_GPL(sbi_get_mvendorid);
631
632long sbi_get_marchid(void)
633{
634 return __sbi_base_ecall(SBI_EXT_BASE_GET_MARCHID);
635}
636EXPORT_SYMBOL_GPL(sbi_get_marchid);
637
638long sbi_get_mimpid(void)
639{
640 return __sbi_base_ecall(SBI_EXT_BASE_GET_MIMPID);
641}
642EXPORT_SYMBOL_GPL(sbi_get_mimpid);
643
644static void sbi_send_cpumask_ipi(const struct cpumask *target)
645{
646 sbi_send_ipi(target);
647}
648
649static const struct riscv_ipi_ops sbi_ipi_ops = {
650 .ipi_inject = sbi_send_cpumask_ipi
651};
652
653void __init sbi_init(void)
654{
655 int ret;
656
657 sbi_set_power_off();
658 ret = sbi_get_spec_version();
659 if (ret > 0)
660 sbi_spec_version = ret;
661
662 pr_info("SBI specification v%lu.%lu detected\n",
663 sbi_major_version(), sbi_minor_version());
664
665 if (!sbi_spec_is_0_1()) {
666 pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
667 sbi_get_firmware_id(), sbi_get_firmware_version());
668 if (sbi_probe_extension(SBI_EXT_TIME) > 0) {
669 __sbi_set_timer = __sbi_set_timer_v02;
670 pr_info("SBI TIME extension detected\n");
671 } else {
672 __sbi_set_timer = __sbi_set_timer_v01;
673 }
674 if (sbi_probe_extension(SBI_EXT_IPI) > 0) {
675 __sbi_send_ipi = __sbi_send_ipi_v02;
676 pr_info("SBI IPI extension detected\n");
677 } else {
678 __sbi_send_ipi = __sbi_send_ipi_v01;
679 }
680 if (sbi_probe_extension(SBI_EXT_RFENCE) > 0) {
681 __sbi_rfence = __sbi_rfence_v02;
682 pr_info("SBI RFENCE extension detected\n");
683 } else {
684 __sbi_rfence = __sbi_rfence_v01;
685 }
686 if ((sbi_spec_version >= sbi_mk_version(0, 3)) &&
687 (sbi_probe_extension(SBI_EXT_SRST) > 0)) {
688 pr_info("SBI SRST extension detected\n");
689 pm_power_off = sbi_srst_power_off;
690 sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
691 sbi_srst_reboot_nb.priority = 192;
692 register_restart_handler(&sbi_srst_reboot_nb);
693 }
694 } else {
695 __sbi_set_timer = __sbi_set_timer_v01;
696 __sbi_send_ipi = __sbi_send_ipi_v01;
697 __sbi_rfence = __sbi_rfence_v01;
698 }
699
700 riscv_set_ipi_ops(&sbi_ipi_ops);
701}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * SBI initialilization and all extension implementation.
4 *
5 * Copyright (c) 2020 Western Digital Corporation or its affiliates.
6 */
7
8#include <linux/bits.h>
9#include <linux/init.h>
10#include <linux/mm.h>
11#include <linux/pm.h>
12#include <linux/reboot.h>
13#include <asm/sbi.h>
14#include <asm/smp.h>
15#include <asm/tlbflush.h>
16
17/* default SBI version is 0.1 */
18unsigned long sbi_spec_version __ro_after_init = SBI_SPEC_VERSION_DEFAULT;
19EXPORT_SYMBOL(sbi_spec_version);
20
21static void (*__sbi_set_timer)(uint64_t stime) __ro_after_init;
22static void (*__sbi_send_ipi)(unsigned int cpu) __ro_after_init;
23static int (*__sbi_rfence)(int fid, const struct cpumask *cpu_mask,
24 unsigned long start, unsigned long size,
25 unsigned long arg4, unsigned long arg5) __ro_after_init;
26
27struct sbiret sbi_ecall(int ext, int fid, unsigned long arg0,
28 unsigned long arg1, unsigned long arg2,
29 unsigned long arg3, unsigned long arg4,
30 unsigned long arg5)
31{
32 struct sbiret ret;
33
34 register uintptr_t a0 asm ("a0") = (uintptr_t)(arg0);
35 register uintptr_t a1 asm ("a1") = (uintptr_t)(arg1);
36 register uintptr_t a2 asm ("a2") = (uintptr_t)(arg2);
37 register uintptr_t a3 asm ("a3") = (uintptr_t)(arg3);
38 register uintptr_t a4 asm ("a4") = (uintptr_t)(arg4);
39 register uintptr_t a5 asm ("a5") = (uintptr_t)(arg5);
40 register uintptr_t a6 asm ("a6") = (uintptr_t)(fid);
41 register uintptr_t a7 asm ("a7") = (uintptr_t)(ext);
42 asm volatile ("ecall"
43 : "+r" (a0), "+r" (a1)
44 : "r" (a2), "r" (a3), "r" (a4), "r" (a5), "r" (a6), "r" (a7)
45 : "memory");
46 ret.error = a0;
47 ret.value = a1;
48
49 return ret;
50}
51EXPORT_SYMBOL(sbi_ecall);
52
53int sbi_err_map_linux_errno(int err)
54{
55 switch (err) {
56 case SBI_SUCCESS:
57 return 0;
58 case SBI_ERR_DENIED:
59 return -EPERM;
60 case SBI_ERR_INVALID_PARAM:
61 return -EINVAL;
62 case SBI_ERR_INVALID_ADDRESS:
63 return -EFAULT;
64 case SBI_ERR_NOT_SUPPORTED:
65 case SBI_ERR_FAILURE:
66 default:
67 return -ENOTSUPP;
68 };
69}
70EXPORT_SYMBOL(sbi_err_map_linux_errno);
71
72#ifdef CONFIG_RISCV_SBI_V01
73static unsigned long __sbi_v01_cpumask_to_hartmask(const struct cpumask *cpu_mask)
74{
75 unsigned long cpuid, hartid;
76 unsigned long hmask = 0;
77
78 /*
79 * There is no maximum hartid concept in RISC-V and NR_CPUS must not be
80 * associated with hartid. As SBI v0.1 is only kept for backward compatibility
81 * and will be removed in the future, there is no point in supporting hartid
82 * greater than BITS_PER_LONG (32 for RV32 and 64 for RV64). Ideally, SBI v0.2
83 * should be used for platforms with hartid greater than BITS_PER_LONG.
84 */
85 for_each_cpu(cpuid, cpu_mask) {
86 hartid = cpuid_to_hartid_map(cpuid);
87 if (hartid >= BITS_PER_LONG) {
88 pr_warn("Unable to send any request to hartid > BITS_PER_LONG for SBI v0.1\n");
89 break;
90 }
91 hmask |= BIT(hartid);
92 }
93
94 return hmask;
95}
96
97/**
98 * sbi_console_putchar() - Writes given character to the console device.
99 * @ch: The data to be written to the console.
100 *
101 * Return: None
102 */
103void sbi_console_putchar(int ch)
104{
105 sbi_ecall(SBI_EXT_0_1_CONSOLE_PUTCHAR, 0, ch, 0, 0, 0, 0, 0);
106}
107EXPORT_SYMBOL(sbi_console_putchar);
108
109/**
110 * sbi_console_getchar() - Reads a byte from console device.
111 *
112 * Returns the value read from console.
113 */
114int sbi_console_getchar(void)
115{
116 struct sbiret ret;
117
118 ret = sbi_ecall(SBI_EXT_0_1_CONSOLE_GETCHAR, 0, 0, 0, 0, 0, 0, 0);
119
120 return ret.error;
121}
122EXPORT_SYMBOL(sbi_console_getchar);
123
124/**
125 * sbi_shutdown() - Remove all the harts from executing supervisor code.
126 *
127 * Return: None
128 */
129void sbi_shutdown(void)
130{
131 sbi_ecall(SBI_EXT_0_1_SHUTDOWN, 0, 0, 0, 0, 0, 0, 0);
132}
133EXPORT_SYMBOL(sbi_shutdown);
134
135/**
136 * __sbi_set_timer_v01() - Program the timer for next timer event.
137 * @stime_value: The value after which next timer event should fire.
138 *
139 * Return: None
140 */
141static void __sbi_set_timer_v01(uint64_t stime_value)
142{
143#if __riscv_xlen == 32
144 sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value,
145 stime_value >> 32, 0, 0, 0, 0);
146#else
147 sbi_ecall(SBI_EXT_0_1_SET_TIMER, 0, stime_value, 0, 0, 0, 0, 0);
148#endif
149}
150
151static void __sbi_send_ipi_v01(unsigned int cpu)
152{
153 unsigned long hart_mask =
154 __sbi_v01_cpumask_to_hartmask(cpumask_of(cpu));
155 sbi_ecall(SBI_EXT_0_1_SEND_IPI, 0, (unsigned long)(&hart_mask),
156 0, 0, 0, 0, 0);
157}
158
159static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask,
160 unsigned long start, unsigned long size,
161 unsigned long arg4, unsigned long arg5)
162{
163 int result = 0;
164 unsigned long hart_mask;
165
166 if (!cpu_mask || cpumask_empty(cpu_mask))
167 cpu_mask = cpu_online_mask;
168 hart_mask = __sbi_v01_cpumask_to_hartmask(cpu_mask);
169
170 /* v0.2 function IDs are equivalent to v0.1 extension IDs */
171 switch (fid) {
172 case SBI_EXT_RFENCE_REMOTE_FENCE_I:
173 sbi_ecall(SBI_EXT_0_1_REMOTE_FENCE_I, 0,
174 (unsigned long)&hart_mask, 0, 0, 0, 0, 0);
175 break;
176 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
177 sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA, 0,
178 (unsigned long)&hart_mask, start, size,
179 0, 0, 0);
180 break;
181 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
182 sbi_ecall(SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID, 0,
183 (unsigned long)&hart_mask, start, size,
184 arg4, 0, 0);
185 break;
186 default:
187 pr_err("SBI call [%d]not supported in SBI v0.1\n", fid);
188 result = -EINVAL;
189 }
190
191 return result;
192}
193
194static void sbi_set_power_off(void)
195{
196 pm_power_off = sbi_shutdown;
197}
198#else
199static void __sbi_set_timer_v01(uint64_t stime_value)
200{
201 pr_warn("Timer extension is not available in SBI v%lu.%lu\n",
202 sbi_major_version(), sbi_minor_version());
203}
204
205static void __sbi_send_ipi_v01(unsigned int cpu)
206{
207 pr_warn("IPI extension is not available in SBI v%lu.%lu\n",
208 sbi_major_version(), sbi_minor_version());
209}
210
211static int __sbi_rfence_v01(int fid, const struct cpumask *cpu_mask,
212 unsigned long start, unsigned long size,
213 unsigned long arg4, unsigned long arg5)
214{
215 pr_warn("remote fence extension is not available in SBI v%lu.%lu\n",
216 sbi_major_version(), sbi_minor_version());
217
218 return 0;
219}
220
221static void sbi_set_power_off(void) {}
222#endif /* CONFIG_RISCV_SBI_V01 */
223
224static void __sbi_set_timer_v02(uint64_t stime_value)
225{
226#if __riscv_xlen == 32
227 sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value,
228 stime_value >> 32, 0, 0, 0, 0);
229#else
230 sbi_ecall(SBI_EXT_TIME, SBI_EXT_TIME_SET_TIMER, stime_value, 0,
231 0, 0, 0, 0);
232#endif
233}
234
235static void __sbi_send_ipi_v02(unsigned int cpu)
236{
237 int result;
238 struct sbiret ret = {0};
239
240 ret = sbi_ecall(SBI_EXT_IPI, SBI_EXT_IPI_SEND_IPI,
241 1UL, cpuid_to_hartid_map(cpu), 0, 0, 0, 0);
242 if (ret.error) {
243 result = sbi_err_map_linux_errno(ret.error);
244 pr_err("%s: hbase = [%lu] failed (error [%d])\n",
245 __func__, cpuid_to_hartid_map(cpu), result);
246 }
247}
248
249static int __sbi_rfence_v02_call(unsigned long fid, unsigned long hmask,
250 unsigned long hbase, unsigned long start,
251 unsigned long size, unsigned long arg4,
252 unsigned long arg5)
253{
254 struct sbiret ret = {0};
255 int ext = SBI_EXT_RFENCE;
256 int result = 0;
257
258 switch (fid) {
259 case SBI_EXT_RFENCE_REMOTE_FENCE_I:
260 ret = sbi_ecall(ext, fid, hmask, hbase, 0, 0, 0, 0);
261 break;
262 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA:
263 ret = sbi_ecall(ext, fid, hmask, hbase, start,
264 size, 0, 0);
265 break;
266 case SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID:
267 ret = sbi_ecall(ext, fid, hmask, hbase, start,
268 size, arg4, 0);
269 break;
270
271 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA:
272 ret = sbi_ecall(ext, fid, hmask, hbase, start,
273 size, 0, 0);
274 break;
275 case SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID:
276 ret = sbi_ecall(ext, fid, hmask, hbase, start,
277 size, arg4, 0);
278 break;
279 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA:
280 ret = sbi_ecall(ext, fid, hmask, hbase, start,
281 size, 0, 0);
282 break;
283 case SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID:
284 ret = sbi_ecall(ext, fid, hmask, hbase, start,
285 size, arg4, 0);
286 break;
287 default:
288 pr_err("unknown function ID [%lu] for SBI extension [%d]\n",
289 fid, ext);
290 result = -EINVAL;
291 }
292
293 if (ret.error) {
294 result = sbi_err_map_linux_errno(ret.error);
295 pr_err("%s: hbase = [%lu] hmask = [0x%lx] failed (error [%d])\n",
296 __func__, hbase, hmask, result);
297 }
298
299 return result;
300}
301
302static int __sbi_rfence_v02(int fid, const struct cpumask *cpu_mask,
303 unsigned long start, unsigned long size,
304 unsigned long arg4, unsigned long arg5)
305{
306 unsigned long hartid, cpuid, hmask = 0, hbase = 0, htop = 0;
307 int result;
308
309 if (!cpu_mask || cpumask_empty(cpu_mask))
310 cpu_mask = cpu_online_mask;
311
312 for_each_cpu(cpuid, cpu_mask) {
313 hartid = cpuid_to_hartid_map(cpuid);
314 if (hmask) {
315 if (hartid + BITS_PER_LONG <= htop ||
316 hbase + BITS_PER_LONG <= hartid) {
317 result = __sbi_rfence_v02_call(fid, hmask,
318 hbase, start, size, arg4, arg5);
319 if (result)
320 return result;
321 hmask = 0;
322 } else if (hartid < hbase) {
323 /* shift the mask to fit lower hartid */
324 hmask <<= hbase - hartid;
325 hbase = hartid;
326 }
327 }
328 if (!hmask) {
329 hbase = hartid;
330 htop = hartid;
331 } else if (hartid > htop) {
332 htop = hartid;
333 }
334 hmask |= BIT(hartid - hbase);
335 }
336
337 if (hmask) {
338 result = __sbi_rfence_v02_call(fid, hmask, hbase,
339 start, size, arg4, arg5);
340 if (result)
341 return result;
342 }
343
344 return 0;
345}
346
347/**
348 * sbi_set_timer() - Program the timer for next timer event.
349 * @stime_value: The value after which next timer event should fire.
350 *
351 * Return: None.
352 */
353void sbi_set_timer(uint64_t stime_value)
354{
355 __sbi_set_timer(stime_value);
356}
357
358/**
359 * sbi_send_ipi() - Send an IPI to any hart.
360 * @cpu: Logical id of the target CPU.
361 */
362void sbi_send_ipi(unsigned int cpu)
363{
364 __sbi_send_ipi(cpu);
365}
366EXPORT_SYMBOL(sbi_send_ipi);
367
368/**
369 * sbi_remote_fence_i() - Execute FENCE.I instruction on given remote harts.
370 * @cpu_mask: A cpu mask containing all the target harts.
371 *
372 * Return: 0 on success, appropriate linux error code otherwise.
373 */
374int sbi_remote_fence_i(const struct cpumask *cpu_mask)
375{
376 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_FENCE_I,
377 cpu_mask, 0, 0, 0, 0);
378}
379EXPORT_SYMBOL(sbi_remote_fence_i);
380
381/**
382 * sbi_remote_sfence_vma_asid() - Execute SFENCE.VMA instructions on given
383 * remote harts for a virtual address range belonging to a specific ASID or not.
384 *
385 * @cpu_mask: A cpu mask containing all the target harts.
386 * @start: Start of the virtual address
387 * @size: Total size of the virtual address range.
388 * @asid: The value of address space identifier (ASID), or FLUSH_TLB_NO_ASID
389 * for flushing all address spaces.
390 *
391 * Return: 0 on success, appropriate linux error code otherwise.
392 */
393int sbi_remote_sfence_vma_asid(const struct cpumask *cpu_mask,
394 unsigned long start,
395 unsigned long size,
396 unsigned long asid)
397{
398 if (asid == FLUSH_TLB_NO_ASID)
399 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA,
400 cpu_mask, start, size, 0, 0);
401 else
402 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_SFENCE_VMA_ASID,
403 cpu_mask, start, size, asid, 0);
404}
405EXPORT_SYMBOL(sbi_remote_sfence_vma_asid);
406
407/**
408 * sbi_remote_hfence_gvma() - Execute HFENCE.GVMA instructions on given remote
409 * harts for the specified guest physical address range.
410 * @cpu_mask: A cpu mask containing all the target harts.
411 * @start: Start of the guest physical address
412 * @size: Total size of the guest physical address range.
413 *
414 * Return: None
415 */
416int sbi_remote_hfence_gvma(const struct cpumask *cpu_mask,
417 unsigned long start,
418 unsigned long size)
419{
420 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA,
421 cpu_mask, start, size, 0, 0);
422}
423EXPORT_SYMBOL_GPL(sbi_remote_hfence_gvma);
424
425/**
426 * sbi_remote_hfence_gvma_vmid() - Execute HFENCE.GVMA instructions on given
427 * remote harts for a guest physical address range belonging to a specific VMID.
428 *
429 * @cpu_mask: A cpu mask containing all the target harts.
430 * @start: Start of the guest physical address
431 * @size: Total size of the guest physical address range.
432 * @vmid: The value of guest ID (VMID).
433 *
434 * Return: 0 if success, Error otherwise.
435 */
436int sbi_remote_hfence_gvma_vmid(const struct cpumask *cpu_mask,
437 unsigned long start,
438 unsigned long size,
439 unsigned long vmid)
440{
441 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_GVMA_VMID,
442 cpu_mask, start, size, vmid, 0);
443}
444EXPORT_SYMBOL(sbi_remote_hfence_gvma_vmid);
445
446/**
447 * sbi_remote_hfence_vvma() - Execute HFENCE.VVMA instructions on given remote
448 * harts for the current guest virtual address range.
449 * @cpu_mask: A cpu mask containing all the target harts.
450 * @start: Start of the current guest virtual address
451 * @size: Total size of the current guest virtual address range.
452 *
453 * Return: None
454 */
455int sbi_remote_hfence_vvma(const struct cpumask *cpu_mask,
456 unsigned long start,
457 unsigned long size)
458{
459 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA,
460 cpu_mask, start, size, 0, 0);
461}
462EXPORT_SYMBOL(sbi_remote_hfence_vvma);
463
464/**
465 * sbi_remote_hfence_vvma_asid() - Execute HFENCE.VVMA instructions on given
466 * remote harts for current guest virtual address range belonging to a specific
467 * ASID.
468 *
469 * @cpu_mask: A cpu mask containing all the target harts.
470 * @start: Start of the current guest virtual address
471 * @size: Total size of the current guest virtual address range.
472 * @asid: The value of address space identifier (ASID).
473 *
474 * Return: None
475 */
476int sbi_remote_hfence_vvma_asid(const struct cpumask *cpu_mask,
477 unsigned long start,
478 unsigned long size,
479 unsigned long asid)
480{
481 return __sbi_rfence(SBI_EXT_RFENCE_REMOTE_HFENCE_VVMA_ASID,
482 cpu_mask, start, size, asid, 0);
483}
484EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid);
485
486static void sbi_srst_reset(unsigned long type, unsigned long reason)
487{
488 sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason,
489 0, 0, 0, 0);
490 pr_warn("%s: type=0x%lx reason=0x%lx failed\n",
491 __func__, type, reason);
492}
493
494static int sbi_srst_reboot(struct notifier_block *this,
495 unsigned long mode, void *cmd)
496{
497 sbi_srst_reset((mode == REBOOT_WARM || mode == REBOOT_SOFT) ?
498 SBI_SRST_RESET_TYPE_WARM_REBOOT :
499 SBI_SRST_RESET_TYPE_COLD_REBOOT,
500 SBI_SRST_RESET_REASON_NONE);
501 return NOTIFY_DONE;
502}
503
504static struct notifier_block sbi_srst_reboot_nb;
505
506static void sbi_srst_power_off(void)
507{
508 sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN,
509 SBI_SRST_RESET_REASON_NONE);
510}
511
512/**
513 * sbi_probe_extension() - Check if an SBI extension ID is supported or not.
514 * @extid: The extension ID to be probed.
515 *
516 * Return: 1 or an extension specific nonzero value if yes, 0 otherwise.
517 */
518long sbi_probe_extension(int extid)
519{
520 struct sbiret ret;
521
522 ret = sbi_ecall(SBI_EXT_BASE, SBI_EXT_BASE_PROBE_EXT, extid,
523 0, 0, 0, 0, 0);
524 if (!ret.error)
525 return ret.value;
526
527 return 0;
528}
529EXPORT_SYMBOL(sbi_probe_extension);
530
531static long __sbi_base_ecall(int fid)
532{
533 struct sbiret ret;
534
535 ret = sbi_ecall(SBI_EXT_BASE, fid, 0, 0, 0, 0, 0, 0);
536 if (!ret.error)
537 return ret.value;
538 else
539 return sbi_err_map_linux_errno(ret.error);
540}
541
542static inline long sbi_get_spec_version(void)
543{
544 return __sbi_base_ecall(SBI_EXT_BASE_GET_SPEC_VERSION);
545}
546
547static inline long sbi_get_firmware_id(void)
548{
549 return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_ID);
550}
551
552static inline long sbi_get_firmware_version(void)
553{
554 return __sbi_base_ecall(SBI_EXT_BASE_GET_IMP_VERSION);
555}
556
557long sbi_get_mvendorid(void)
558{
559 return __sbi_base_ecall(SBI_EXT_BASE_GET_MVENDORID);
560}
561EXPORT_SYMBOL_GPL(sbi_get_mvendorid);
562
563long sbi_get_marchid(void)
564{
565 return __sbi_base_ecall(SBI_EXT_BASE_GET_MARCHID);
566}
567EXPORT_SYMBOL_GPL(sbi_get_marchid);
568
569long sbi_get_mimpid(void)
570{
571 return __sbi_base_ecall(SBI_EXT_BASE_GET_MIMPID);
572}
573EXPORT_SYMBOL_GPL(sbi_get_mimpid);
574
575bool sbi_debug_console_available;
576
577int sbi_debug_console_write(const char *bytes, unsigned int num_bytes)
578{
579 phys_addr_t base_addr;
580 struct sbiret ret;
581
582 if (!sbi_debug_console_available)
583 return -EOPNOTSUPP;
584
585 if (is_vmalloc_addr(bytes))
586 base_addr = page_to_phys(vmalloc_to_page(bytes)) +
587 offset_in_page(bytes);
588 else
589 base_addr = __pa(bytes);
590 if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
591 num_bytes = PAGE_SIZE - offset_in_page(bytes);
592
593 if (IS_ENABLED(CONFIG_32BIT))
594 ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
595 num_bytes, lower_32_bits(base_addr),
596 upper_32_bits(base_addr), 0, 0, 0);
597 else
598 ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_WRITE,
599 num_bytes, base_addr, 0, 0, 0, 0);
600
601 if (ret.error == SBI_ERR_FAILURE)
602 return -EIO;
603 return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
604}
605
606int sbi_debug_console_read(char *bytes, unsigned int num_bytes)
607{
608 phys_addr_t base_addr;
609 struct sbiret ret;
610
611 if (!sbi_debug_console_available)
612 return -EOPNOTSUPP;
613
614 if (is_vmalloc_addr(bytes))
615 base_addr = page_to_phys(vmalloc_to_page(bytes)) +
616 offset_in_page(bytes);
617 else
618 base_addr = __pa(bytes);
619 if (PAGE_SIZE < (offset_in_page(bytes) + num_bytes))
620 num_bytes = PAGE_SIZE - offset_in_page(bytes);
621
622 if (IS_ENABLED(CONFIG_32BIT))
623 ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
624 num_bytes, lower_32_bits(base_addr),
625 upper_32_bits(base_addr), 0, 0, 0);
626 else
627 ret = sbi_ecall(SBI_EXT_DBCN, SBI_EXT_DBCN_CONSOLE_READ,
628 num_bytes, base_addr, 0, 0, 0, 0);
629
630 if (ret.error == SBI_ERR_FAILURE)
631 return -EIO;
632 return ret.error ? sbi_err_map_linux_errno(ret.error) : ret.value;
633}
634
635void __init sbi_init(void)
636{
637 int ret;
638
639 sbi_set_power_off();
640 ret = sbi_get_spec_version();
641 if (ret > 0)
642 sbi_spec_version = ret;
643
644 pr_info("SBI specification v%lu.%lu detected\n",
645 sbi_major_version(), sbi_minor_version());
646
647 if (!sbi_spec_is_0_1()) {
648 pr_info("SBI implementation ID=0x%lx Version=0x%lx\n",
649 sbi_get_firmware_id(), sbi_get_firmware_version());
650 if (sbi_probe_extension(SBI_EXT_TIME)) {
651 __sbi_set_timer = __sbi_set_timer_v02;
652 pr_info("SBI TIME extension detected\n");
653 } else {
654 __sbi_set_timer = __sbi_set_timer_v01;
655 }
656 if (sbi_probe_extension(SBI_EXT_IPI)) {
657 __sbi_send_ipi = __sbi_send_ipi_v02;
658 pr_info("SBI IPI extension detected\n");
659 } else {
660 __sbi_send_ipi = __sbi_send_ipi_v01;
661 }
662 if (sbi_probe_extension(SBI_EXT_RFENCE)) {
663 __sbi_rfence = __sbi_rfence_v02;
664 pr_info("SBI RFENCE extension detected\n");
665 } else {
666 __sbi_rfence = __sbi_rfence_v01;
667 }
668 if ((sbi_spec_version >= sbi_mk_version(0, 3)) &&
669 sbi_probe_extension(SBI_EXT_SRST)) {
670 pr_info("SBI SRST extension detected\n");
671 pm_power_off = sbi_srst_power_off;
672 sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot;
673 sbi_srst_reboot_nb.priority = 192;
674 register_restart_handler(&sbi_srst_reboot_nb);
675 }
676 if ((sbi_spec_version >= sbi_mk_version(2, 0)) &&
677 (sbi_probe_extension(SBI_EXT_DBCN) > 0)) {
678 pr_info("SBI DBCN extension detected\n");
679 sbi_debug_console_available = true;
680 }
681 } else {
682 __sbi_set_timer = __sbi_set_timer_v01;
683 __sbi_send_ipi = __sbi_send_ipi_v01;
684 __sbi_rfence = __sbi_rfence_v01;
685 }
686}