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v6.2
  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef __ASM_S390_PCI_H
  3#define __ASM_S390_PCI_H
  4
  5#include <linux/pci.h>
  6#include <linux/mutex.h>
  7#include <linux/iommu.h>
  8#include <linux/pci_hotplug.h>
  9#include <asm/pci_clp.h>
 10#include <asm/pci_debug.h>
 11#include <asm/pci_insn.h>
 12#include <asm/sclp.h>
 13
 14#define PCIBIOS_MIN_IO		0x1000
 15#define PCIBIOS_MIN_MEM		0x10000000
 16
 17#define pcibios_assign_all_busses()	(0)
 18
 19void __iomem *pci_iomap(struct pci_dev *, int, unsigned long);
 20void pci_iounmap(struct pci_dev *, void __iomem *);
 21int pci_domain_nr(struct pci_bus *);
 22int pci_proc_domain(struct pci_bus *);
 23
 24#define ZPCI_BUS_NR			0	/* default bus number */
 25
 26#define ZPCI_NR_DMA_SPACES		1
 27#define ZPCI_NR_DEVICES			CONFIG_PCI_NR_FUNCTIONS
 28#define ZPCI_DOMAIN_BITMAP_SIZE		(1 << 16)
 29
 30#ifdef PCI
 31#if (ZPCI_NR_DEVICES > ZPCI_DOMAIN_BITMAP_SIZE)
 32# error ZPCI_NR_DEVICES can not be bigger than ZPCI_DOMAIN_BITMAP_SIZE
 33#endif
 34#endif /* PCI */
 35
 36/* PCI Function Controls */
 37#define ZPCI_FC_FN_ENABLED		0x80
 38#define ZPCI_FC_ERROR			0x40
 39#define ZPCI_FC_BLOCKED			0x20
 40#define ZPCI_FC_DMA_ENABLED		0x10
 41
 42#define ZPCI_FMB_DMA_COUNTER_VALID	(1 << 23)
 43
 44struct zpci_fmb_fmt0 {
 45	u64 dma_rbytes;
 46	u64 dma_wbytes;
 47};
 48
 49struct zpci_fmb_fmt1 {
 50	u64 rx_bytes;
 51	u64 rx_packets;
 52	u64 tx_bytes;
 53	u64 tx_packets;
 54};
 55
 56struct zpci_fmb_fmt2 {
 57	u64 consumed_work_units;
 58	u64 max_work_units;
 59};
 60
 61struct zpci_fmb_fmt3 {
 62	u64 tx_bytes;
 63};
 64
 65struct zpci_fmb {
 66	u32 format	: 8;
 67	u32 fmt_ind	: 24;
 68	u32 samples;
 69	u64 last_update;
 70	/* common counters */
 71	u64 ld_ops;
 72	u64 st_ops;
 73	u64 stb_ops;
 74	u64 rpcit_ops;
 75	/* format specific counters */
 76	union {
 77		struct zpci_fmb_fmt0 fmt0;
 78		struct zpci_fmb_fmt1 fmt1;
 79		struct zpci_fmb_fmt2 fmt2;
 80		struct zpci_fmb_fmt3 fmt3;
 81	};
 82} __packed __aligned(128);
 83
 84enum zpci_state {
 85	ZPCI_FN_STATE_STANDBY = 0,
 86	ZPCI_FN_STATE_CONFIGURED = 1,
 87	ZPCI_FN_STATE_RESERVED = 2,
 88};
 89
 90struct zpci_bar_struct {
 91	struct resource *res;		/* bus resource */
 92	void __iomem	*mio_wb;
 93	void __iomem	*mio_wt;
 94	u32		val;		/* bar start & 3 flag bits */
 95	u16		map_idx;	/* index into bar mapping array */
 96	u8		size;		/* order 2 exponent */
 97};
 98
 99struct s390_domain;
100struct kvm_zdev;
101
102#define ZPCI_FUNCTIONS_PER_BUS 256
103struct zpci_bus {
104	struct kref		kref;
105	struct pci_bus		*bus;
106	struct zpci_dev		*function[ZPCI_FUNCTIONS_PER_BUS];
107	struct list_head	resources;
108	struct list_head	bus_next;
109	struct resource		bus_resource;
110	int			pchid;
111	int			domain_nr;
112	bool			multifunction;
 
113	enum pci_bus_speed	max_bus_speed;
114};
115
116/* Private data per function */
117struct zpci_dev {
118	struct zpci_bus *zbus;
119	struct list_head entry;		/* list of all zpci_devices, needed for hotplug, etc. */
120	struct list_head iommu_list;
121	struct kref kref;
122	struct rcu_head rcu;
123	struct hotplug_slot hotplug_slot;
124
 
125	enum zpci_state state;
126	u32		fid;		/* function ID, used by sclp */
127	u32		fh;		/* function handle, used by insn's */
128	u32		gisa;		/* GISA designation for passthrough */
129	u16		vfn;		/* virtual function number */
130	u16		pchid;		/* physical channel ID */
131	u16		maxstbl;	/* Maximum store block size */
 
 
132	u8		pfgid;		/* function group ID */
133	u8		pft;		/* pci function type */
134	u8		port;
 
135	u8		dtsm;		/* Supported DT mask */
136	u8		rid_available	: 1;
137	u8		has_hp_slot	: 1;
138	u8		has_resources	: 1;
139	u8		is_physfn	: 1;
140	u8		util_str_avail	: 1;
141	u8		irqs_registered	: 1;
142	u8		reserved	: 2;
 
143	unsigned int	devfn;		/* DEVFN part of the RID*/
144
145	struct mutex lock;
146	u8 pfip[CLP_PFIP_NR_SEGMENTS];	/* pci function internal path */
147	u32 uid;			/* user defined id */
148	u8 util_str[CLP_UTIL_STR_LEN];	/* utility string */
149
150	/* IRQ stuff */
151	u64		msi_addr;	/* MSI address */
152	unsigned int	max_msi;	/* maximum number of MSI's */
153	unsigned int	msi_first_bit;
154	unsigned int	msi_nr_irqs;
155	struct airq_iv *aibv;		/* adapter interrupt bit vector */
156	unsigned long	aisb;		/* number of the summary bit */
157
158	/* DMA stuff */
159	unsigned long	*dma_table;
160	int		tlb_refresh;
161
162	spinlock_t	iommu_bitmap_lock;
163	unsigned long	*iommu_bitmap;
164	unsigned long	*lazy_bitmap;
165	unsigned long	iommu_size;
166	unsigned long	iommu_pages;
167	unsigned int	next_bit;
168
169	struct iommu_device iommu_dev;  /* IOMMU core handle */
170
171	char res_name[16];
172	bool mio_capable;
173	struct zpci_bar_struct bars[PCI_STD_NUM_BARS];
174
175	u64		start_dma;	/* Start of available DMA addresses */
176	u64		end_dma;	/* End of available DMA addresses */
177	u64		dma_mask;	/* DMA address space mask */
178
179	/* Function measurement block */
 
180	struct zpci_fmb *fmb;
181	u16		fmb_update;	/* update interval */
182	u16		fmb_length;
183	/* software counters */
184	atomic64_t allocated_pages;
185	atomic64_t mapped_pages;
186	atomic64_t unmapped_pages;
187
188	u8		version;
189	enum pci_bus_speed max_bus_speed;
190
191	struct dentry	*debugfs_dev;
192
193	/* IOMMU and passthrough */
194	struct s390_domain *s390_domain; /* s390 IOMMU domain data */
195	struct kvm_zdev *kzdev;
196	struct mutex kzdev_lock;
 
197};
198
199static inline bool zdev_enabled(struct zpci_dev *zdev)
200{
201	return (zdev->fh & (1UL << 31)) ? true : false;
202}
203
204extern const struct attribute_group *zpci_attr_groups[];
 
 
 
 
 
 
 
205extern unsigned int s390_pci_force_floating __initdata;
206extern unsigned int s390_pci_no_rid;
207
208extern union zpci_sic_iib *zpci_aipb;
209extern struct airq_iv *zpci_aif_sbv;
210
211/* -----------------------------------------------------------------------------
212  Prototypes
213----------------------------------------------------------------------------- */
214/* Base stuff */
215struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state);
 
216int zpci_enable_device(struct zpci_dev *);
217int zpci_disable_device(struct zpci_dev *);
218int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh);
219int zpci_deconfigure_device(struct zpci_dev *zdev);
220void zpci_device_reserved(struct zpci_dev *zdev);
221bool zpci_is_device_configured(struct zpci_dev *zdev);
 
222
223int zpci_hot_reset_device(struct zpci_dev *zdev);
224int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *);
225int zpci_unregister_ioat(struct zpci_dev *, u8);
226void zpci_remove_reserved_devices(void);
227void zpci_update_fh(struct zpci_dev *zdev, u32 fh);
228
229/* CLP */
230int clp_setup_writeback_mio(void);
231int clp_scan_pci_devices(void);
232int clp_query_pci_fn(struct zpci_dev *zdev);
233int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as);
234int clp_disable_fh(struct zpci_dev *zdev, u32 *fh);
235int clp_get_state(u32 fid, enum zpci_state *state);
236int clp_refresh_fh(u32 fid, u32 *fh);
237
238/* UID */
239void update_uid_checking(bool new);
240
241/* IOMMU Interface */
242int zpci_init_iommu(struct zpci_dev *zdev);
243void zpci_destroy_iommu(struct zpci_dev *zdev);
244
245#ifdef CONFIG_PCI
246static inline bool zpci_use_mio(struct zpci_dev *zdev)
247{
248	return static_branch_likely(&have_mio) && zdev->mio_capable;
249}
250
251/* Error handling and recovery */
252void zpci_event_error(void *);
253void zpci_event_availability(void *);
254bool zpci_is_enabled(void);
255#else /* CONFIG_PCI */
256static inline void zpci_event_error(void *e) {}
257static inline void zpci_event_availability(void *e) {}
258#endif /* CONFIG_PCI */
259
260#ifdef CONFIG_HOTPLUG_PCI_S390
261int zpci_init_slot(struct zpci_dev *);
262void zpci_exit_slot(struct zpci_dev *);
263#else /* CONFIG_HOTPLUG_PCI_S390 */
264static inline int zpci_init_slot(struct zpci_dev *zdev)
265{
266	return 0;
267}
268static inline void zpci_exit_slot(struct zpci_dev *zdev) {}
269#endif /* CONFIG_HOTPLUG_PCI_S390 */
270
271/* Helpers */
272static inline struct zpci_dev *to_zpci(struct pci_dev *pdev)
273{
274	struct zpci_bus *zbus = pdev->sysdata;
275
276	return zbus->function[pdev->devfn];
277}
278
279static inline struct zpci_dev *to_zpci_dev(struct device *dev)
280{
281	return to_zpci(to_pci_dev(dev));
282}
283
284struct zpci_dev *get_zdev_by_fid(u32);
285
286/* DMA */
287int zpci_dma_init(void);
288void zpci_dma_exit(void);
289int zpci_dma_init_device(struct zpci_dev *zdev);
290int zpci_dma_exit_device(struct zpci_dev *zdev);
291
292/* IRQ */
293int __init zpci_irq_init(void);
294void __init zpci_irq_exit(void);
295
296/* FMB */
297int zpci_fmb_enable_device(struct zpci_dev *);
298int zpci_fmb_disable_device(struct zpci_dev *);
299
300/* Debug */
301int zpci_debug_init(void);
302void zpci_debug_exit(void);
303void zpci_debug_init_device(struct zpci_dev *, const char *);
304void zpci_debug_exit_device(struct zpci_dev *);
305
306/* Error handling */
307int zpci_report_error(struct pci_dev *, struct zpci_report_error_header *);
308int zpci_clear_error_state(struct zpci_dev *zdev);
309int zpci_reset_load_store_blocked(struct zpci_dev *zdev);
310
311#ifdef CONFIG_NUMA
312
313/* Returns the node based on PCI bus */
314static inline int __pcibus_to_node(const struct pci_bus *bus)
315{
316	return NUMA_NO_NODE;
317}
318
319static inline const struct cpumask *
320cpumask_of_pcibus(const struct pci_bus *bus)
321{
322	return cpu_online_mask;
323}
324
325#endif /* CONFIG_NUMA */
326
327#endif
v6.13.7
  1/* SPDX-License-Identifier: GPL-2.0 */
  2#ifndef __ASM_S390_PCI_H
  3#define __ASM_S390_PCI_H
  4
  5#include <linux/pci.h>
  6#include <linux/mutex.h>
  7#include <linux/iommu.h>
  8#include <linux/pci_hotplug.h>
  9#include <asm/pci_clp.h>
 10#include <asm/pci_debug.h>
 11#include <asm/pci_insn.h>
 12#include <asm/sclp.h>
 13
 14#define PCIBIOS_MIN_IO		0x1000
 15#define PCIBIOS_MIN_MEM		0x10000000
 16
 17#define pcibios_assign_all_busses()	(0)
 18
 19void __iomem *pci_iomap(struct pci_dev *, int, unsigned long);
 20void pci_iounmap(struct pci_dev *, void __iomem *);
 21int pci_domain_nr(struct pci_bus *);
 22int pci_proc_domain(struct pci_bus *);
 23
 24#define ZPCI_BUS_NR			0	/* default bus number */
 25
 26#define ZPCI_NR_DMA_SPACES		1
 27#define ZPCI_NR_DEVICES			CONFIG_PCI_NR_FUNCTIONS
 28#define ZPCI_DOMAIN_BITMAP_SIZE		(1 << 16)
 29
 30#ifdef PCI
 31#if (ZPCI_NR_DEVICES > ZPCI_DOMAIN_BITMAP_SIZE)
 32# error ZPCI_NR_DEVICES can not be bigger than ZPCI_DOMAIN_BITMAP_SIZE
 33#endif
 34#endif /* PCI */
 35
 36/* PCI Function Controls */
 37#define ZPCI_FC_FN_ENABLED		0x80
 38#define ZPCI_FC_ERROR			0x40
 39#define ZPCI_FC_BLOCKED			0x20
 40#define ZPCI_FC_DMA_ENABLED		0x10
 41
 42#define ZPCI_FMB_DMA_COUNTER_VALID	(1 << 23)
 43
 44struct zpci_fmb_fmt0 {
 45	u64 dma_rbytes;
 46	u64 dma_wbytes;
 47};
 48
 49struct zpci_fmb_fmt1 {
 50	u64 rx_bytes;
 51	u64 rx_packets;
 52	u64 tx_bytes;
 53	u64 tx_packets;
 54};
 55
 56struct zpci_fmb_fmt2 {
 57	u64 consumed_work_units;
 58	u64 max_work_units;
 59};
 60
 61struct zpci_fmb_fmt3 {
 62	u64 tx_bytes;
 63};
 64
 65struct zpci_fmb {
 66	u32 format	: 8;
 67	u32 fmt_ind	: 24;
 68	u32 samples;
 69	u64 last_update;
 70	/* common counters */
 71	u64 ld_ops;
 72	u64 st_ops;
 73	u64 stb_ops;
 74	u64 rpcit_ops;
 75	/* format specific counters */
 76	union {
 77		struct zpci_fmb_fmt0 fmt0;
 78		struct zpci_fmb_fmt1 fmt1;
 79		struct zpci_fmb_fmt2 fmt2;
 80		struct zpci_fmb_fmt3 fmt3;
 81	};
 82} __packed __aligned(128);
 83
 84enum zpci_state {
 85	ZPCI_FN_STATE_STANDBY = 0,
 86	ZPCI_FN_STATE_CONFIGURED = 1,
 87	ZPCI_FN_STATE_RESERVED = 2,
 88};
 89
 90struct zpci_bar_struct {
 91	struct resource *res;		/* bus resource */
 92	void __iomem	*mio_wb;
 93	void __iomem	*mio_wt;
 94	u32		val;		/* bar start & 3 flag bits */
 95	u16		map_idx;	/* index into bar mapping array */
 96	u8		size;		/* order 2 exponent */
 97};
 98
 
 99struct kvm_zdev;
100
101#define ZPCI_FUNCTIONS_PER_BUS 256
102struct zpci_bus {
103	struct kref		kref;
104	struct pci_bus		*bus;
105	struct zpci_dev		*function[ZPCI_FUNCTIONS_PER_BUS];
106	struct list_head	resources;
107	struct list_head	bus_next;
108	struct resource		bus_resource;
109	int			topo;		/* TID if topo_is_tid, PCHID otherwise */
110	int			domain_nr;
111	u8			multifunction	: 1;
112	u8			topo_is_tid	: 1;
113	enum pci_bus_speed	max_bus_speed;
114};
115
116/* Private data per function */
117struct zpci_dev {
118	struct zpci_bus *zbus;
119	struct list_head entry;		/* list of all zpci_devices, needed for hotplug, etc. */
120	struct list_head iommu_list;
121	struct kref kref;
122	struct rcu_head rcu;
123	struct hotplug_slot hotplug_slot;
124
125	struct mutex state_lock;	/* protect state changes */
126	enum zpci_state state;
127	u32		fid;		/* function ID, used by sclp */
128	u32		fh;		/* function handle, used by insn's */
129	u32		gisa;		/* GISA designation for passthrough */
130	u16		vfn;		/* virtual function number */
131	u16		pchid;		/* physical channel ID */
132	u16		maxstbl;	/* Maximum store block size */
133	u16		rid;		/* RID as supplied by firmware */
134	u16		tid;		/* Topology for which RID is valid */
135	u8		pfgid;		/* function group ID */
136	u8		pft;		/* pci function type */
137	u8		port;
138	u8		fidparm;
139	u8		dtsm;		/* Supported DT mask */
140	u8		rid_available	: 1;
141	u8		has_hp_slot	: 1;
142	u8		has_resources	: 1;
143	u8		is_physfn	: 1;
144	u8		util_str_avail	: 1;
145	u8		irqs_registered	: 1;
146	u8		tid_avail	: 1;
147	u8		reserved	: 1;
148	unsigned int	devfn;		/* DEVFN part of the RID*/
149
 
150	u8 pfip[CLP_PFIP_NR_SEGMENTS];	/* pci function internal path */
151	u32 uid;			/* user defined id */
152	u8 util_str[CLP_UTIL_STR_LEN];	/* utility string */
153
154	/* IRQ stuff */
155	u64		msi_addr;	/* MSI address */
156	unsigned int	max_msi;	/* maximum number of MSI's */
157	unsigned int	msi_first_bit;
158	unsigned int	msi_nr_irqs;
159	struct airq_iv *aibv;		/* adapter interrupt bit vector */
160	unsigned long	aisb;		/* number of the summary bit */
161
162	/* DMA stuff */
163	unsigned long	*dma_table;
164	int		tlb_refresh;
165
 
 
 
 
 
 
 
166	struct iommu_device iommu_dev;  /* IOMMU core handle */
167
168	char res_name[16];
169	bool mio_capable;
170	struct zpci_bar_struct bars[PCI_STD_NUM_BARS];
171
172	u64		start_dma;	/* Start of available DMA addresses */
173	u64		end_dma;	/* End of available DMA addresses */
174	u64		dma_mask;	/* DMA address space mask */
175
176	/* Function measurement block */
177	struct mutex fmb_lock;
178	struct zpci_fmb *fmb;
179	u16		fmb_update;	/* update interval */
180	u16		fmb_length;
 
 
 
 
181
182	u8		version;
183	enum pci_bus_speed max_bus_speed;
184
185	struct dentry	*debugfs_dev;
186
187	/* IOMMU and passthrough */
188	struct iommu_domain *s390_domain; /* attached IOMMU domain */
189	struct kvm_zdev *kzdev;
190	struct mutex kzdev_lock;
191	spinlock_t dom_lock;		/* protect s390_domain change */
192};
193
194static inline bool zdev_enabled(struct zpci_dev *zdev)
195{
196	return (zdev->fh & (1UL << 31)) ? true : false;
197}
198
199extern const struct attribute_group zpci_attr_group;
200extern const struct attribute_group pfip_attr_group;
201extern const struct attribute_group zpci_ident_attr_group;
202
203#define ARCH_PCI_DEV_GROUPS &zpci_attr_group,		 \
204			    &pfip_attr_group,		 \
205			    &zpci_ident_attr_group,
206
207extern unsigned int s390_pci_force_floating __initdata;
208extern unsigned int s390_pci_no_rid;
209
210extern union zpci_sic_iib *zpci_aipb;
211extern struct airq_iv *zpci_aif_sbv;
212
213/* -----------------------------------------------------------------------------
214  Prototypes
215----------------------------------------------------------------------------- */
216/* Base stuff */
217struct zpci_dev *zpci_create_device(u32 fid, u32 fh, enum zpci_state state);
218int zpci_add_device(struct zpci_dev *zdev);
219int zpci_enable_device(struct zpci_dev *);
220int zpci_disable_device(struct zpci_dev *);
221int zpci_scan_configured_device(struct zpci_dev *zdev, u32 fh);
222int zpci_deconfigure_device(struct zpci_dev *zdev);
223void zpci_device_reserved(struct zpci_dev *zdev);
224bool zpci_is_device_configured(struct zpci_dev *zdev);
225int zpci_scan_devices(void);
226
227int zpci_hot_reset_device(struct zpci_dev *zdev);
228int zpci_register_ioat(struct zpci_dev *, u8, u64, u64, u64, u8 *);
229int zpci_unregister_ioat(struct zpci_dev *, u8);
230void zpci_remove_reserved_devices(void);
231void zpci_update_fh(struct zpci_dev *zdev, u32 fh);
232
233/* CLP */
234int clp_setup_writeback_mio(void);
235int clp_scan_pci_devices(struct list_head *scan_list);
236int clp_query_pci_fn(struct zpci_dev *zdev);
237int clp_enable_fh(struct zpci_dev *zdev, u32 *fh, u8 nr_dma_as);
238int clp_disable_fh(struct zpci_dev *zdev, u32 *fh);
239int clp_get_state(u32 fid, enum zpci_state *state);
240int clp_refresh_fh(u32 fid, u32 *fh);
241
242/* UID */
243void update_uid_checking(bool new);
244
245/* IOMMU Interface */
246int zpci_init_iommu(struct zpci_dev *zdev);
247void zpci_destroy_iommu(struct zpci_dev *zdev);
248
249#ifdef CONFIG_PCI
250static inline bool zpci_use_mio(struct zpci_dev *zdev)
251{
252	return static_branch_likely(&have_mio) && zdev->mio_capable;
253}
254
255/* Error handling and recovery */
256void zpci_event_error(void *);
257void zpci_event_availability(void *);
258bool zpci_is_enabled(void);
259#else /* CONFIG_PCI */
260static inline void zpci_event_error(void *e) {}
261static inline void zpci_event_availability(void *e) {}
262#endif /* CONFIG_PCI */
263
264#ifdef CONFIG_HOTPLUG_PCI_S390
265int zpci_init_slot(struct zpci_dev *);
266void zpci_exit_slot(struct zpci_dev *);
267#else /* CONFIG_HOTPLUG_PCI_S390 */
268static inline int zpci_init_slot(struct zpci_dev *zdev)
269{
270	return 0;
271}
272static inline void zpci_exit_slot(struct zpci_dev *zdev) {}
273#endif /* CONFIG_HOTPLUG_PCI_S390 */
274
275/* Helpers */
276static inline struct zpci_dev *to_zpci(struct pci_dev *pdev)
277{
278	struct zpci_bus *zbus = pdev->sysdata;
279
280	return zbus->function[pdev->devfn];
281}
282
283static inline struct zpci_dev *to_zpci_dev(struct device *dev)
284{
285	return to_zpci(to_pci_dev(dev));
286}
287
288struct zpci_dev *get_zdev_by_fid(u32);
289
290/* DMA */
291int zpci_dma_init(void);
292void zpci_dma_exit(void);
293int zpci_dma_init_device(struct zpci_dev *zdev);
294int zpci_dma_exit_device(struct zpci_dev *zdev);
295
296/* IRQ */
297int __init zpci_irq_init(void);
298void __init zpci_irq_exit(void);
299
300/* FMB */
301int zpci_fmb_enable_device(struct zpci_dev *);
302int zpci_fmb_disable_device(struct zpci_dev *);
303
304/* Debug */
305int zpci_debug_init(void);
306void zpci_debug_exit(void);
307void zpci_debug_init_device(struct zpci_dev *, const char *);
308void zpci_debug_exit_device(struct zpci_dev *);
309
310/* Error handling */
311int zpci_report_error(struct pci_dev *, struct zpci_report_error_header *);
312int zpci_clear_error_state(struct zpci_dev *zdev);
313int zpci_reset_load_store_blocked(struct zpci_dev *zdev);
314
315#ifdef CONFIG_NUMA
316
317/* Returns the node based on PCI bus */
318static inline int __pcibus_to_node(const struct pci_bus *bus)
319{
320	return NUMA_NO_NODE;
321}
322
323static inline const struct cpumask *
324cpumask_of_pcibus(const struct pci_bus *bus)
325{
326	return cpu_online_mask;
327}
328
329#endif /* CONFIG_NUMA */
330
331#endif