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1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com>
5 */
6#include <dt-bindings/pinctrl/stm32-pinfunc.h>
7
8&pinctrl {
9 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
10 pins {
11 pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ADC1 in6 */
12 <STM32_PINMUX('A', 3, ANALOG)>; /* ADC1 in12 */
13 };
14 };
15
16 i2c1_pins_a: i2c1-0 {
17 pins {
18 pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */
19 <STM32_PINMUX('E', 8, AF5)>; /* I2C1_SDA */
20 bias-disable;
21 drive-open-drain;
22 slew-rate = <0>;
23 };
24 };
25
26 i2c1_sleep_pins_a: i2c1-sleep-0 {
27 pins {
28 pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* I2C1_SCL */
29 <STM32_PINMUX('E', 8, ANALOG)>; /* I2C1_SDA */
30 };
31 };
32
33 i2c5_pins_a: i2c5-0 {
34 pins {
35 pinmux = <STM32_PINMUX('D', 1, AF4)>, /* I2C5_SCL */
36 <STM32_PINMUX('H', 6, AF4)>; /* I2C5_SDA */
37 bias-disable;
38 drive-open-drain;
39 slew-rate = <0>;
40 };
41 };
42
43 i2c5_sleep_pins_a: i2c5-sleep-0 {
44 pins {
45 pinmux = <STM32_PINMUX('D', 1, ANALOG)>, /* I2C5_SCL */
46 <STM32_PINMUX('H', 6, ANALOG)>; /* I2C5_SDA */
47 };
48 };
49
50 mcp23017_pins_a: mcp23017-0 {
51 pins {
52 pinmux = <STM32_PINMUX('G', 12, GPIO)>;
53 bias-pull-up;
54 };
55 };
56
57 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
58 pins {
59 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
60 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
61 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
62 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
63 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
64 slew-rate = <1>;
65 drive-push-pull;
66 bias-disable;
67 };
68 };
69
70 sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
71 pins1 {
72 pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
73 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
74 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
75 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
76 slew-rate = <1>;
77 drive-push-pull;
78 bias-disable;
79 };
80 pins2 {
81 pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
82 slew-rate = <1>;
83 drive-open-drain;
84 bias-disable;
85 };
86 };
87
88 sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
89 pins {
90 pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
91 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
92 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
93 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
94 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
95 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
96 };
97 };
98
99 sdmmc1_clk_pins_a: sdmmc1-clk-0 {
100 pins {
101 pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
102 slew-rate = <1>;
103 drive-push-pull;
104 bias-disable;
105 };
106 };
107
108 sdmmc2_b4_pins_a: sdmmc2-b4-0 {
109 pins {
110 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
111 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
112 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
113 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
114 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
115 slew-rate = <1>;
116 drive-push-pull;
117 bias-pull-up;
118 };
119 };
120
121 sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
122 pins1 {
123 pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
124 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
125 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
126 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
127 slew-rate = <1>;
128 drive-push-pull;
129 bias-pull-up;
130 };
131 pins2 {
132 pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
133 slew-rate = <1>;
134 drive-open-drain;
135 bias-pull-up;
136 };
137 };
138
139 sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
140 pins {
141 pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
142 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
143 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
144 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
145 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
146 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
147 };
148 };
149
150 sdmmc2_clk_pins_a: sdmmc2-clk-0 {
151 pins {
152 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
153 slew-rate = <1>;
154 drive-push-pull;
155 bias-pull-up;
156 };
157 };
158
159 spi5_pins_a: spi5-0 {
160 pins1 {
161 pinmux = <STM32_PINMUX('H', 7, AF6)>, /* SPI5_SCK */
162 <STM32_PINMUX('H', 3, AF5)>; /* SPI5_MOSI */
163 bias-disable;
164 drive-push-pull;
165 slew-rate = <1>;
166 };
167
168 pins2 {
169 pinmux = <STM32_PINMUX('A', 8, AF5)>; /* SPI5_MISO */
170 bias-disable;
171 };
172 };
173
174 spi5_sleep_pins_a: spi5-sleep-0 {
175 pins {
176 pinmux = <STM32_PINMUX('H', 7, ANALOG)>, /* SPI5_SCK */
177 <STM32_PINMUX('A', 8, ANALOG)>, /* SPI5_MISO */
178 <STM32_PINMUX('H', 3, ANALOG)>; /* SPI5_MOSI */
179 };
180 };
181
182 stm32g0_intn_pins_a: stm32g0-intn-0 {
183 pins {
184 pinmux = <STM32_PINMUX('I', 2, GPIO)>;
185 bias-pull-up;
186 };
187 };
188
189 uart4_pins_a: uart4-0 {
190 pins1 {
191 pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
192 bias-disable;
193 drive-push-pull;
194 slew-rate = <0>;
195 };
196 pins2 {
197 pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
198 bias-disable;
199 };
200 };
201};