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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright 2014 Linaro Ltd.
4 */
5
6#include "ste-ab8500.dtsi"
7
8/ {
9 soc {
10 prcmu@80157000 {
11 ab8500 {
12 gpio {
13 /* Hog a few default settings */
14 pinctrl-names = "default";
15 pinctrl-0 = <&gpio2_default_mode>,
16 <&gpio4_default_mode>,
17 <&gpio10_default_mode>,
18 <&gpio11_default_mode>,
19 <&gpio12_default_mode>,
20 <&gpio13_default_mode>,
21 <&gpio16_default_mode>,
22 <&gpio24_default_mode>,
23 <&gpio25_default_mode>,
24 <&gpio36_default_mode>,
25 <&gpio37_default_mode>,
26 <&gpio38_default_mode>,
27 <&gpio39_default_mode>,
28 <&gpio42_default_mode>,
29 <&gpio26_default_mode>,
30 <&gpio35_default_mode>,
31 <&ycbcr_default_mode>,
32 <&pwm_default_mode>,
33 <&adi1_default_mode>,
34 <&usbuicc_default_mode>,
35 <&dmic_default_mode>,
36 <&extcpena_default_mode>,
37 <&modsclsda_default_mode>;
38
39 /*
40 * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42
41 * are muxed in as GPIO, and configured as INPUT PULL DOWN
42 */
43 gpio2 {
44 gpio2_default_mode: gpio2_default {
45 default_mux {
46 function = "gpio";
47 groups = "gpio2_a_1";
48 };
49 default_cfg {
50 pins = "GPIO2_T9";
51 input-enable;
52 bias-pull-down;
53 };
54 };
55 };
56 gpio4 {
57 gpio4_default_mode: gpio4_default {
58 default_mux {
59 function = "gpio";
60 groups = "gpio4_a_1";
61 };
62 default_cfg {
63 pins = "GPIO4_W2";
64 input-enable;
65 bias-pull-down;
66 };
67 };
68 };
69 gpio10 {
70 gpio10_default_mode: gpio10_default {
71 default_mux {
72 function = "gpio";
73 groups = "gpio10_d_1";
74 };
75 default_cfg {
76 pins = "GPIO10_U17";
77 input-enable;
78 bias-pull-down;
79 };
80 };
81 };
82 gpio11 {
83 gpio11_default_mode: gpio11_default {
84 default_mux {
85 function = "gpio";
86 groups = "gpio11_d_1";
87 };
88 default_cfg {
89 pins = "GPIO11_AA18";
90 input-enable;
91 bias-pull-down;
92 };
93 };
94 };
95 gpio12 {
96 gpio12_default_mode: gpio12_default {
97 default_mux {
98 function = "gpio";
99 groups = "gpio12_d_1";
100 };
101 default_cfg {
102 pins = "GPIO12_U16";
103 input-enable;
104 bias-pull-down;
105 };
106 };
107 };
108 gpio13 {
109 gpio13_default_mode: gpio13_default {
110 default_mux {
111 function = "gpio";
112 groups = "gpio13_d_1";
113 };
114 default_cfg {
115 pins = "GPIO13_W17";
116 input-enable;
117 bias-pull-down;
118 };
119 };
120 };
121 gpio16 {
122 gpio16_default_mode: gpio16_default {
123 default_mux {
124 function = "gpio";
125 groups = "gpio16_a_1";
126 };
127 default_cfg {
128 pins = "GPIO16_F15";
129 input-enable;
130 bias-pull-down;
131 };
132 };
133 };
134 gpio24 {
135 gpio24_default_mode: gpio24_default {
136 default_mux {
137 function = "gpio";
138 groups = "gpio24_a_1";
139 };
140 default_cfg {
141 pins = "GPIO24_T14";
142 input-enable;
143 bias-pull-down;
144 };
145 };
146 };
147 gpio25 {
148 gpio25_default_mode: gpio25_default {
149 default_mux {
150 function = "gpio";
151 groups = "gpio25_a_1";
152 };
153 default_cfg {
154 pins = "GPIO25_R16";
155 input-enable;
156 bias-pull-down;
157 };
158 };
159 };
160 gpio36 {
161 gpio36_default_mode: gpio36_default {
162 default_mux {
163 function = "gpio";
164 groups = "gpio36_a_1";
165 };
166 default_cfg {
167 pins = "GPIO36_A17";
168 input-enable;
169 bias-pull-down;
170 };
171 };
172 };
173 gpio37 {
174 gpio37_default_mode: gpio37_default {
175 default_mux {
176 function = "gpio";
177 groups = "gpio37_a_1";
178 };
179 default_cfg {
180 pins = "GPIO37_E15";
181 input-enable;
182 bias-pull-down;
183 };
184 };
185 };
186 gpio38 {
187 gpio38_default_mode: gpio38_default {
188 default_mux {
189 function = "gpio";
190 groups = "gpio38_a_1";
191 };
192 default_cfg {
193 pins = "GPIO38_C17";
194 input-enable;
195 bias-pull-down;
196 };
197 };
198 };
199 gpio39 {
200 gpio39_default_mode: gpio39_default {
201 default_mux {
202 function = "gpio";
203 groups = "gpio39_a_1";
204 };
205 default_cfg {
206 pins = "GPIO39_E16";
207 input-enable;
208 bias-pull-down;
209 };
210 };
211 };
212 gpio42 {
213 gpio42_default_mode: gpio42_default {
214 default_mux {
215 function = "gpio";
216 groups = "gpio42_a_1";
217 };
218 default_cfg {
219 pins = "GPIO42_U2";
220 input-enable;
221 bias-pull-down;
222 };
223 };
224 };
225 /*
226 * Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW
227 */
228 gpio26 {
229 gpio26_default_mode: gpio26_default {
230 default_mux {
231 function = "gpio";
232 groups = "gpio26_d_1";
233 };
234 default_cfg {
235 pins = "GPIO26_M16";
236 output-low;
237 };
238 };
239 };
240 gpio35 {
241 gpio35_default_mode: gpio35_default {
242 default_mux {
243 function = "gpio";
244 groups = "gpio35_d_1";
245 };
246 default_cfg {
247 pins = "GPIO35_W15";
248 output-low;
249 };
250 };
251 };
252 /*
253 * This sets up the YCBCR connector pins, i.e. analog video out.
254 * Set as input with no bias.
255 */
256 ycbcr {
257 ycbcr_default_mode: ycbcr_default {
258 default_mux {
259 function = "ycbcr";
260 groups = "ycbcr0123_d_1";
261 };
262 default_cfg {
263 pins = "GPIO6_Y18",
264 "GPIO7_AA20",
265 "GPIO8_W18",
266 "GPIO9_AA19";
267 input-enable;
268 bias-disable;
269 };
270 };
271 };
272 /* This sets up the PWM pins 14 and 15 */
273 pwm {
274 pwm_default_mode: pwm_default {
275 default_mux {
276 function = "pwmout";
277 groups = "pwmout1_d_1", "pwmout2_d_1";
278 };
279 default_cfg {
280 pins = "GPIO14_F14",
281 "GPIO15_B17";
282 input-enable;
283 bias-pull-down;
284 };
285 };
286 };
287 /* This sets up audio interface 1 */
288 adi1 {
289 adi1_default_mode: adi1_default {
290 default_mux {
291 function = "adi1";
292 groups = "adi1_d_1";
293 };
294 default_cfg {
295 pins = "GPIO17_P5",
296 "GPIO18_R5",
297 "GPIO19_U5",
298 "GPIO20_T5";
299 input-enable;
300 bias-pull-down;
301 };
302 };
303 };
304 /* This sets up the USB UICC pins */
305 usbuicc {
306 usbuicc_default_mode: usbuicc_default {
307 default_mux {
308 function = "usbuicc";
309 groups = "usbuicc_d_1";
310 };
311 default_cfg {
312 pins = "GPIO21_H19",
313 "GPIO22_G20",
314 "GPIO23_G19";
315 input-enable;
316 bias-pull-down;
317 };
318 };
319 };
320 /* This sets up the microphone pins */
321 dmic {
322 dmic_default_mode: dmic_default {
323 default_mux {
324 function = "dmic";
325 groups = "dmic12_d_1",
326 "dmic34_d_1",
327 "dmic56_d_1";
328 };
329 default_cfg {
330 pins = "GPIO27_J6",
331 "GPIO28_K6",
332 "GPIO29_G6",
333 "GPIO30_H6",
334 "GPIO31_F5",
335 "GPIO32_G5";
336 input-enable;
337 bias-pull-down;
338 };
339 };
340 };
341 extcpena {
342 extcpena_default_mode: extcpena_default {
343 default_mux {
344 function = "extcpena";
345 groups = "extcpena_d_1";
346 };
347 default_cfg {
348 pins = "GPIO34_R17";
349 input-enable;
350 bias-pull-down;
351 };
352 };
353 };
354 /* Modem I2C setup (SCL and SDA pins) */
355 modsclsda {
356 modsclsda_default_mode: modsclsda_default {
357 default_mux {
358 function = "modsclsda";
359 groups = "modsclsda_d_1";
360 };
361 default_cfg {
362 pins = "GPIO40_T19",
363 "GPIO41_U19";
364 input-enable;
365 bias-pull-down;
366 };
367 };
368 };
369 /*
370 * Clock output pins associated with regulators.
371 */
372 sysclkreq2 {
373 sysclkreq2_default_mode: sysclkreq2_default {
374 default_mux {
375 function = "sysclkreq";
376 groups = "sysclkreq2_d_1";
377 };
378 default_cfg {
379 pins = "GPIO1_T10";
380 input-enable;
381 bias-disable;
382 };
383 };
384 sysclkreq2_sleep_mode: sysclkreq2_sleep {
385 default_mux {
386 function = "gpio";
387 groups = "gpio1_a_1";
388 };
389 default_cfg {
390 pins = "GPIO1_T10";
391 input-enable;
392 bias-pull-down;
393 };
394 };
395 };
396 sysclkreq4 {
397 sysclkreq4_default_mode: sysclkreq4_default {
398 default_mux {
399 function = "sysclkreq";
400 groups = "sysclkreq4_d_1";
401 };
402 default_cfg {
403 pins = "GPIO3_U9";
404 input-enable;
405 bias-disable;
406 };
407 };
408 sysclkreq4_sleep_mode: sysclkreq4_sleep {
409 default_mux {
410 function = "gpio";
411 groups = "gpio3_a_1";
412 };
413 default_cfg {
414 pins = "GPIO3_U9";
415 input-enable;
416 bias-pull-down;
417 };
418 };
419 };
420 };
421 };
422 };
423 };
424};