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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Renesas Mobile SDHI
4 *
5 * Copyright (C) 2017 Horms Solutions Ltd., Simon Horman
6 * Copyright (C) 2017-19 Renesas Electronics Corporation
7 */
8
9#ifndef RENESAS_SDHI_H
10#define RENESAS_SDHI_H
11
12#include <linux/platform_device.h>
13#include "tmio_mmc.h"
14
15struct renesas_sdhi_scc {
16 unsigned long clk_rate; /* clock rate for SDR104 */
17 u32 tap; /* sampling clock position for SDR104/HS400 (8 TAP) */
18 u32 tap_hs400_4tap; /* sampling clock position for HS400 (4 TAP) */
19};
20
21#define SDHI_FLAG_NEED_CLKH_FALLBACK BIT(0)
22
23struct renesas_sdhi_of_data {
24 unsigned long tmio_flags;
25 u32 tmio_ocr_mask;
26 unsigned long capabilities;
27 unsigned long capabilities2;
28 enum dma_slave_buswidth dma_buswidth;
29 dma_addr_t dma_rx_offset;
30 unsigned int bus_shift;
31 int scc_offset;
32 struct renesas_sdhi_scc *taps;
33 int taps_num;
34 unsigned int max_blk_count;
35 unsigned short max_segs;
36 unsigned long sdhi_flags;
37};
38
39#define SDHI_CALIB_TABLE_MAX 32
40
41#define sdhi_has_quirk(p, q) ((p)->quirks && (p)->quirks->q)
42
43struct renesas_sdhi_quirks {
44 bool hs400_disabled;
45 bool hs400_4taps;
46 bool fixed_addr_mode;
47 bool dma_one_rx_only;
48 bool manual_tap_correction;
49 bool old_info1_layout;
50 u32 hs400_bad_taps;
51 const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
52};
53
54struct renesas_sdhi_of_data_with_quirks {
55 const struct renesas_sdhi_of_data *of_data;
56 const struct renesas_sdhi_quirks *quirks;
57};
58
59/* We want both end_flags to be set before we mark DMA as finished */
60#define SDHI_DMA_END_FLAG_DMA 0
61#define SDHI_DMA_END_FLAG_ACCESS 1
62
63struct renesas_sdhi_dma {
64 unsigned long end_flags;
65 enum dma_slave_buswidth dma_buswidth;
66 bool (*filter)(struct dma_chan *chan, void *arg);
67 void (*enable)(struct tmio_mmc_host *host, bool enable);
68 struct completion dma_dataend;
69 struct tasklet_struct dma_complete;
70};
71
72struct renesas_sdhi {
73 struct clk *clk;
74 struct clk *clkh;
75 struct clk *clk_cd;
76 struct tmio_mmc_data mmc_data;
77 struct renesas_sdhi_dma dma_priv;
78 const struct renesas_sdhi_quirks *quirks;
79 struct pinctrl *pinctrl;
80 struct pinctrl_state *pins_default, *pins_uhs;
81 void __iomem *scc_ctl;
82 u32 scc_tappos;
83 u32 scc_tappos_hs400;
84 const u8 *adjust_hs400_calib_table;
85 bool needs_adjust_hs400;
86
87 /* Tuning values: 1 for success, 0 for failure */
88 DECLARE_BITMAP(taps, BITS_PER_LONG);
89 /* Sampling data comparison: 1 for match, 0 for mismatch */
90 DECLARE_BITMAP(smpcmp, BITS_PER_LONG);
91 unsigned int tap_num;
92 unsigned int tap_set;
93
94 struct reset_control *rstc;
95};
96
97#define host_to_priv(host) \
98 container_of((host)->pdata, struct renesas_sdhi, mmc_data)
99
100int renesas_sdhi_probe(struct platform_device *pdev,
101 const struct tmio_mmc_dma_ops *dma_ops,
102 const struct renesas_sdhi_of_data *of_data,
103 const struct renesas_sdhi_quirks *quirks);
104int renesas_sdhi_remove(struct platform_device *pdev);
105#endif
1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Renesas Mobile SDHI
4 *
5 * Copyright (C) 2017 Horms Solutions Ltd., Simon Horman
6 * Copyright (C) 2017-19 Renesas Electronics Corporation
7 */
8
9#ifndef RENESAS_SDHI_H
10#define RENESAS_SDHI_H
11
12#include <linux/dmaengine.h>
13#include <linux/platform_device.h>
14#include <linux/workqueue.h>
15#include "tmio_mmc.h"
16
17struct renesas_sdhi_scc {
18 unsigned long clk_rate; /* clock rate for SDR104 */
19 u32 tap; /* sampling clock position for SDR104/HS400 (8 TAP) */
20 u32 tap_hs400_4tap; /* sampling clock position for HS400 (4 TAP) */
21};
22
23#define SDHI_FLAG_NEED_CLKH_FALLBACK BIT(0)
24
25struct renesas_sdhi_of_data {
26 unsigned long tmio_flags;
27 u32 tmio_ocr_mask;
28 unsigned long capabilities;
29 unsigned long capabilities2;
30 enum dma_slave_buswidth dma_buswidth;
31 dma_addr_t dma_rx_offset;
32 unsigned int bus_shift;
33 int scc_offset;
34 struct renesas_sdhi_scc *taps;
35 int taps_num;
36 unsigned int max_blk_count;
37 unsigned short max_segs;
38 unsigned long sdhi_flags;
39};
40
41#define SDHI_CALIB_TABLE_MAX 32
42
43#define sdhi_has_quirk(p, q) ((p)->quirks && (p)->quirks->q)
44
45struct renesas_sdhi_quirks {
46 bool hs400_disabled;
47 bool hs400_4taps;
48 bool fixed_addr_mode;
49 bool dma_one_rx_only;
50 bool manual_tap_correction;
51 bool old_info1_layout;
52 u32 hs400_bad_taps;
53 const u8 (*hs400_calib_table)[SDHI_CALIB_TABLE_MAX];
54};
55
56struct renesas_sdhi_of_data_with_quirks {
57 const struct renesas_sdhi_of_data *of_data;
58 const struct renesas_sdhi_quirks *quirks;
59};
60
61/* We want both end_flags to be set before we mark DMA as finished */
62#define SDHI_DMA_END_FLAG_DMA 0
63#define SDHI_DMA_END_FLAG_ACCESS 1
64
65struct renesas_sdhi_dma {
66 unsigned long end_flags;
67 enum dma_slave_buswidth dma_buswidth;
68 dma_filter_fn filter;
69 void (*enable)(struct tmio_mmc_host *host, bool enable);
70 struct completion dma_dataend;
71 struct work_struct dma_complete;
72};
73
74struct renesas_sdhi {
75 struct clk *clk;
76 struct clk *clkh;
77 struct clk *clk_cd;
78 struct tmio_mmc_data mmc_data;
79 struct renesas_sdhi_dma dma_priv;
80 const struct renesas_sdhi_quirks *quirks;
81 struct pinctrl *pinctrl;
82 struct pinctrl_state *pins_default, *pins_uhs;
83 void __iomem *scc_ctl;
84 u32 scc_tappos;
85 u32 scc_tappos_hs400;
86 const u8 *adjust_hs400_calib_table;
87 bool needs_adjust_hs400;
88
89 /* Tuning values: 1 for success, 0 for failure */
90 DECLARE_BITMAP(taps, BITS_PER_LONG);
91 /* Sampling data comparison: 1 for match, 0 for mismatch */
92 DECLARE_BITMAP(smpcmp, BITS_PER_LONG);
93 unsigned int tap_num;
94 unsigned int tap_set;
95
96 struct reset_control *rstc;
97 struct tmio_mmc_host *host;
98};
99
100#define host_to_priv(host) \
101 container_of((host)->pdata, struct renesas_sdhi, mmc_data)
102
103int renesas_sdhi_probe(struct platform_device *pdev,
104 const struct tmio_mmc_dma_ops *dma_ops,
105 const struct renesas_sdhi_of_data *of_data,
106 const struct renesas_sdhi_quirks *quirks);
107void renesas_sdhi_remove(struct platform_device *pdev);
108#endif